Integrate SME2 kernels
* Add SME/SME2 detection.
* Integrate SME2 implementation for:
- Normal convolution
- Winograd
- Depthwise convolution
- Pooling
Resolves: COMPMID-5700
Signed-off-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Change-Id: I2f1ca1d05f8cfeee9309ed1c0a36096a4a6aad5c
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/8692
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/depthwise_fp32.cpp b/src/core/NEON/kernels/arm_conv/depthwise/depthwise_fp32.cpp
index 643cf1d..09ee983 100644
--- a/src/core/NEON/kernels/arm_conv/depthwise/depthwise_fp32.cpp
+++ b/src/core/NEON/kernels/arm_conv/depthwise/depthwise_fp32.cpp
@@ -32,8 +32,27 @@
#include "depthwise_implementation_constraints.hpp"
+#include "interleaves/list.hpp"
+
#if defined(__aarch64__)
#if defined(ARM_COMPUTE_ENABLE_SVE)
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+#include "kernels/sme2_fp32bf16fp32_planar_3x3_s1_4rows_dot_za.hpp"
+#include "kernels/sme2_fp32bf16fp32_planar_3x3_s2_4rows_dot_za.hpp"
+#include "kernels/sme2_fp32bf16fp32_planar_5x5_s1_4rows_dot_za.hpp"
+#include "kernels/sme2_fp32bf16fp32_planar_5x5_s2_4rows_dot_za.hpp"
+
+#include "kernels/sme2_fp32_planar_3x3_s1_4rows_mla_za.hpp"
+#include "kernels/sme2_fp32_planar_3x3_s2_4rows_mla_za.hpp"
+#include "kernels/sme2_fp32_planar_5x5_s1_4rows_mla_za.hpp"
+#include "kernels/sme2_fp32_planar_5x5_s2_4rows_mla_za.hpp"
+
+#include "kernels/sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst.hpp"
+#include "kernels/sme2_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst.hpp"
+#include "kernels/sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp"
+#include "kernels/sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp"
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
+
#include "kernels/sve_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst.hpp"
#include "kernels/sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst.hpp"
#include "kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp"
@@ -72,6 +91,18 @@
);
}
+ template <class Strategy>
+ unsigned int planar_cycle_estimate(const DepthwiseArgs &args, const Nothing &)
+ {
+ // First-pass: compute the number of output pixels which will be computed.
+ return arm_gemm::roundup(args.output_rows, Strategy::output_rows) *
+ args.output_cols *
+ arm_gemm::iceildiv(
+ (long unsigned) args.input_channels * args.channel_multiplier,
+ arm_gemm::utils::get_vector_length<typename Strategy::return_type>(Strategy::vl_type)
+ );
+ }
+
#if defined(__aarch64__)
unsigned int not_preferred(const DepthwiseArgs &, const Nothing &)
{
@@ -89,6 +120,165 @@
static const DepthwiseImplementation<float, float> depthwise_fp32_methods[] = {
#if defined(__aarch64__)
#if defined(ARM_COMPUTE_ENABLE_SVE)
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+ {
+ DepthwiseMethod::PLANAR,
+ "sme2_fp32bf16fp32_planar_3x3_s1_4rows_dot_za",
+ constraint(fast_mode_enabled,
+ cpu_has_sme, cpu_has_sme2,
+ is_supported<sme2_fp32bf16fp32_planar_3x3_s1_4rows_dot_za>,
+ has_no_channel_multiplier, no_prime_right_pad),
+ nullptr,
+ [] (const DepthwiseArgs &args, const Nothing &) -> DepthwiseCommon<float, float, float> * {
+ auto strat = new sme2_fp32bf16fp32_planar_3x3_s1_4rows_dot_za(args.cpu_info);
+ return new DepthwisePlanar<float>(strat, args);
+ },
+ },
+ {
+ DepthwiseMethod::PLANAR,
+ "sme2_fp32bf16fp32_planar_3x3_s2_4rows_dot_za",
+ constraint(fast_mode_enabled,
+ cpu_has_sme, cpu_has_sme2,
+ is_supported<sme2_fp32bf16fp32_planar_3x3_s2_4rows_dot_za>,
+ has_no_channel_multiplier, no_prime_right_pad),
+ nullptr,
+ [] (const DepthwiseArgs &args, const Nothing &) -> DepthwiseCommon<float, float, float> * {
+ auto strat = new sme2_fp32bf16fp32_planar_3x3_s2_4rows_dot_za(args.cpu_info);
+ return new DepthwisePlanar<float>(strat, args);
+ },
+ },
+ {
+ DepthwiseMethod::PLANAR,
+ "sme2_fp32bf16fp32_planar_5x5_s1_4rows_dot_za",
+ constraint(fast_mode_enabled,
+ cpu_has_sme, cpu_has_sme2,
+ is_supported<sme2_fp32bf16fp32_planar_5x5_s1_4rows_dot_za>,
+ has_no_channel_multiplier, no_prime_right_pad),
+ nullptr,
+ [] (const DepthwiseArgs &args, const Nothing &) -> DepthwiseCommon<float, float, float> * {
+ auto strat = new sme2_fp32bf16fp32_planar_5x5_s1_4rows_dot_za(args.cpu_info);
+ return new DepthwisePlanar<float>(strat, args);
+ },
+ },
+ {
+ DepthwiseMethod::PLANAR,
+ "sme2_fp32bf16fp32_planar_5x5_s2_4rows_dot_za",
+ constraint(fast_mode_enabled,
+ cpu_has_sme, cpu_has_sme2,
+ is_supported<sme2_fp32bf16fp32_planar_5x5_s2_4rows_dot_za>,
+ has_no_channel_multiplier, no_prime_right_pad),
+ nullptr,
+ [] (const DepthwiseArgs &args, const Nothing &) -> DepthwiseCommon<float, float, float> * {
+ auto strat = new sme2_fp32bf16fp32_planar_5x5_s2_4rows_dot_za(args.cpu_info);
+ return new DepthwisePlanar<float>(strat, args);
+ },
+ },
+
+ {
+ DepthwiseMethod::PLANAR,
+ "sme2_fp32_planar_3x3_s1_4rows_mla_za",
+ constraint(cpu_has_sme, cpu_has_sme2,
+ is_supported<sme2_fp32_planar_3x3_s1_4rows_mla_za>,
+ has_no_channel_multiplier, no_prime_right_pad),
+ [] (const DepthwiseArgs &args, const Nothing &os) -> unsigned int {
+ // Heuristic, don't prefer this kernel unless the input plane is greater
+ // than the number of channels.
+ if (args.input_rows * args.input_cols < args.input_channels)
+ return UINT32_MAX;
+
+ return planar_cycle_estimate<sme2_fp32_planar_3x3_s1_4rows_mla_za>(args, os);
+ },
+ [] (const DepthwiseArgs &args, const Nothing &) -> DepthwiseCommon<float, float, float> * {
+ auto strat = new sme2_fp32_planar_3x3_s1_4rows_mla_za(args.cpu_info);
+ return new DepthwisePlanar<float>(strat, args);
+ },
+ },
+ {
+ DepthwiseMethod::PLANAR,
+ "sme2_fp32_planar_3x3_s2_4rows_mla_za",
+ constraint(cpu_has_sme, cpu_has_sme2,
+ is_supported<sme2_fp32_planar_3x3_s2_4rows_mla_za>,
+ has_no_channel_multiplier, no_prime_right_pad),
+ planar_cycle_estimate<sme2_fp32_planar_3x3_s2_4rows_mla_za>,
+ [] (const DepthwiseArgs &args, const Nothing &) -> DepthwiseCommon<float, float, float> * {
+ auto strat = new sme2_fp32_planar_3x3_s2_4rows_mla_za(args.cpu_info);
+ return new DepthwisePlanar<float>(strat, args);
+ },
+ },
+ {
+ DepthwiseMethod::PLANAR,
+ "sme2_fp32_planar_5x5_s1_4rows_mla_za",
+ constraint(cpu_has_sme, cpu_has_sme2,
+ is_supported<sme2_fp32_planar_5x5_s1_4rows_mla_za>,
+ has_no_channel_multiplier, no_prime_right_pad),
+ nullptr,
+ [] (const DepthwiseArgs &args, const Nothing &) -> DepthwiseCommon<float, float, float> * {
+ auto strat = new sme2_fp32_planar_5x5_s1_4rows_mla_za(args.cpu_info);
+ return new DepthwisePlanar<float>(strat, args);
+ },
+ },
+ {
+ DepthwiseMethod::PLANAR,
+ "sme2_fp32_planar_5x5_s2_4rows_mla_za",
+ constraint(cpu_has_sme, cpu_has_sme2,
+ is_supported<sme2_fp32_planar_5x5_s2_4rows_mla_za>,
+ has_no_channel_multiplier, no_prime_right_pad),
+ nullptr,
+ [] (const DepthwiseArgs &args, const Nothing &) -> DepthwiseCommon<float, float, float> * {
+ auto strat = new sme2_fp32_planar_5x5_s2_4rows_mla_za(args.cpu_info);
+ return new DepthwisePlanar<float>(strat, args);
+ },
+ },
+
+ {
+ DepthwiseMethod::DEPTHFIRST,
+ "sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst",
+ constraint(cpu_has_sme, cpu_has_sme2,
+ is_supported<sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst>,
+ has_no_channel_multiplier),
+ cycle_estimate<sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst>,
+ [] (const DepthwiseArgs &args, const Nothing &) -> DepthwiseCommon<float, float, float> * {
+ auto strat = new sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst(args.cpu_info);
+ return new DepthwiseDepthfirst<float, float, float, float>(strat, args);
+ },
+ },
+ {
+ DepthwiseMethod::DEPTHFIRST,
+ "sme2_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst",
+ constraint(cpu_has_sme, cpu_has_sme2,
+ is_supported<sme2_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst>,
+ has_no_channel_multiplier),
+ cycle_estimate<sme2_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst>,
+ [] (const DepthwiseArgs &args, const Nothing &) -> DepthwiseCommon<float, float, float> * {
+ auto strat = new sme2_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst(args.cpu_info);
+ return new DepthwiseDepthfirst<float, float, float, float>(strat, args);
+ },
+ },
+ {
+ DepthwiseMethod::DEPTHFIRST,
+ "sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst",
+ constraint(cpu_has_sme, cpu_has_sme2,
+ is_supported<sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst>,
+ has_no_channel_multiplier),
+ cycle_estimate<sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst>,
+ [] (const DepthwiseArgs &args, const Nothing &) -> DepthwiseCommon<float, float, float> * {
+ auto strat = new sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst(args.cpu_info);
+ return new DepthwiseDepthfirst<float, float, float, float>(strat, args);
+ },
+ },
+ {
+ DepthwiseMethod::DEPTHFIRST,
+ "sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst",
+ constraint(cpu_has_sme, cpu_has_sme2,
+ is_supported<sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst>,
+ has_no_channel_multiplier),
+ cycle_estimate<sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst>,
+ [] (const DepthwiseArgs &args, const Nothing &) -> DepthwiseCommon<float, float, float> * {
+ auto strat = new sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst(args.cpu_info);
+ return new DepthwiseDepthfirst<float, float, float, float>(strat, args);
+ },
+ },
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
{
DepthwiseMethod::DEPTHFIRST,
"sve_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst",
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/depthwise_implementation_constraints.hpp b/src/core/NEON/kernels/arm_conv/depthwise/depthwise_implementation_constraints.hpp
index 78b6aec..1ba7694 100644
--- a/src/core/NEON/kernels/arm_conv/depthwise/depthwise_implementation_constraints.hpp
+++ b/src/core/NEON/kernels/arm_conv/depthwise/depthwise_implementation_constraints.hpp
@@ -85,6 +85,18 @@
return args.cpu_info->has_dotprod();
}
+bool cpu_has_sme(const DepthwiseArgs &args, const void *) __attribute__ ((unused));
+bool cpu_has_sme(const DepthwiseArgs &args, const void *)
+{
+ return args.cpu_info->has_sme();
+}
+
+bool cpu_has_sme2(const DepthwiseArgs &args, const void *) __attribute__ ((unused));
+bool cpu_has_sme2(const DepthwiseArgs &args, const void *)
+{
+ return args.cpu_info->has_sme2();
+}
+
bool cpu_has_sve(const DepthwiseArgs &args, const void *) __attribute__ ((unused));
bool cpu_has_sve(const DepthwiseArgs &args, const void *)
{
@@ -115,6 +127,15 @@
return args.channel_multiplier > 1;
}
+// Planar kernels require a "priming" step before the main processing loop. The kernels can prime with left padding
+// or input data, but not right padding - which could be needed in some extreme cases such as a 5x5 kernel, width 1
+// padding 2. These are rare enough and can be handled with other kernels anyway, so filter them out with this.
+bool no_prime_right_pad(const DepthwiseArgs &args, const void *) __attribute__ ((unused));
+bool no_prime_right_pad(const DepthwiseArgs &args, const void *)
+{
+ return (args.input_cols + args.padding.left) >= (args.kernel_cols - 1);
+}
+
bool qp_has_no_left_shift(const DepthwiseArgs &args, const void *_qp) __attribute__ ((unused));
bool qp_has_no_left_shift(const DepthwiseArgs &, const void *_qp)
{
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/depthwise_planar.hpp b/src/core/NEON/kernels/arm_conv/depthwise/depthwise_planar.hpp
index ff5098d..f3160fb 100644
--- a/src/core/NEON/kernels/arm_conv/depthwise/depthwise_planar.hpp
+++ b/src/core/NEON/kernels/arm_conv/depthwise/depthwise_planar.hpp
@@ -256,6 +256,9 @@
{
}
+ DepthwisePlanar(DepthwisePlanar &) = delete;
+ DepthwisePlanar &operator=(DepthwisePlanar &) = delete;
+
size_t get_storage_size(void) const override
{
return m_strat->get_storage_size(this->m_args);
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/depthwise_s8q.cpp b/src/core/NEON/kernels/arm_conv/depthwise/depthwise_s8q.cpp
index 4ff249a..2d03183 100644
--- a/src/core/NEON/kernels/arm_conv/depthwise/depthwise_s8q.cpp
+++ b/src/core/NEON/kernels/arm_conv/depthwise/depthwise_s8q.cpp
@@ -28,11 +28,19 @@
#include "depthwise_depthfirst.hpp"
#include "depthwise_depthfirst_generic.hpp"
#include "depthwise_depthfirst_multiplier.hpp"
+#include "depthwise_planar.hpp"
#include "depthwise_implementation_constraints.hpp"
#if defined(__aarch64__)
#if defined(ARM_COMPUTE_ENABLE_SVE)
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+#include "kernels/sme2_s8q_planar_3x3_s1_4rows_dot_za.hpp"
+#include "kernels/sme2_s8q_planar_3x3_s2_4rows_dot_za.hpp"
+#include "kernels/sme2_s8q_planar_5x5_s1_4rows_dot_za.hpp"
+#include "kernels/sme2_s8q_planar_5x5_s2_4rows_dot_za.hpp"
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
+
#include "kernels/sve_s8qs_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp"
#include "kernels/sve_s8q_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp"
#include "kernels/sve_s8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp"
@@ -73,6 +81,60 @@
static const DepthwiseImplementation<int8_t, int8_t, int8_t, Requantize32> depthwise_s8q_methods[] = {
#if defined(__aarch64__)
#if defined(ARM_COMPUTE_ENABLE_SVE)
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+ {
+ DepthwiseMethod::PLANAR,
+ "sme2_s8q_planar_3x3_s1_4rows_dot_za",
+ constraint<Requantize32>(cpu_has_sme, cpu_has_sme2,
+ is_supported<sme2_s8q_planar_3x3_s1_4rows_dot_za>,
+ has_no_channel_multiplier,
+ qp_has_no_left_shift, no_prime_right_pad),
+ nullptr,
+ [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon<int8_t, int8_t, int8_t> * {
+ auto strat = new sme2_s8q_planar_3x3_s1_4rows_dot_za(args.cpu_info);
+ return new DepthwisePlanar<int8_t>(strat, args, qp);
+ },
+ },
+ {
+ DepthwiseMethod::PLANAR,
+ "sme2_s8q_planar_3x3_s2_4rows_dot_za",
+ constraint<Requantize32>(cpu_has_sme, cpu_has_sme2,
+ is_supported<sme2_s8q_planar_3x3_s2_4rows_dot_za>,
+ has_no_channel_multiplier,
+ qp_has_no_left_shift, no_prime_right_pad),
+ nullptr,
+ [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon<int8_t, int8_t, int8_t> * {
+ auto strat = new sme2_s8q_planar_3x3_s2_4rows_dot_za(args.cpu_info);
+ return new DepthwisePlanar<int8_t>(strat, args, qp);
+ },
+ },
+ {
+ DepthwiseMethod::PLANAR,
+ "sme2_s8q_planar_5x5_s1_4rows_dot_za",
+ constraint<Requantize32>(cpu_has_sme, cpu_has_sme2,
+ is_supported<sme2_s8q_planar_5x5_s1_4rows_dot_za>,
+ has_no_channel_multiplier,
+ qp_has_no_left_shift, no_prime_right_pad),
+ nullptr,
+ [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon<int8_t, int8_t, int8_t> * {
+ auto strat = new sme2_s8q_planar_5x5_s1_4rows_dot_za(args.cpu_info);
+ return new DepthwisePlanar<int8_t>(strat, args, qp);
+ },
+ },
+ {
+ DepthwiseMethod::PLANAR,
+ "sme2_s8q_planar_5x5_s2_4rows_dot_za",
+ constraint<Requantize32>(cpu_has_sme, cpu_has_sme2,
+ is_supported<sme2_s8q_planar_5x5_s2_4rows_dot_za>,
+ has_no_channel_multiplier,
+ qp_has_no_left_shift, no_prime_right_pad),
+ nullptr,
+ [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon<int8_t, int8_t, int8_t> * {
+ auto strat = new sme2_s8q_planar_5x5_s2_4rows_dot_za(args.cpu_info);
+ return new DepthwisePlanar<int8_t>(strat, args, qp);
+ },
+ },
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
{
DepthwiseMethod::DEPTHFIRST,
"sve_s8qs_nhwc_3x3_s1_output2x2_dot_depthfirst",
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/depthwise_u8q.cpp b/src/core/NEON/kernels/arm_conv/depthwise/depthwise_u8q.cpp
index b1489d0..9dbd89f 100644
--- a/src/core/NEON/kernels/arm_conv/depthwise/depthwise_u8q.cpp
+++ b/src/core/NEON/kernels/arm_conv/depthwise/depthwise_u8q.cpp
@@ -28,11 +28,19 @@
#include "depthwise_depthfirst.hpp"
#include "depthwise_depthfirst_generic.hpp"
#include "depthwise_depthfirst_multiplier.hpp"
+#include "depthwise_planar.hpp"
#include "depthwise_implementation_constraints.hpp"
#if defined(__aarch64__)
#if defined(ARM_COMPUTE_ENABLE_SVE)
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+#include "kernels/sme2_u8q_planar_3x3_s1_4rows_dot_za.hpp"
+#include "kernels/sme2_u8q_planar_3x3_s2_4rows_dot_za.hpp"
+#include "kernels/sme2_u8q_planar_5x5_s1_4rows_dot_za.hpp"
+#include "kernels/sme2_u8q_planar_5x5_s2_4rows_dot_za.hpp"
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
+
#include "kernels/sve_u8q_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp"
#include "kernels/sve_u8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp"
#include "kernels/sve_u8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp"
@@ -66,6 +74,60 @@
static const DepthwiseImplementation<uint8_t, uint8_t, uint8_t, Requantize32> depthwise_u8q_methods[] = {
#if defined(__aarch64__)
#if defined(ARM_COMPUTE_ENABLE_SVE)
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+ {
+ DepthwiseMethod::PLANAR,
+ "sme2_u8q_planar_3x3_s1_4rows_dot_za",
+ constraint<Requantize32>(cpu_has_sme, cpu_has_sme2,
+ is_supported<sme2_u8q_planar_3x3_s1_4rows_dot_za>,
+ has_no_channel_multiplier,
+ qp_has_no_left_shift, no_prime_right_pad),
+ nullptr,
+ [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon<uint8_t, uint8_t, uint8_t> * {
+ auto strat = new sme2_u8q_planar_3x3_s1_4rows_dot_za(args.cpu_info);
+ return new DepthwisePlanar<uint8_t>(strat, args, qp);
+ },
+ },
+ {
+ DepthwiseMethod::PLANAR,
+ "sme2_u8q_planar_3x3_s2_4rows_dot_za",
+ constraint<Requantize32>(cpu_has_sme, cpu_has_sme2,
+ is_supported<sme2_u8q_planar_3x3_s2_4rows_dot_za>,
+ has_no_channel_multiplier,
+ qp_has_no_left_shift, no_prime_right_pad),
+ nullptr,
+ [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon<uint8_t, uint8_t, uint8_t> * {
+ auto strat = new sme2_u8q_planar_3x3_s2_4rows_dot_za(args.cpu_info);
+ return new DepthwisePlanar<uint8_t>(strat, args, qp);
+ },
+ },
+ {
+ DepthwiseMethod::PLANAR,
+ "sme2_u8q_planar_5x5_s1_4rows_dot_za",
+ constraint<Requantize32>(cpu_has_sme, cpu_has_sme2,
+ is_supported<sme2_u8q_planar_5x5_s1_4rows_dot_za>,
+ has_no_channel_multiplier,
+ qp_has_no_left_shift, no_prime_right_pad),
+ nullptr,
+ [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon<uint8_t, uint8_t, uint8_t> * {
+ auto strat = new sme2_u8q_planar_5x5_s1_4rows_dot_za(args.cpu_info);
+ return new DepthwisePlanar<uint8_t>(strat, args, qp);
+ },
+ },
+ {
+ DepthwiseMethod::PLANAR,
+ "sme2_u8q_planar_5x5_s2_4rows_dot_za",
+ constraint<Requantize32>(cpu_has_sme, cpu_has_sme2,
+ is_supported<sme2_u8q_planar_5x5_s2_4rows_dot_za>,
+ has_no_channel_multiplier,
+ qp_has_no_left_shift, no_prime_right_pad),
+ nullptr,
+ [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon<uint8_t, uint8_t, uint8_t> * {
+ auto strat = new sme2_u8q_planar_5x5_s2_4rows_dot_za(args.cpu_info);
+ return new DepthwisePlanar<uint8_t>(strat, args, qp);
+ },
+ },
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
{
DepthwiseMethod::DEPTHFIRST,
"sve_u8q_nhwc_3x3_s1_output2x2_dot_depthfirst",
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/depthwise_u8s8u8q.cpp b/src/core/NEON/kernels/arm_conv/depthwise/depthwise_u8s8u8q.cpp
index 9b98901..0665c67 100644
--- a/src/core/NEON/kernels/arm_conv/depthwise/depthwise_u8s8u8q.cpp
+++ b/src/core/NEON/kernels/arm_conv/depthwise/depthwise_u8s8u8q.cpp
@@ -28,11 +28,18 @@
#include "depthwise_depthfirst.hpp"
#include "depthwise_depthfirst_generic.hpp"
#include "depthwise_depthfirst_multiplier.hpp"
+#include "depthwise_planar.hpp"
#include "depthwise_implementation_constraints.hpp"
#if defined(__aarch64__)
#if defined(ARM_COMPUTE_ENABLE_SVE)
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+#include "kernels/sme2_u8s8u8q_planar_3x3_s1_4rows_dot_za.hpp"
+#include "kernels/sme2_u8s8u8q_planar_3x3_s2_4rows_dot_za.hpp"
+#include "kernels/sme2_u8s8u8q_planar_5x5_s1_4rows_dot_za.hpp"
+#include "kernels/sme2_u8s8u8q_planar_5x5_s2_4rows_dot_za.hpp"
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
#include "kernels/sve_u8s8u8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp"
#include "kernels/sve_u8s8u8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp"
#include "kernels/sve_u8s8u8q_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp"
@@ -54,6 +61,60 @@
static const DepthwiseImplementation<uint8_t, int8_t, uint8_t, Requantize32> depthwise_u8q_methods[] = {
#if defined(__aarch64__)
#if defined(ARM_COMPUTE_ENABLE_SVE)
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+ {
+ DepthwiseMethod::PLANAR,
+ "sme2_u8s8u8q_planar_3x3_s1_4rows_dot_za",
+ constraint<Requantize32>(cpu_has_sme, cpu_has_sme2,
+ is_supported<sme2_u8s8u8q_planar_3x3_s1_4rows_dot_za>,
+ has_no_channel_multiplier,
+ qp_has_no_left_shift),
+ nullptr,
+ [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon<uint8_t, int8_t, uint8_t> * {
+ auto strat = new sme2_u8s8u8q_planar_3x3_s1_4rows_dot_za(args.cpu_info);
+ return new DepthwisePlanar<uint8_t, int8_t>(strat, args, qp);
+ },
+ },
+ {
+ DepthwiseMethod::PLANAR,
+ "sme2_u8s8u8q_planar_3x3_s2_4rows_dot_za",
+ constraint<Requantize32>(cpu_has_sme, cpu_has_sme2,
+ is_supported<sme2_u8s8u8q_planar_3x3_s2_4rows_dot_za>,
+ has_no_channel_multiplier,
+ qp_has_no_left_shift),
+ nullptr,
+ [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon<uint8_t, int8_t, uint8_t> * {
+ auto strat = new sme2_u8s8u8q_planar_3x3_s2_4rows_dot_za(args.cpu_info);
+ return new DepthwisePlanar<uint8_t, int8_t>(strat, args, qp);
+ },
+ },
+ {
+ DepthwiseMethod::PLANAR,
+ "sme2_u8s8u8q_planar_5x5_s1_4rows_dot_za",
+ constraint<Requantize32>(cpu_has_sme, cpu_has_sme2,
+ is_supported<sme2_u8s8u8q_planar_5x5_s1_4rows_dot_za>,
+ has_no_channel_multiplier,
+ qp_has_no_left_shift),
+ nullptr,
+ [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon<uint8_t, int8_t, uint8_t> * {
+ auto strat = new sme2_u8s8u8q_planar_5x5_s1_4rows_dot_za(args.cpu_info);
+ return new DepthwisePlanar<uint8_t, int8_t>(strat, args, qp);
+ },
+ },
+ {
+ DepthwiseMethod::PLANAR,
+ "sme2_u8s8u8q_planar_5x5_s2_4rows_dot_za",
+ constraint<Requantize32>(cpu_has_sme, cpu_has_sme2,
+ is_supported<sme2_u8s8u8q_planar_5x5_s2_4rows_dot_za>,
+ has_no_channel_multiplier,
+ qp_has_no_left_shift),
+ nullptr,
+ [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon<uint8_t, int8_t, uint8_t> * {
+ auto strat = new sme2_u8s8u8q_planar_5x5_s2_4rows_dot_za(args.cpu_info);
+ return new DepthwisePlanar<uint8_t, int8_t>(strat, args, qp);
+ },
+ },
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
{
DepthwiseMethod::DEPTHFIRST,
"sve_u8s8u8q_nhwc_3x3_s1_output2x2_mla_depthfirst",
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp
new file mode 100644
index 0000000..a200ebf
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include "src/core/NEON/kernels/arm_gemm/utils.hpp"
+
+#include <cstdint>
+
+#pragma once
+
+#if defined(__aarch64__)
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_indirect_impl(const float *const *const input_ptrs, float *const *const outptrs, const void *params, unsigned int n_channels, const float activation_min, const float activation_max);
+void sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_direct_impl(const unsigned int n_tile_rows, const unsigned int n_tile_cols, const float *inptr, int64_t ld_input_row, int64_t ld_input_col, float *outptr, int64_t ld_output_row, int64_t ld_output_col, const void *params, unsigned int n_channels, const float activation_min, const float activation_max);
+
+class sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst : public DepthwiseDepthfirstStrategy<float, float, float, float>
+{
+ private:
+ using Parent = DepthwiseDepthfirstStrategy<float, float, float, float>;
+ Parent::IndirectKernelType m_indirect_kernel = sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_indirect_impl;
+ Parent::DirectKernelType m_direct_kernel = sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_direct_impl;
+
+ public:
+ using return_type = float;
+ constexpr static auto vl_type = arm_gemm::VLType::SME;
+
+ constexpr static unsigned int kernel_rows = 3;
+ constexpr static unsigned int kernel_cols = 3;
+
+ constexpr static unsigned int stride_rows = 1;
+ constexpr static unsigned int stride_cols = 1;
+
+ constexpr static unsigned int output_rows = 2;
+ constexpr static unsigned int output_cols = 2;
+
+ sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst(const CPUInfo *)
+ : Parent(output_rows, output_cols, kernel_rows, kernel_cols, stride_rows, stride_cols) {}
+
+ arm_gemm::VLType get_vl_type(void) const override { return vl_type; }
+
+ Parent::IndirectKernelType get_indirect_kernel() const override { return m_indirect_kernel; }
+ Parent::DirectKernelType get_direct_kernel() const override { return m_direct_kernel; }
+};
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(__aarch64__)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp
new file mode 100644
index 0000000..4c42478
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp
@@ -0,0 +1,336 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <cstddef>
+#include <cstdint>
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_direct_impl(
+ const unsigned int n_tile_rows,
+ const unsigned int n_tile_cols,
+ const float *inptr,
+ int64_t ld_input_row,
+ int64_t ld_input_col,
+ float *outptr,
+ int64_t ld_output_row,
+ int64_t ld_output_col,
+ const void *params,
+ unsigned int n_channels,
+ const float activation_min,
+ const float activation_max
+)
+{
+ struct Args
+ {
+ const uint64_t n_tile_rows, n_tile_cols;
+ const float *inptr;
+ const uint64_t ld_input_row;
+ const uint64_t ld_input_col;
+ float *outptr;
+ const uint64_t ld_output_row;
+ const uint64_t ld_output_col;
+ const void *params;
+ const float min, max;
+
+ uint64_t tile_i = 0, tile_j = 0;
+
+ Args(
+ const unsigned int n_tile_rows,
+ const unsigned int n_tile_cols,
+ const float *inptr,
+ int64_t ld_input_row,
+ int64_t ld_input_col,
+ float *outptr,
+ int64_t ld_output_row,
+ int64_t ld_output_col,
+ const void *params,
+ const float activation_min,
+ const float activation_max
+ ) : n_tile_rows(n_tile_rows), n_tile_cols(n_tile_cols), inptr(inptr),
+ ld_input_row(ld_input_row), ld_input_col(ld_input_col), outptr(outptr),
+ ld_output_row(ld_output_row), ld_output_col(ld_output_col),
+ params(params), min(activation_min), max(activation_max)
+ {
+ }
+ };
+
+ Args params_struct(
+ n_tile_rows, n_tile_cols,
+ inptr, ld_input_row, ld_input_col,
+ outptr, ld_output_row, ld_output_col,
+ params, activation_min, activation_max
+ );
+
+ __asm__ __volatile__(
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "ptrue p3.b\n"
+ ".inst 0x25207810 // ptrue pn8.b\n"
+ "mov x5, #0x0\n"
+ "mov x6, #0x0\n"
+ "1:" // Tile loop
+ "str x5, [%x[params_struct], %[offsetof_args_tile_i]]\n"
+ "mov x21, #0x2\n"
+ "str x6, [%x[params_struct], %[offsetof_args_tile_j]]\n"
+ "ldr x20, [%x[params_struct], %[offsetof_args_ld_input_row]]\n"
+ "mul x19, x5, x20\n" // offset = tile_i * ld_input_row
+ "ldr x7, [%x[params_struct], %[offsetof_args_ld_input_col]]\n"
+ "madd x19, x6, x7, x19\n" // offset += tile_j * ld_input_col
+ "mul x19, x19, x21\n" // offset *= kernel_stride * output_size
+ "ldr x8, [%x[params_struct], %[offsetof_args_inptr]]\n"
+ "add x8, x8, x19, LSL #2\n" // inptr[0] += offset * sizeof(float)
+ "add x17, x8, x20, LSL #2\n"
+ "add x16, x17, x20, LSL #2\n"
+ "add x15, x7, x7\n"
+ "ldr x14, [%x[params_struct], %[offsetof_args_params]]\n"
+ "add x13, x16, x20, LSL #2\n"
+ "add x12, x15, x7\n"
+ "cbnz x6, 2f\n"
+ "ldr x19, [%x[params_struct], %[offsetof_args_n_tile_cols]]\n"
+ "sub x20, x19, x6\n"
+ "sub x20, x20, #0x1\n"
+ "lsl x11, %x[n_channels], #0x2\n"
+ "mov x19, #0x8\n"
+ "and x20, x20, #0x3fffff\n"
+ "mul x19, x19, x7\n"
+ "orr x11, x11, x20, LSL #22\n"
+ "orr x11, x11, x19, LSL #38\n"
+ "add x10, x17, x7, LSL #2\n"
+ "add x9, x8, x12, LSL #2\n"
+ "add x28, x17, x15, LSL #2\n"
+ "add x27, x16, x7, LSL #2\n"
+ "add x26, x13, x12, LSL #2\n"
+ "add x25, x8, x7, LSL #2\n"
+ "add x24, x8, x15, LSL #2\n"
+ "add x23, x16, x15, LSL #2\n"
+ "add x22, x17, x12, LSL #2\n"
+ "add x21, x16, x12, LSL #2\n"
+ "add x20, x13, x7, LSL #2\n"
+ "add x19, x13, x15, LSL #2\n"
+ ".inst 0xf8ab495a // rprfm pldonce, x10, [x11]\n"
+ ".inst 0xf8ab491a // rprfm pldonce, x8, [x11]\n"
+ ".inst 0xf8ab493a // rprfm pldonce, x9, [x11]\n"
+ ".inst 0xf8ab4b9a // rprfm pldonce, x28, [x11]\n"
+ ".inst 0xf8ab4b7a // rprfm pldonce, x27, [x11]\n"
+ ".inst 0xf8ab49ba // rprfm pldonce, x13, [x11]\n"
+ ".inst 0xf8ab4b5a // rprfm pldonce, x26, [x11]\n"
+ ".inst 0xf8ab4b3a // rprfm pldonce, x25, [x11]\n"
+ ".inst 0xf8ab4b1a // rprfm pldonce, x24, [x11]\n"
+ ".inst 0xf8ab4afa // rprfm pldonce, x23, [x11]\n"
+ ".inst 0xf8ab4a3a // rprfm pldonce, x17, [x11]\n"
+ ".inst 0xf8ab4ada // rprfm pldonce, x22, [x11]\n"
+ ".inst 0xf8ab4a1a // rprfm pldonce, x16, [x11]\n"
+ ".inst 0xf8ab4aba // rprfm pldonce, x21, [x11]\n"
+ ".inst 0xf8ab4a9a // rprfm pldonce, x20, [x11]\n"
+ ".inst 0xf8ab4a7a // rprfm pldonce, x19, [x11]\n"
+ "2:" // Tile loop: Prefetch input rows: End
+ "ldr x21, [%x[params_struct], %[offsetof_args_ld_output_row]]\n"
+ "mul x20, x5, x21\n" // offset = tile_i * ld_output_row
+ "mov x19, #0x2\n"
+ "ld1w { z18.s }, p3/Z, [x14]\n"
+ "ldr x24, [%x[params_struct], %[offsetof_args_ld_output_col]]\n"
+ "madd x20, x6, x24, x20\n" // offset += tile_j * ld_output_col
+ "addvl x14, x14, #1\n"
+ ".inst 0xa040c1c0 // ld1w { z0.s-z3.s }, pn8.b/Z, [x14]\n"
+ "ldr x23, [%x[params_struct], %[offsetof_args_outptr]]\n"
+ "mul x20, x20, x19\n" // offset *= output_tile_size
+ "cntw x22\n"
+ "ld1rw { z17.s }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n"
+ "addvl x14, x14, #4\n"
+ "add x23, x23, x20, LSL #2\n" // outptrs[0] += offset * sizeof(float)
+ ".inst 0xa040c1c4 // ld1w { z4.s-z7.s }, pn8.b/Z, [x14]\n"
+ "whilelt p2.s, XZR, %x[n_channels]\n"
+ "addvl x14, x14, #4\n"
+ "ld1rw { z16.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n"
+ "cmp x22, %x[n_channels]\n"
+ "add x21, x23, x21, LSL #2\n"
+ "ld1w { z8.s }, p3/Z, [x14]\n"
+ "mov x20, #0x0\n"
+ "sub x19, XZR, x22\n"
+ "ld1w { z9.s }, p2/Z, [x17, x7, LSL #2]\n"
+ "ld1w { z10.s }, p2/Z, [x8]\n"
+ "addvl x14, x14, #1\n"
+ "ld1w { z11.s }, p2/Z, [x8, x12, LSL #2]\n"
+ "ld1w { z12.s }, p2/Z, [x17, x15, LSL #2]\n"
+ "ld1w { z13.s }, p2/Z, [x16, x7, LSL #2]\n"
+ "bge 4f\n"
+ "3:" // Tile loop: Channel loop
+ "movprfx z28, z18\n fmla z28.s, p3/M, z4.s, z9.s\n"
+ "movprfx z29, z18\n fmla z29.s, p3/M, z3.s, z9.s\n"
+ "whilelt p1.s, x22, %x[n_channels]\n"
+ "incw x20\n"
+ "movprfx z30, z18\n fmla z30.s, p3/M, z1.s, z9.s\n"
+ "movprfx z31, z18\n fmla z31.s, p3/M, z0.s, z9.s\n"
+ "ld1w { z9.s }, p2/Z, [x13]\n"
+ "incw x22\n"
+ "fmla z28.s, p3/M, z0.s, z10.s\n"
+ "fmla z29.s, p3/M, z2.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x13, x12, LSL #2]\n"
+ "mov p0.b, p2.b\n"
+ "fmla z30.s, p3/M, z2.s, z12.s\n"
+ "fmla z31.s, p3/M, z1.s, z12.s\n"
+ "ld1w { z10.s }, p2/Z, [x16, x15, LSL #2]\n"
+ "incw x19\n"
+ "fmla z28.s, p3/M, z5.s, z12.s\n"
+ "fmla z29.s, p3/M, z4.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x8, x7, LSL #2]\n"
+ "fmla z30.s, p3/M, z6.s, z9.s\n"
+ "fmla z31.s, p3/M, z3.s, z13.s\n"
+ "ld1w { z9.s }, p2/Z, [x8, x15, LSL #2]\n"
+ "addvl x8, x8, #1\n"
+ "fmla z28.s, p3/M, z7.s, z13.s\n"
+ "fmla z29.s, p3/M, z6.s, z13.s\n"
+ "ld1w { z18.s }, p3/Z, [x14]\n"
+ "addvl x14, x14, #1\n"
+ "fmla z30.s, p3/M, z4.s, z13.s\n"
+ "fmla z31.s, p3/M, z8.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x17]\n"
+ "fmla z28.s, p3/M, z1.s, z12.s\n"
+ "fmla z29.s, p3/M, z0.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x17, x12, LSL #2]\n"
+ "addvl x17, x17, #1\n"
+ "fmla z30.s, p3/M, z5.s, z10.s\n"
+ "fmla z31.s, p3/M, z4.s, z10.s\n"
+ "fmla z28.s, p3/M, z2.s, z9.s\n"
+ "fmla z29.s, p3/M, z1.s, z9.s\n"
+ "ld1w { z9.s }, p2/Z, [x16]\n"
+ "fmla z30.s, p3/M, z0.s, z11.s\n"
+ "fmla z31.s, p3/M, z2.s, z12.s\n"
+ "fmla z28.s, p3/M, z8.s, z10.s\n"
+ "fmla z29.s, p3/M, z7.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x16, x12, LSL #2]\n"
+ "addvl x16, x16, #1\n"
+ "fmla z30.s, p3/M, z3.s, z9.s\n"
+ "fmla z31.s, p3/M, z5.s, z10.s\n"
+ "ld1w { z13.s }, p1/Z, [x16, x7, LSL #2]\n"
+ "fmla z28.s, p3/M, z3.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x13, x7, LSL #2]\n"
+ "fmla z29.s, p3/M, z5.s, z12.s\n"
+ "fmla z30.s, p3/M, z7.s, z11.s\n"
+ "fmla z31.s, p3/M, z6.s, z11.s\n"
+ "ld1w { z12.s }, p2/Z, [x13, x15, LSL #2]\n"
+ "whilelt p2.s, x20, %x[n_channels]\n"
+ "fmla z28.s, p3/M, z6.s, z9.s\n"
+ "fmla z29.s, p3/M, z8.s, z10.s\n"
+ ".inst 0xa040c1c0 // ld1w { z0.s-z3.s }, pn8.b/Z, [x14]\n"
+ "addvl x14, x14, #4\n"
+ "fmla z30.s, p3/M, z8.s, z12.s\n"
+ "fmla z31.s, p3/M, z7.s, z12.s\n"
+ ".inst 0xa040c1c4 // ld1w { z4.s-z7.s }, pn8.b/Z, [x14]\n"
+ "addvl x14, x14, #4\n"
+ "cmp x22, %x[n_channels]\n"
+ ".inst 0xc1b0ca3c // fclamp { z28.s-z31.s }, z17.s, z16.s\n"
+ "addvl x13, x13, #1\n"
+ "ld1w { z9.s }, p1/Z, [x17, x7, LSL #2]\n"
+ "ld1w { z10.s }, p1/Z, [x8]\n"
+ "st1w { z28.s }, p0, [x23]\n"
+ "ld1w { z11.s }, p1/Z, [x8, x12, LSL #2]\n"
+ "st1w { z29.s }, p0, [x23, x24, LSL #2]\n"
+ "addvl x23, x23, #1\n"
+ "ld1w { z12.s }, p1/Z, [x17, x15, LSL #2]\n"
+ "st1w { z30.s }, p0, [x21]\n"
+ "st1w { z31.s }, p0, [x21, x24, LSL #2]\n"
+ "addvl x21, x21, #1\n"
+ "ld1w { z8.s }, p3/Z, [x14]\n"
+ "addvl x14, x14, #1\n"
+ "blt 3b\n"
+ "4:" // Tile loop: Channel tail
+ "movprfx z28, z18\n fmla z28.s, p3/M, z4.s, z9.s\n"
+ "movprfx z29, z18\n fmla z29.s, p3/M, z3.s, z9.s\n"
+ "ldr x6, [%x[params_struct], %[offsetof_args_tile_j]]\n"
+ "add x6, x6, #0x1\n"
+ "movprfx z30, z18\n fmla z30.s, p3/M, z1.s, z9.s\n"
+ "movprfx z31, z18\n fmla z31.s, p3/M, z0.s, z9.s\n"
+ "ld1w { z9.s }, p2/Z, [x13]\n"
+ "ldr x5, [%x[params_struct], %[offsetof_args_tile_i]]\n"
+ "fmla z28.s, p3/M, z0.s, z10.s\n"
+ "fmla z29.s, p3/M, z2.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x13, x12, LSL #2]\n"
+ "ldr x19, [%x[params_struct], %[offsetof_args_n_tile_cols]]\n"
+ "fmla z30.s, p3/M, z2.s, z12.s\n"
+ "fmla z31.s, p3/M, z1.s, z12.s\n"
+ "ld1w { z10.s }, p2/Z, [x16, x15, LSL #2]\n"
+ "ldr x20, [%x[params_struct], %[offsetof_args_n_tile_rows]]\n"
+ "fmla z28.s, p3/M, z5.s, z12.s\n"
+ "fmla z29.s, p3/M, z4.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x8, x7, LSL #2]\n"
+ "cmp x6, x19\n"
+ "fmla z30.s, p3/M, z6.s, z9.s\n"
+ "fmla z31.s, p3/M, z3.s, z13.s\n"
+ "ld1w { z9.s }, p2/Z, [x8, x15, LSL #2]\n"
+ "add x19, x5, #0x1\n"
+ "fmla z28.s, p3/M, z7.s, z13.s\n"
+ "fmla z29.s, p3/M, z6.s, z13.s\n"
+ "csel x5, x5, x19, LT\n"
+ "mov p0.b, p2.b\n"
+ "fmla z30.s, p3/M, z4.s, z13.s\n"
+ "fmla z31.s, p3/M, z8.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x17]\n"
+ "csel x6, x6, XZR, LT\n"
+ "fmla z28.s, p3/M, z1.s, z12.s\n"
+ "fmla z29.s, p3/M, z0.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x17, x12, LSL #2]\n"
+ "cmp x5, x20\n"
+ "fmla z30.s, p3/M, z5.s, z10.s\n"
+ "fmla z31.s, p3/M, z4.s, z10.s\n"
+ "fmla z28.s, p3/M, z2.s, z9.s\n"
+ "fmla z29.s, p3/M, z1.s, z9.s\n"
+ "ld1w { z9.s }, p2/Z, [x16]\n"
+ "fmla z30.s, p3/M, z0.s, z11.s\n"
+ "fmla z31.s, p3/M, z2.s, z12.s\n"
+ "fmla z28.s, p3/M, z8.s, z10.s\n"
+ "fmla z29.s, p3/M, z7.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x16, x12, LSL #2]\n"
+ "fmla z30.s, p3/M, z3.s, z9.s\n"
+ "fmla z31.s, p3/M, z5.s, z10.s\n"
+ "fmla z28.s, p3/M, z3.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x13, x7, LSL #2]\n"
+ "fmla z29.s, p3/M, z5.s, z12.s\n"
+ "fmla z30.s, p3/M, z7.s, z11.s\n"
+ "fmla z31.s, p3/M, z6.s, z11.s\n"
+ "ld1w { z12.s }, p2/Z, [x13, x15, LSL #2]\n"
+ "fmla z28.s, p3/M, z6.s, z9.s\n"
+ "fmla z29.s, p3/M, z8.s, z10.s\n"
+ "fmla z30.s, p3/M, z8.s, z12.s\n"
+ "fmla z31.s, p3/M, z7.s, z12.s\n"
+ ".inst 0xc1b0ca3c // fclamp { z28.s-z31.s }, z17.s, z16.s\n"
+ "st1w { z28.s }, p0, [x23]\n"
+ "st1w { z29.s }, p0, [x23, x24, LSL #2]\n"
+ "st1w { z30.s }, p0, [x21]\n"
+ "st1w { z31.s }, p0, [x21, x24, LSL #2]\n"
+ "blt 1b\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [n_channels] "r" ((unsigned long) n_channels), [offsetof_args_inptr] "I" (offsetof(Args, inptr)), [offsetof_args_ld_input_col] "I" (offsetof(Args, ld_input_col)), [offsetof_args_ld_input_row] "I" (offsetof(Args, ld_input_row)), [offsetof_args_ld_output_col] "I" (offsetof(Args, ld_output_col)), [offsetof_args_ld_output_row] "I" (offsetof(Args, ld_output_row)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_n_tile_cols] "I" (offsetof(Args, n_tile_cols)), [offsetof_args_n_tile_rows] "I" (offsetof(Args, n_tile_rows)), [offsetof_args_outptr] "I" (offsetof(Args, outptr)), [offsetof_args_params] "I" (offsetof(Args, params)), [offsetof_args_tile_i] "I" (offsetof(Args, tile_i)), [offsetof_args_tile_j] "I" (offsetof(Args, tile_j)), [params_struct] "r" (¶ms_struct)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp
new file mode 100644
index 0000000..5fc6602
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp
@@ -0,0 +1,277 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <cstddef>
+#include <cstdint>
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_indirect_impl(
+ const float *const *const input_ptrs,
+ float *const *const outptrs,
+ const void *params,
+ unsigned int n_channels,
+ const float activation_min,
+ const float activation_max
+)
+{
+ struct Args
+ {
+ float *const *outptrs;
+ const void *params;
+ const float min, max;
+ const float *inptrs[16];
+
+ Args(
+ const float *const *const input_ptrs,
+ float *const *const outptrs,
+ const void *const params,
+ const float min,
+ const float max
+ ) : outptrs(outptrs), params(params), min(min), max(max)
+ {
+ inptrs[0] = input_ptrs[5];
+ inptrs[1] = input_ptrs[0];
+ inptrs[2] = input_ptrs[3];
+ inptrs[3] = input_ptrs[6];
+ inptrs[4] = input_ptrs[9];
+ inptrs[5] = input_ptrs[12];
+ inptrs[6] = input_ptrs[15];
+ inptrs[7] = input_ptrs[1];
+ inptrs[8] = input_ptrs[2];
+ inptrs[9] = input_ptrs[10];
+ inptrs[10] = input_ptrs[4];
+ inptrs[11] = input_ptrs[7];
+ inptrs[12] = input_ptrs[8];
+ inptrs[13] = input_ptrs[11];
+ inptrs[14] = input_ptrs[13];
+ inptrs[15] = input_ptrs[14];
+
+ }
+ };
+
+ Args params_struct(input_ptrs, outptrs, params,
+ activation_min, activation_max);
+
+ __asm__ __volatile__(
+ "ldr x19, [%x[params_struct], %[offsetof_args_outptrs]]\n"
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "add x14, %x[params_struct], %[offsetof_Args_inptrs]\n"
+ "ptrue p3.b\n"
+ "ldr x13, [%x[params_struct], %[offsetof_args_params]]\n"
+ ".inst 0x25207810 // ptrue pn8.b\n"
+ "ld1w { z18.s }, p3/Z, [x13]\n"
+ "addvl x13, x13, #1\n"
+ "ldp x12, x11, [x19, #0x0]\n"
+ "cntw x10\n"
+ ".inst 0xa040c1a0 // ld1w { z0.s-z3.s }, pn8.b/Z, [x13]\n"
+ "addvl x13, x13, #4\n"
+ "ldp x9, x28, [x19, #0x10]\n"
+ "mov x27, #0x0\n"
+ "whilelt p2.s, XZR, %x[n_channels]\n"
+ ".inst 0xa040c1a4 // ld1w { z4.s-z7.s }, pn8.b/Z, [x13]\n"
+ "ldp x26, x25, [x14, #0x0]\n"
+ "addvl x13, x13, #4\n"
+ "cmp x10, %x[n_channels]\n"
+ "ld1rw { z17.s }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n"
+ "ldp x24, x21, [x14, #0x10]\n"
+ "ld1rw { z16.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n"
+ "sub x23, XZR, x10\n"
+ "ldr x22, [x14, #0x20]\n"
+ "ld1w { z8.s }, p3/Z, [x13]\n"
+ "addvl x13, x13, #1\n"
+ "ld1w { z9.s }, p2/Z, [x26, x27, LSL #2]\n"
+ "ld1w { z10.s }, p2/Z, [x25, x27, LSL #2]\n"
+ "ld1w { z11.s }, p2/Z, [x24, x27, LSL #2]\n"
+ "ld1w { z12.s }, p2/Z, [x21, x27, LSL #2]\n"
+ "ld1w { z13.s }, p2/Z, [x22, x27, LSL #2]\n"
+ "bge 2f\n"
+ "1:" // Channel loop
+ "movprfx z28, z18\n fmla z28.s, p3/M, z4.s, z9.s\n"
+ "movprfx z29, z18\n fmla z29.s, p3/M, z3.s, z9.s\n"
+ "ldr x21, [x14, #0x28]\n"
+ "whilelt p1.s, x10, %x[n_channels]\n"
+ "movprfx z30, z18\n fmla z30.s, p3/M, z1.s, z9.s\n"
+ "movprfx z31, z18\n fmla z31.s, p3/M, z0.s, z9.s\n"
+ "ld1w { z9.s }, p2/Z, [x21, x27, LSL #2]\n"
+ "ldr x20, [x14, #0x30]\n"
+ "fmla z28.s, p3/M, z0.s, z10.s\n"
+ "fmla z29.s, p3/M, z2.s, z11.s\n"
+ "ldr x19, [x14, #0x38]\n"
+ "ld1w { z11.s }, p2/Z, [x20, x27, LSL #2]\n"
+ "fmla z30.s, p3/M, z2.s, z12.s\n"
+ "fmla z31.s, p3/M, z1.s, z12.s\n"
+ "ldr x25, [x14, #0x48]\n"
+ "ld1w { z10.s }, p2/Z, [x25, x27, LSL #2]\n"
+ "fmla z28.s, p3/M, z5.s, z12.s\n"
+ "fmla z29.s, p3/M, z4.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x19, x27, LSL #2]\n"
+ "ldr x26, [x14, #0x40]\n"
+ "fmla z30.s, p3/M, z6.s, z9.s\n"
+ "fmla z31.s, p3/M, z3.s, z13.s\n"
+ "ld1w { z9.s }, p2/Z, [x26, x27, LSL #2]\n"
+ "ldr x24, [x14, #0x50]\n"
+ "fmla z28.s, p3/M, z7.s, z13.s\n"
+ "fmla z29.s, p3/M, z6.s, z13.s\n"
+ "ldr x21, [x14, #0x58]\n"
+ "ld1w { z18.s }, p3/Z, [x13]\n"
+ "fmla z30.s, p3/M, z4.s, z13.s\n"
+ "fmla z31.s, p3/M, z8.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x24, x27, LSL #2]\n"
+ "ldr x22, [x14, #0x60]\n"
+ "fmla z28.s, p3/M, z1.s, z12.s\n"
+ "fmla z29.s, p3/M, z0.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x21, x27, LSL #2]\n"
+ "ldr x21, [x14, #0x68]\n"
+ "fmla z30.s, p3/M, z5.s, z10.s\n"
+ "fmla z31.s, p3/M, z4.s, z10.s\n"
+ "ldr x20, [x14, #0x70]\n"
+ "addvl x13, x13, #1\n"
+ "fmla z28.s, p3/M, z2.s, z9.s\n"
+ "fmla z29.s, p3/M, z1.s, z9.s\n"
+ "ld1w { z9.s }, p2/Z, [x22, x27, LSL #2]\n"
+ "ldr x19, [x14, #0x78]\n"
+ "fmla z30.s, p3/M, z0.s, z11.s\n"
+ "fmla z31.s, p3/M, z2.s, z12.s\n"
+ "ldp x26, x25, [x14, #0x0]\n"
+ "incw x23\n"
+ "fmla z28.s, p3/M, z8.s, z10.s\n"
+ "fmla z29.s, p3/M, z7.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x21, x27, LSL #2]\n"
+ "ldp x24, x21, [x14, #0x10]\n"
+ "fmla z30.s, p3/M, z3.s, z9.s\n"
+ "fmla z31.s, p3/M, z5.s, z10.s\n"
+ "ldr x22, [x14, #0x20]\n"
+ "ld1w { z13.s }, p1/Z, [x22, x10, LSL #2]\n"
+ "fmla z28.s, p3/M, z3.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x20, x27, LSL #2]\n"
+ "fmla z29.s, p3/M, z5.s, z12.s\n"
+ "mov p0.b, p2.b\n"
+ "fmla z30.s, p3/M, z7.s, z11.s\n"
+ "fmla z31.s, p3/M, z6.s, z11.s\n"
+ "ld1w { z12.s }, p2/Z, [x19, x27, LSL #2]\n"
+ "incw x27\n"
+ "fmla z28.s, p3/M, z6.s, z9.s\n"
+ "fmla z29.s, p3/M, z8.s, z10.s\n"
+ "ld1w { z9.s }, p1/Z, [x26, x10, LSL #2]\n"
+ "whilelt p2.s, x27, %x[n_channels]\n"
+ "fmla z30.s, p3/M, z8.s, z12.s\n"
+ "fmla z31.s, p3/M, z7.s, z12.s\n"
+ "ld1w { z10.s }, p1/Z, [x25, x10, LSL #2]\n"
+ "ld1w { z11.s }, p1/Z, [x24, x10, LSL #2]\n"
+ ".inst 0xc1b0ca3c // fclamp { z28.s-z31.s }, z17.s, z16.s\n"
+ "st1w { z28.s }, p0, [x12, x23, LSL #2]\n"
+ "ld1w { z12.s }, p1/Z, [x21, x10, LSL #2]\n"
+ "incw x10\n"
+ "cmp x10, %x[n_channels]\n"
+ "st1w { z29.s }, p0, [x11, x23, LSL #2]\n"
+ ".inst 0xa040c1a0 // ld1w { z0.s-z3.s }, pn8.b/Z, [x13]\n"
+ "addvl x13, x13, #4\n"
+ "st1w { z30.s }, p0, [x9, x23, LSL #2]\n"
+ ".inst 0xa040c1a4 // ld1w { z4.s-z7.s }, pn8.b/Z, [x13]\n"
+ "addvl x13, x13, #4\n"
+ "st1w { z31.s }, p0, [x28, x23, LSL #2]\n"
+ "ld1w { z8.s }, p3/Z, [x13]\n"
+ "addvl x13, x13, #1\n"
+ "blt 1b\n"
+ "2:" // Channel tail
+ "movprfx z28, z18\n fmla z28.s, p3/M, z4.s, z9.s\n"
+ "movprfx z29, z18\n fmla z29.s, p3/M, z3.s, z9.s\n"
+ "ldr x21, [x14, #0x28]\n"
+ "incw x23\n"
+ "movprfx z30, z18\n fmla z30.s, p3/M, z1.s, z9.s\n"
+ "movprfx z31, z18\n fmla z31.s, p3/M, z0.s, z9.s\n"
+ "ld1w { z9.s }, p2/Z, [x21, x27, LSL #2]\n"
+ "ldr x20, [x14, #0x30]\n"
+ "fmla z28.s, p3/M, z0.s, z10.s\n"
+ "fmla z29.s, p3/M, z2.s, z11.s\n"
+ "ldr x19, [x14, #0x38]\n"
+ "ld1w { z11.s }, p2/Z, [x20, x27, LSL #2]\n"
+ "fmla z30.s, p3/M, z2.s, z12.s\n"
+ "fmla z31.s, p3/M, z1.s, z12.s\n"
+ "ldr x25, [x14, #0x48]\n"
+ "ld1w { z10.s }, p2/Z, [x25, x27, LSL #2]\n"
+ "fmla z28.s, p3/M, z5.s, z12.s\n"
+ "fmla z29.s, p3/M, z4.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x19, x27, LSL #2]\n"
+ "ldr x26, [x14, #0x40]\n"
+ "fmla z30.s, p3/M, z6.s, z9.s\n"
+ "fmla z31.s, p3/M, z3.s, z13.s\n"
+ "ld1w { z9.s }, p2/Z, [x26, x27, LSL #2]\n"
+ "ldr x24, [x14, #0x50]\n"
+ "fmla z28.s, p3/M, z7.s, z13.s\n"
+ "fmla z29.s, p3/M, z6.s, z13.s\n"
+ "ldr x21, [x14, #0x58]\n"
+ "mov p0.b, p2.b\n"
+ "fmla z30.s, p3/M, z4.s, z13.s\n"
+ "fmla z31.s, p3/M, z8.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x24, x27, LSL #2]\n"
+ "ldr x22, [x14, #0x60]\n"
+ "fmla z28.s, p3/M, z1.s, z12.s\n"
+ "fmla z29.s, p3/M, z0.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x21, x27, LSL #2]\n"
+ "ldr x21, [x14, #0x68]\n"
+ "fmla z30.s, p3/M, z5.s, z10.s\n"
+ "fmla z31.s, p3/M, z4.s, z10.s\n"
+ "ldr x20, [x14, #0x70]\n"
+ "fmla z28.s, p3/M, z2.s, z9.s\n"
+ "fmla z29.s, p3/M, z1.s, z9.s\n"
+ "ld1w { z9.s }, p2/Z, [x22, x27, LSL #2]\n"
+ "ldr x19, [x14, #0x78]\n"
+ "fmla z30.s, p3/M, z0.s, z11.s\n"
+ "fmla z31.s, p3/M, z2.s, z12.s\n"
+ "fmla z28.s, p3/M, z8.s, z10.s\n"
+ "fmla z29.s, p3/M, z7.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x21, x27, LSL #2]\n"
+ "fmla z30.s, p3/M, z3.s, z9.s\n"
+ "fmla z31.s, p3/M, z5.s, z10.s\n"
+ "fmla z28.s, p3/M, z3.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x20, x27, LSL #2]\n"
+ "fmla z29.s, p3/M, z5.s, z12.s\n"
+ "fmla z30.s, p3/M, z7.s, z11.s\n"
+ "fmla z31.s, p3/M, z6.s, z11.s\n"
+ "ld1w { z12.s }, p2/Z, [x19, x27, LSL #2]\n"
+ "fmla z28.s, p3/M, z6.s, z9.s\n"
+ "fmla z29.s, p3/M, z8.s, z10.s\n"
+ "fmla z30.s, p3/M, z8.s, z12.s\n"
+ "fmla z31.s, p3/M, z7.s, z12.s\n"
+ ".inst 0xc1b0ca3c // fclamp { z28.s-z31.s }, z17.s, z16.s\n"
+ "st1w { z28.s }, p0, [x12, x23, LSL #2]\n"
+ "st1w { z29.s }, p0, [x11, x23, LSL #2]\n"
+ "st1w { z30.s }, p0, [x9, x23, LSL #2]\n"
+ "st1w { z31.s }, p0, [x28, x23, LSL #2]\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [n_channels] "r" ((unsigned long) n_channels), [offsetof_Args_inptrs] "I" (offsetof(Args, inptrs)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_args_params] "I" (offsetof(Args, params)), [params_struct] "r" (¶ms_struct)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x10", "x11", "x12", "x13", "x14", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst.hpp
new file mode 100644
index 0000000..cf74f43
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst.hpp
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include "src/core/NEON/kernels/arm_gemm/utils.hpp"
+
+#include <cstdint>
+
+#pragma once
+
+#if defined(__aarch64__)
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst_indirect_impl(const float *const *const input_ptrs, float *const *const outptrs, const void *params, unsigned int n_channels, const float activation_min, const float activation_max);
+void sme2_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst_direct_impl(const unsigned int n_tile_rows, const unsigned int n_tile_cols, const float *inptr, int64_t ld_input_row, int64_t ld_input_col, float *outptr, int64_t ld_output_row, int64_t ld_output_col, const void *params, unsigned int n_channels, const float activation_min, const float activation_max);
+
+class sme2_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst : public DepthwiseDepthfirstStrategy<float, float, float, float>
+{
+ private:
+ using Parent = DepthwiseDepthfirstStrategy<float, float, float, float>;
+ Parent::IndirectKernelType m_indirect_kernel = sme2_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst_indirect_impl;
+ Parent::DirectKernelType m_direct_kernel = sme2_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst_direct_impl;
+
+ public:
+ using return_type = float;
+ constexpr static auto vl_type = arm_gemm::VLType::SME;
+
+ constexpr static unsigned int kernel_rows = 3;
+ constexpr static unsigned int kernel_cols = 3;
+
+ constexpr static unsigned int stride_rows = 1;
+ constexpr static unsigned int stride_cols = 1;
+
+ constexpr static unsigned int output_rows = 3;
+ constexpr static unsigned int output_cols = 3;
+
+ sme2_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst(const CPUInfo *)
+ : Parent(output_rows, output_cols, kernel_rows, kernel_cols, stride_rows, stride_cols) {}
+
+ arm_gemm::VLType get_vl_type(void) const override { return vl_type; }
+
+ Parent::IndirectKernelType get_indirect_kernel() const override { return m_indirect_kernel; }
+ Parent::DirectKernelType get_direct_kernel() const override { return m_direct_kernel; }
+};
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(__aarch64__)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_direct.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_direct.cpp
new file mode 100644
index 0000000..8ff0fe4
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_direct.cpp
@@ -0,0 +1,483 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <cstddef>
+#include <cstdint>
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst_direct_impl(
+ const unsigned int n_tile_rows,
+ const unsigned int n_tile_cols,
+ const float *inptr,
+ int64_t ld_input_row,
+ int64_t ld_input_col,
+ float *outptr,
+ int64_t ld_output_row,
+ int64_t ld_output_col,
+ const void *params,
+ unsigned int n_channels,
+ const float activation_min,
+ const float activation_max
+)
+{
+ struct Args
+ {
+ const uint64_t n_tile_rows, n_tile_cols;
+ const float *inptr;
+ const uint64_t ld_input_row;
+ const uint64_t ld_input_col;
+ float *outptr;
+ const uint64_t ld_output_row;
+ const uint64_t ld_output_col;
+ const void *params;
+ const float min, max;
+
+ uint64_t tile_i = 0, tile_j = 0;
+
+ Args(
+ const unsigned int n_tile_rows,
+ const unsigned int n_tile_cols,
+ const float *inptr,
+ int64_t ld_input_row,
+ int64_t ld_input_col,
+ float *outptr,
+ int64_t ld_output_row,
+ int64_t ld_output_col,
+ const void *params,
+ const float activation_min,
+ const float activation_max
+ ) : n_tile_rows(n_tile_rows), n_tile_cols(n_tile_cols), inptr(inptr),
+ ld_input_row(ld_input_row), ld_input_col(ld_input_col), outptr(outptr),
+ ld_output_row(ld_output_row), ld_output_col(ld_output_col),
+ params(params), min(activation_min), max(activation_max)
+ {
+ }
+ };
+
+ Args params_struct(
+ n_tile_rows, n_tile_cols,
+ inptr, ld_input_row, ld_input_col,
+ outptr, ld_output_row, ld_output_col,
+ params, activation_min, activation_max
+ );
+
+ __asm__ __volatile__(
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "ptrue p3.b\n"
+ ".inst 0x25207810 // ptrue pn8.b\n"
+ "mov x2, #0x0\n"
+ "mov x3, #0x0\n"
+ "1:" // Tile loop
+ "str x2, [%x[params_struct], %[offsetof_args_tile_i]]\n"
+ "mov x21, #0x3\n"
+ "str x3, [%x[params_struct], %[offsetof_args_tile_j]]\n"
+ "ldr x20, [%x[params_struct], %[offsetof_args_ld_input_row]]\n"
+ "mul x19, x2, x20\n" // offset = tile_i * ld_input_row
+ "ldr x4, [%x[params_struct], %[offsetof_args_ld_input_col]]\n"
+ "madd x19, x3, x4, x19\n" // offset += tile_j * ld_input_col
+ "mul x19, x19, x21\n" // offset *= kernel_stride * output_size
+ "ldr x5, [%x[params_struct], %[offsetof_args_inptr]]\n"
+ "add x5, x5, x19, LSL #2\n" // inptr[0] += offset * sizeof(float)
+ "add x6, x5, x20, LSL #2\n"
+ "add x7, x6, x20, LSL #2\n"
+ "add x8, x4, x4\n"
+ "ldr x17, [%x[params_struct], %[offsetof_args_params]]\n"
+ "add x16, x7, x20, LSL #2\n"
+ "add x15, x8, x4\n"
+ "add x14, x16, x20, LSL #2\n"
+ "add x13, x15, x4\n"
+ "cbnz x3, 2f\n"
+ "ldr x19, [%x[params_struct], %[offsetof_args_n_tile_cols]]\n"
+ "sub x20, x19, x3\n"
+ "sub x20, x20, #0x1\n"
+ "lsl x12, %x[n_channels], #0x2\n"
+ "mov x19, #0xc\n"
+ "and x20, x20, #0x3fffff\n"
+ "mul x19, x19, x4\n"
+ "orr x12, x12, x20, LSL #22\n"
+ "orr x12, x12, x19, LSL #38\n"
+ "add x25, x7, x8, LSL #2\n"
+ "add x24, x5, x13, LSL #2\n"
+ "add x23, x6, x8, LSL #2\n"
+ "add x22, x14, x13, LSL #2\n"
+ "add x21, x7, x4, LSL #2\n"
+ "add x20, x5, x4, LSL #2\n"
+ "add x19, x5, x15, LSL #2\n"
+ "add x11, x7, x15, LSL #2\n"
+ "add x10, x6, x13, LSL #2\n"
+ "add x9, x16, x8, LSL #2\n"
+ "add x28, x16, x13, LSL #2\n"
+ "add x27, x14, x4, LSL #2\n"
+ "add x26, x6, x4, LSL #2\n"
+ ".inst 0xf8ac4b3a // rprfm pldonce, x25, [x12]\n"
+ "add x25, x6, x15, LSL #2\n"
+ ".inst 0xf8ac48ba // rprfm pldonce, x5, [x12]\n"
+ ".inst 0xf8ac4b1a // rprfm pldonce, x24, [x12]\n"
+ "add x24, x14, x15, LSL #2\n"
+ ".inst 0xf8ac49da // rprfm pldonce, x14, [x12]\n"
+ ".inst 0xf8ac4afa // rprfm pldonce, x23, [x12]\n"
+ "add x23, x16, x4, LSL #2\n"
+ ".inst 0xf8ac4ada // rprfm pldonce, x22, [x12]\n"
+ "add x22, x5, x8, LSL #2\n"
+ ".inst 0xf8ac4aba // rprfm pldonce, x21, [x12]\n"
+ "add x21, x16, x15, LSL #2\n"
+ ".inst 0xf8ac4a9a // rprfm pldonce, x20, [x12]\n"
+ "add x20, x7, x13, LSL #2\n"
+ ".inst 0xf8ac4a7a // rprfm pldonce, x19, [x12]\n"
+ "add x19, x14, x8, LSL #2\n"
+ ".inst 0xf8ac497a // rprfm pldonce, x11, [x12]\n"
+ ".inst 0xf8ac48da // rprfm pldonce, x6, [x12]\n"
+ ".inst 0xf8ac495a // rprfm pldonce, x10, [x12]\n"
+ ".inst 0xf8ac4a1a // rprfm pldonce, x16, [x12]\n"
+ ".inst 0xf8ac493a // rprfm pldonce, x9, [x12]\n"
+ ".inst 0xf8ac4b9a // rprfm pldonce, x28, [x12]\n"
+ ".inst 0xf8ac4b7a // rprfm pldonce, x27, [x12]\n"
+ ".inst 0xf8ac4b5a // rprfm pldonce, x26, [x12]\n"
+ ".inst 0xf8ac4b3a // rprfm pldonce, x25, [x12]\n"
+ ".inst 0xf8ac4b1a // rprfm pldonce, x24, [x12]\n"
+ ".inst 0xf8ac4afa // rprfm pldonce, x23, [x12]\n"
+ ".inst 0xf8ac4ada // rprfm pldonce, x22, [x12]\n"
+ ".inst 0xf8ac4aba // rprfm pldonce, x21, [x12]\n"
+ ".inst 0xf8ac48fa // rprfm pldonce, x7, [x12]\n"
+ ".inst 0xf8ac4a9a // rprfm pldonce, x20, [x12]\n"
+ ".inst 0xf8ac4a7a // rprfm pldonce, x19, [x12]\n"
+ "2:" // Tile loop: Prefetch input rows: End
+ "ldr x21, [%x[params_struct], %[offsetof_args_ld_output_row]]\n"
+ "mul x20, x2, x21\n" // offset = tile_i * ld_output_row
+ "mov x19, #0x3\n"
+ "ld1w { z18.s }, p3/Z, [x17]\n"
+ "ldr x26, [%x[params_struct], %[offsetof_args_ld_output_col]]\n"
+ "madd x20, x3, x26, x20\n" // offset += tile_j * ld_output_col
+ "mul x20, x20, x19\n" // offset *= output_tile_size
+ "ld1rw { z17.s }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n"
+ "ldr x25, [%x[params_struct], %[offsetof_args_outptr]]\n"
+ "addvl x17, x17, #1\n"
+ "add x25, x25, x20, LSL #2\n" // outptrs[0] += offset * sizeof(float)
+ ".inst 0xa040c220 // ld1w { z0.s-z3.s }, pn8.b/Z, [x17]\n"
+ "cntw x24\n"
+ "addvl x17, x17, #4\n"
+ ".inst 0xa040c224 // ld1w { z4.s-z7.s }, pn8.b/Z, [x17]\n"
+ "add x23, x25, x21, LSL #2\n"
+ "whilelt p2.s, XZR, %x[n_channels]\n"
+ "ld1rw { z16.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n"
+ "addvl x17, x17, #4\n"
+ "cmp x24, %x[n_channels]\n"
+ "ld1w { z8.s }, p3/Z, [x17]\n"
+ "add x22, x23, x21, LSL #2\n"
+ "add x21, x26, x26\n"
+ "ld1w { z9.s }, p2/Z, [x7, x8, LSL #2]\n"
+ "mov x20, #0x0\n"
+ "sub x19, XZR, x24\n"
+ "ld1w { z10.s }, p2/Z, [x5]\n"
+ "ld1w { z11.s }, p2/Z, [x5, x13, LSL #2]\n"
+ "addvl x17, x17, #1\n"
+ "ld1w { z12.s }, p2/Z, [x14]\n"
+ "ld1w { z13.s }, p2/Z, [x6, x8, LSL #2]\n"
+ "bge 4f\n"
+ "3:" // Tile loop: Channel loop
+ "movprfx z24, z18\n fmla z24.s, p3/M, z7.s, z9.s\n"
+ "movprfx z23, z18\n fmla z23.s, p3/M, z8.s, z9.s\n"
+ "whilelt p1.s, x24, %x[n_channels]\n"
+ "incw x20\n"
+ "movprfx z25, z18\n fmla z25.s, p3/M, z6.s, z9.s\n"
+ "fmla z24.s, p3/M, z4.s, z13.s\n"
+ "incw x24\n"
+ "mov p0.b, p2.b\n"
+ "movprfx z26, z18\n fmla z26.s, p3/M, z5.s, z9.s\n"
+ "movprfx z27, z18\n fmla z27.s, p3/M, z4.s, z9.s\n"
+ "incw x19\n"
+ "movprfx z28, z18\n fmla z28.s, p3/M, z3.s, z9.s\n"
+ "fmla z23.s, p3/M, z0.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x7, x15, LSL #2]\n"
+ "fmla z25.s, p3/M, z2.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x7, x4, LSL #2]\n"
+ "movprfx z29, z18\n fmla z29.s, p3/M, z2.s, z9.s\n"
+ "fmla z24.s, p3/M, z6.s, z11.s\n"
+ "movprfx z31, z18\n fmla z31.s, p3/M, z0.s, z9.s\n"
+ "fmla z23.s, p3/M, z5.s, z13.s\n"
+ "fmla z25.s, p3/M, z3.s, z13.s\n"
+ "fmla z26.s, p3/M, z2.s, z13.s\n"
+ "fmla z27.s, p3/M, z1.s, z13.s\n"
+ "fmla z28.s, p3/M, z0.s, z13.s\n"
+ "ld1w { z13.s }, p2/Z, [x5, x4, LSL #2]\n"
+ "fmla z29.s, p3/M, z6.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x14, x13, LSL #2]\n"
+ "movprfx z30, z18\n fmla z30.s, p3/M, z1.s, z9.s\n"
+ "fmla z24.s, p3/M, z0.s, z13.s\n"
+ "fmla z31.s, p3/M, z8.s, z12.s\n"
+ "fmla z23.s, p3/M, z7.s, z11.s\n"
+ "ld1w { z12.s }, p2/Z, [x5, x15, LSL #2]\n"
+ "fmla z30.s, p3/M, z0.s, z11.s\n"
+ "fmla z26.s, p3/M, z4.s, z11.s\n"
+ "ld1w { z18.s }, p3/Z, [x17]\n"
+ "addvl x17, x17, #1\n"
+ "fmla z27.s, p3/M, z3.s, z11.s\n"
+ "fmla z29.s, p3/M, z1.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x6]\n"
+ "fmla z24.s, p3/M, z2.s, z12.s\n"
+ "fmla z25.s, p3/M, z1.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x16]\n"
+ "fmla z28.s, p3/M, z4.s, z10.s\n"
+ "fmla z23.s, p3/M, z1.s, z13.s\n"
+ "ld1w { z13.s }, p2/Z, [x6, x13, LSL #2]\n"
+ "fmla z30.s, p3/M, z2.s, z10.s\n"
+ "fmla z31.s, p3/M, z1.s, z10.s\n"
+ "fmla z24.s, p3/M, z8.s, z10.s\n"
+ "fmla z25.s, p3/M, z7.s, z10.s\n"
+ "fmla z27.s, p3/M, z5.s, z10.s\n"
+ "fmla z26.s, p3/M, z0.s, z11.s\n"
+ "ld1w { z10.s }, p2/Z, [x16, x8, LSL #2]\n"
+ "fmla z28.s, p3/M, z2.s, z13.s\n"
+ "fmla z29.s, p3/M, z3.s, z12.s\n"
+ "fmla z30.s, p3/M, z4.s, z10.s\n"
+ "fmla z31.s, p3/M, z3.s, z10.s\n"
+ "fmla z23.s, p3/M, z3.s, z11.s\n"
+ "fmla z25.s, p3/M, z5.s, z13.s\n"
+ "ld1w { z11.s }, p2/Z, [x16, x13, LSL #2]\n"
+ "fmla z26.s, p3/M, z6.s, z12.s\n"
+ "fmla z27.s, p3/M, z7.s, z10.s\n"
+ "ld1w { z13.s }, p2/Z, [x14, x4, LSL #2]\n"
+ "fmla z28.s, p3/M, z6.s, z10.s\n"
+ "fmla z29.s, p3/M, z5.s, z10.s\n"
+ "ld1w { z12.s }, p2/Z, [x6, x4, LSL #2]\n"
+ "fmla z31.s, p3/M, z5.s, z11.s\n"
+ "fmla z30.s, p3/M, z6.s, z13.s\n"
+ "fmla z26.s, p3/M, z8.s, z10.s\n"
+ "fmla z28.s, p3/M, z8.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x6, x15, LSL #2]\n"
+ "addvl x6, x6, #1\n"
+ "fmla z29.s, p3/M, z7.s, z13.s\n"
+ "fmla z24.s, p3/M, z3.s, z12.s\n"
+ "ld1w { z13.s }, p2/Z, [x14, x15, LSL #2]\n"
+ "fmla z27.s, p3/M, z0.s, z12.s\n"
+ "fmla z23.s, p3/M, z4.s, z12.s\n"
+ "fmla z30.s, p3/M, z8.s, z13.s\n"
+ "fmla z31.s, p3/M, z7.s, z13.s\n"
+ "ld1w { z13.s }, p2/Z, [x16, x15, LSL #2]\n"
+ "fmla z26.s, p3/M, z1.s, z12.s\n"
+ "fmla z24.s, p3/M, z5.s, z11.s\n"
+ "ld1w { z12.s }, p2/Z, [x16, x4, LSL #2]\n"
+ "addvl x16, x16, #1\n"
+ "fmla z25.s, p3/M, z4.s, z11.s\n"
+ "fmla z27.s, p3/M, z2.s, z11.s\n"
+ "fmla z28.s, p3/M, z1.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x5, x8, LSL #2]\n"
+ "fmla z29.s, p3/M, z4.s, z12.s\n"
+ "addvl x5, x5, #1\n"
+ "fmla z30.s, p3/M, z3.s, z12.s\n"
+ "fmla z23.s, p3/M, z2.s, z11.s\n"
+ "ld1w { z10.s }, p1/Z, [x5]\n"
+ "fmla z31.s, p3/M, z4.s, z13.s\n"
+ "fmla z26.s, p3/M, z7.s, z12.s\n"
+ "fmla z27.s, p3/M, z6.s, z12.s\n"
+ "fmla z24.s, p3/M, z1.s, z11.s\n"
+ "ld1w { z12.s }, p2/Z, [x7]\n"
+ "fmla z25.s, p3/M, z0.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x7, x13, LSL #2]\n"
+ "fmla z28.s, p3/M, z7.s, z13.s\n"
+ "addvl x7, x7, #1\n"
+ "fmla z30.s, p3/M, z5.s, z13.s\n"
+ "fmla z23.s, p3/M, z6.s, z12.s\n"
+ "ld1w { z9.s }, p1/Z, [x7, x8, LSL #2]\n"
+ "fmla z29.s, p3/M, z0.s, z12.s\n"
+ "fmla z31.s, p3/M, z2.s, z11.s\n"
+ "fmla z27.s, p3/M, z8.s, z13.s\n"
+ "ld1w { z13.s }, p2/Z, [x14, x8, LSL #2]\n"
+ "fmla z26.s, p3/M, z3.s, z12.s\n"
+ "whilelt p2.s, x20, %x[n_channels]\n"
+ "fmla z25.s, p3/M, z8.s, z11.s\n"
+ "fmla z28.s, p3/M, z5.s, z11.s\n"
+ ".inst 0xa040c220 // ld1w { z0.s-z3.s }, pn8.b/Z, [x17]\n"
+ "addvl x17, x17, #4\n"
+ "fmla z29.s, p3/M, z8.s, z13.s\n"
+ "fmla z30.s, p3/M, z7.s, z13.s\n"
+ "addvl x14, x14, #1\n"
+ "cmp x24, %x[n_channels]\n"
+ "fmla z31.s, p3/M, z6.s, z13.s\n"
+ "fmax z23.s, p3/M, z23.s, z17.s\n"
+ ".inst 0xa040c224 // ld1w { z4.s-z7.s }, pn8.b/Z, [x17]\n"
+ "addvl x17, x17, #4\n"
+ "fmin z23.s, p3/M, z23.s, z16.s\n"
+ ".inst 0xc1b0ca38 // fclamp { z24.s-z27.s }, z17.s, z16.s\n"
+ "ld1w { z11.s }, p1/Z, [x5, x13, LSL #2]\n"
+ ".inst 0xc1b0ca3c // fclamp { z28.s-z31.s }, z17.s, z16.s\n"
+ "ld1w { z12.s }, p1/Z, [x14]\n"
+ "st1w { z23.s }, p0, [x25]\n"
+ "ld1w { z13.s }, p1/Z, [x6, x8, LSL #2]\n"
+ "st1w { z24.s }, p0, [x25, x26, LSL #2]\n"
+ "st1w { z25.s }, p0, [x25, x21, LSL #2]\n"
+ "addvl x25, x25, #1\n"
+ "ld1w { z8.s }, p3/Z, [x17]\n"
+ "addvl x17, x17, #1\n"
+ "st1w { z26.s }, p0, [x23]\n"
+ "st1w { z27.s }, p0, [x23, x26, LSL #2]\n"
+ "st1w { z28.s }, p0, [x23, x21, LSL #2]\n"
+ "addvl x23, x23, #1\n"
+ "st1w { z29.s }, p0, [x22]\n"
+ "st1w { z30.s }, p0, [x22, x26, LSL #2]\n"
+ "st1w { z31.s }, p0, [x22, x21, LSL #2]\n"
+ "addvl x22, x22, #1\n"
+ "blt 3b\n"
+ "4:" // Tile loop: Channel tail
+ "movprfx z24, z18\n fmla z24.s, p3/M, z7.s, z9.s\n"
+ "movprfx z23, z18\n fmla z23.s, p3/M, z8.s, z9.s\n"
+ "ldr x3, [%x[params_struct], %[offsetof_args_tile_j]]\n"
+ "add x3, x3, #0x1\n"
+ "movprfx z25, z18\n fmla z25.s, p3/M, z6.s, z9.s\n"
+ "fmla z24.s, p3/M, z4.s, z13.s\n"
+ "ldr x2, [%x[params_struct], %[offsetof_args_tile_i]]\n"
+ "add x20, x2, #0x1\n"
+ "movprfx z26, z18\n fmla z26.s, p3/M, z5.s, z9.s\n"
+ "movprfx z27, z18\n fmla z27.s, p3/M, z4.s, z9.s\n"
+ "ldr x19, [%x[params_struct], %[offsetof_args_n_tile_cols]]\n"
+ "cmp x3, x19\n"
+ "movprfx z28, z18\n fmla z28.s, p3/M, z3.s, z9.s\n"
+ "fmla z23.s, p3/M, z0.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x7, x15, LSL #2]\n"
+ "ldr x19, [%x[params_struct], %[offsetof_args_n_tile_rows]]\n"
+ "fmla z25.s, p3/M, z2.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x7, x4, LSL #2]\n"
+ "movprfx z29, z18\n fmla z29.s, p3/M, z2.s, z9.s\n"
+ "csel x2, x2, x20, LT\n"
+ "fmla z24.s, p3/M, z6.s, z11.s\n"
+ "movprfx z31, z18\n fmla z31.s, p3/M, z0.s, z9.s\n"
+ "mov p0.b, p2.b\n"
+ "csel x3, x3, XZR, LT\n"
+ "fmla z23.s, p3/M, z5.s, z13.s\n"
+ "fmla z25.s, p3/M, z3.s, z13.s\n"
+ "cmp x2, x19\n"
+ "fmla z26.s, p3/M, z2.s, z13.s\n"
+ "fmla z27.s, p3/M, z1.s, z13.s\n"
+ "fmla z28.s, p3/M, z0.s, z13.s\n"
+ "ld1w { z13.s }, p2/Z, [x5, x4, LSL #2]\n"
+ "fmla z29.s, p3/M, z6.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x14, x13, LSL #2]\n"
+ "movprfx z30, z18\n fmla z30.s, p3/M, z1.s, z9.s\n"
+ "fmla z24.s, p3/M, z0.s, z13.s\n"
+ "fmla z31.s, p3/M, z8.s, z12.s\n"
+ "fmla z23.s, p3/M, z7.s, z11.s\n"
+ "ld1w { z12.s }, p2/Z, [x5, x15, LSL #2]\n"
+ "fmla z30.s, p3/M, z0.s, z11.s\n"
+ "fmla z26.s, p3/M, z4.s, z11.s\n"
+ "fmla z27.s, p3/M, z3.s, z11.s\n"
+ "fmla z29.s, p3/M, z1.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x6]\n"
+ "fmla z24.s, p3/M, z2.s, z12.s\n"
+ "fmla z25.s, p3/M, z1.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x16]\n"
+ "fmla z28.s, p3/M, z4.s, z10.s\n"
+ "fmla z23.s, p3/M, z1.s, z13.s\n"
+ "ld1w { z13.s }, p2/Z, [x6, x13, LSL #2]\n"
+ "fmla z30.s, p3/M, z2.s, z10.s\n"
+ "fmla z31.s, p3/M, z1.s, z10.s\n"
+ "fmla z24.s, p3/M, z8.s, z10.s\n"
+ "fmla z25.s, p3/M, z7.s, z10.s\n"
+ "fmla z27.s, p3/M, z5.s, z10.s\n"
+ "fmla z26.s, p3/M, z0.s, z11.s\n"
+ "ld1w { z10.s }, p2/Z, [x16, x8, LSL #2]\n"
+ "fmla z28.s, p3/M, z2.s, z13.s\n"
+ "fmla z29.s, p3/M, z3.s, z12.s\n"
+ "fmla z30.s, p3/M, z4.s, z10.s\n"
+ "fmla z31.s, p3/M, z3.s, z10.s\n"
+ "fmla z23.s, p3/M, z3.s, z11.s\n"
+ "fmla z25.s, p3/M, z5.s, z13.s\n"
+ "ld1w { z11.s }, p2/Z, [x16, x13, LSL #2]\n"
+ "fmla z26.s, p3/M, z6.s, z12.s\n"
+ "fmla z27.s, p3/M, z7.s, z10.s\n"
+ "ld1w { z13.s }, p2/Z, [x14, x4, LSL #2]\n"
+ "fmla z28.s, p3/M, z6.s, z10.s\n"
+ "fmla z29.s, p3/M, z5.s, z10.s\n"
+ "ld1w { z12.s }, p2/Z, [x6, x4, LSL #2]\n"
+ "fmla z31.s, p3/M, z5.s, z11.s\n"
+ "fmla z30.s, p3/M, z6.s, z13.s\n"
+ "fmla z26.s, p3/M, z8.s, z10.s\n"
+ "fmla z28.s, p3/M, z8.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x6, x15, LSL #2]\n"
+ "fmla z29.s, p3/M, z7.s, z13.s\n"
+ "fmla z24.s, p3/M, z3.s, z12.s\n"
+ "ld1w { z13.s }, p2/Z, [x14, x15, LSL #2]\n"
+ "fmla z27.s, p3/M, z0.s, z12.s\n"
+ "fmla z23.s, p3/M, z4.s, z12.s\n"
+ "fmla z30.s, p3/M, z8.s, z13.s\n"
+ "fmla z31.s, p3/M, z7.s, z13.s\n"
+ "ld1w { z13.s }, p2/Z, [x16, x15, LSL #2]\n"
+ "fmla z26.s, p3/M, z1.s, z12.s\n"
+ "fmla z24.s, p3/M, z5.s, z11.s\n"
+ "ld1w { z12.s }, p2/Z, [x16, x4, LSL #2]\n"
+ "fmla z25.s, p3/M, z4.s, z11.s\n"
+ "fmla z27.s, p3/M, z2.s, z11.s\n"
+ "fmla z28.s, p3/M, z1.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x5, x8, LSL #2]\n"
+ "fmla z29.s, p3/M, z4.s, z12.s\n"
+ "fmla z30.s, p3/M, z3.s, z12.s\n"
+ "fmla z23.s, p3/M, z2.s, z11.s\n"
+ "fmla z31.s, p3/M, z4.s, z13.s\n"
+ "fmla z26.s, p3/M, z7.s, z12.s\n"
+ "fmla z27.s, p3/M, z6.s, z12.s\n"
+ "fmla z24.s, p3/M, z1.s, z11.s\n"
+ "ld1w { z12.s }, p2/Z, [x7]\n"
+ "fmla z25.s, p3/M, z0.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x7, x13, LSL #2]\n"
+ "fmla z28.s, p3/M, z7.s, z13.s\n"
+ "fmla z30.s, p3/M, z5.s, z13.s\n"
+ "fmla z23.s, p3/M, z6.s, z12.s\n"
+ "fmla z29.s, p3/M, z0.s, z12.s\n"
+ "fmla z31.s, p3/M, z2.s, z11.s\n"
+ "fmla z27.s, p3/M, z8.s, z13.s\n"
+ "ld1w { z13.s }, p2/Z, [x14, x8, LSL #2]\n"
+ "fmla z26.s, p3/M, z3.s, z12.s\n"
+ "fmla z25.s, p3/M, z8.s, z11.s\n"
+ "fmla z28.s, p3/M, z5.s, z11.s\n"
+ "fmla z29.s, p3/M, z8.s, z13.s\n"
+ "fmla z30.s, p3/M, z7.s, z13.s\n"
+ "fmla z31.s, p3/M, z6.s, z13.s\n"
+ "fmax z23.s, p3/M, z23.s, z17.s\n"
+ "fmin z23.s, p3/M, z23.s, z16.s\n"
+ ".inst 0xc1b0ca38 // fclamp { z24.s-z27.s }, z17.s, z16.s\n"
+ "st1w { z23.s }, p0, [x25]\n"
+ ".inst 0xc1b0ca3c // fclamp { z28.s-z31.s }, z17.s, z16.s\n"
+ "st1w { z24.s }, p0, [x25, x26, LSL #2]\n"
+ "st1w { z25.s }, p0, [x25, x21, LSL #2]\n"
+ "st1w { z26.s }, p0, [x23]\n"
+ "st1w { z27.s }, p0, [x23, x26, LSL #2]\n"
+ "st1w { z28.s }, p0, [x23, x21, LSL #2]\n"
+ "st1w { z29.s }, p0, [x22]\n"
+ "st1w { z30.s }, p0, [x22, x26, LSL #2]\n"
+ "st1w { z31.s }, p0, [x22, x21, LSL #2]\n"
+ "blt 1b\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [n_channels] "r" ((unsigned long) n_channels), [offsetof_args_inptr] "I" (offsetof(Args, inptr)), [offsetof_args_ld_input_col] "I" (offsetof(Args, ld_input_col)), [offsetof_args_ld_input_row] "I" (offsetof(Args, ld_input_row)), [offsetof_args_ld_output_col] "I" (offsetof(Args, ld_output_col)), [offsetof_args_ld_output_row] "I" (offsetof(Args, ld_output_row)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_n_tile_cols] "I" (offsetof(Args, n_tile_cols)), [offsetof_args_n_tile_rows] "I" (offsetof(Args, n_tile_rows)), [offsetof_args_outptr] "I" (offsetof(Args, outptr)), [offsetof_args_params] "I" (offsetof(Args, params)), [offsetof_args_tile_i] "I" (offsetof(Args, tile_i)), [offsetof_args_tile_j] "I" (offsetof(Args, tile_j)), [params_struct] "r" (¶ms_struct)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x2", "x3", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_indirect.cpp
new file mode 100644
index 0000000..ab910c1
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_indirect.cpp
@@ -0,0 +1,444 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <cstddef>
+#include <cstdint>
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst_indirect_impl(
+ const float *const *const input_ptrs,
+ float *const *const outptrs,
+ const void *params,
+ unsigned int n_channels,
+ const float activation_min,
+ const float activation_max
+)
+{
+ struct Args
+ {
+ float *const *outptrs;
+ const void *params;
+ const float min, max;
+ const float *inptrs[25];
+
+ Args(
+ const float *const *const input_ptrs,
+ float *const *const outptrs,
+ const void *const params,
+ const float min,
+ const float max
+ ) : outptrs(outptrs), params(params), min(min), max(max)
+ {
+ inptrs[0] = input_ptrs[12];
+ inptrs[1] = input_ptrs[0];
+ inptrs[2] = input_ptrs[4];
+ inptrs[3] = input_ptrs[20];
+ inptrs[4] = input_ptrs[7];
+ inptrs[5] = input_ptrs[24];
+ inptrs[6] = input_ptrs[11];
+ inptrs[7] = input_ptrs[1];
+ inptrs[8] = input_ptrs[3];
+ inptrs[9] = input_ptrs[13];
+ inptrs[10] = input_ptrs[5];
+ inptrs[11] = input_ptrs[9];
+ inptrs[12] = input_ptrs[15];
+ inptrs[13] = input_ptrs[17];
+ inptrs[14] = input_ptrs[19];
+ inptrs[15] = input_ptrs[21];
+ inptrs[16] = input_ptrs[6];
+ inptrs[17] = input_ptrs[8];
+ inptrs[18] = input_ptrs[23];
+ inptrs[19] = input_ptrs[16];
+ inptrs[20] = input_ptrs[2];
+ inptrs[21] = input_ptrs[18];
+ inptrs[22] = input_ptrs[10];
+ inptrs[23] = input_ptrs[14];
+ inptrs[24] = input_ptrs[22];
+
+ }
+ };
+
+ Args params_struct(input_ptrs, outptrs, params,
+ activation_min, activation_max);
+
+ __asm__ __volatile__(
+ "ldr x16, [%x[params_struct], %[offsetof_args_params]]\n"
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "add x15, %x[params_struct], %[offsetof_Args_inptrs]\n"
+ "ptrue p3.b\n"
+ ".inst 0x25207810 // ptrue pn8.b\n"
+ "ld1w { z18.s }, p3/Z, [x16]\n"
+ "addvl x16, x16, #1\n"
+ "ldp x14, x13, [x15, #0x0]\n"
+ "ldp x12, x11, [x15, #0x10]\n"
+ "cntw x10\n"
+ ".inst 0xa040c200 // ld1w { z0.s-z3.s }, pn8.b/Z, [x16]\n"
+ "addvl x16, x16, #4\n"
+ "ldr x9, [x15, #0x20]\n"
+ "mov x28, #0x0\n"
+ "whilelt p2.s, XZR, %x[n_channels]\n"
+ ".inst 0xa040c204 // ld1w { z4.s-z7.s }, pn8.b/Z, [x16]\n"
+ "addvl x16, x16, #4\n"
+ "cmp x10, %x[n_channels]\n"
+ "ldr x27, [%x[params_struct], %[offsetof_args_outptrs]]\n"
+ "ld1rw { z17.s }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n"
+ "ld1rw { z16.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n"
+ "sub x26, XZR, x10\n"
+ "ld1w { z8.s }, p3/Z, [x16]\n"
+ "addvl x16, x16, #1\n"
+ "ld1w { z9.s }, p2/Z, [x14, x28, LSL #2]\n"
+ "ld1w { z10.s }, p2/Z, [x13, x28, LSL #2]\n"
+ "ld1w { z11.s }, p2/Z, [x12, x28, LSL #2]\n"
+ "ld1w { z12.s }, p2/Z, [x11, x28, LSL #2]\n"
+ "ld1w { z13.s }, p2/Z, [x9, x28, LSL #2]\n"
+ "bge 2f\n"
+ "1:" // Channel loop
+ "movprfx z23, z18\n fmla z23.s, p3/M, z8.s, z9.s\n"
+ "movprfx z24, z18\n fmla z24.s, p3/M, z7.s, z9.s\n"
+ "ldr x25, [x15, #0x30]\n"
+ "incw x26\n"
+ "movprfx z25, z18\n fmla z25.s, p3/M, z6.s, z9.s\n"
+ "fmla z23.s, p3/M, z0.s, z10.s\n"
+ "ldr x24, [x15, #0x38]\n"
+ "mov p1.b, p2.b\n"
+ "fmla z24.s, p3/M, z4.s, z13.s\n"
+ "movprfx z26, z18\n fmla z26.s, p3/M, z5.s, z9.s\n"
+ "ldr x23, [x15, #0x28]\n"
+ "whilelt p0.s, x10, %x[n_channels]\n"
+ "movprfx z27, z18\n fmla z27.s, p3/M, z4.s, z9.s\n"
+ "movprfx z28, z18\n fmla z28.s, p3/M, z3.s, z9.s\n"
+ "ldr x13, [x15, #0x48]\n"
+ "ld1w { z10.s }, p2/Z, [x13, x28, LSL #2]\n"
+ "fmla z25.s, p3/M, z2.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x25, x28, LSL #2]\n"
+ "movprfx z29, z18\n fmla z29.s, p3/M, z2.s, z9.s\n"
+ "ldr x14, [x15, #0x40]\n"
+ "fmla z23.s, p3/M, z5.s, z13.s\n"
+ "fmla z24.s, p3/M, z6.s, z11.s\n"
+ "ldr x12, [x15, #0x50]\n"
+ "movprfx z31, z18\n fmla z31.s, p3/M, z0.s, z9.s\n"
+ "fmla z25.s, p3/M, z3.s, z13.s\n"
+ "ldr x11, [x15, #0x58]\n"
+ "fmla z26.s, p3/M, z2.s, z13.s\n"
+ "fmla z27.s, p3/M, z1.s, z13.s\n"
+ "ldr x9, [x15, #0x60]\n"
+ "fmla z28.s, p3/M, z0.s, z13.s\n"
+ "ld1w { z13.s }, p2/Z, [x24, x28, LSL #2]\n"
+ "fmla z29.s, p3/M, z6.s, z12.s\n"
+ "ldr x25, [x15, #0x70]\n"
+ "ld1w { z12.s }, p2/Z, [x23, x28, LSL #2]\n"
+ "movprfx z30, z18\n fmla z30.s, p3/M, z1.s, z9.s\n"
+ "fmla z23.s, p3/M, z7.s, z11.s\n"
+ "ldr x23, [x15, #0x68]\n"
+ "fmla z24.s, p3/M, z0.s, z13.s\n"
+ "fmla z31.s, p3/M, z8.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x14, x28, LSL #2]\n"
+ "ldr x24, [x15, #0x78]\n"
+ "fmla z26.s, p3/M, z4.s, z11.s\n"
+ "fmla z27.s, p3/M, z3.s, z11.s\n"
+ "ldr x14, [x15, #0x80]\n"
+ "ld1w { z18.s }, p3/Z, [x16]\n"
+ "fmla z30.s, p3/M, z0.s, z11.s\n"
+ "fmla z28.s, p3/M, z4.s, z10.s\n"
+ "ldr x13, [x15, #0x88]\n"
+ "addvl x16, x16, #1\n"
+ "fmla z29.s, p3/M, z1.s, z11.s\n"
+ "fmla z23.s, p3/M, z1.s, z13.s\n"
+ "ld1w { z11.s }, p2/Z, [x12, x28, LSL #2]\n"
+ "ldr x12, [x15, #0x90]\n"
+ "fmla z24.s, p3/M, z2.s, z12.s\n"
+ "fmla z25.s, p3/M, z1.s, z12.s\n"
+ "ld1w { z13.s }, p2/Z, [x11, x28, LSL #2]\n"
+ "ldr x11, [x15, #0x98]\n"
+ "ld1w { z12.s }, p2/Z, [x9, x28, LSL #2]\n"
+ "fmla z27.s, p3/M, z5.s, z10.s\n"
+ "fmla z30.s, p3/M, z2.s, z10.s\n"
+ "ldr x9, [x15, #0xa0]\n"
+ "fmla z26.s, p3/M, z0.s, z11.s\n"
+ "fmla z28.s, p3/M, z2.s, z13.s\n"
+ "ldr x22, [x27, #0x0]\n"
+ "fmla z24.s, p3/M, z8.s, z10.s\n"
+ "fmla z25.s, p3/M, z7.s, z10.s\n"
+ "ldr x21, [x27, #0x8]\n"
+ "fmla z31.s, p3/M, z1.s, z10.s\n"
+ "fmla z29.s, p3/M, z3.s, z12.s\n"
+ "ld1w { z10.s }, p2/Z, [x23, x28, LSL #2]\n"
+ "ldr x23, [x15, #0xa8]\n"
+ "fmla z26.s, p3/M, z6.s, z12.s\n"
+ "fmla z27.s, p3/M, z7.s, z10.s\n"
+ "ld1w { z12.s }, p2/Z, [x14, x28, LSL #2]\n"
+ "ldr x14, [x15, #0xc0]\n"
+ "fmla z28.s, p3/M, z6.s, z10.s\n"
+ "fmla z30.s, p3/M, z4.s, z10.s\n"
+ "ldr x20, [x27, #0x10]\n"
+ "fmla z23.s, p3/M, z3.s, z11.s\n"
+ "fmla z25.s, p3/M, z5.s, z13.s\n"
+ "ld1w { z11.s }, p2/Z, [x25, x28, LSL #2]\n"
+ "ldr x25, [x15, #0xb0]\n"
+ "fmla z29.s, p3/M, z5.s, z10.s\n"
+ "fmla z31.s, p3/M, z3.s, z10.s\n"
+ "ld1w { z13.s }, p2/Z, [x24, x28, LSL #2]\n"
+ "ldr x24, [x15, #0xb8]\n"
+ "fmla z26.s, p3/M, z8.s, z10.s\n"
+ "fmla z28.s, p3/M, z8.s, z11.s\n"
+ "ldr x19, [x27, #0x18]\n"
+ "fmla z30.s, p3/M, z6.s, z13.s\n"
+ "fmla z24.s, p3/M, z3.s, z12.s\n"
+ "fmla z27.s, p3/M, z0.s, z12.s\n"
+ "fmla z31.s, p3/M, z5.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x13, x28, LSL #2]\n"
+ "fmla z29.s, p3/M, z7.s, z13.s\n"
+ "ld1w { z13.s }, p2/Z, [x12, x28, LSL #2]\n"
+ "fmla z23.s, p3/M, z4.s, z12.s\n"
+ "fmla z26.s, p3/M, z1.s, z12.s\n"
+ "fmla z24.s, p3/M, z5.s, z11.s\n"
+ "ld1w { z12.s }, p2/Z, [x11, x28, LSL #2]\n"
+ "fmla z25.s, p3/M, z4.s, z11.s\n"
+ "fmla z27.s, p3/M, z2.s, z11.s\n"
+ "fmla z28.s, p3/M, z1.s, z11.s\n"
+ "fmla z30.s, p3/M, z8.s, z13.s\n"
+ "ld1w { z11.s }, p2/Z, [x9, x28, LSL #2]\n"
+ "ldr x9, [x15, #0x20]\n"
+ "fmla z23.s, p3/M, z2.s, z11.s\n"
+ "fmla z26.s, p3/M, z7.s, z12.s\n"
+ "fmla z27.s, p3/M, z6.s, z12.s\n"
+ "fmla z29.s, p3/M, z4.s, z12.s\n"
+ "fmla z30.s, p3/M, z3.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x25, x28, LSL #2]\n"
+ "fmla z31.s, p3/M, z7.s, z13.s\n"
+ "ld1w { z13.s }, p2/Z, [x23, x28, LSL #2]\n"
+ "fmla z23.s, p3/M, z6.s, z12.s\n"
+ "fmla z31.s, p3/M, z4.s, z13.s\n"
+ "fmla z24.s, p3/M, z1.s, z11.s\n"
+ "fmla z25.s, p3/M, z0.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x24, x28, LSL #2]\n"
+ "fmax z23.s, p3/M, z23.s, z17.s\n"
+ "fmla z28.s, p3/M, z7.s, z13.s\n"
+ "fmla z30.s, p3/M, z5.s, z13.s\n"
+ "fmla z29.s, p3/M, z0.s, z12.s\n"
+ "fmla z31.s, p3/M, z2.s, z11.s\n"
+ "fmla z27.s, p3/M, z8.s, z13.s\n"
+ "ld1w { z13.s }, p2/Z, [x14, x28, LSL #2]\n"
+ "ldp x14, x13, [x15, #0x0]\n"
+ "fmla z26.s, p3/M, z3.s, z12.s\n"
+ "fmla z25.s, p3/M, z8.s, z11.s\n"
+ "ldp x12, x11, [x15, #0x10]\n"
+ "incw x28\n"
+ "fmin z23.s, p3/M, z23.s, z16.s\n"
+ "st1w { z23.s }, p1, [x22, x26, LSL #2]\n"
+ "ldr x22, [x27, #0x20]\n"
+ "fmla z28.s, p3/M, z5.s, z11.s\n"
+ "fmla z29.s, p3/M, z8.s, z13.s\n"
+ "fmla z30.s, p3/M, z7.s, z13.s\n"
+ "ld1w { z9.s }, p0/Z, [x14, x10, LSL #2]\n"
+ "whilelt p2.s, x28, %x[n_channels]\n"
+ "fmla z31.s, p3/M, z6.s, z13.s\n"
+ ".inst 0xc1b0ca38 // fclamp { z24.s-z27.s }, z17.s, z16.s\n"
+ "st1w { z24.s }, p1, [x21, x26, LSL #2]\n"
+ "ldr x21, [x27, #0x28]\n"
+ "st1w { z25.s }, p1, [x20, x26, LSL #2]\n"
+ "ldr x20, [x27, #0x30]\n"
+ "ld1w { z10.s }, p0/Z, [x13, x10, LSL #2]\n"
+ ".inst 0xc1b0ca3c // fclamp { z28.s-z31.s }, z17.s, z16.s\n"
+ "st1w { z26.s }, p1, [x19, x26, LSL #2]\n"
+ "ldr x19, [x27, #0x38]\n"
+ "ld1w { z11.s }, p0/Z, [x12, x10, LSL #2]\n"
+ "st1w { z27.s }, p1, [x22, x26, LSL #2]\n"
+ "ldr x22, [x27, #0x40]\n"
+ "ld1w { z12.s }, p0/Z, [x11, x10, LSL #2]\n"
+ "ld1w { z13.s }, p0/Z, [x9, x10, LSL #2]\n"
+ "incw x10\n"
+ "cmp x10, %x[n_channels]\n"
+ "st1w { z28.s }, p1, [x21, x26, LSL #2]\n"
+ ".inst 0xa040c200 // ld1w { z0.s-z3.s }, pn8.b/Z, [x16]\n"
+ "addvl x16, x16, #4\n"
+ "st1w { z29.s }, p1, [x20, x26, LSL #2]\n"
+ ".inst 0xa040c204 // ld1w { z4.s-z7.s }, pn8.b/Z, [x16]\n"
+ "addvl x16, x16, #4\n"
+ "st1w { z30.s }, p1, [x19, x26, LSL #2]\n"
+ "st1w { z31.s }, p1, [x22, x26, LSL #2]\n"
+ "ld1w { z8.s }, p3/Z, [x16]\n"
+ "addvl x16, x16, #1\n"
+ "blt 1b\n"
+ "2:" // Channel tail
+ "movprfx z23, z18\n fmla z23.s, p3/M, z8.s, z9.s\n"
+ "movprfx z24, z18\n fmla z24.s, p3/M, z7.s, z9.s\n"
+ "ldr x25, [x15, #0x30]\n"
+ "incw x26\n"
+ "movprfx z25, z18\n fmla z25.s, p3/M, z6.s, z9.s\n"
+ "fmla z23.s, p3/M, z0.s, z10.s\n"
+ "ldr x24, [x15, #0x38]\n"
+ "mov p1.b, p2.b\n"
+ "fmla z24.s, p3/M, z4.s, z13.s\n"
+ "movprfx z26, z18\n fmla z26.s, p3/M, z5.s, z9.s\n"
+ "ldr x23, [x15, #0x28]\n"
+ "movprfx z27, z18\n fmla z27.s, p3/M, z4.s, z9.s\n"
+ "movprfx z28, z18\n fmla z28.s, p3/M, z3.s, z9.s\n"
+ "ldr x13, [x15, #0x48]\n"
+ "ld1w { z10.s }, p2/Z, [x13, x28, LSL #2]\n"
+ "fmla z25.s, p3/M, z2.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x25, x28, LSL #2]\n"
+ "movprfx z29, z18\n fmla z29.s, p3/M, z2.s, z9.s\n"
+ "ldr x14, [x15, #0x40]\n"
+ "fmla z23.s, p3/M, z5.s, z13.s\n"
+ "fmla z24.s, p3/M, z6.s, z11.s\n"
+ "ldr x12, [x15, #0x50]\n"
+ "movprfx z31, z18\n fmla z31.s, p3/M, z0.s, z9.s\n"
+ "fmla z25.s, p3/M, z3.s, z13.s\n"
+ "ldr x11, [x15, #0x58]\n"
+ "fmla z26.s, p3/M, z2.s, z13.s\n"
+ "fmla z27.s, p3/M, z1.s, z13.s\n"
+ "ldr x9, [x15, #0x60]\n"
+ "fmla z28.s, p3/M, z0.s, z13.s\n"
+ "ld1w { z13.s }, p2/Z, [x24, x28, LSL #2]\n"
+ "fmla z29.s, p3/M, z6.s, z12.s\n"
+ "ldr x25, [x15, #0x70]\n"
+ "ld1w { z12.s }, p2/Z, [x23, x28, LSL #2]\n"
+ "movprfx z30, z18\n fmla z30.s, p3/M, z1.s, z9.s\n"
+ "fmla z23.s, p3/M, z7.s, z11.s\n"
+ "ldr x23, [x15, #0x68]\n"
+ "fmla z24.s, p3/M, z0.s, z13.s\n"
+ "fmla z31.s, p3/M, z8.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x14, x28, LSL #2]\n"
+ "ldr x24, [x15, #0x78]\n"
+ "fmla z26.s, p3/M, z4.s, z11.s\n"
+ "fmla z27.s, p3/M, z3.s, z11.s\n"
+ "ldr x14, [x15, #0x80]\n"
+ "fmla z30.s, p3/M, z0.s, z11.s\n"
+ "fmla z28.s, p3/M, z4.s, z10.s\n"
+ "ldr x13, [x15, #0x88]\n"
+ "fmla z29.s, p3/M, z1.s, z11.s\n"
+ "fmla z23.s, p3/M, z1.s, z13.s\n"
+ "ld1w { z11.s }, p2/Z, [x12, x28, LSL #2]\n"
+ "ldr x12, [x15, #0x90]\n"
+ "fmla z24.s, p3/M, z2.s, z12.s\n"
+ "fmla z25.s, p3/M, z1.s, z12.s\n"
+ "ld1w { z13.s }, p2/Z, [x11, x28, LSL #2]\n"
+ "ldr x11, [x15, #0x98]\n"
+ "ld1w { z12.s }, p2/Z, [x9, x28, LSL #2]\n"
+ "fmla z27.s, p3/M, z5.s, z10.s\n"
+ "fmla z30.s, p3/M, z2.s, z10.s\n"
+ "ldr x9, [x15, #0xa0]\n"
+ "fmla z26.s, p3/M, z0.s, z11.s\n"
+ "fmla z28.s, p3/M, z2.s, z13.s\n"
+ "ldr x22, [x27, #0x0]\n"
+ "fmla z24.s, p3/M, z8.s, z10.s\n"
+ "fmla z25.s, p3/M, z7.s, z10.s\n"
+ "ldr x21, [x27, #0x8]\n"
+ "fmla z31.s, p3/M, z1.s, z10.s\n"
+ "fmla z29.s, p3/M, z3.s, z12.s\n"
+ "ld1w { z10.s }, p2/Z, [x23, x28, LSL #2]\n"
+ "ldr x23, [x15, #0xa8]\n"
+ "fmla z26.s, p3/M, z6.s, z12.s\n"
+ "fmla z27.s, p3/M, z7.s, z10.s\n"
+ "ld1w { z12.s }, p2/Z, [x14, x28, LSL #2]\n"
+ "ldr x14, [x15, #0xc0]\n"
+ "fmla z28.s, p3/M, z6.s, z10.s\n"
+ "fmla z30.s, p3/M, z4.s, z10.s\n"
+ "ldr x20, [x27, #0x10]\n"
+ "fmla z23.s, p3/M, z3.s, z11.s\n"
+ "fmla z25.s, p3/M, z5.s, z13.s\n"
+ "ld1w { z11.s }, p2/Z, [x25, x28, LSL #2]\n"
+ "ldr x25, [x15, #0xb0]\n"
+ "fmla z29.s, p3/M, z5.s, z10.s\n"
+ "fmla z31.s, p3/M, z3.s, z10.s\n"
+ "ld1w { z13.s }, p2/Z, [x24, x28, LSL #2]\n"
+ "ldr x24, [x15, #0xb8]\n"
+ "fmla z26.s, p3/M, z8.s, z10.s\n"
+ "fmla z28.s, p3/M, z8.s, z11.s\n"
+ "ldr x19, [x27, #0x18]\n"
+ "fmla z30.s, p3/M, z6.s, z13.s\n"
+ "fmla z24.s, p3/M, z3.s, z12.s\n"
+ "fmla z27.s, p3/M, z0.s, z12.s\n"
+ "fmla z31.s, p3/M, z5.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x13, x28, LSL #2]\n"
+ "fmla z29.s, p3/M, z7.s, z13.s\n"
+ "ld1w { z13.s }, p2/Z, [x12, x28, LSL #2]\n"
+ "fmla z23.s, p3/M, z4.s, z12.s\n"
+ "fmla z26.s, p3/M, z1.s, z12.s\n"
+ "fmla z24.s, p3/M, z5.s, z11.s\n"
+ "ld1w { z12.s }, p2/Z, [x11, x28, LSL #2]\n"
+ "fmla z25.s, p3/M, z4.s, z11.s\n"
+ "fmla z27.s, p3/M, z2.s, z11.s\n"
+ "fmla z28.s, p3/M, z1.s, z11.s\n"
+ "fmla z30.s, p3/M, z8.s, z13.s\n"
+ "ld1w { z11.s }, p2/Z, [x9, x28, LSL #2]\n"
+ "fmla z23.s, p3/M, z2.s, z11.s\n"
+ "fmla z26.s, p3/M, z7.s, z12.s\n"
+ "fmla z27.s, p3/M, z6.s, z12.s\n"
+ "fmla z29.s, p3/M, z4.s, z12.s\n"
+ "fmla z30.s, p3/M, z3.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x25, x28, LSL #2]\n"
+ "fmla z31.s, p3/M, z7.s, z13.s\n"
+ "ld1w { z13.s }, p2/Z, [x23, x28, LSL #2]\n"
+ "fmla z23.s, p3/M, z6.s, z12.s\n"
+ "fmla z31.s, p3/M, z4.s, z13.s\n"
+ "fmla z24.s, p3/M, z1.s, z11.s\n"
+ "fmla z25.s, p3/M, z0.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x24, x28, LSL #2]\n"
+ "fmax z23.s, p3/M, z23.s, z17.s\n"
+ "fmla z28.s, p3/M, z7.s, z13.s\n"
+ "fmla z30.s, p3/M, z5.s, z13.s\n"
+ "fmla z29.s, p3/M, z0.s, z12.s\n"
+ "fmla z31.s, p3/M, z2.s, z11.s\n"
+ "fmla z27.s, p3/M, z8.s, z13.s\n"
+ "ld1w { z13.s }, p2/Z, [x14, x28, LSL #2]\n"
+ "fmla z26.s, p3/M, z3.s, z12.s\n"
+ "fmla z25.s, p3/M, z8.s, z11.s\n"
+ "fmin z23.s, p3/M, z23.s, z16.s\n"
+ "st1w { z23.s }, p1, [x22, x26, LSL #2]\n"
+ "ldr x22, [x27, #0x20]\n"
+ "fmla z28.s, p3/M, z5.s, z11.s\n"
+ "fmla z29.s, p3/M, z8.s, z13.s\n"
+ "fmla z30.s, p3/M, z7.s, z13.s\n"
+ "fmla z31.s, p3/M, z6.s, z13.s\n"
+ ".inst 0xc1b0ca38 // fclamp { z24.s-z27.s }, z17.s, z16.s\n"
+ "st1w { z24.s }, p1, [x21, x26, LSL #2]\n"
+ "ldr x21, [x27, #0x28]\n"
+ "st1w { z25.s }, p1, [x20, x26, LSL #2]\n"
+ "ldr x20, [x27, #0x30]\n"
+ ".inst 0xc1b0ca3c // fclamp { z28.s-z31.s }, z17.s, z16.s\n"
+ "st1w { z26.s }, p1, [x19, x26, LSL #2]\n"
+ "ldr x19, [x27, #0x38]\n"
+ "st1w { z27.s }, p1, [x22, x26, LSL #2]\n"
+ "ldr x22, [x27, #0x40]\n"
+ "st1w { z28.s }, p1, [x21, x26, LSL #2]\n"
+ "st1w { z29.s }, p1, [x20, x26, LSL #2]\n"
+ "st1w { z30.s }, p1, [x19, x26, LSL #2]\n"
+ "st1w { z31.s }, p1, [x22, x26, LSL #2]\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [n_channels] "r" ((unsigned long) n_channels), [offsetof_Args_inptrs] "I" (offsetof(Args, inptrs)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_args_params] "I" (offsetof(Args, params)), [params_struct] "r" (¶ms_struct)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst.hpp
new file mode 100644
index 0000000..9184cc0
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst.hpp
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include "src/core/NEON/kernels/arm_gemm/utils.hpp"
+
+#include <cstdint>
+
+#pragma once
+
+#if defined(__aarch64__)
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst_indirect_impl(const float *const *const input_ptrs, float *const *const outptrs, const void *params, unsigned int n_channels, const float activation_min, const float activation_max);
+void sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl(const unsigned int n_tile_rows, const unsigned int n_tile_cols, const float *inptr, int64_t ld_input_row, int64_t ld_input_col, float *outptr, int64_t ld_output_row, int64_t ld_output_col, const void *params, unsigned int n_channels, const float activation_min, const float activation_max);
+
+class sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst : public DepthwiseDepthfirstStrategy<float, float, float, float>
+{
+ private:
+ using Parent = DepthwiseDepthfirstStrategy<float, float, float, float>;
+ Parent::IndirectKernelType m_indirect_kernel = sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst_indirect_impl;
+ Parent::DirectKernelType m_direct_kernel = sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl;
+
+ public:
+ using return_type = float;
+ constexpr static auto vl_type = arm_gemm::VLType::SME;
+
+ constexpr static unsigned int kernel_rows = 3;
+ constexpr static unsigned int kernel_cols = 3;
+
+ constexpr static unsigned int stride_rows = 1;
+ constexpr static unsigned int stride_cols = 1;
+
+ constexpr static unsigned int output_rows = 4;
+ constexpr static unsigned int output_cols = 4;
+
+ sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst(const CPUInfo *)
+ : Parent(output_rows, output_cols, kernel_rows, kernel_cols, stride_rows, stride_cols) {}
+
+ arm_gemm::VLType get_vl_type(void) const override { return vl_type; }
+
+ Parent::IndirectKernelType get_indirect_kernel() const override { return m_indirect_kernel; }
+ Parent::DirectKernelType get_direct_kernel() const override { return m_direct_kernel; }
+};
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(__aarch64__)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_direct.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_direct.cpp
new file mode 100644
index 0000000..8ec7bcc
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_direct.cpp
@@ -0,0 +1,672 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <cstddef>
+#include <cstdint>
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl(
+ const unsigned int n_tile_rows,
+ const unsigned int n_tile_cols,
+ const float *inptr,
+ int64_t ld_input_row,
+ int64_t ld_input_col,
+ float *outptr,
+ int64_t ld_output_row,
+ int64_t ld_output_col,
+ const void *params,
+ unsigned int n_channels,
+ const float activation_min,
+ const float activation_max
+)
+{
+ struct Args
+ {
+ const uint64_t n_tile_rows, n_tile_cols;
+ const float *inptr;
+ const uint64_t ld_input_row;
+ const uint64_t ld_input_col;
+ float *outptr;
+ const uint64_t ld_output_row;
+ const uint64_t ld_output_col;
+ const void *params;
+ const float min, max;
+
+ uint64_t tile_i = 0, tile_j = 0;
+
+ Args(
+ const unsigned int n_tile_rows,
+ const unsigned int n_tile_cols,
+ const float *inptr,
+ int64_t ld_input_row,
+ int64_t ld_input_col,
+ float *outptr,
+ int64_t ld_output_row,
+ int64_t ld_output_col,
+ const void *params,
+ const float activation_min,
+ const float activation_max
+ ) : n_tile_rows(n_tile_rows), n_tile_cols(n_tile_cols), inptr(inptr),
+ ld_input_row(ld_input_row), ld_input_col(ld_input_col), outptr(outptr),
+ ld_output_row(ld_output_row), ld_output_col(ld_output_col),
+ params(params), min(activation_min), max(activation_max)
+ {
+ }
+ };
+
+ Args params_struct(
+ n_tile_rows, n_tile_cols,
+ inptr, ld_input_row, ld_input_col,
+ outptr, ld_output_row, ld_output_col,
+ params, activation_min, activation_max
+ );
+
+ __asm__ __volatile__(
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "ptrue p3.b\n"
+ ".inst 0x25207810 // ptrue pn8.b\n"
+ "mov x2, #0x0\n"
+ "mov x3, #0x0\n"
+ "1:" // Tile loop
+ "str x2, [%x[params_struct], %[offsetof_args_tile_i]]\n"
+ "mov x21, #0x4\n"
+ "str x3, [%x[params_struct], %[offsetof_args_tile_j]]\n"
+ "ldr x20, [%x[params_struct], %[offsetof_args_ld_input_row]]\n"
+ "mul x19, x2, x20\n" // offset = tile_i * ld_input_row
+ "ldr x4, [%x[params_struct], %[offsetof_args_ld_input_col]]\n"
+ "madd x19, x3, x4, x19\n" // offset += tile_j * ld_input_col
+ "mul x19, x19, x21\n" // offset *= kernel_stride * output_size
+ "ldr x5, [%x[params_struct], %[offsetof_args_inptr]]\n"
+ "add x5, x5, x19, LSL #2\n" // inptr[0] += offset * sizeof(float)
+ "add x6, x5, x20, LSL #2\n"
+ "add x7, x6, x20, LSL #2\n"
+ "add x8, x4, x4\n"
+ "ldr x17, [%x[params_struct], %[offsetof_args_params]]\n"
+ "add x16, x7, x20, LSL #2\n"
+ "add x15, x8, x4\n"
+ "add x14, x16, x20, LSL #2\n"
+ "add x13, x15, x4\n"
+ "add x12, x14, x20, LSL #2\n"
+ "add x11, x13, x4\n"
+ "cbnz x3, 2f\n"
+ "ldr x19, [%x[params_struct], %[offsetof_args_n_tile_cols]]\n"
+ "sub x20, x19, x3\n"
+ "sub x20, x20, #0x1\n"
+ "lsl x10, %x[n_channels], #0x2\n"
+ "mov x19, #0x10\n"
+ "and x20, x20, #0x3fffff\n"
+ "mul x19, x19, x4\n"
+ "orr x10, x10, x20, LSL #22\n"
+ "orr x10, x10, x19, LSL #38\n"
+ "add x26, x7, x8, LSL #2\n"
+ "add x25, x5, x11, LSL #2\n"
+ "add x24, x7, x15, LSL #2\n"
+ "add x23, x12, x11, LSL #2\n"
+ "add x22, x16, x8, LSL #2\n"
+ "add x21, x5, x4, LSL #2\n"
+ "add x20, x5, x13, LSL #2\n"
+ "add x19, x16, x15, LSL #2\n"
+ "add x9, x6, x11, LSL #2\n"
+ "add x28, x6, x8, LSL #2\n"
+ "add x27, x14, x11, LSL #2\n"
+ ".inst 0xf8aa4b5a // rprfm pldonce, x26, [x10]\n"
+ "add x26, x6, x15, LSL #2\n"
+ ".inst 0xf8aa48ba // rprfm pldonce, x5, [x10]\n"
+ ".inst 0xf8aa4b3a // rprfm pldonce, x25, [x10]\n"
+ "add x25, x12, x4, LSL #2\n"
+ ".inst 0xf8aa4b1a // rprfm pldonce, x24, [x10]\n"
+ "add x24, x7, x4, LSL #2\n"
+ ".inst 0xf8aa499a // rprfm pldonce, x12, [x10]\n"
+ ".inst 0xf8aa4afa // rprfm pldonce, x23, [x10]\n"
+ "add x23, x12, x13, LSL #2\n"
+ ".inst 0xf8aa4ada // rprfm pldonce, x22, [x10]\n"
+ "add x22, x7, x13, LSL #2\n"
+ ".inst 0xf8aa4aba // rprfm pldonce, x21, [x10]\n"
+ "add x21, x5, x8, LSL #2\n"
+ ".inst 0xf8aa4a9a // rprfm pldonce, x20, [x10]\n"
+ "add x20, x16, x4, LSL #2\n"
+ ".inst 0xf8aa4a7a // rprfm pldonce, x19, [x10]\n"
+ "add x19, x5, x15, LSL #2\n"
+ ".inst 0xf8aa48da // rprfm pldonce, x6, [x10]\n"
+ ".inst 0xf8aa493a // rprfm pldonce, x9, [x10]\n"
+ "add x9, x16, x13, LSL #2\n"
+ ".inst 0xf8aa49da // rprfm pldonce, x14, [x10]\n"
+ ".inst 0xf8aa4b9a // rprfm pldonce, x28, [x10]\n"
+ "add x28, x7, x11, LSL #2\n"
+ ".inst 0xf8aa4b7a // rprfm pldonce, x27, [x10]\n"
+ "add x27, x14, x8, LSL #2\n"
+ ".inst 0xf8aa4b5a // rprfm pldonce, x26, [x10]\n"
+ "add x26, x16, x11, LSL #2\n"
+ ".inst 0xf8aa4b3a // rprfm pldonce, x25, [x10]\n"
+ "add x25, x12, x8, LSL #2\n"
+ ".inst 0xf8aa4b1a // rprfm pldonce, x24, [x10]\n"
+ "add x24, x14, x15, LSL #2\n"
+ ".inst 0xf8aa4afa // rprfm pldonce, x23, [x10]\n"
+ "add x23, x12, x15, LSL #2\n"
+ ".inst 0xf8aa4ada // rprfm pldonce, x22, [x10]\n"
+ "add x22, x6, x4, LSL #2\n"
+ ".inst 0xf8aa4aba // rprfm pldonce, x21, [x10]\n"
+ "add x21, x6, x13, LSL #2\n"
+ ".inst 0xf8aa4a9a // rprfm pldonce, x20, [x10]\n"
+ "add x20, x14, x4, LSL #2\n"
+ ".inst 0xf8aa4a7a // rprfm pldonce, x19, [x10]\n"
+ "add x19, x14, x13, LSL #2\n"
+ ".inst 0xf8aa48fa // rprfm pldonce, x7, [x10]\n"
+ ".inst 0xf8aa493a // rprfm pldonce, x9, [x10]\n"
+ ".inst 0xf8aa4b9a // rprfm pldonce, x28, [x10]\n"
+ ".inst 0xf8aa4a1a // rprfm pldonce, x16, [x10]\n"
+ ".inst 0xf8aa4b7a // rprfm pldonce, x27, [x10]\n"
+ ".inst 0xf8aa4b5a // rprfm pldonce, x26, [x10]\n"
+ ".inst 0xf8aa4b3a // rprfm pldonce, x25, [x10]\n"
+ ".inst 0xf8aa4b1a // rprfm pldonce, x24, [x10]\n"
+ ".inst 0xf8aa4afa // rprfm pldonce, x23, [x10]\n"
+ ".inst 0xf8aa4ada // rprfm pldonce, x22, [x10]\n"
+ ".inst 0xf8aa4aba // rprfm pldonce, x21, [x10]\n"
+ ".inst 0xf8aa4a9a // rprfm pldonce, x20, [x10]\n"
+ ".inst 0xf8aa4a7a // rprfm pldonce, x19, [x10]\n"
+ "2:" // Tile loop: Prefetch input rows: End
+ "ldr x21, [%x[params_struct], %[offsetof_args_ld_output_row]]\n"
+ "mul x20, x2, x21\n" // offset = tile_i * ld_output_row
+ "mov x19, #0x4\n"
+ "ld1w { z15.s }, p3/Z, [x17]\n"
+ "ldr x28, [%x[params_struct], %[offsetof_args_ld_output_col]]\n"
+ "madd x20, x3, x28, x20\n" // offset += tile_j * ld_output_col
+ "mul x20, x20, x19\n" // offset *= output_tile_size
+ "ld1rw { z14.s }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n"
+ "ldr x27, [%x[params_struct], %[offsetof_args_outptr]]\n"
+ "add x27, x27, x20, LSL #2\n" // outptrs[0] += offset * sizeof(float)
+ "addvl x17, x17, #1\n"
+ ".inst 0xa040c220 // ld1w { z0.s-z3.s }, pn8.b/Z, [x17]\n"
+ "add x26, x27, x21, LSL #2\n"
+ "cntw x25\n"
+ "ld1rw { z13.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n"
+ "addvl x17, x17, #4\n"
+ "add x24, x26, x21, LSL #2\n"
+ ".inst 0xa040c224 // ld1w { z4.s-z7.s }, pn8.b/Z, [x17]\n"
+ "add x23, x28, x28\n"
+ "whilelt p2.s, XZR, %x[n_channels]\n"
+ "ld1w { z9.s }, p2/Z, [x7, x8, LSL #2]\n"
+ "addvl x17, x17, #4\n"
+ "cmp x25, %x[n_channels]\n"
+ "ld1w { z8.s }, p3/Z, [x17]\n"
+ "add x22, x24, x21, LSL #2\n"
+ "add x21, x23, x28\n"
+ "ld1w { z10.s }, p2/Z, [x5]\n"
+ "mov x20, #0x0\n"
+ "sub x19, XZR, x25\n"
+ "ld1w { z11.s }, p2/Z, [x5, x11, LSL #2]\n"
+ "ld1w { z12.s }, p2/Z, [x7, x15, LSL #2]\n"
+ "addvl x17, x17, #1\n"
+ "bge 4f\n"
+ "3:" // Tile loop: Channel loop
+ "movprfx z21, z15\n fmla z21.s, p3/M, z4.s, z9.s\n"
+ "movprfx z16, z15\n fmla z16.s, p3/M, z8.s, z9.s\n"
+ "whilelt p1.s, x25, %x[n_channels]\n"
+ "incw x20\n"
+ "movprfx z22, z15\n fmla z22.s, p3/M, z3.s, z9.s\n"
+ "movprfx z25, z15\n fmla z25.s, p3/M, z1.s, z9.s\n"
+ "incw x25\n"
+ "mov p0.b, p2.b\n"
+ "movprfx z26, z15\n fmla z26.s, p3/M, z0.s, z9.s\n"
+ "fmla z21.s, p3/M, z5.s, z12.s\n"
+ "incw x19\n"
+ "movprfx z17, z15\n fmla z17.s, p3/M, z7.s, z9.s\n"
+ "movprfx z18, z15\n fmla z18.s, p3/M, z6.s, z9.s\n"
+ "movprfx z20, z15\n fmla z20.s, p3/M, z5.s, z9.s\n"
+ "movprfx z24, z15\n fmla z24.s, p3/M, z2.s, z9.s\n"
+ "ld1w { z9.s }, p2/Z, [x16, x8, LSL #2]\n"
+ "fmla z16.s, p3/M, z0.s, z10.s\n"
+ "movprfx z19, z15\n fmla z19.s, p3/M, z2.s, z11.s\n"
+ "ld1w { z10.s }, p2/Z, [x12]\n"
+ "fmla z22.s, p3/M, z4.s, z12.s\n"
+ "fmla z25.s, p3/M, z2.s, z12.s\n"
+ "ld1w { z11.s }, p2/Z, [x12, x11, LSL #2]\n"
+ "fmla z26.s, p3/M, z1.s, z12.s\n"
+ "movprfx z28, z15\n fmla z28.s, p3/M, z6.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x16, x15, LSL #2]\n"
+ "fmla z21.s, p3/M, z7.s, z9.s\n"
+ "fmla z17.s, p3/M, z8.s, z12.s\n"
+ "fmla z18.s, p3/M, z7.s, z12.s\n"
+ "fmla z19.s, p3/M, z6.s, z12.s\n"
+ "movprfx z23, z15\n fmla z23.s, p3/M, z3.s, z12.s\n"
+ "movprfx z27, z15\n fmla z27.s, p3/M, z0.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x5, x4, LSL #2]\n"
+ "movprfx z31, z15\n fmla z31.s, p3/M, z8.s, z11.s\n"
+ "fmla z22.s, p3/M, z6.s, z9.s\n"
+ "ld1w { z11.s }, p2/Z, [x5, x13, LSL #2]\n"
+ "fmla z25.s, p3/M, z4.s, z9.s\n"
+ "fmla z26.s, p3/M, z3.s, z9.s\n"
+ "movprfx z29, z15\n fmla z29.s, p3/M, z1.s, z9.s\n"
+ "movprfx z30, z15\n fmla z30.s, p3/M, z0.s, z9.s\n"
+ "ld1w { z15.s }, p3/Z, [x17]\n"
+ "addvl x17, x17, #1\n"
+ "fmla z20.s, p3/M, z8.s, z9.s\n"
+ "fmla z24.s, p3/M, z5.s, z9.s\n"
+ "fmla z28.s, p3/M, z2.s, z9.s\n"
+ "fmla z21.s, p3/M, z8.s, z10.s\n"
+ "ld1w { z9.s }, p2/Z, [x6]\n"
+ "fmla z16.s, p3/M, z1.s, z12.s\n"
+ "fmla z17.s, p3/M, z0.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x6, x11, LSL #2]\n"
+ "fmla z18.s, p3/M, z2.s, z11.s\n"
+ "fmla z19.s, p3/M, z1.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x14]\n"
+ "fmla z22.s, p3/M, z7.s, z10.s\n"
+ "fmla z23.s, p3/M, z6.s, z10.s\n"
+ "fmla z25.s, p3/M, z5.s, z10.s\n"
+ "fmla z26.s, p3/M, z4.s, z10.s\n"
+ "fmla z27.s, p3/M, z3.s, z10.s\n"
+ "fmla z29.s, p3/M, z2.s, z10.s\n"
+ "fmla z30.s, p3/M, z1.s, z10.s\n"
+ "fmla z31.s, p3/M, z0.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x6, x8, LSL #2]\n"
+ "fmla z20.s, p3/M, z0.s, z9.s\n"
+ "fmla z24.s, p3/M, z6.s, z11.s\n"
+ "fmla z28.s, p3/M, z3.s, z11.s\n"
+ "fmla z21.s, p3/M, z1.s, z10.s\n"
+ "ld1w { z11.s }, p2/Z, [x14, x11, LSL #2]\n"
+ "fmla z16.s, p3/M, z3.s, z9.s\n"
+ "fmla z19.s, p3/M, z5.s, z12.s\n"
+ "fmla z23.s, p3/M, z2.s, z12.s\n"
+ "fmla z17.s, p3/M, z4.s, z10.s\n"
+ "ld1w { z12.s }, p2/Z, [x6, x15, LSL #2]\n"
+ "fmla z18.s, p3/M, z3.s, z10.s\n"
+ "fmla z22.s, p3/M, z0.s, z10.s\n"
+ "fmla z27.s, p3/M, z8.s, z11.s\n"
+ "fmla z31.s, p3/M, z5.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x12, x4, LSL #2]\n"
+ "fmla z20.s, p3/M, z2.s, z10.s\n"
+ "fmla z21.s, p3/M, z2.s, z12.s\n"
+ "fmla z16.s, p3/M, z5.s, z10.s\n"
+ "fmla z17.s, p3/M, z5.s, z12.s\n"
+ "ld1w { z10.s }, p2/Z, [x7, x4, LSL #2]\n"
+ "fmla z18.s, p3/M, z4.s, z12.s\n"
+ "fmla z19.s, p3/M, z3.s, z12.s\n"
+ "fmla z22.s, p3/M, z1.s, z12.s\n"
+ "fmla z23.s, p3/M, z0.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x7, x13, LSL #2]\n"
+ "fmla z28.s, p3/M, z7.s, z11.s\n"
+ "fmla z29.s, p3/M, z6.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x12, x13, LSL #2]\n"
+ "fmla z20.s, p3/M, z4.s, z10.s\n"
+ "fmla z21.s, p3/M, z3.s, z10.s\n"
+ "fmla z24.s, p3/M, z1.s, z10.s\n"
+ "fmla z25.s, p3/M, z0.s, z10.s\n"
+ "fmla z16.s, p3/M, z7.s, z10.s\n"
+ "fmla z17.s, p3/M, z6.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x5, x8, LSL #2]\n"
+ "fmla z30.s, p3/M, z8.s, z11.s\n"
+ "fmla z31.s, p3/M, z7.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x16, x4, LSL #2]\n"
+ "fmla z18.s, p3/M, z8.s, z12.s\n"
+ "fmla z19.s, p3/M, z7.s, z12.s\n"
+ "fmla z22.s, p3/M, z5.s, z12.s\n"
+ "fmla z23.s, p3/M, z4.s, z12.s\n"
+ "fmla z26.s, p3/M, z2.s, z12.s\n"
+ "fmla z27.s, p3/M, z1.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x5, x15, LSL #2]\n"
+ "addvl x5, x5, #1\n"
+ "fmla z20.s, p3/M, z7.s, z11.s\n"
+ "fmla z21.s, p3/M, z6.s, z11.s\n"
+ "fmla z24.s, p3/M, z4.s, z11.s\n"
+ "fmla z25.s, p3/M, z3.s, z11.s\n"
+ "fmla z28.s, p3/M, z1.s, z11.s\n"
+ "fmla z29.s, p3/M, z0.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x16, x13, LSL #2]\n"
+ "fmla z16.s, p3/M, z2.s, z10.s\n"
+ "fmla z17.s, p3/M, z1.s, z10.s\n"
+ "fmla z18.s, p3/M, z0.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x7]\n"
+ "fmla z30.s, p3/M, z2.s, z11.s\n"
+ "fmla z19.s, p3/M, z0.s, z12.s\n"
+ "fmla z20.s, p3/M, z3.s, z10.s\n"
+ "fmla z24.s, p3/M, z0.s, z10.s\n"
+ "fmla z22.s, p3/M, z8.s, z11.s\n"
+ "fmla z23.s, p3/M, z7.s, z11.s\n"
+ "fmla z26.s, p3/M, z5.s, z11.s\n"
+ "fmla z27.s, p3/M, z4.s, z11.s\n"
+ "fmla z31.s, p3/M, z1.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x14, x8, LSL #2]\n"
+ "fmla z17.s, p3/M, z2.s, z12.s\n"
+ "fmla z18.s, p3/M, z1.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x7, x11, LSL #2]\n"
+ "addvl x7, x7, #1\n"
+ "fmla z16.s, p3/M, z6.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x16]\n"
+ "fmla z29.s, p3/M, z4.s, z11.s\n"
+ "fmla z30.s, p3/M, z3.s, z11.s\n"
+ "fmla z19.s, p3/M, z8.s, z12.s\n"
+ "ld1w { z9.s }, p1/Z, [x7, x8, LSL #2]\n"
+ "fmla z23.s, p3/M, z5.s, z12.s\n"
+ "fmla z27.s, p3/M, z2.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x16, x11, LSL #2]\n"
+ "addvl x16, x16, #1\n"
+ "fmla z20.s, p3/M, z6.s, z10.s\n"
+ "fmla z24.s, p3/M, z3.s, z10.s\n"
+ "fmla z28.s, p3/M, z0.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x12, x8, LSL #2]\n"
+ "fmla z31.s, p3/M, z2.s, z12.s\n"
+ "fmla z29.s, p3/M, z7.s, z10.s\n"
+ "fmla z30.s, p3/M, z6.s, z10.s\n"
+ "fmla z24.s, p3/M, z8.s, z11.s\n"
+ "fmla z25.s, p3/M, z7.s, z11.s\n"
+ "fmla z26.s, p3/M, z6.s, z11.s\n"
+ "fmla z28.s, p3/M, z5.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x14, x15, LSL #2]\n"
+ "fmla z27.s, p3/M, z5.s, z12.s\n"
+ "fmla z29.s, p3/M, z5.s, z11.s\n"
+ "fmla z30.s, p3/M, z4.s, z11.s\n"
+ "fmla z31.s, p3/M, z3.s, z11.s\n"
+ "fmla z23.s, p3/M, z8.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x12, x15, LSL #2]\n"
+ "fmla z28.s, p3/M, z8.s, z10.s\n"
+ "addvl x12, x12, #1\n"
+ "ld1w { z10.s }, p2/Z, [x6, x4, LSL #2]\n"
+ "fmla z25.s, p3/M, z8.s, z11.s\n"
+ "fmla z26.s, p3/M, z7.s, z11.s\n"
+ "fmla z27.s, p3/M, z6.s, z11.s\n"
+ "fmla z29.s, p3/M, z8.s, z12.s\n"
+ "ld1w { z11.s }, p2/Z, [x6, x13, LSL #2]\n"
+ "addvl x6, x6, #1\n"
+ "fmla z30.s, p3/M, z7.s, z12.s\n"
+ "fmla z31.s, p3/M, z6.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x14, x4, LSL #2]\n"
+ "fmla z16.s, p3/M, z4.s, z10.s\n"
+ "fmla z17.s, p3/M, z3.s, z10.s\n"
+ "fmla z20.s, p3/M, z1.s, z10.s\n"
+ "fmla z21.s, p3/M, z0.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x14, x13, LSL #2]\n"
+ "whilelt p2.s, x20, %x[n_channels]\n"
+ "fmla z18.s, p3/M, z5.s, z11.s\n"
+ "fmla z19.s, p3/M, z4.s, z11.s\n"
+ "cmp x25, %x[n_channels]\n"
+ "addvl x14, x14, #1\n"
+ "fmla z22.s, p3/M, z2.s, z11.s\n"
+ "fmla z23.s, p3/M, z1.s, z11.s\n"
+ "ld1w { z11.s }, p1/Z, [x5, x11, LSL #2]\n"
+ "fmla z24.s, p3/M, z7.s, z12.s\n"
+ "fmla z25.s, p3/M, z6.s, z12.s\n"
+ "fmla z28.s, p3/M, z4.s, z12.s\n"
+ "fmla z29.s, p3/M, z3.s, z12.s\n"
+ ".inst 0xa040c220 // ld1w { z0.s-z3.s }, pn8.b/Z, [x17]\n"
+ "addvl x17, x17, #4\n"
+ "fmla z26.s, p3/M, z8.s, z10.s\n"
+ "fmla z27.s, p3/M, z7.s, z10.s\n"
+ "ld1w { z12.s }, p1/Z, [x7, x15, LSL #2]\n"
+ "fmla z30.s, p3/M, z5.s, z10.s\n"
+ "fmla z31.s, p3/M, z4.s, z10.s\n"
+ ".inst 0xa040c224 // ld1w { z4.s-z7.s }, pn8.b/Z, [x17]\n"
+ "addvl x17, x17, #4\n"
+ ".inst 0xc1adc9d0 // fclamp { z16.s-z19.s }, z14.s, z13.s\n"
+ ".inst 0xc1adc9d4 // fclamp { z20.s-z23.s }, z14.s, z13.s\n"
+ "ld1w { z10.s }, p1/Z, [x5]\n"
+ ".inst 0xc1adc9d8 // fclamp { z24.s-z27.s }, z14.s, z13.s\n"
+ ".inst 0xc1adc9dc // fclamp { z28.s-z31.s }, z14.s, z13.s\n"
+ "st1w { z16.s }, p0, [x27]\n"
+ "st1w { z17.s }, p0, [x27, x28, LSL #2]\n"
+ "ld1w { z8.s }, p3/Z, [x17]\n"
+ "addvl x17, x17, #1\n"
+ "st1w { z18.s }, p0, [x27, x23, LSL #2]\n"
+ "st1w { z19.s }, p0, [x27, x21, LSL #2]\n"
+ "addvl x27, x27, #1\n"
+ "st1w { z20.s }, p0, [x26]\n"
+ "st1w { z21.s }, p0, [x26, x28, LSL #2]\n"
+ "st1w { z22.s }, p0, [x26, x23, LSL #2]\n"
+ "st1w { z23.s }, p0, [x26, x21, LSL #2]\n"
+ "addvl x26, x26, #1\n"
+ "st1w { z24.s }, p0, [x24]\n"
+ "st1w { z25.s }, p0, [x24, x28, LSL #2]\n"
+ "st1w { z26.s }, p0, [x24, x23, LSL #2]\n"
+ "st1w { z27.s }, p0, [x24, x21, LSL #2]\n"
+ "addvl x24, x24, #1\n"
+ "st1w { z28.s }, p0, [x22]\n"
+ "st1w { z29.s }, p0, [x22, x28, LSL #2]\n"
+ "st1w { z30.s }, p0, [x22, x23, LSL #2]\n"
+ "st1w { z31.s }, p0, [x22, x21, LSL #2]\n"
+ "addvl x22, x22, #1\n"
+ "blt 3b\n"
+ "4:" // Tile loop: Channel tail
+ "movprfx z21, z15\n fmla z21.s, p3/M, z4.s, z9.s\n"
+ "movprfx z16, z15\n fmla z16.s, p3/M, z8.s, z9.s\n"
+ "ldr x3, [%x[params_struct], %[offsetof_args_tile_j]]\n"
+ "add x3, x3, #0x1\n"
+ "movprfx z22, z15\n fmla z22.s, p3/M, z3.s, z9.s\n"
+ "movprfx z25, z15\n fmla z25.s, p3/M, z1.s, z9.s\n"
+ "ldr x2, [%x[params_struct], %[offsetof_args_tile_i]]\n"
+ "add x20, x2, #0x1\n"
+ "movprfx z26, z15\n fmla z26.s, p3/M, z0.s, z9.s\n"
+ "fmla z21.s, p3/M, z5.s, z12.s\n"
+ "ldr x19, [%x[params_struct], %[offsetof_args_n_tile_cols]]\n"
+ "cmp x3, x19\n"
+ "movprfx z17, z15\n fmla z17.s, p3/M, z7.s, z9.s\n"
+ "movprfx z18, z15\n fmla z18.s, p3/M, z6.s, z9.s\n"
+ "ldr x19, [%x[params_struct], %[offsetof_args_n_tile_rows]]\n"
+ "csel x2, x2, x20, LT\n"
+ "movprfx z20, z15\n fmla z20.s, p3/M, z5.s, z9.s\n"
+ "movprfx z24, z15\n fmla z24.s, p3/M, z2.s, z9.s\n"
+ "ld1w { z9.s }, p2/Z, [x16, x8, LSL #2]\n"
+ "mov p0.b, p2.b\n"
+ "fmla z16.s, p3/M, z0.s, z10.s\n"
+ "movprfx z19, z15\n fmla z19.s, p3/M, z2.s, z11.s\n"
+ "ld1w { z10.s }, p2/Z, [x12]\n"
+ "csel x3, x3, XZR, LT\n"
+ "fmla z22.s, p3/M, z4.s, z12.s\n"
+ "fmla z25.s, p3/M, z2.s, z12.s\n"
+ "ld1w { z11.s }, p2/Z, [x12, x11, LSL #2]\n"
+ "cmp x2, x19\n"
+ "fmla z26.s, p3/M, z1.s, z12.s\n"
+ "movprfx z28, z15\n fmla z28.s, p3/M, z6.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x16, x15, LSL #2]\n"
+ "fmla z21.s, p3/M, z7.s, z9.s\n"
+ "fmla z17.s, p3/M, z8.s, z12.s\n"
+ "fmla z18.s, p3/M, z7.s, z12.s\n"
+ "fmla z19.s, p3/M, z6.s, z12.s\n"
+ "movprfx z23, z15\n fmla z23.s, p3/M, z3.s, z12.s\n"
+ "movprfx z27, z15\n fmla z27.s, p3/M, z0.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x5, x4, LSL #2]\n"
+ "movprfx z31, z15\n fmla z31.s, p3/M, z8.s, z11.s\n"
+ "fmla z22.s, p3/M, z6.s, z9.s\n"
+ "ld1w { z11.s }, p2/Z, [x5, x13, LSL #2]\n"
+ "fmla z25.s, p3/M, z4.s, z9.s\n"
+ "fmla z26.s, p3/M, z3.s, z9.s\n"
+ "movprfx z29, z15\n fmla z29.s, p3/M, z1.s, z9.s\n"
+ "movprfx z30, z15\n fmla z30.s, p3/M, z0.s, z9.s\n"
+ "fmla z20.s, p3/M, z8.s, z9.s\n"
+ "fmla z24.s, p3/M, z5.s, z9.s\n"
+ "fmla z28.s, p3/M, z2.s, z9.s\n"
+ "fmla z21.s, p3/M, z8.s, z10.s\n"
+ "ld1w { z9.s }, p2/Z, [x6]\n"
+ "fmla z16.s, p3/M, z1.s, z12.s\n"
+ "fmla z17.s, p3/M, z0.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x6, x11, LSL #2]\n"
+ "fmla z18.s, p3/M, z2.s, z11.s\n"
+ "fmla z19.s, p3/M, z1.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x14]\n"
+ "fmla z22.s, p3/M, z7.s, z10.s\n"
+ "fmla z23.s, p3/M, z6.s, z10.s\n"
+ "fmla z25.s, p3/M, z5.s, z10.s\n"
+ "fmla z26.s, p3/M, z4.s, z10.s\n"
+ "fmla z27.s, p3/M, z3.s, z10.s\n"
+ "fmla z29.s, p3/M, z2.s, z10.s\n"
+ "fmla z30.s, p3/M, z1.s, z10.s\n"
+ "fmla z31.s, p3/M, z0.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x6, x8, LSL #2]\n"
+ "fmla z20.s, p3/M, z0.s, z9.s\n"
+ "fmla z24.s, p3/M, z6.s, z11.s\n"
+ "fmla z28.s, p3/M, z3.s, z11.s\n"
+ "fmla z21.s, p3/M, z1.s, z10.s\n"
+ "ld1w { z11.s }, p2/Z, [x14, x11, LSL #2]\n"
+ "fmla z16.s, p3/M, z3.s, z9.s\n"
+ "fmla z19.s, p3/M, z5.s, z12.s\n"
+ "fmla z23.s, p3/M, z2.s, z12.s\n"
+ "fmla z17.s, p3/M, z4.s, z10.s\n"
+ "ld1w { z12.s }, p2/Z, [x6, x15, LSL #2]\n"
+ "fmla z18.s, p3/M, z3.s, z10.s\n"
+ "fmla z22.s, p3/M, z0.s, z10.s\n"
+ "fmla z27.s, p3/M, z8.s, z11.s\n"
+ "fmla z31.s, p3/M, z5.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x12, x4, LSL #2]\n"
+ "fmla z20.s, p3/M, z2.s, z10.s\n"
+ "fmla z21.s, p3/M, z2.s, z12.s\n"
+ "fmla z16.s, p3/M, z5.s, z10.s\n"
+ "fmla z17.s, p3/M, z5.s, z12.s\n"
+ "ld1w { z10.s }, p2/Z, [x7, x4, LSL #2]\n"
+ "fmla z18.s, p3/M, z4.s, z12.s\n"
+ "fmla z19.s, p3/M, z3.s, z12.s\n"
+ "fmla z22.s, p3/M, z1.s, z12.s\n"
+ "fmla z23.s, p3/M, z0.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x7, x13, LSL #2]\n"
+ "fmla z28.s, p3/M, z7.s, z11.s\n"
+ "fmla z29.s, p3/M, z6.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x12, x13, LSL #2]\n"
+ "fmla z20.s, p3/M, z4.s, z10.s\n"
+ "fmla z21.s, p3/M, z3.s, z10.s\n"
+ "fmla z24.s, p3/M, z1.s, z10.s\n"
+ "fmla z25.s, p3/M, z0.s, z10.s\n"
+ "fmla z16.s, p3/M, z7.s, z10.s\n"
+ "fmla z17.s, p3/M, z6.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x5, x8, LSL #2]\n"
+ "fmla z30.s, p3/M, z8.s, z11.s\n"
+ "fmla z31.s, p3/M, z7.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x16, x4, LSL #2]\n"
+ "fmla z18.s, p3/M, z8.s, z12.s\n"
+ "fmla z19.s, p3/M, z7.s, z12.s\n"
+ "fmla z22.s, p3/M, z5.s, z12.s\n"
+ "fmla z23.s, p3/M, z4.s, z12.s\n"
+ "fmla z26.s, p3/M, z2.s, z12.s\n"
+ "fmla z27.s, p3/M, z1.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x5, x15, LSL #2]\n"
+ "fmla z20.s, p3/M, z7.s, z11.s\n"
+ "fmla z21.s, p3/M, z6.s, z11.s\n"
+ "fmla z24.s, p3/M, z4.s, z11.s\n"
+ "fmla z25.s, p3/M, z3.s, z11.s\n"
+ "fmla z28.s, p3/M, z1.s, z11.s\n"
+ "fmla z29.s, p3/M, z0.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x16, x13, LSL #2]\n"
+ "fmla z16.s, p3/M, z2.s, z10.s\n"
+ "fmla z17.s, p3/M, z1.s, z10.s\n"
+ "fmla z18.s, p3/M, z0.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x7]\n"
+ "fmla z30.s, p3/M, z2.s, z11.s\n"
+ "fmla z19.s, p3/M, z0.s, z12.s\n"
+ "fmla z20.s, p3/M, z3.s, z10.s\n"
+ "fmla z24.s, p3/M, z0.s, z10.s\n"
+ "fmla z22.s, p3/M, z8.s, z11.s\n"
+ "fmla z23.s, p3/M, z7.s, z11.s\n"
+ "fmla z26.s, p3/M, z5.s, z11.s\n"
+ "fmla z27.s, p3/M, z4.s, z11.s\n"
+ "fmla z31.s, p3/M, z1.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x14, x8, LSL #2]\n"
+ "fmla z17.s, p3/M, z2.s, z12.s\n"
+ "fmla z18.s, p3/M, z1.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x7, x11, LSL #2]\n"
+ "fmla z16.s, p3/M, z6.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x16]\n"
+ "fmla z29.s, p3/M, z4.s, z11.s\n"
+ "fmla z30.s, p3/M, z3.s, z11.s\n"
+ "fmla z19.s, p3/M, z8.s, z12.s\n"
+ "fmla z23.s, p3/M, z5.s, z12.s\n"
+ "fmla z27.s, p3/M, z2.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x16, x11, LSL #2]\n"
+ "fmla z20.s, p3/M, z6.s, z10.s\n"
+ "fmla z24.s, p3/M, z3.s, z10.s\n"
+ "fmla z28.s, p3/M, z0.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x12, x8, LSL #2]\n"
+ "fmla z31.s, p3/M, z2.s, z12.s\n"
+ "fmla z29.s, p3/M, z7.s, z10.s\n"
+ "fmla z30.s, p3/M, z6.s, z10.s\n"
+ "fmla z24.s, p3/M, z8.s, z11.s\n"
+ "fmla z25.s, p3/M, z7.s, z11.s\n"
+ "fmla z26.s, p3/M, z6.s, z11.s\n"
+ "fmla z28.s, p3/M, z5.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x14, x15, LSL #2]\n"
+ "fmla z27.s, p3/M, z5.s, z12.s\n"
+ "fmla z29.s, p3/M, z5.s, z11.s\n"
+ "fmla z30.s, p3/M, z4.s, z11.s\n"
+ "fmla z31.s, p3/M, z3.s, z11.s\n"
+ "fmla z23.s, p3/M, z8.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x12, x15, LSL #2]\n"
+ "fmla z28.s, p3/M, z8.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x6, x4, LSL #2]\n"
+ "fmla z25.s, p3/M, z8.s, z11.s\n"
+ "fmla z26.s, p3/M, z7.s, z11.s\n"
+ "fmla z27.s, p3/M, z6.s, z11.s\n"
+ "fmla z29.s, p3/M, z8.s, z12.s\n"
+ "ld1w { z11.s }, p2/Z, [x6, x13, LSL #2]\n"
+ "fmla z30.s, p3/M, z7.s, z12.s\n"
+ "fmla z31.s, p3/M, z6.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x14, x4, LSL #2]\n"
+ "fmla z16.s, p3/M, z4.s, z10.s\n"
+ "fmla z17.s, p3/M, z3.s, z10.s\n"
+ "fmla z20.s, p3/M, z1.s, z10.s\n"
+ "fmla z21.s, p3/M, z0.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x14, x13, LSL #2]\n"
+ "fmla z18.s, p3/M, z5.s, z11.s\n"
+ "fmla z19.s, p3/M, z4.s, z11.s\n"
+ "fmla z22.s, p3/M, z2.s, z11.s\n"
+ "fmla z23.s, p3/M, z1.s, z11.s\n"
+ "fmla z24.s, p3/M, z7.s, z12.s\n"
+ "fmla z25.s, p3/M, z6.s, z12.s\n"
+ "fmla z28.s, p3/M, z4.s, z12.s\n"
+ "fmla z29.s, p3/M, z3.s, z12.s\n"
+ "fmla z26.s, p3/M, z8.s, z10.s\n"
+ "fmla z27.s, p3/M, z7.s, z10.s\n"
+ "fmla z30.s, p3/M, z5.s, z10.s\n"
+ "fmla z31.s, p3/M, z4.s, z10.s\n"
+ ".inst 0xc1adc9d0 // fclamp { z16.s-z19.s }, z14.s, z13.s\n"
+ ".inst 0xc1adc9d4 // fclamp { z20.s-z23.s }, z14.s, z13.s\n"
+ "st1w { z16.s }, p0, [x27]\n"
+ ".inst 0xc1adc9d8 // fclamp { z24.s-z27.s }, z14.s, z13.s\n"
+ ".inst 0xc1adc9dc // fclamp { z28.s-z31.s }, z14.s, z13.s\n"
+ "st1w { z17.s }, p0, [x27, x28, LSL #2]\n"
+ "st1w { z18.s }, p0, [x27, x23, LSL #2]\n"
+ "st1w { z19.s }, p0, [x27, x21, LSL #2]\n"
+ "st1w { z20.s }, p0, [x26]\n"
+ "st1w { z21.s }, p0, [x26, x28, LSL #2]\n"
+ "st1w { z22.s }, p0, [x26, x23, LSL #2]\n"
+ "st1w { z23.s }, p0, [x26, x21, LSL #2]\n"
+ "st1w { z24.s }, p0, [x24]\n"
+ "st1w { z25.s }, p0, [x24, x28, LSL #2]\n"
+ "st1w { z26.s }, p0, [x24, x23, LSL #2]\n"
+ "st1w { z27.s }, p0, [x24, x21, LSL #2]\n"
+ "st1w { z28.s }, p0, [x22]\n"
+ "st1w { z29.s }, p0, [x22, x28, LSL #2]\n"
+ "st1w { z30.s }, p0, [x22, x23, LSL #2]\n"
+ "st1w { z31.s }, p0, [x22, x21, LSL #2]\n"
+ "blt 1b\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [n_channels] "r" ((unsigned long) n_channels), [offsetof_args_inptr] "I" (offsetof(Args, inptr)), [offsetof_args_ld_input_col] "I" (offsetof(Args, ld_input_col)), [offsetof_args_ld_input_row] "I" (offsetof(Args, ld_input_row)), [offsetof_args_ld_output_col] "I" (offsetof(Args, ld_output_col)), [offsetof_args_ld_output_row] "I" (offsetof(Args, ld_output_row)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_n_tile_cols] "I" (offsetof(Args, n_tile_cols)), [offsetof_args_n_tile_rows] "I" (offsetof(Args, n_tile_rows)), [offsetof_args_outptr] "I" (offsetof(Args, outptr)), [offsetof_args_params] "I" (offsetof(Args, params)), [offsetof_args_tile_i] "I" (offsetof(Args, tile_i)), [offsetof_args_tile_j] "I" (offsetof(Args, tile_j)), [params_struct] "r" (¶ms_struct)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x2", "x3", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_indirect.cpp
new file mode 100644
index 0000000..d99ebb2
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_indirect.cpp
@@ -0,0 +1,653 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <cstddef>
+#include <cstdint>
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst_indirect_impl(
+ const float *const *const input_ptrs,
+ float *const *const outptrs,
+ const void *params,
+ unsigned int n_channels,
+ const float activation_min,
+ const float activation_max
+)
+{
+ struct Args
+ {
+ float *const *outptrs;
+ const void *params;
+ const float min, max;
+ const float *inptrs[36];
+
+ Args(
+ const float *const *const input_ptrs,
+ float *const *const outptrs,
+ const void *const params,
+ const float min,
+ const float max
+ ) : outptrs(outptrs), params(params), min(min), max(max)
+ {
+ inptrs[0] = input_ptrs[14];
+ inptrs[1] = input_ptrs[0];
+ inptrs[2] = input_ptrs[5];
+ inptrs[3] = input_ptrs[15];
+ inptrs[4] = input_ptrs[30];
+ inptrs[5] = input_ptrs[35];
+ inptrs[6] = input_ptrs[20];
+ inptrs[7] = input_ptrs[1];
+ inptrs[8] = input_ptrs[4];
+ inptrs[9] = input_ptrs[21];
+ inptrs[10] = input_ptrs[6];
+ inptrs[11] = input_ptrs[11];
+ inptrs[12] = input_ptrs[24];
+ inptrs[13] = input_ptrs[8];
+ inptrs[14] = input_ptrs[29];
+ inptrs[15] = input_ptrs[9];
+ inptrs[16] = input_ptrs[31];
+ inptrs[17] = input_ptrs[13];
+ inptrs[18] = input_ptrs[34];
+ inptrs[19] = input_ptrs[16];
+ inptrs[20] = input_ptrs[2];
+ inptrs[21] = input_ptrs[19];
+ inptrs[22] = input_ptrs[3];
+ inptrs[23] = input_ptrs[12];
+ inptrs[24] = input_ptrs[22];
+ inptrs[25] = input_ptrs[17];
+ inptrs[26] = input_ptrs[18];
+ inptrs[27] = input_ptrs[26];
+ inptrs[28] = input_ptrs[23];
+ inptrs[29] = input_ptrs[32];
+ inptrs[30] = input_ptrs[27];
+ inptrs[31] = input_ptrs[33];
+ inptrs[32] = input_ptrs[7];
+ inptrs[33] = input_ptrs[10];
+ inptrs[34] = input_ptrs[25];
+ inptrs[35] = input_ptrs[28];
+
+ }
+ };
+
+ Args params_struct(input_ptrs, outptrs, params,
+ activation_min, activation_max);
+
+ __asm__ __volatile__(
+ "ldr x16, [%x[params_struct], %[offsetof_args_params]]\n"
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "add x15, %x[params_struct], %[offsetof_Args_inptrs]\n"
+ "ptrue p3.b\n"
+ ".inst 0x25207810 // ptrue pn8.b\n"
+ "ld1w { z15.s }, p3/Z, [x16]\n"
+ "addvl x16, x16, #1\n"
+ "ldp x14, x13, [x15, #0x0]\n"
+ "ldp x12, x11, [x15, #0x10]\n"
+ "cntw x10\n"
+ ".inst 0xa040c200 // ld1w { z0.s-z3.s }, pn8.b/Z, [x16]\n"
+ "addvl x16, x16, #4\n"
+ "mov x9, #0x0\n"
+ "whilelt p2.s, XZR, %x[n_channels]\n"
+ ".inst 0xa040c204 // ld1w { z4.s-z7.s }, pn8.b/Z, [x16]\n"
+ "ldr x28, [%x[params_struct], %[offsetof_args_outptrs]]\n"
+ "addvl x16, x16, #4\n"
+ "cmp x10, %x[n_channels]\n"
+ "ld1rw { z14.s }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n"
+ "ld1rw { z13.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n"
+ "sub x27, XZR, x10\n"
+ "ld1w { z8.s }, p3/Z, [x16]\n"
+ "addvl x16, x16, #1\n"
+ "ld1w { z9.s }, p2/Z, [x14, x9, LSL #2]\n"
+ "ld1w { z10.s }, p2/Z, [x13, x9, LSL #2]\n"
+ "ld1w { z11.s }, p2/Z, [x12, x9, LSL #2]\n"
+ "ld1w { z12.s }, p2/Z, [x11, x9, LSL #2]\n"
+ "bge 2f\n"
+ "1:" // Channel loop
+ "movprfx z21, z15\n fmla z21.s, p3/M, z4.s, z9.s\n"
+ "movprfx z16, z15\n fmla z16.s, p3/M, z8.s, z9.s\n"
+ "ldr x26, [x15, #0x20]\n"
+ "incw x27\n"
+ "movprfx z22, z15\n fmla z22.s, p3/M, z3.s, z9.s\n"
+ "movprfx z25, z15\n fmla z25.s, p3/M, z1.s, z9.s\n"
+ "ldr x25, [x15, #0x30]\n"
+ "mov p1.b, p2.b\n"
+ "movprfx z26, z15\n fmla z26.s, p3/M, z0.s, z9.s\n"
+ "ldr x24, [x15, #0x28]\n"
+ "movprfx z17, z15\n fmla z17.s, p3/M, z7.s, z9.s\n"
+ "whilelt p0.s, x10, %x[n_channels]\n"
+ "movprfx z18, z15\n fmla z18.s, p3/M, z6.s, z9.s\n"
+ "fmla z21.s, p3/M, z5.s, z12.s\n"
+ "ldr x23, [x15, #0x38]\n"
+ "movprfx z20, z15\n fmla z20.s, p3/M, z5.s, z9.s\n"
+ "movprfx z24, z15\n fmla z24.s, p3/M, z2.s, z9.s\n"
+ "ld1w { z9.s }, p2/Z, [x25, x9, LSL #2]\n"
+ "ldr x14, [x15, #0x40]\n"
+ "fmla z16.s, p3/M, z0.s, z10.s\n"
+ "movprfx z19, z15\n fmla z19.s, p3/M, z2.s, z11.s\n"
+ "ld1w { z10.s }, p2/Z, [x26, x9, LSL #2]\n"
+ "ldr x13, [x15, #0x48]\n"
+ "fmla z22.s, p3/M, z4.s, z12.s\n"
+ "fmla z25.s, p3/M, z2.s, z12.s\n"
+ "ld1w { z11.s }, p2/Z, [x24, x9, LSL #2]\n"
+ "ldr x12, [x15, #0x50]\n"
+ "fmla z26.s, p3/M, z1.s, z12.s\n"
+ "fmla z17.s, p3/M, z8.s, z12.s\n"
+ "ldr x26, [x15, #0x60]\n"
+ "fmla z18.s, p3/M, z7.s, z12.s\n"
+ "movprfx z28, z15\n fmla z28.s, p3/M, z6.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x13, x9, LSL #2]\n"
+ "ldr x24, [x15, #0x68]\n"
+ "fmla z21.s, p3/M, z7.s, z9.s\n"
+ "fmla z19.s, p3/M, z6.s, z12.s\n"
+ "ldr x11, [x15, #0x58]\n"
+ "movprfx z23, z15\n fmla z23.s, p3/M, z3.s, z12.s\n"
+ "movprfx z27, z15\n fmla z27.s, p3/M, z0.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x23, x9, LSL #2]\n"
+ "ldr x25, [x15, #0x70]\n"
+ "movprfx z31, z15\n fmla z31.s, p3/M, z8.s, z11.s\n"
+ "fmla z22.s, p3/M, z6.s, z9.s\n"
+ "ld1w { z11.s }, p2/Z, [x14, x9, LSL #2]\n"
+ "ldr x23, [x15, #0x78]\n"
+ "fmla z25.s, p3/M, z4.s, z9.s\n"
+ "fmla z26.s, p3/M, z3.s, z9.s\n"
+ "ldr x14, [x15, #0x80]\n"
+ "movprfx z29, z15\n fmla z29.s, p3/M, z1.s, z9.s\n"
+ "movprfx z30, z15\n fmla z30.s, p3/M, z0.s, z9.s\n"
+ "ldr x13, [x15, #0x88]\n"
+ "ld1w { z15.s }, p3/Z, [x16]\n"
+ "fmla z20.s, p3/M, z8.s, z9.s\n"
+ "fmla z24.s, p3/M, z5.s, z9.s\n"
+ "ldr x22, [x28, #0x0]\n"
+ "addvl x16, x16, #1\n"
+ "fmla z28.s, p3/M, z2.s, z9.s\n"
+ "fmla z16.s, p3/M, z1.s, z12.s\n"
+ "ld1w { z9.s }, p2/Z, [x12, x9, LSL #2]\n"
+ "ldr x12, [x15, #0x90]\n"
+ "fmla z17.s, p3/M, z0.s, z12.s\n"
+ "fmla z18.s, p3/M, z2.s, z11.s\n"
+ "ld1w { z12.s }, p2/Z, [x11, x9, LSL #2]\n"
+ "ldr x11, [x15, #0x98]\n"
+ "fmla z21.s, p3/M, z8.s, z10.s\n"
+ "fmla z19.s, p3/M, z1.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x26, x9, LSL #2]\n"
+ "ldr x26, [x15, #0xa0]\n"
+ "fmla z22.s, p3/M, z7.s, z10.s\n"
+ "fmla z23.s, p3/M, z6.s, z10.s\n"
+ "ldr x21, [x28, #0x8]\n"
+ "fmla z25.s, p3/M, z5.s, z10.s\n"
+ "fmla z26.s, p3/M, z4.s, z10.s\n"
+ "ldr x20, [x28, #0x10]\n"
+ "fmla z27.s, p3/M, z3.s, z10.s\n"
+ "fmla z29.s, p3/M, z2.s, z10.s\n"
+ "ldr x19, [x28, #0x18]\n"
+ "fmla z30.s, p3/M, z1.s, z10.s\n"
+ "fmla z31.s, p3/M, z0.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x24, x9, LSL #2]\n"
+ "ldr x24, [x15, #0xa8]\n"
+ "fmla z16.s, p3/M, z3.s, z9.s\n"
+ "fmla z20.s, p3/M, z0.s, z9.s\n"
+ "fmla z24.s, p3/M, z6.s, z11.s\n"
+ "fmla z28.s, p3/M, z3.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x25, x9, LSL #2]\n"
+ "ldr x25, [x15, #0xb0]\n"
+ "fmla z17.s, p3/M, z4.s, z10.s\n"
+ "fmla z18.s, p3/M, z3.s, z10.s\n"
+ "fmla z21.s, p3/M, z1.s, z10.s\n"
+ "fmla z19.s, p3/M, z5.s, z12.s\n"
+ "fmla z23.s, p3/M, z2.s, z12.s\n"
+ "fmla z22.s, p3/M, z0.s, z10.s\n"
+ "ld1w { z12.s }, p2/Z, [x23, x9, LSL #2]\n"
+ "ldr x23, [x15, #0xb8]\n"
+ "fmla z27.s, p3/M, z8.s, z11.s\n"
+ "fmla z31.s, p3/M, z5.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x14, x9, LSL #2]\n"
+ "ldr x14, [x15, #0xc0]\n"
+ "fmla z16.s, p3/M, z5.s, z10.s\n"
+ "fmla z20.s, p3/M, z2.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x13, x9, LSL #2]\n"
+ "ldr x13, [x15, #0xc8]\n"
+ "fmla z17.s, p3/M, z5.s, z12.s\n"
+ "fmla z18.s, p3/M, z4.s, z12.s\n"
+ "fmla z21.s, p3/M, z2.s, z12.s\n"
+ "fmla z19.s, p3/M, z3.s, z12.s\n"
+ "fmla z22.s, p3/M, z1.s, z12.s\n"
+ "fmla z23.s, p3/M, z0.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x11, x9, LSL #2]\n"
+ "ldr x11, [x15, #0xd8]\n"
+ "fmla z28.s, p3/M, z7.s, z11.s\n"
+ "fmla z29.s, p3/M, z6.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x12, x9, LSL #2]\n"
+ "ldr x12, [x15, #0xd0]\n"
+ "fmla z16.s, p3/M, z7.s, z10.s\n"
+ "fmla z17.s, p3/M, z6.s, z10.s\n"
+ "fmla z20.s, p3/M, z4.s, z10.s\n"
+ "fmla z21.s, p3/M, z3.s, z10.s\n"
+ "fmla z24.s, p3/M, z1.s, z10.s\n"
+ "fmla z25.s, p3/M, z0.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x26, x9, LSL #2]\n"
+ "ldr x26, [x15, #0xe0]\n"
+ "fmla z18.s, p3/M, z8.s, z12.s\n"
+ "fmla z30.s, p3/M, z8.s, z11.s\n"
+ "fmla z31.s, p3/M, z7.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x24, x9, LSL #2]\n"
+ "fmla z27.s, p3/M, z1.s, z12.s\n"
+ "ldr x24, [x15, #0xe8]\n"
+ "fmla z19.s, p3/M, z7.s, z12.s\n"
+ "fmla z22.s, p3/M, z5.s, z12.s\n"
+ "fmla z23.s, p3/M, z4.s, z12.s\n"
+ "fmla z26.s, p3/M, z2.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x25, x9, LSL #2]\n"
+ "ldr x25, [x15, #0xf0]\n"
+ "fmla z16.s, p3/M, z2.s, z10.s\n"
+ "fmla z17.s, p3/M, z1.s, z10.s\n"
+ "fmla z18.s, p3/M, z0.s, z10.s\n"
+ "fmla z20.s, p3/M, z7.s, z11.s\n"
+ "ld1w { z10.s }, p2/Z, [x23, x9, LSL #2]\n"
+ "ldr x23, [x15, #0xf8]\n"
+ "fmla z21.s, p3/M, z6.s, z11.s\n"
+ "fmla z24.s, p3/M, z4.s, z11.s\n"
+ "fmla z25.s, p3/M, z3.s, z11.s\n"
+ "fmla z28.s, p3/M, z1.s, z11.s\n"
+ "fmla z29.s, p3/M, z0.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x14, x9, LSL #2]\n"
+ "fmla z27.s, p3/M, z4.s, z11.s\n"
+ "ldr x14, [x15, #0x100]\n"
+ "fmla z30.s, p3/M, z2.s, z11.s\n"
+ "fmla z17.s, p3/M, z2.s, z12.s\n"
+ "fmla z18.s, p3/M, z1.s, z12.s\n"
+ "fmla z19.s, p3/M, z0.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x13, x9, LSL #2]\n"
+ "ldr x13, [x15, #0x108]\n"
+ "fmla z16.s, p3/M, z6.s, z10.s\n"
+ "fmla z20.s, p3/M, z3.s, z10.s\n"
+ "fmla z24.s, p3/M, z0.s, z10.s\n"
+ "fmla z22.s, p3/M, z8.s, z11.s\n"
+ "ld1w { z10.s }, p2/Z, [x12, x9, LSL #2]\n"
+ "ldr x12, [x15, #0x110]\n"
+ "fmla z23.s, p3/M, z7.s, z11.s\n"
+ "fmla z26.s, p3/M, z5.s, z11.s\n"
+ "fmla z31.s, p3/M, z1.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x11, x9, LSL #2]\n"
+ "fmla z27.s, p3/M, z2.s, z12.s\n"
+ "ldr x11, [x15, #0x118]\n"
+ "fmla z28.s, p3/M, z0.s, z10.s\n"
+ "fmla z29.s, p3/M, z4.s, z11.s\n"
+ "fmla z30.s, p3/M, z3.s, z11.s\n"
+ "fmla z19.s, p3/M, z8.s, z12.s\n"
+ "fmla z23.s, p3/M, z5.s, z12.s\n"
+ "fmla z20.s, p3/M, z6.s, z10.s\n"
+ "ld1w { z12.s }, p2/Z, [x26, x9, LSL #2]\n"
+ "fmla z24.s, p3/M, z3.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x24, x9, LSL #2]\n"
+ "fmla z25.s, p3/M, z7.s, z11.s\n"
+ "fmla z26.s, p3/M, z6.s, z11.s\n"
+ "fmla z28.s, p3/M, z5.s, z11.s\n"
+ "fmla z27.s, p3/M, z5.s, z12.s\n"
+ "fmla z31.s, p3/M, z2.s, z12.s\n"
+ "fmla z29.s, p3/M, z7.s, z10.s\n"
+ "fmla z30.s, p3/M, z6.s, z10.s\n"
+ "fmla z24.s, p3/M, z8.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x25, x9, LSL #2]\n"
+ "fmla z28.s, p3/M, z8.s, z10.s\n"
+ "fmla z25.s, p3/M, z8.s, z11.s\n"
+ "fmla z26.s, p3/M, z7.s, z11.s\n"
+ "ld1w { z10.s }, p2/Z, [x14, x9, LSL #2]\n"
+ "fmla z27.s, p3/M, z6.s, z11.s\n"
+ "fmla z29.s, p3/M, z5.s, z11.s\n"
+ "fmla z30.s, p3/M, z4.s, z11.s\n"
+ "fmla z31.s, p3/M, z3.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x13, x9, LSL #2]\n"
+ "ldp x14, x13, [x15, #0x0]\n"
+ "fmla z23.s, p3/M, z8.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x23, x9, LSL #2]\n"
+ "fmla z16.s, p3/M, z4.s, z10.s\n"
+ "fmla z17.s, p3/M, z3.s, z10.s\n"
+ "fmla z18.s, p3/M, z5.s, z11.s\n"
+ "ld1w { z9.s }, p0/Z, [x14, x10, LSL #2]\n"
+ "fmla z19.s, p3/M, z4.s, z11.s\n"
+ "fmla z29.s, p3/M, z8.s, z12.s\n"
+ "fmla z30.s, p3/M, z7.s, z12.s\n"
+ "fmla z31.s, p3/M, z6.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x12, x9, LSL #2]\n"
+ "fmla z20.s, p3/M, z1.s, z10.s\n"
+ "fmla z21.s, p3/M, z0.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x11, x9, LSL #2]\n"
+ "ldp x12, x11, [x15, #0x10]\n"
+ "fmla z22.s, p3/M, z2.s, z11.s\n"
+ "fmla z23.s, p3/M, z1.s, z11.s\n"
+ "incw x9\n"
+ "ld1w { z11.s }, p0/Z, [x12, x10, LSL #2]\n"
+ ".inst 0xc1adc9d0 // fclamp { z16.s-z19.s }, z14.s, z13.s\n"
+ "st1w { z16.s }, p1, [x22, x27, LSL #2]\n"
+ "ldr x22, [x28, #0x20]\n"
+ "fmla z24.s, p3/M, z7.s, z12.s\n"
+ "st1w { z17.s }, p1, [x21, x27, LSL #2]\n"
+ "ldr x21, [x28, #0x28]\n"
+ "fmla z25.s, p3/M, z6.s, z12.s\n"
+ "fmla z26.s, p3/M, z8.s, z10.s\n"
+ "st1w { z18.s }, p1, [x20, x27, LSL #2]\n"
+ "ldr x20, [x28, #0x30]\n"
+ "fmla z27.s, p3/M, z7.s, z10.s\n"
+ ".inst 0xc1adc9d4 // fclamp { z20.s-z23.s }, z14.s, z13.s\n"
+ "st1w { z19.s }, p1, [x19, x27, LSL #2]\n"
+ "ldr x19, [x28, #0x38]\n"
+ "fmla z28.s, p3/M, z4.s, z12.s\n"
+ "fmla z29.s, p3/M, z3.s, z12.s\n"
+ "st1w { z20.s }, p1, [x22, x27, LSL #2]\n"
+ "ldr x22, [x28, #0x40]\n"
+ "fmla z30.s, p3/M, z5.s, z10.s\n"
+ "fmla z31.s, p3/M, z4.s, z10.s\n"
+ "st1w { z21.s }, p1, [x21, x27, LSL #2]\n"
+ "ldr x21, [x28, #0x48]\n"
+ ".inst 0xc1adc9d8 // fclamp { z24.s-z27.s }, z14.s, z13.s\n"
+ "ld1w { z10.s }, p0/Z, [x13, x10, LSL #2]\n"
+ "st1w { z22.s }, p1, [x20, x27, LSL #2]\n"
+ "ldr x20, [x28, #0x50]\n"
+ "ld1w { z12.s }, p0/Z, [x11, x10, LSL #2]\n"
+ "incw x10\n"
+ "st1w { z23.s }, p1, [x19, x27, LSL #2]\n"
+ "ldr x19, [x28, #0x58]\n"
+ ".inst 0xa040c200 // ld1w { z0.s-z3.s }, pn8.b/Z, [x16]\n"
+ "addvl x16, x16, #4\n"
+ "st1w { z24.s }, p1, [x22, x27, LSL #2]\n"
+ "ldr x22, [x28, #0x60]\n"
+ "whilelt p2.s, x9, %x[n_channels]\n"
+ ".inst 0xa040c204 // ld1w { z4.s-z7.s }, pn8.b/Z, [x16]\n"
+ "st1w { z25.s }, p1, [x21, x27, LSL #2]\n"
+ "ldr x21, [x28, #0x68]\n"
+ "addvl x16, x16, #4\n"
+ "cmp x10, %x[n_channels]\n"
+ "st1w { z26.s }, p1, [x20, x27, LSL #2]\n"
+ "ldr x20, [x28, #0x70]\n"
+ ".inst 0xc1adc9dc // fclamp { z28.s-z31.s }, z14.s, z13.s\n"
+ "ld1w { z8.s }, p3/Z, [x16]\n"
+ "st1w { z27.s }, p1, [x19, x27, LSL #2]\n"
+ "ldr x19, [x28, #0x78]\n"
+ "addvl x16, x16, #1\n"
+ "st1w { z28.s }, p1, [x22, x27, LSL #2]\n"
+ "st1w { z29.s }, p1, [x21, x27, LSL #2]\n"
+ "st1w { z30.s }, p1, [x20, x27, LSL #2]\n"
+ "st1w { z31.s }, p1, [x19, x27, LSL #2]\n"
+ "blt 1b\n"
+ "2:" // Channel tail
+ "movprfx z21, z15\n fmla z21.s, p3/M, z4.s, z9.s\n"
+ "movprfx z16, z15\n fmla z16.s, p3/M, z8.s, z9.s\n"
+ "ldr x26, [x15, #0x20]\n"
+ "incw x27\n"
+ "movprfx z22, z15\n fmla z22.s, p3/M, z3.s, z9.s\n"
+ "movprfx z25, z15\n fmla z25.s, p3/M, z1.s, z9.s\n"
+ "ldr x25, [x15, #0x30]\n"
+ "mov p1.b, p2.b\n"
+ "movprfx z26, z15\n fmla z26.s, p3/M, z0.s, z9.s\n"
+ "ldr x24, [x15, #0x28]\n"
+ "movprfx z17, z15\n fmla z17.s, p3/M, z7.s, z9.s\n"
+ "movprfx z18, z15\n fmla z18.s, p3/M, z6.s, z9.s\n"
+ "fmla z21.s, p3/M, z5.s, z12.s\n"
+ "ldr x23, [x15, #0x38]\n"
+ "movprfx z20, z15\n fmla z20.s, p3/M, z5.s, z9.s\n"
+ "movprfx z24, z15\n fmla z24.s, p3/M, z2.s, z9.s\n"
+ "ld1w { z9.s }, p2/Z, [x25, x9, LSL #2]\n"
+ "ldr x14, [x15, #0x40]\n"
+ "fmla z16.s, p3/M, z0.s, z10.s\n"
+ "movprfx z19, z15\n fmla z19.s, p3/M, z2.s, z11.s\n"
+ "ld1w { z10.s }, p2/Z, [x26, x9, LSL #2]\n"
+ "ldr x13, [x15, #0x48]\n"
+ "fmla z22.s, p3/M, z4.s, z12.s\n"
+ "fmla z25.s, p3/M, z2.s, z12.s\n"
+ "ld1w { z11.s }, p2/Z, [x24, x9, LSL #2]\n"
+ "ldr x12, [x15, #0x50]\n"
+ "fmla z26.s, p3/M, z1.s, z12.s\n"
+ "fmla z17.s, p3/M, z8.s, z12.s\n"
+ "ldr x26, [x15, #0x60]\n"
+ "fmla z18.s, p3/M, z7.s, z12.s\n"
+ "movprfx z28, z15\n fmla z28.s, p3/M, z6.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x13, x9, LSL #2]\n"
+ "ldr x24, [x15, #0x68]\n"
+ "fmla z21.s, p3/M, z7.s, z9.s\n"
+ "fmla z19.s, p3/M, z6.s, z12.s\n"
+ "ldr x11, [x15, #0x58]\n"
+ "movprfx z23, z15\n fmla z23.s, p3/M, z3.s, z12.s\n"
+ "movprfx z27, z15\n fmla z27.s, p3/M, z0.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x23, x9, LSL #2]\n"
+ "ldr x25, [x15, #0x70]\n"
+ "movprfx z31, z15\n fmla z31.s, p3/M, z8.s, z11.s\n"
+ "fmla z22.s, p3/M, z6.s, z9.s\n"
+ "ld1w { z11.s }, p2/Z, [x14, x9, LSL #2]\n"
+ "ldr x23, [x15, #0x78]\n"
+ "fmla z25.s, p3/M, z4.s, z9.s\n"
+ "fmla z26.s, p3/M, z3.s, z9.s\n"
+ "ldr x14, [x15, #0x80]\n"
+ "movprfx z29, z15\n fmla z29.s, p3/M, z1.s, z9.s\n"
+ "movprfx z30, z15\n fmla z30.s, p3/M, z0.s, z9.s\n"
+ "ldr x13, [x15, #0x88]\n"
+ "fmla z20.s, p3/M, z8.s, z9.s\n"
+ "fmla z24.s, p3/M, z5.s, z9.s\n"
+ "ldr x22, [x28, #0x0]\n"
+ "fmla z28.s, p3/M, z2.s, z9.s\n"
+ "fmla z16.s, p3/M, z1.s, z12.s\n"
+ "ld1w { z9.s }, p2/Z, [x12, x9, LSL #2]\n"
+ "ldr x12, [x15, #0x90]\n"
+ "fmla z17.s, p3/M, z0.s, z12.s\n"
+ "fmla z18.s, p3/M, z2.s, z11.s\n"
+ "ld1w { z12.s }, p2/Z, [x11, x9, LSL #2]\n"
+ "ldr x11, [x15, #0x98]\n"
+ "fmla z21.s, p3/M, z8.s, z10.s\n"
+ "fmla z19.s, p3/M, z1.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x26, x9, LSL #2]\n"
+ "ldr x26, [x15, #0xa0]\n"
+ "fmla z22.s, p3/M, z7.s, z10.s\n"
+ "fmla z23.s, p3/M, z6.s, z10.s\n"
+ "ldr x21, [x28, #0x8]\n"
+ "fmla z25.s, p3/M, z5.s, z10.s\n"
+ "fmla z26.s, p3/M, z4.s, z10.s\n"
+ "ldr x20, [x28, #0x10]\n"
+ "fmla z27.s, p3/M, z3.s, z10.s\n"
+ "fmla z29.s, p3/M, z2.s, z10.s\n"
+ "ldr x19, [x28, #0x18]\n"
+ "fmla z30.s, p3/M, z1.s, z10.s\n"
+ "fmla z31.s, p3/M, z0.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x24, x9, LSL #2]\n"
+ "ldr x24, [x15, #0xa8]\n"
+ "fmla z16.s, p3/M, z3.s, z9.s\n"
+ "fmla z20.s, p3/M, z0.s, z9.s\n"
+ "fmla z24.s, p3/M, z6.s, z11.s\n"
+ "fmla z28.s, p3/M, z3.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x25, x9, LSL #2]\n"
+ "ldr x25, [x15, #0xb0]\n"
+ "fmla z17.s, p3/M, z4.s, z10.s\n"
+ "fmla z18.s, p3/M, z3.s, z10.s\n"
+ "fmla z21.s, p3/M, z1.s, z10.s\n"
+ "fmla z19.s, p3/M, z5.s, z12.s\n"
+ "fmla z23.s, p3/M, z2.s, z12.s\n"
+ "fmla z22.s, p3/M, z0.s, z10.s\n"
+ "ld1w { z12.s }, p2/Z, [x23, x9, LSL #2]\n"
+ "ldr x23, [x15, #0xb8]\n"
+ "fmla z27.s, p3/M, z8.s, z11.s\n"
+ "fmla z31.s, p3/M, z5.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x14, x9, LSL #2]\n"
+ "ldr x14, [x15, #0xc0]\n"
+ "fmla z16.s, p3/M, z5.s, z10.s\n"
+ "fmla z20.s, p3/M, z2.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x13, x9, LSL #2]\n"
+ "ldr x13, [x15, #0xc8]\n"
+ "fmla z17.s, p3/M, z5.s, z12.s\n"
+ "fmla z18.s, p3/M, z4.s, z12.s\n"
+ "fmla z21.s, p3/M, z2.s, z12.s\n"
+ "fmla z19.s, p3/M, z3.s, z12.s\n"
+ "fmla z22.s, p3/M, z1.s, z12.s\n"
+ "fmla z23.s, p3/M, z0.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x11, x9, LSL #2]\n"
+ "ldr x11, [x15, #0xd8]\n"
+ "fmla z28.s, p3/M, z7.s, z11.s\n"
+ "fmla z29.s, p3/M, z6.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x12, x9, LSL #2]\n"
+ "ldr x12, [x15, #0xd0]\n"
+ "fmla z16.s, p3/M, z7.s, z10.s\n"
+ "fmla z17.s, p3/M, z6.s, z10.s\n"
+ "fmla z20.s, p3/M, z4.s, z10.s\n"
+ "fmla z21.s, p3/M, z3.s, z10.s\n"
+ "fmla z24.s, p3/M, z1.s, z10.s\n"
+ "fmla z25.s, p3/M, z0.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x26, x9, LSL #2]\n"
+ "ldr x26, [x15, #0xe0]\n"
+ "fmla z18.s, p3/M, z8.s, z12.s\n"
+ "fmla z30.s, p3/M, z8.s, z11.s\n"
+ "fmla z31.s, p3/M, z7.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x24, x9, LSL #2]\n"
+ "fmla z27.s, p3/M, z1.s, z12.s\n"
+ "ldr x24, [x15, #0xe8]\n"
+ "fmla z19.s, p3/M, z7.s, z12.s\n"
+ "fmla z22.s, p3/M, z5.s, z12.s\n"
+ "fmla z23.s, p3/M, z4.s, z12.s\n"
+ "fmla z26.s, p3/M, z2.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x25, x9, LSL #2]\n"
+ "ldr x25, [x15, #0xf0]\n"
+ "fmla z16.s, p3/M, z2.s, z10.s\n"
+ "fmla z17.s, p3/M, z1.s, z10.s\n"
+ "fmla z18.s, p3/M, z0.s, z10.s\n"
+ "fmla z20.s, p3/M, z7.s, z11.s\n"
+ "ld1w { z10.s }, p2/Z, [x23, x9, LSL #2]\n"
+ "ldr x23, [x15, #0xf8]\n"
+ "fmla z21.s, p3/M, z6.s, z11.s\n"
+ "fmla z24.s, p3/M, z4.s, z11.s\n"
+ "fmla z25.s, p3/M, z3.s, z11.s\n"
+ "fmla z28.s, p3/M, z1.s, z11.s\n"
+ "fmla z29.s, p3/M, z0.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x14, x9, LSL #2]\n"
+ "fmla z27.s, p3/M, z4.s, z11.s\n"
+ "ldr x14, [x15, #0x100]\n"
+ "fmla z30.s, p3/M, z2.s, z11.s\n"
+ "fmla z17.s, p3/M, z2.s, z12.s\n"
+ "fmla z18.s, p3/M, z1.s, z12.s\n"
+ "fmla z19.s, p3/M, z0.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x13, x9, LSL #2]\n"
+ "ldr x13, [x15, #0x108]\n"
+ "fmla z16.s, p3/M, z6.s, z10.s\n"
+ "fmla z20.s, p3/M, z3.s, z10.s\n"
+ "fmla z24.s, p3/M, z0.s, z10.s\n"
+ "fmla z22.s, p3/M, z8.s, z11.s\n"
+ "ld1w { z10.s }, p2/Z, [x12, x9, LSL #2]\n"
+ "ldr x12, [x15, #0x110]\n"
+ "fmla z23.s, p3/M, z7.s, z11.s\n"
+ "fmla z26.s, p3/M, z5.s, z11.s\n"
+ "fmla z31.s, p3/M, z1.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x11, x9, LSL #2]\n"
+ "fmla z27.s, p3/M, z2.s, z12.s\n"
+ "ldr x11, [x15, #0x118]\n"
+ "fmla z28.s, p3/M, z0.s, z10.s\n"
+ "fmla z29.s, p3/M, z4.s, z11.s\n"
+ "fmla z30.s, p3/M, z3.s, z11.s\n"
+ "fmla z19.s, p3/M, z8.s, z12.s\n"
+ "fmla z23.s, p3/M, z5.s, z12.s\n"
+ "fmla z20.s, p3/M, z6.s, z10.s\n"
+ "ld1w { z12.s }, p2/Z, [x26, x9, LSL #2]\n"
+ "fmla z24.s, p3/M, z3.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x24, x9, LSL #2]\n"
+ "fmla z25.s, p3/M, z7.s, z11.s\n"
+ "fmla z26.s, p3/M, z6.s, z11.s\n"
+ "fmla z28.s, p3/M, z5.s, z11.s\n"
+ "fmla z27.s, p3/M, z5.s, z12.s\n"
+ "fmla z31.s, p3/M, z2.s, z12.s\n"
+ "fmla z29.s, p3/M, z7.s, z10.s\n"
+ "fmla z30.s, p3/M, z6.s, z10.s\n"
+ "fmla z24.s, p3/M, z8.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x25, x9, LSL #2]\n"
+ "fmla z28.s, p3/M, z8.s, z10.s\n"
+ "fmla z25.s, p3/M, z8.s, z11.s\n"
+ "fmla z26.s, p3/M, z7.s, z11.s\n"
+ "ld1w { z10.s }, p2/Z, [x14, x9, LSL #2]\n"
+ "fmla z27.s, p3/M, z6.s, z11.s\n"
+ "fmla z29.s, p3/M, z5.s, z11.s\n"
+ "fmla z30.s, p3/M, z4.s, z11.s\n"
+ "fmla z31.s, p3/M, z3.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x13, x9, LSL #2]\n"
+ "fmla z23.s, p3/M, z8.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x23, x9, LSL #2]\n"
+ "fmla z16.s, p3/M, z4.s, z10.s\n"
+ "fmla z17.s, p3/M, z3.s, z10.s\n"
+ "fmla z18.s, p3/M, z5.s, z11.s\n"
+ "fmla z19.s, p3/M, z4.s, z11.s\n"
+ "fmla z29.s, p3/M, z8.s, z12.s\n"
+ "fmla z30.s, p3/M, z7.s, z12.s\n"
+ "fmla z31.s, p3/M, z6.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x12, x9, LSL #2]\n"
+ "fmla z20.s, p3/M, z1.s, z10.s\n"
+ "fmla z21.s, p3/M, z0.s, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x11, x9, LSL #2]\n"
+ "fmla z22.s, p3/M, z2.s, z11.s\n"
+ "fmla z23.s, p3/M, z1.s, z11.s\n"
+ ".inst 0xc1adc9d0 // fclamp { z16.s-z19.s }, z14.s, z13.s\n"
+ "st1w { z16.s }, p1, [x22, x27, LSL #2]\n"
+ "ldr x22, [x28, #0x20]\n"
+ "fmla z24.s, p3/M, z7.s, z12.s\n"
+ "st1w { z17.s }, p1, [x21, x27, LSL #2]\n"
+ "ldr x21, [x28, #0x28]\n"
+ "fmla z25.s, p3/M, z6.s, z12.s\n"
+ "fmla z26.s, p3/M, z8.s, z10.s\n"
+ "st1w { z18.s }, p1, [x20, x27, LSL #2]\n"
+ "ldr x20, [x28, #0x30]\n"
+ "fmla z27.s, p3/M, z7.s, z10.s\n"
+ ".inst 0xc1adc9d4 // fclamp { z20.s-z23.s }, z14.s, z13.s\n"
+ "st1w { z19.s }, p1, [x19, x27, LSL #2]\n"
+ "ldr x19, [x28, #0x38]\n"
+ "fmla z28.s, p3/M, z4.s, z12.s\n"
+ "fmla z29.s, p3/M, z3.s, z12.s\n"
+ "st1w { z20.s }, p1, [x22, x27, LSL #2]\n"
+ "ldr x22, [x28, #0x40]\n"
+ "fmla z30.s, p3/M, z5.s, z10.s\n"
+ "fmla z31.s, p3/M, z4.s, z10.s\n"
+ "st1w { z21.s }, p1, [x21, x27, LSL #2]\n"
+ "ldr x21, [x28, #0x48]\n"
+ ".inst 0xc1adc9d8 // fclamp { z24.s-z27.s }, z14.s, z13.s\n"
+ ".inst 0xc1adc9dc // fclamp { z28.s-z31.s }, z14.s, z13.s\n"
+ "st1w { z22.s }, p1, [x20, x27, LSL #2]\n"
+ "ldr x20, [x28, #0x50]\n"
+ "st1w { z23.s }, p1, [x19, x27, LSL #2]\n"
+ "ldr x19, [x28, #0x58]\n"
+ "st1w { z24.s }, p1, [x22, x27, LSL #2]\n"
+ "ldr x22, [x28, #0x60]\n"
+ "st1w { z25.s }, p1, [x21, x27, LSL #2]\n"
+ "ldr x21, [x28, #0x68]\n"
+ "st1w { z26.s }, p1, [x20, x27, LSL #2]\n"
+ "ldr x20, [x28, #0x70]\n"
+ "st1w { z27.s }, p1, [x19, x27, LSL #2]\n"
+ "ldr x19, [x28, #0x78]\n"
+ "st1w { z28.s }, p1, [x22, x27, LSL #2]\n"
+ "st1w { z29.s }, p1, [x21, x27, LSL #2]\n"
+ "st1w { z30.s }, p1, [x20, x27, LSL #2]\n"
+ "st1w { z31.s }, p1, [x19, x27, LSL #2]\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [n_channels] "r" ((unsigned long) n_channels), [offsetof_Args_inptrs] "I" (offsetof(Args, inptrs)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_args_params] "I" (offsetof(Args, params)), [params_struct] "r" (¶ms_struct)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp
new file mode 100644
index 0000000..a4ca907
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include "src/core/NEON/kernels/arm_gemm/utils.hpp"
+
+#include <cstdint>
+
+#pragma once
+
+#if defined(__aarch64__)
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst_indirect_impl(const float *const *const input_ptrs, float *const *const outptrs, const void *params, unsigned int n_channels, const float activation_min, const float activation_max);
+void sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst_direct_impl(const unsigned int n_tile_rows, const unsigned int n_tile_cols, const float *inptr, int64_t ld_input_row, int64_t ld_input_col, float *outptr, int64_t ld_output_row, int64_t ld_output_col, const void *params, unsigned int n_channels, const float activation_min, const float activation_max);
+
+class sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst : public DepthwiseDepthfirstStrategy<float, float, float, float>
+{
+ private:
+ using Parent = DepthwiseDepthfirstStrategy<float, float, float, float>;
+ Parent::IndirectKernelType m_indirect_kernel = sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst_indirect_impl;
+ Parent::DirectKernelType m_direct_kernel = sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst_direct_impl;
+
+ public:
+ using return_type = float;
+ constexpr static auto vl_type = arm_gemm::VLType::SME;
+
+ constexpr static unsigned int kernel_rows = 3;
+ constexpr static unsigned int kernel_cols = 3;
+
+ constexpr static unsigned int stride_rows = 2;
+ constexpr static unsigned int stride_cols = 2;
+
+ constexpr static unsigned int output_rows = 2;
+ constexpr static unsigned int output_cols = 2;
+
+ sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst(const CPUInfo *)
+ : Parent(output_rows, output_cols, kernel_rows, kernel_cols, stride_rows, stride_cols) {}
+
+ arm_gemm::VLType get_vl_type(void) const override { return vl_type; }
+
+ Parent::IndirectKernelType get_indirect_kernel() const override { return m_indirect_kernel; }
+ Parent::DirectKernelType get_direct_kernel() const override { return m_direct_kernel; }
+};
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(__aarch64__)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_direct.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_direct.cpp
new file mode 100644
index 0000000..449df1e
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_direct.cpp
@@ -0,0 +1,374 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <cstddef>
+#include <cstdint>
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst_direct_impl(
+ const unsigned int n_tile_rows,
+ const unsigned int n_tile_cols,
+ const float *inptr,
+ int64_t ld_input_row,
+ int64_t ld_input_col,
+ float *outptr,
+ int64_t ld_output_row,
+ int64_t ld_output_col,
+ const void *params,
+ unsigned int n_channels,
+ const float activation_min,
+ const float activation_max
+)
+{
+ struct Args
+ {
+ const uint64_t n_tile_rows, n_tile_cols;
+ const float *inptr;
+ const uint64_t ld_input_row;
+ const uint64_t ld_input_col;
+ float *outptr;
+ const uint64_t ld_output_row;
+ const uint64_t ld_output_col;
+ const void *params;
+ const float min, max;
+
+ uint64_t tile_i = 0, tile_j = 0;
+
+ Args(
+ const unsigned int n_tile_rows,
+ const unsigned int n_tile_cols,
+ const float *inptr,
+ int64_t ld_input_row,
+ int64_t ld_input_col,
+ float *outptr,
+ int64_t ld_output_row,
+ int64_t ld_output_col,
+ const void *params,
+ const float activation_min,
+ const float activation_max
+ ) : n_tile_rows(n_tile_rows), n_tile_cols(n_tile_cols), inptr(inptr),
+ ld_input_row(ld_input_row), ld_input_col(ld_input_col), outptr(outptr),
+ ld_output_row(ld_output_row), ld_output_col(ld_output_col),
+ params(params), min(activation_min), max(activation_max)
+ {
+ }
+ };
+
+ Args params_struct(
+ n_tile_rows, n_tile_cols,
+ inptr, ld_input_row, ld_input_col,
+ outptr, ld_output_row, ld_output_col,
+ params, activation_min, activation_max
+ );
+
+ __asm__ __volatile__(
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "ptrue p3.b\n"
+ ".inst 0x25207810 // ptrue pn8.b\n"
+ "mov x2, #0x0\n"
+ "mov x3, #0x0\n"
+ "1:" // Tile loop
+ "str x2, [%x[params_struct], %[offsetof_args_tile_i]]\n"
+ "mov x21, #0x4\n"
+ "str x3, [%x[params_struct], %[offsetof_args_tile_j]]\n"
+ "ldr x20, [%x[params_struct], %[offsetof_args_ld_input_row]]\n"
+ "mul x19, x2, x20\n" // offset = tile_i * ld_input_row
+ "ldr x4, [%x[params_struct], %[offsetof_args_ld_input_col]]\n"
+ "madd x19, x3, x4, x19\n" // offset += tile_j * ld_input_col
+ "mul x19, x19, x21\n" // offset *= kernel_stride * output_size
+ "ldr x5, [%x[params_struct], %[offsetof_args_inptr]]\n"
+ "add x5, x5, x19, LSL #2\n" // inptr[0] += offset * sizeof(float)
+ "add x6, x5, x20, LSL #2\n"
+ "add x7, x6, x20, LSL #2\n"
+ "add x8, x4, x4\n"
+ "ldr x17, [%x[params_struct], %[offsetof_args_params]]\n"
+ "add x16, x7, x20, LSL #2\n"
+ "add x15, x8, x4\n"
+ "add x14, x16, x20, LSL #2\n"
+ "add x13, x15, x4\n"
+ "cbnz x3, 2f\n"
+ "ldr x19, [%x[params_struct], %[offsetof_args_n_tile_cols]]\n"
+ "sub x20, x19, x3\n"
+ "sub x20, x20, #0x1\n"
+ "lsl x12, %x[n_channels], #0x2\n"
+ "mov x19, #0x10\n"
+ "and x20, x20, #0x3fffff\n"
+ "mul x19, x19, x4\n"
+ "orr x12, x12, x20, LSL #22\n"
+ "orr x12, x12, x19, LSL #38\n"
+ "add x25, x7, x8, LSL #2\n"
+ "add x24, x5, x4, LSL #2\n"
+ "add x23, x5, x15, LSL #2\n"
+ "add x22, x5, x13, LSL #2\n"
+ "add x21, x6, x4, LSL #2\n"
+ "add x20, x5, x8, LSL #2\n"
+ "add x19, x6, x15, LSL #2\n"
+ "add x11, x6, x13, LSL #2\n"
+ "add x10, x6, x8, LSL #2\n"
+ "add x9, x16, x4, LSL #2\n"
+ "add x28, x7, x4, LSL #2\n"
+ "add x27, x16, x15, LSL #2\n"
+ "add x26, x7, x15, LSL #2\n"
+ ".inst 0xf8ac4b3a // rprfm pldonce, x25, [x12]\n"
+ "add x25, x16, x13, LSL #2\n"
+ ".inst 0xf8ac48ba // rprfm pldonce, x5, [x12]\n"
+ ".inst 0xf8ac4b1a // rprfm pldonce, x24, [x12]\n"
+ "add x24, x7, x13, LSL #2\n"
+ ".inst 0xf8ac4afa // rprfm pldonce, x23, [x12]\n"
+ "add x23, x14, x4, LSL #2\n"
+ ".inst 0xf8ac4ada // rprfm pldonce, x22, [x12]\n"
+ "add x22, x16, x8, LSL #2\n"
+ ".inst 0xf8ac48da // rprfm pldonce, x6, [x12]\n"
+ ".inst 0xf8ac4aba // rprfm pldonce, x21, [x12]\n"
+ "add x21, x14, x15, LSL #2\n"
+ ".inst 0xf8ac4a9a // rprfm pldonce, x20, [x12]\n"
+ "add x20, x14, x8, LSL #2\n"
+ ".inst 0xf8ac4a7a // rprfm pldonce, x19, [x12]\n"
+ "add x19, x14, x13, LSL #2\n"
+ ".inst 0xf8ac497a // rprfm pldonce, x11, [x12]\n"
+ ".inst 0xf8ac495a // rprfm pldonce, x10, [x12]\n"
+ ".inst 0xf8ac4a1a // rprfm pldonce, x16, [x12]\n"
+ ".inst 0xf8ac48fa // rprfm pldonce, x7, [x12]\n"
+ ".inst 0xf8ac493a // rprfm pldonce, x9, [x12]\n"
+ ".inst 0xf8ac4b9a // rprfm pldonce, x28, [x12]\n"
+ ".inst 0xf8ac4b7a // rprfm pldonce, x27, [x12]\n"
+ ".inst 0xf8ac4b5a // rprfm pldonce, x26, [x12]\n"
+ ".inst 0xf8ac4b3a // rprfm pldonce, x25, [x12]\n"
+ ".inst 0xf8ac49da // rprfm pldonce, x14, [x12]\n"
+ ".inst 0xf8ac4b1a // rprfm pldonce, x24, [x12]\n"
+ ".inst 0xf8ac4afa // rprfm pldonce, x23, [x12]\n"
+ ".inst 0xf8ac4ada // rprfm pldonce, x22, [x12]\n"
+ ".inst 0xf8ac4aba // rprfm pldonce, x21, [x12]\n"
+ ".inst 0xf8ac4a9a // rprfm pldonce, x20, [x12]\n"
+ ".inst 0xf8ac4a7a // rprfm pldonce, x19, [x12]\n"
+ "2:" // Tile loop: Prefetch input rows: End
+ "ldr x21, [%x[params_struct], %[offsetof_args_ld_output_row]]\n"
+ "mul x20, x2, x21\n" // offset = tile_i * ld_output_row
+ "mov x19, #0x2\n"
+ "ld1w { z19.s }, p3/Z, [x17]\n"
+ "ldr x24, [%x[params_struct], %[offsetof_args_ld_output_col]]\n"
+ "madd x20, x3, x24, x20\n" // offset += tile_j * ld_output_col
+ "addvl x17, x17, #1\n"
+ ".inst 0xa040c220 // ld1w { z0.s-z3.s }, pn8.b/Z, [x17]\n"
+ "ldr x23, [%x[params_struct], %[offsetof_args_outptr]]\n"
+ "mul x20, x20, x19\n" // offset *= output_tile_size
+ "cntw x22\n"
+ "ld1rw { z18.s }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n"
+ "addvl x17, x17, #4\n"
+ "add x23, x23, x20, LSL #2\n" // outptrs[0] += offset * sizeof(float)
+ ".inst 0xa040c224 // ld1w { z4.s-z7.s }, pn8.b/Z, [x17]\n"
+ "whilelt p2.s, XZR, %x[n_channels]\n"
+ "addvl x17, x17, #4\n"
+ "ld1rw { z17.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n"
+ "cmp x22, %x[n_channels]\n"
+ "add x21, x23, x21, LSL #2\n"
+ "ld1w { z8.s }, p3/Z, [x17]\n"
+ "mov x20, #0x0\n"
+ "sub x19, XZR, x22\n"
+ "ld1w { z9.s }, p2/Z, [x7, x8, LSL #2]\n"
+ "ld1w { z10.s }, p2/Z, [x5]\n"
+ "addvl x17, x17, #1\n"
+ "ld1w { z11.s }, p2/Z, [x5, x4, LSL #2]\n"
+ "ld1w { z12.s }, p2/Z, [x5, x15, LSL #2]\n"
+ "ld1w { z13.s }, p2/Z, [x5, x13, LSL #2]\n"
+ "ld1w { z14.s }, p2/Z, [x6]\n"
+ "ld1w { z15.s }, p2/Z, [x6, x4, LSL #2]\n"
+ "ld1w { z16.s }, p2/Z, [x5, x8, LSL #2]\n"
+ "bge 4f\n"
+ "3:" // Tile loop: Channel loop
+ "movprfx z28, z19\n fmla z28.s, p3/M, z8.s, z9.s\n"
+ "movprfx z29, z19\n fmla z29.s, p3/M, z6.s, z9.s\n"
+ "whilelt p1.s, x22, %x[n_channels]\n"
+ "incw x20\n"
+ "fmla z28.s, p3/M, z0.s, z10.s\n"
+ "fmla z29.s, p3/M, z1.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x6, x13, LSL #2]\n"
+ "incw x22\n"
+ "fmla z28.s, p3/M, z1.s, z11.s\n"
+ "fmla z29.s, p3/M, z2.s, z13.s\n"
+ "ld1w { z11.s }, p2/Z, [x6, x15, LSL #2]\n"
+ "mov p0.b, p2.b\n"
+ "fmla z28.s, p3/M, z3.s, z14.s\n"
+ "fmla z29.s, p3/M, z0.s, z16.s\n"
+ "ld1w { z13.s }, p2/Z, [x6, x8, LSL #2]\n"
+ "addvl x5, x5, #1\n"
+ "fmla z28.s, p3/M, z4.s, z15.s\n"
+ "fmla z29.s, p3/M, z4.s, z11.s\n"
+ "ld1w { z14.s }, p2/Z, [x16]\n"
+ "addvl x6, x6, #1\n"
+ "fmla z28.s, p3/M, z2.s, z16.s\n"
+ "fmla z29.s, p3/M, z5.s, z12.s\n"
+ "ld1w { z15.s }, p2/Z, [x7]\n"
+ "incw x19\n"
+ "movprfx z30, z19\n fmla z30.s, p3/M, z2.s, z9.s\n"
+ "movprfx z31, z19\n fmla z31.s, p3/M, z0.s, z9.s\n"
+ "ld1w { z12.s }, p2/Z, [x7, x15, LSL #2]\n"
+ "fmla z28.s, p3/M, z5.s, z13.s\n"
+ "fmla z29.s, p3/M, z3.s, z13.s\n"
+ "ld1w { z13.s }, p2/Z, [x16, x15, LSL #2]\n"
+ "fmla z30.s, p3/M, z3.s, z14.s\n"
+ "fmla z31.s, p3/M, z4.s, z13.s\n"
+ "ld1w { z11.s }, p2/Z, [x16, x4, LSL #2]\n"
+ "fmla z30.s, p3/M, z0.s, z15.s\n"
+ "fmla z31.s, p3/M, z1.s, z12.s\n"
+ "ld1w { z14.s }, p2/Z, [x16, x13, LSL #2]\n"
+ "fmla z30.s, p3/M, z4.s, z11.s\n"
+ "fmla z31.s, p3/M, z5.s, z14.s\n"
+ "ld1w { z16.s }, p2/Z, [x7, x4, LSL #2]\n"
+ "fmla z28.s, p3/M, z6.s, z15.s\n"
+ "ld1w { z11.s }, p2/Z, [x7, x13, LSL #2]\n"
+ "fmla z30.s, p3/M, z1.s, z16.s\n"
+ "addvl x7, x7, #1\n"
+ "fmla z31.s, p3/M, z2.s, z11.s\n"
+ "fmla z28.s, p3/M, z7.s, z16.s\n"
+ "ld1w { z15.s }, p2/Z, [x14]\n"
+ "ld1w { z16.s }, p2/Z, [x16, x8, LSL #2]\n"
+ "fmla z30.s, p3/M, z6.s, z15.s\n"
+ "fmla z31.s, p3/M, z3.s, z16.s\n"
+ "addvl x16, x16, #1\n"
+ "ld1w { z13.s }, p2/Z, [x14, x4, LSL #2]\n"
+ "fmla z30.s, p3/M, z7.s, z13.s\n"
+ "fmla z29.s, p3/M, z7.s, z12.s\n"
+ "ld1w { z14.s }, p2/Z, [x14, x15, LSL #2]\n"
+ "fmla z31.s, p3/M, z7.s, z14.s\n"
+ "fmla z30.s, p3/M, z5.s, z16.s\n"
+ "ld1w { z15.s }, p2/Z, [x14, x8, LSL #2]\n"
+ "fmla z31.s, p3/M, z6.s, z15.s\n"
+ "fmla z29.s, p3/M, z8.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x14, x13, LSL #2]\n"
+ "fmla z30.s, p3/M, z8.s, z15.s\n"
+ "fmla z31.s, p3/M, z8.s, z11.s\n"
+ "whilelt p2.s, x20, %x[n_channels]\n"
+ "ld1w { z19.s }, p3/Z, [x17]\n"
+ "addvl x17, x17, #1\n"
+ "cmp x22, %x[n_channels]\n"
+ ".inst 0xc1b1ca5c // fclamp { z28.s-z31.s }, z18.s, z17.s\n"
+ ".inst 0xa040c220 // ld1w { z0.s-z3.s }, pn8.b/Z, [x17]\n"
+ "addvl x17, x17, #4\n"
+ "addvl x14, x14, #1\n"
+ "st1w { z28.s }, p0, [x23]\n"
+ ".inst 0xa040c224 // ld1w { z4.s-z7.s }, pn8.b/Z, [x17]\n"
+ "addvl x17, x17, #4\n"
+ "st1w { z29.s }, p0, [x23, x24, LSL #2]\n"
+ "addvl x23, x23, #1\n"
+ "ld1w { z9.s }, p1/Z, [x7, x8, LSL #2]\n"
+ "st1w { z30.s }, p0, [x21]\n"
+ "ld1w { z10.s }, p1/Z, [x5]\n"
+ "st1w { z31.s }, p0, [x21, x24, LSL #2]\n"
+ "addvl x21, x21, #1\n"
+ "ld1w { z11.s }, p1/Z, [x5, x4, LSL #2]\n"
+ "ld1w { z12.s }, p1/Z, [x5, x15, LSL #2]\n"
+ "ld1w { z13.s }, p1/Z, [x5, x13, LSL #2]\n"
+ "ld1w { z14.s }, p1/Z, [x6]\n"
+ "ld1w { z15.s }, p1/Z, [x6, x4, LSL #2]\n"
+ "ld1w { z16.s }, p1/Z, [x5, x8, LSL #2]\n"
+ "ld1w { z8.s }, p3/Z, [x17]\n"
+ "addvl x17, x17, #1\n"
+ "blt 3b\n"
+ "4:" // Tile loop: Channel tail
+ "movprfx z28, z19\n fmla z28.s, p3/M, z8.s, z9.s\n"
+ "movprfx z29, z19\n fmla z29.s, p3/M, z6.s, z9.s\n"
+ "ldr x3, [%x[params_struct], %[offsetof_args_tile_j]]\n"
+ "add x3, x3, #0x1\n"
+ "fmla z28.s, p3/M, z0.s, z10.s\n"
+ "fmla z29.s, p3/M, z1.s, z12.s\n"
+ "ld1w { z12.s }, p2/Z, [x6, x13, LSL #2]\n"
+ "ldr x2, [%x[params_struct], %[offsetof_args_tile_i]]\n"
+ "fmla z28.s, p3/M, z1.s, z11.s\n"
+ "fmla z29.s, p3/M, z2.s, z13.s\n"
+ "ld1w { z11.s }, p2/Z, [x6, x15, LSL #2]\n"
+ "ldr x19, [%x[params_struct], %[offsetof_args_n_tile_cols]]\n"
+ "fmla z28.s, p3/M, z3.s, z14.s\n"
+ "fmla z29.s, p3/M, z0.s, z16.s\n"
+ "ld1w { z13.s }, p2/Z, [x6, x8, LSL #2]\n"
+ "ldr x20, [%x[params_struct], %[offsetof_args_n_tile_rows]]\n"
+ "fmla z28.s, p3/M, z4.s, z15.s\n"
+ "fmla z29.s, p3/M, z4.s, z11.s\n"
+ "ld1w { z14.s }, p2/Z, [x16]\n"
+ "cmp x3, x19\n"
+ "fmla z28.s, p3/M, z2.s, z16.s\n"
+ "fmla z29.s, p3/M, z5.s, z12.s\n"
+ "ld1w { z15.s }, p2/Z, [x7]\n"
+ "add x19, x2, #0x1\n"
+ "movprfx z30, z19\n fmla z30.s, p3/M, z2.s, z9.s\n"
+ "movprfx z31, z19\n fmla z31.s, p3/M, z0.s, z9.s\n"
+ "ld1w { z12.s }, p2/Z, [x7, x15, LSL #2]\n"
+ "csel x2, x2, x19, LT\n"
+ "fmla z28.s, p3/M, z5.s, z13.s\n"
+ "fmla z29.s, p3/M, z3.s, z13.s\n"
+ "ld1w { z13.s }, p2/Z, [x16, x15, LSL #2]\n"
+ "mov p0.b, p2.b\n"
+ "fmla z30.s, p3/M, z3.s, z14.s\n"
+ "fmla z31.s, p3/M, z4.s, z13.s\n"
+ "ld1w { z11.s }, p2/Z, [x16, x4, LSL #2]\n"
+ "csel x3, x3, XZR, LT\n"
+ "fmla z30.s, p3/M, z0.s, z15.s\n"
+ "fmla z31.s, p3/M, z1.s, z12.s\n"
+ "ld1w { z14.s }, p2/Z, [x16, x13, LSL #2]\n"
+ "cmp x2, x20\n"
+ "fmla z30.s, p3/M, z4.s, z11.s\n"
+ "fmla z31.s, p3/M, z5.s, z14.s\n"
+ "ld1w { z16.s }, p2/Z, [x7, x4, LSL #2]\n"
+ "fmla z28.s, p3/M, z6.s, z15.s\n"
+ "ld1w { z11.s }, p2/Z, [x7, x13, LSL #2]\n"
+ "fmla z30.s, p3/M, z1.s, z16.s\n"
+ "fmla z31.s, p3/M, z2.s, z11.s\n"
+ "fmla z28.s, p3/M, z7.s, z16.s\n"
+ "ld1w { z15.s }, p2/Z, [x14]\n"
+ "ld1w { z16.s }, p2/Z, [x16, x8, LSL #2]\n"
+ "fmla z30.s, p3/M, z6.s, z15.s\n"
+ "fmla z31.s, p3/M, z3.s, z16.s\n"
+ "ld1w { z13.s }, p2/Z, [x14, x4, LSL #2]\n"
+ "fmla z30.s, p3/M, z7.s, z13.s\n"
+ "fmla z29.s, p3/M, z7.s, z12.s\n"
+ "ld1w { z14.s }, p2/Z, [x14, x15, LSL #2]\n"
+ "fmla z31.s, p3/M, z7.s, z14.s\n"
+ "fmla z30.s, p3/M, z5.s, z16.s\n"
+ "ld1w { z15.s }, p2/Z, [x14, x8, LSL #2]\n"
+ "fmla z31.s, p3/M, z6.s, z15.s\n"
+ "fmla z29.s, p3/M, z8.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x14, x13, LSL #2]\n"
+ "fmla z30.s, p3/M, z8.s, z15.s\n"
+ "fmla z31.s, p3/M, z8.s, z11.s\n"
+ ".inst 0xc1b1ca5c // fclamp { z28.s-z31.s }, z18.s, z17.s\n"
+ "st1w { z28.s }, p0, [x23]\n"
+ "st1w { z29.s }, p0, [x23, x24, LSL #2]\n"
+ "st1w { z30.s }, p0, [x21]\n"
+ "st1w { z31.s }, p0, [x21, x24, LSL #2]\n"
+ "blt 1b\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [n_channels] "r" ((unsigned long) n_channels), [offsetof_args_inptr] "I" (offsetof(Args, inptr)), [offsetof_args_ld_input_col] "I" (offsetof(Args, ld_input_col)), [offsetof_args_ld_input_row] "I" (offsetof(Args, ld_input_row)), [offsetof_args_ld_output_col] "I" (offsetof(Args, ld_output_col)), [offsetof_args_ld_output_row] "I" (offsetof(Args, ld_output_row)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_n_tile_cols] "I" (offsetof(Args, n_tile_cols)), [offsetof_args_n_tile_rows] "I" (offsetof(Args, n_tile_rows)), [offsetof_args_outptr] "I" (offsetof(Args, outptr)), [offsetof_args_params] "I" (offsetof(Args, params)), [offsetof_args_tile_i] "I" (offsetof(Args, tile_i)), [offsetof_args_tile_j] "I" (offsetof(Args, tile_j)), [params_struct] "r" (¶ms_struct)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x2", "x3", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp
new file mode 100644
index 0000000..063084e
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp
@@ -0,0 +1,318 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <cstddef>
+#include <cstdint>
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst_indirect_impl(
+ const float *const *const input_ptrs,
+ float *const *const outptrs,
+ const void *params,
+ unsigned int n_channels,
+ const float activation_min,
+ const float activation_max
+)
+{
+ struct Args
+ {
+ float *const *outptrs;
+ const void *params;
+ const float min, max;
+ const float *inptrs[25];
+
+ Args(
+ const float *const *const input_ptrs,
+ float *const *const outptrs,
+ const void *const params,
+ const float min,
+ const float max
+ ) : outptrs(outptrs), params(params), min(min), max(max)
+ {
+ inptrs[0] = input_ptrs[12];
+ inptrs[1] = input_ptrs[0];
+ inptrs[2] = input_ptrs[1];
+ inptrs[3] = input_ptrs[3];
+ inptrs[4] = input_ptrs[4];
+ inptrs[5] = input_ptrs[5];
+ inptrs[6] = input_ptrs[6];
+ inptrs[7] = input_ptrs[2];
+ inptrs[8] = input_ptrs[8];
+ inptrs[9] = input_ptrs[9];
+ inptrs[10] = input_ptrs[7];
+ inptrs[11] = input_ptrs[15];
+ inptrs[12] = input_ptrs[10];
+ inptrs[13] = input_ptrs[16];
+ inptrs[14] = input_ptrs[11];
+ inptrs[15] = input_ptrs[18];
+ inptrs[16] = input_ptrs[13];
+ inptrs[17] = input_ptrs[19];
+ inptrs[18] = input_ptrs[20];
+ inptrs[19] = input_ptrs[14];
+ inptrs[20] = input_ptrs[21];
+ inptrs[21] = input_ptrs[17];
+ inptrs[22] = input_ptrs[23];
+ inptrs[23] = input_ptrs[22];
+ inptrs[24] = input_ptrs[24];
+
+ }
+ };
+
+ Args params_struct(input_ptrs, outptrs, params,
+ activation_min, activation_max);
+
+ __asm__ __volatile__(
+ "ldr x19, [%x[params_struct], %[offsetof_args_outptrs]]\n"
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "add x15, %x[params_struct], %[offsetof_Args_inptrs]\n"
+ "ptrue p3.b\n"
+ "ldr x14, [%x[params_struct], %[offsetof_args_params]]\n"
+ ".inst 0x25207810 // ptrue pn8.b\n"
+ "ld1w { z19.s }, p3/Z, [x14]\n"
+ "addvl x14, x14, #1\n"
+ "ldp x13, x12, [x19, #0x0]\n"
+ "cntw x11\n"
+ ".inst 0xa040c1c0 // ld1w { z0.s-z3.s }, pn8.b/Z, [x14]\n"
+ "addvl x14, x14, #4\n"
+ "ldp x10, x9, [x19, #0x10]\n"
+ "mov x28, #0x0\n"
+ "whilelt p2.s, XZR, %x[n_channels]\n"
+ ".inst 0xa040c1c4 // ld1w { z4.s-z7.s }, pn8.b/Z, [x14]\n"
+ "ldp x27, x26, [x15, #0x0]\n"
+ "addvl x14, x14, #4\n"
+ "cmp x11, %x[n_channels]\n"
+ "ld1rw { z18.s }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n"
+ "ldp x25, x24, [x15, #0x10]\n"
+ "ld1rw { z17.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n"
+ "sub x23, XZR, x11\n"
+ "ldp x22, x21, [x15, #0x20]\n"
+ "ld1w { z8.s }, p3/Z, [x14]\n"
+ "addvl x14, x14, #1\n"
+ "ldp x20, x19, [x15, #0x30]\n"
+ "ld1w { z9.s }, p2/Z, [x27, x28, LSL #2]\n"
+ "ld1w { z10.s }, p2/Z, [x26, x28, LSL #2]\n"
+ "ld1w { z11.s }, p2/Z, [x25, x28, LSL #2]\n"
+ "ld1w { z12.s }, p2/Z, [x24, x28, LSL #2]\n"
+ "ld1w { z13.s }, p2/Z, [x22, x28, LSL #2]\n"
+ "ld1w { z14.s }, p2/Z, [x21, x28, LSL #2]\n"
+ "ld1w { z15.s }, p2/Z, [x20, x28, LSL #2]\n"
+ "ld1w { z16.s }, p2/Z, [x19, x28, LSL #2]\n"
+ "bge 2f\n"
+ "1:" // Channel loop
+ "movprfx z28, z19\n fmla z28.s, p3/M, z8.s, z9.s\n"
+ "movprfx z29, z19\n fmla z29.s, p3/M, z6.s, z9.s\n"
+ "ldr x27, [x15, #0x40]\n"
+ "whilelt p1.s, x11, %x[n_channels]\n"
+ "fmla z28.s, p3/M, z0.s, z10.s\n"
+ "fmla z29.s, p3/M, z1.s, z12.s\n"
+ "ldr x26, [x15, #0x48]\n"
+ "ld1w { z12.s }, p2/Z, [x26, x28, LSL #2]\n"
+ "fmla z28.s, p3/M, z1.s, z11.s\n"
+ "fmla z29.s, p3/M, z2.s, z13.s\n"
+ "ld1w { z11.s }, p2/Z, [x27, x28, LSL #2]\n"
+ "ldr x25, [x15, #0x50]\n"
+ "fmla z28.s, p3/M, z3.s, z14.s\n"
+ "fmla z29.s, p3/M, z0.s, z16.s\n"
+ "ld1w { z13.s }, p2/Z, [x25, x28, LSL #2]\n"
+ "ldr x24, [x15, #0x58]\n"
+ "fmla z28.s, p3/M, z4.s, z15.s\n"
+ "fmla z29.s, p3/M, z4.s, z11.s\n"
+ "ldr x19, [x15, #0x78]\n"
+ "ld1w { z14.s }, p2/Z, [x24, x28, LSL #2]\n"
+ "fmla z28.s, p3/M, z2.s, z16.s\n"
+ "fmla z29.s, p3/M, z5.s, z12.s\n"
+ "ldr x22, [x15, #0x60]\n"
+ "ld1w { z15.s }, p2/Z, [x22, x28, LSL #2]\n"
+ "movprfx z30, z19\n fmla z30.s, p3/M, z2.s, z9.s\n"
+ "movprfx z31, z19\n fmla z31.s, p3/M, z0.s, z9.s\n"
+ "ldr x27, [x15, #0x80]\n"
+ "ld1w { z12.s }, p2/Z, [x27, x28, LSL #2]\n"
+ "fmla z28.s, p3/M, z5.s, z13.s\n"
+ "fmla z29.s, p3/M, z3.s, z13.s\n"
+ "ld1w { z13.s }, p2/Z, [x19, x28, LSL #2]\n"
+ "ldr x21, [x15, #0x68]\n"
+ "fmla z30.s, p3/M, z3.s, z14.s\n"
+ "fmla z31.s, p3/M, z4.s, z13.s\n"
+ "ldr x26, [x15, #0x88]\n"
+ "ld1w { z11.s }, p2/Z, [x21, x28, LSL #2]\n"
+ "fmla z30.s, p3/M, z0.s, z15.s\n"
+ "fmla z31.s, p3/M, z1.s, z12.s\n"
+ "ld1w { z14.s }, p2/Z, [x26, x28, LSL #2]\n"
+ "ldr x20, [x15, #0x70]\n"
+ "ldr x24, [x15, #0x98]\n"
+ "fmla z30.s, p3/M, z4.s, z11.s\n"
+ "fmla z31.s, p3/M, z5.s, z14.s\n"
+ "ld1w { z16.s }, p2/Z, [x20, x28, LSL #2]\n"
+ "fmla z28.s, p3/M, z6.s, z15.s\n"
+ "ld1w { z11.s }, p2/Z, [x24, x28, LSL #2]\n"
+ "ldr x25, [x15, #0x90]\n"
+ "fmla z30.s, p3/M, z1.s, z16.s\n"
+ "ldr x21, [x15, #0xa8]\n"
+ "fmla z31.s, p3/M, z2.s, z11.s\n"
+ "fmla z28.s, p3/M, z7.s, z16.s\n"
+ "ld1w { z15.s }, p2/Z, [x25, x28, LSL #2]\n"
+ "ld1w { z16.s }, p2/Z, [x21, x28, LSL #2]\n"
+ "ldr x22, [x15, #0xa0]\n"
+ "fmla z30.s, p3/M, z6.s, z15.s\n"
+ "fmla z31.s, p3/M, z3.s, z16.s\n"
+ "ldr x20, [x15, #0xb0]\n"
+ "ld1w { z13.s }, p2/Z, [x22, x28, LSL #2]\n"
+ "fmla z30.s, p3/M, z7.s, z13.s\n"
+ "fmla z29.s, p3/M, z7.s, z12.s\n"
+ "ld1w { z14.s }, p2/Z, [x20, x28, LSL #2]\n"
+ "ldr x19, [x15, #0xb8]\n"
+ "fmla z31.s, p3/M, z7.s, z14.s\n"
+ "fmla z30.s, p3/M, z5.s, z16.s\n"
+ "ld1w { z15.s }, p2/Z, [x19, x28, LSL #2]\n"
+ "ldr x27, [x15, #0xc0]\n"
+ "fmla z31.s, p3/M, z6.s, z15.s\n"
+ "fmla z29.s, p3/M, z8.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x27, x28, LSL #2]\n"
+ "ldp x27, x26, [x15, #0x0]\n"
+ "fmla z30.s, p3/M, z8.s, z15.s\n"
+ "fmla z31.s, p3/M, z8.s, z11.s\n"
+ "ldp x25, x24, [x15, #0x10]\n"
+ "ld1w { z19.s }, p3/Z, [x14]\n"
+ "addvl x14, x14, #1\n"
+ "incw x28\n"
+ "ldp x22, x21, [x15, #0x20]\n"
+ "ld1w { z9.s }, p1/Z, [x27, x11, LSL #2]\n"
+ "incw x23\n"
+ "mov p0.b, p2.b\n"
+ "ldp x20, x19, [x15, #0x30]\n"
+ "ld1w { z10.s }, p1/Z, [x26, x11, LSL #2]\n"
+ "whilelt p2.s, x28, %x[n_channels]\n"
+ ".inst 0xc1b1ca5c // fclamp { z28.s-z31.s }, z18.s, z17.s\n"
+ "ld1w { z11.s }, p1/Z, [x25, x11, LSL #2]\n"
+ "st1w { z28.s }, p0, [x13, x23, LSL #2]\n"
+ "ld1w { z12.s }, p1/Z, [x24, x11, LSL #2]\n"
+ "st1w { z29.s }, p0, [x12, x23, LSL #2]\n"
+ "ld1w { z13.s }, p1/Z, [x22, x11, LSL #2]\n"
+ "st1w { z30.s }, p0, [x10, x23, LSL #2]\n"
+ "ld1w { z14.s }, p1/Z, [x21, x11, LSL #2]\n"
+ "st1w { z31.s }, p0, [x9, x23, LSL #2]\n"
+ "ld1w { z15.s }, p1/Z, [x20, x11, LSL #2]\n"
+ "ld1w { z16.s }, p1/Z, [x19, x11, LSL #2]\n"
+ "incw x11\n"
+ "cmp x11, %x[n_channels]\n"
+ ".inst 0xa040c1c0 // ld1w { z0.s-z3.s }, pn8.b/Z, [x14]\n"
+ "addvl x14, x14, #4\n"
+ ".inst 0xa040c1c4 // ld1w { z4.s-z7.s }, pn8.b/Z, [x14]\n"
+ "addvl x14, x14, #4\n"
+ "ld1w { z8.s }, p3/Z, [x14]\n"
+ "addvl x14, x14, #1\n"
+ "blt 1b\n"
+ "2:" // Channel tail
+ "movprfx z28, z19\n fmla z28.s, p3/M, z8.s, z9.s\n"
+ "movprfx z29, z19\n fmla z29.s, p3/M, z6.s, z9.s\n"
+ "ldr x27, [x15, #0x40]\n"
+ "incw x23\n"
+ "fmla z28.s, p3/M, z0.s, z10.s\n"
+ "fmla z29.s, p3/M, z1.s, z12.s\n"
+ "ldr x26, [x15, #0x48]\n"
+ "ld1w { z12.s }, p2/Z, [x26, x28, LSL #2]\n"
+ "fmla z28.s, p3/M, z1.s, z11.s\n"
+ "fmla z29.s, p3/M, z2.s, z13.s\n"
+ "ld1w { z11.s }, p2/Z, [x27, x28, LSL #2]\n"
+ "ldr x25, [x15, #0x50]\n"
+ "fmla z28.s, p3/M, z3.s, z14.s\n"
+ "fmla z29.s, p3/M, z0.s, z16.s\n"
+ "ld1w { z13.s }, p2/Z, [x25, x28, LSL #2]\n"
+ "ldr x24, [x15, #0x58]\n"
+ "fmla z28.s, p3/M, z4.s, z15.s\n"
+ "fmla z29.s, p3/M, z4.s, z11.s\n"
+ "ldr x19, [x15, #0x78]\n"
+ "ld1w { z14.s }, p2/Z, [x24, x28, LSL #2]\n"
+ "fmla z28.s, p3/M, z2.s, z16.s\n"
+ "fmla z29.s, p3/M, z5.s, z12.s\n"
+ "ldr x22, [x15, #0x60]\n"
+ "ld1w { z15.s }, p2/Z, [x22, x28, LSL #2]\n"
+ "movprfx z30, z19\n fmla z30.s, p3/M, z2.s, z9.s\n"
+ "movprfx z31, z19\n fmla z31.s, p3/M, z0.s, z9.s\n"
+ "ldr x27, [x15, #0x80]\n"
+ "ld1w { z12.s }, p2/Z, [x27, x28, LSL #2]\n"
+ "fmla z28.s, p3/M, z5.s, z13.s\n"
+ "fmla z29.s, p3/M, z3.s, z13.s\n"
+ "ld1w { z13.s }, p2/Z, [x19, x28, LSL #2]\n"
+ "ldr x21, [x15, #0x68]\n"
+ "fmla z30.s, p3/M, z3.s, z14.s\n"
+ "fmla z31.s, p3/M, z4.s, z13.s\n"
+ "ldr x26, [x15, #0x88]\n"
+ "ld1w { z11.s }, p2/Z, [x21, x28, LSL #2]\n"
+ "fmla z30.s, p3/M, z0.s, z15.s\n"
+ "fmla z31.s, p3/M, z1.s, z12.s\n"
+ "ld1w { z14.s }, p2/Z, [x26, x28, LSL #2]\n"
+ "ldr x20, [x15, #0x70]\n"
+ "ldr x24, [x15, #0x98]\n"
+ "fmla z30.s, p3/M, z4.s, z11.s\n"
+ "fmla z31.s, p3/M, z5.s, z14.s\n"
+ "ld1w { z16.s }, p2/Z, [x20, x28, LSL #2]\n"
+ "fmla z28.s, p3/M, z6.s, z15.s\n"
+ "ld1w { z11.s }, p2/Z, [x24, x28, LSL #2]\n"
+ "ldr x25, [x15, #0x90]\n"
+ "fmla z30.s, p3/M, z1.s, z16.s\n"
+ "ldr x21, [x15, #0xa8]\n"
+ "fmla z31.s, p3/M, z2.s, z11.s\n"
+ "fmla z28.s, p3/M, z7.s, z16.s\n"
+ "ld1w { z15.s }, p2/Z, [x25, x28, LSL #2]\n"
+ "ld1w { z16.s }, p2/Z, [x21, x28, LSL #2]\n"
+ "ldr x22, [x15, #0xa0]\n"
+ "fmla z30.s, p3/M, z6.s, z15.s\n"
+ "fmla z31.s, p3/M, z3.s, z16.s\n"
+ "ldr x20, [x15, #0xb0]\n"
+ "ld1w { z13.s }, p2/Z, [x22, x28, LSL #2]\n"
+ "fmla z30.s, p3/M, z7.s, z13.s\n"
+ "fmla z29.s, p3/M, z7.s, z12.s\n"
+ "ld1w { z14.s }, p2/Z, [x20, x28, LSL #2]\n"
+ "ldr x19, [x15, #0xb8]\n"
+ "fmla z31.s, p3/M, z7.s, z14.s\n"
+ "fmla z30.s, p3/M, z5.s, z16.s\n"
+ "ld1w { z15.s }, p2/Z, [x19, x28, LSL #2]\n"
+ "ldr x27, [x15, #0xc0]\n"
+ "fmla z31.s, p3/M, z6.s, z15.s\n"
+ "fmla z29.s, p3/M, z8.s, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x27, x28, LSL #2]\n"
+ "fmla z30.s, p3/M, z8.s, z15.s\n"
+ "fmla z31.s, p3/M, z8.s, z11.s\n"
+ "mov p0.b, p2.b\n"
+ ".inst 0xc1b1ca5c // fclamp { z28.s-z31.s }, z18.s, z17.s\n"
+ "st1w { z28.s }, p0, [x13, x23, LSL #2]\n"
+ "st1w { z29.s }, p0, [x12, x23, LSL #2]\n"
+ "st1w { z30.s }, p0, [x10, x23, LSL #2]\n"
+ "st1w { z31.s }, p0, [x9, x23, LSL #2]\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [n_channels] "r" ((unsigned long) n_channels), [offsetof_Args_inptrs] "I" (offsetof(Args, inptrs)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_args_params] "I" (offsetof(Args, params)), [params_struct] "r" (¶ms_struct)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_planar_3x3_s1_4rows_mla_za.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_planar_3x3_s1_4rows_mla_za.hpp
new file mode 100644
index 0000000..d29d0b5
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_planar_3x3_s1_4rows_mla_za.hpp
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_fp32_planar_3x3_s1_4rows_mla_za_impl(
+ const float *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const float *weights,
+ const float *bias,
+ float **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ float act_min,
+ float act_max
+);
+
+class sme2_fp32_planar_3x3_s1_4rows_mla_za : public PlanarStrategy<float, float>
+{
+ using Parent = PlanarStrategy<float, float>;
+
+ public:
+ using return_type = float;
+ constexpr static auto output_rows = 4u;
+ constexpr static auto kernel_rows = 3u, kernel_cols = 3u;
+ constexpr static auto stride_rows = 1u, stride_cols = 1u;
+ constexpr static auto vl_type = arm_gemm::VLType::SME;
+
+ sme2_fp32_planar_3x3_s1_4rows_mla_za(const CPUInfo *)
+ : Parent(kernel_rows, kernel_cols, stride_rows, stride_cols, output_rows, vl_type)
+ {
+ }
+
+ typename Parent::KernelType get_kernel(void) const override
+ {
+ return sme2_fp32_planar_3x3_s1_4rows_mla_za_impl;
+ }
+};
+
+} // namespace depthwise
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_planar_3x3_s1_4rows_mla_za/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_planar_3x3_s1_4rows_mla_za/generic.cpp
new file mode 100644
index 0000000..493166c
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_planar_3x3_s1_4rows_mla_za/generic.cpp
@@ -0,0 +1,455 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <algorithm>
+#include <cstddef>
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_fp32_planar_3x3_s1_4rows_mla_za_impl(
+ const float *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const float *weights,
+ const float *bias,
+ float **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ float act_min,
+ float act_max
+)
+{
+ struct Args
+ {
+ const float *inptr;
+ size_t ld_in_vl;
+ long unsigned int pad_top, pad_bottom, pad_left;
+ const float *weights;
+ const float *bias;
+ long unsigned int input_cols, output_cols;
+ float **outptrs;
+ const size_t *ld_out_cols;
+ const size_t *ld_out_vls;
+ long unsigned int current_channel, n_channels;
+ float clamp_min, clamp_max;
+ };
+
+ Args args = { inptr, ld_in_vl, pad_top, 6u - std::min(6u, pad_top + valid_input_rows), pad_left, weights, bias, valid_input_cols, output_cols, outptrs, outlds, outvllds, start_channel, valid_channels, act_min, act_max };
+
+ __asm__ __volatile__(
+ "ldr x7, [%x[args], %[offsetof_Args_pad_bottom]]\n"
+ "mov x19, #0x6\n"
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "sub x19, x19, x7\n"
+ "ldr x17, [%x[args], %[offsetof_Args_pad_top]]\n"
+ "ptrue p2.b\n"
+ ".inst 0x25207812 // ptrue pn10.b\n"
+ "ld1rw { z5.s }, p2/Z, [%x[args], %[offsetof_Args_clamp_min]]\n"
+ "ldr x16, [%x[args], %[offsetof_Args_n_channels]]\n"
+ "whilelt p1.s, XZR, x16\n"
+ "whilelt p9.s, XZR, x19\n"
+ "ld1rw { z11.s }, p2/Z, [%x[args], %[offsetof_Args_clamp_max]]\n"
+ "whilelt p8.s, XZR, x17\n"
+ "eor p8.b, p2/Z, p8.b, p9.b\n"
+ "ldr x15, [%x[args], %[offsetof_Args_current_channel]]\n"
+ "1:" // Channel loop
+ "ldr x19, [%x[args], %[offsetof_Args_bias]]\n"
+ "fmov z16.s, #0x0\n"
+ "cbz x19, 2f\n"
+ "ld1w { z16.s }, p1/Z, [x19, x15, LSL #2]\n"
+ "2:" // Load bias: Done
+ "ldr x14, [%x[args], %[offsetof_Args_input_cols]]\n"
+ "sub x19, x14, #0x1\n"
+ "orr x23, x19, %x[ld_in_col], LSL #18\n"
+ "mov z17.d, z16.d\n"
+ "ldr x22, [%x[args], %[offsetof_Args_weights]]\n"
+ ".inst 0xa1404ac0 // ld1w { z0.s, z8.s }, pn10.b/Z, [x22]\n"
+ "orr x23, x16, x23, LSL #20\n"
+ "mov x21, #0x6\n"
+ "ldr x13, [%x[args], %[offsetof_Args_inptr]]\n"
+ "ld1w { z3.s }, p2/Z, [x22, #2, MUL VL]\n"
+ "addvl x22, x22, #3\n"
+ "add x20, x17, x7\n"
+ ".inst 0xa0404ac6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x22]\n"
+ "lsl x19, %x[ld_in_row], #0x2\n"
+ "mov z18.d, z16.d\n"
+ "mov z19.d, z16.d\n"
+ "ld1w { z9.s }, p2/Z, [x22, #2, MUL VL]\n"
+ "addvl x22, x22, #3\n"
+ "mov x8, #0x0\n"
+ "ldr x11, [%x[args], %[offsetof_Args_output_cols]]\n"
+ ".inst 0xa1404ac2 // ld1w { z2.s, z10.s }, pn10.b/Z, [x22]\n"
+ "lsl x23, x23, #0x2\n"
+ "sub x21, x21, x20\n"
+ "ld1w { z1.s }, p2/Z, [x22, #2, MUL VL]\n"
+ "madd x19, x19, x17, x13\n"
+ "3:" // Issue prefetches
+ "subs x21, x21, #0x1\n"
+ ".inst 0xf8b74a7c // rprfm pldstrm, x23, [x19]\n"
+ "add x19, x19, %x[ld_in_col], LSL #2\n"
+ "bgt 3b\n"
+ "ldr x10, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "lsl x19, %x[ld_in_row], #0x2\n"
+ "msub x13, x17, x19, x13\n"
+ ".inst 0xc0040e00 // mova za.d[x8, #0], { z16.d-z19.d }\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_out_cols]]\n"
+ ".inst 0xc0040e01 // mova za.d[x8, #1], { z16.d-z19.d }\n"
+ "mov x9, #0x2\n"
+ "ldp x28, x27, [x10], #0x10\n"
+ ".inst 0xc0040e02 // mova za.d[x8, #2], { z16.d-z19.d }\n"
+ "ldp x26, x25, [x19], #0x10\n"
+ "ldr x20, [%x[args], %[offsetof_Args_pad_left]]\n"
+ "ldp x24, x23, [x10], #0x10\n"
+ "ldp x22, x21, [x19], #0x10\n"
+ "cbz x20, 5f\n"
+ "cmp x20, x9\n"
+ "csel x19, x20, x9, LT\n"
+ "sub x20, x20, x19\n"
+ "sub x9, x9, x19\n"
+ "cbz x20, 5f\n"
+ ".inst 0xc0060c0c // mova { z12.d-z15.d }, za.d[x8, #0]\n"
+ "sub x11, x11, x20\n"
+ ".inst 0xc1abc8ac // fclamp { z12.s-z15.s }, z5.s, z11.s\n"
+ "4:" // Left padding
+ "subs x20, x20, #0x1\n"
+ "st1w { z12.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ "st1w { z13.s }, p1, [x27]\n"
+ "add x27, x27, x25, LSL #2\n"
+ "st1w { z14.s }, p1, [x24]\n"
+ "add x24, x24, x22, LSL #2\n"
+ "st1w { z15.s }, p1, [x23]\n"
+ "add x23, x23, x21, LSL #2\n"
+ "bgt 4b\n"
+ "5:" // Left padding: End
+ "adds XZR, x17, x7\n"
+ "bne 10f\n"
+ "cbz x9, 8f\n"
+ "cmp x9, #0x1\n"
+ "sub x14, x14, x9\n"
+ "beq 7f\n"
+ "6:" // Unpadded: 2 priming loads
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ "ld1w { z23.s }, p1/Z, [x13]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "ld1w { z24.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z25.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z26.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1301ae0 // fmla za.s[x8, 0], { z23.s-z26.s }, z0.s\n"
+ "ld1w { z27.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1361b00 // fmla za.s[x8, 0], { z24.s-z27.s }, z6.s\n"
+ "ld1w { z28.s }, p1/Z, [x19]\n"
+ ".inst 0xc1321b20 // fmla za.s[x8, 0], { z25.s-z28.s }, z2.s\n"
+ "7:" // Unpadded: 1 priming loads
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ "ld1w { z23.s }, p1/Z, [x13]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "ld1w { z24.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z25.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z26.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1381ae0 // fmla za.s[x8, 0], { z23.s-z26.s }, z8.s\n"
+ ".inst 0xc1301ae1 // fmla za.s[x8, 1], { z23.s-z26.s }, z0.s\n"
+ "ld1w { z27.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1371b00 // fmla za.s[x8, 0], { z24.s-z27.s }, z7.s\n"
+ "ld1w { z28.s }, p1/Z, [x19]\n"
+ ".inst 0xc1361b01 // fmla za.s[x8, 1], { z24.s-z27.s }, z6.s\n"
+ ".inst 0xc13a1b20 // fmla za.s[x8, 0], { z25.s-z28.s }, z10.s\n"
+ ".inst 0xc1321b21 // fmla za.s[x8, 1], { z25.s-z28.s }, z2.s\n"
+ "8:" // Unpadded: 0 priming loads
+ "cbz x14, 16f\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ "ld1w { z23.s }, p1/Z, [x13]\n"
+ "sub x14, x14, #0x1\n"
+ "ld1w { z24.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "sub x11, x11, #0x1\n"
+ "ld1w { z25.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "cmp x14, x11\n"
+ "ld1w { z26.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "csel x20, x14, x11, LT\n"
+ "ld1w { z27.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "ld1w { z28.s }, p1/Z, [x19]\n"
+ "sub x11, x11, x20\n"
+ "cbz x20, 15f\n"
+ "9:" // Unpadded: Main loop
+ ".inst 0xc1331ae0 // fmla za.s[x8, 0], { z23.s-z26.s }, z3.s\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ "subs x20, x20, #0x1\n"
+ ".inst 0xc1391b00 // fmla za.s[x8, 0], { z24.s-z27.s }, z9.s\n"
+ ".inst 0xc1381ae1 // fmla za.s[x8, 1], { z23.s-z26.s }, z8.s\n"
+ ".inst 0xc1301ae2 // fmla za.s[x8, 2], { z23.s-z26.s }, z0.s\n"
+ "ld1w { z23.s }, p1/Z, [x13]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ ".inst 0xc1311b20 // fmla za.s[x8, 0], { z25.s-z28.s }, z1.s\n"
+ ".inst 0xc1371b01 // fmla za.s[x8, 1], { z24.s-z27.s }, z7.s\n"
+ ".inst 0xc1361b02 // fmla za.s[x8, 2], { z24.s-z27.s }, z6.s\n"
+ "ld1w { z24.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc0060c0c // mova { z12.d-z15.d }, za.d[x8, #0]\n"
+ ".inst 0xc1abc8ac // fclamp { z12.s-z15.s }, z5.s, z11.s\n"
+ "st1w { z12.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ ".inst 0xc13a1b21 // fmla za.s[x8, 1], { z25.s-z28.s }, z10.s\n"
+ "st1w { z13.s }, p1, [x27]\n"
+ "add x27, x27, x25, LSL #2\n"
+ ".inst 0xc1321b22 // fmla za.s[x8, 2], { z25.s-z28.s }, z2.s\n"
+ "ld1w { z25.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "add x8, x8, #0x1\n"
+ "ld1w { z26.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "st1w { z14.s }, p1, [x24]\n"
+ "add x24, x24, x22, LSL #2\n"
+ "ld1w { z27.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "st1w { z15.s }, p1, [x23]\n"
+ "add x23, x23, x21, LSL #2\n"
+ ".inst 0xc0040e02 // mova za.d[x8, #2], { z16.d-z19.d }\n"
+ "ld1w { z28.s }, p1/Z, [x19]\n"
+ "bgt 9b\n"
+ "b 15f\n"
+ "10:" // Padded
+ "cbz x9, 13f\n"
+ "cmp x9, #0x1\n"
+ "sub x14, x14, x9\n"
+ "beq 12f\n"
+ "11:" // Padded: 2 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z23.s }, p0/Z, [x13]\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z24.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z25.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z26.s }, p0/Z, [x19]\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1301ae0 // fmla za.s[x8, 0], { z23.s-z26.s }, z0.s\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z27.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1361b00 // fmla za.s[x8, 0], { z24.s-z27.s }, z6.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z28.s }, p0/Z, [x19]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ ".inst 0xc1321b20 // fmla za.s[x8, 0], { z25.s-z28.s }, z2.s\n"
+ "12:" // Padded: 1 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z23.s }, p0/Z, [x13]\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z24.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z25.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z26.s }, p0/Z, [x19]\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1381ae0 // fmla za.s[x8, 0], { z23.s-z26.s }, z8.s\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1301ae1 // fmla za.s[x8, 1], { z23.s-z26.s }, z0.s\n"
+ "ld1w { z27.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ ".inst 0xc1371b00 // fmla za.s[x8, 0], { z24.s-z27.s }, z7.s\n"
+ "ld1w { z28.s }, p0/Z, [x19]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ ".inst 0xc1361b01 // fmla za.s[x8, 1], { z24.s-z27.s }, z6.s\n"
+ ".inst 0xc13a1b20 // fmla za.s[x8, 0], { z25.s-z28.s }, z10.s\n"
+ ".inst 0xc1321b21 // fmla za.s[x8, 1], { z25.s-z28.s }, z2.s\n"
+ "13:" // Padded: 0 priming loads
+ "cbz x14, 16f\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z23.s }, p0/Z, [x13]\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z24.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z25.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z26.s }, p0/Z, [x19]\n"
+ "mov x12, #0x4\n"
+ "sub x14, x14, #0x1\n"
+ "sub x11, x11, #0x1\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "cmp x14, x11\n"
+ "ld1w { z27.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z28.s }, p0/Z, [x19]\n"
+ "csel x20, x14, x11, LT\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "sub x11, x11, x20\n"
+ "cbz x20, 15f\n"
+ "14:" // Padded: Main loop
+ ".inst 0xc1331ae0 // fmla za.s[x8, 0], { z23.s-z26.s }, z3.s\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1391b00 // fmla za.s[x8, 0], { z24.s-z27.s }, z9.s\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ "subs x20, x20, #0x1\n"
+ ".inst 0xc1381ae1 // fmla za.s[x8, 1], { z23.s-z26.s }, z8.s\n"
+ ".inst 0xc1301ae2 // fmla za.s[x8, 2], { z23.s-z26.s }, z0.s\n"
+ "ld1w { z23.s }, p0/Z, [x13]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ ".inst 0xc1311b20 // fmla za.s[x8, 0], { z25.s-z28.s }, z1.s\n"
+ ".inst 0xc1371b01 // fmla za.s[x8, 1], { z24.s-z27.s }, z7.s\n"
+ ".inst 0xc1361b02 // fmla za.s[x8, 2], { z24.s-z27.s }, z6.s\n"
+ "ld1w { z24.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc0060c0c // mova { z12.d-z15.d }, za.d[x8, #0]\n"
+ ".inst 0xc1abc8ac // fclamp { z12.s-z15.s }, z5.s, z11.s\n"
+ "st1w { z12.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ ".inst 0xc13a1b21 // fmla za.s[x8, 1], { z25.s-z28.s }, z10.s\n"
+ "st1w { z13.s }, p1, [x27]\n"
+ "add x27, x27, x25, LSL #2\n"
+ ".inst 0xc1321b22 // fmla za.s[x8, 2], { z25.s-z28.s }, z2.s\n"
+ "ld1w { z25.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x4\n"
+ "ld1w { z26.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "st1w { z14.s }, p1, [x24]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "add x8, x8, #0x1\n"
+ "ld1w { z27.s }, p0/Z, [x19]\n"
+ "st1w { z15.s }, p1, [x23]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ ".inst 0xc0040e02 // mova za.d[x8, #2], { z16.d-z19.d }\n"
+ "ld1w { z28.s }, p0/Z, [x19]\n"
+ "add x24, x24, x22, LSL #2\n"
+ "add x23, x23, x21, LSL #2\n"
+ "bgt 14b\n"
+ "15:" // Main loop tail
+ ".inst 0xc1331ae0 // fmla za.s[x8, 0], { z23.s-z26.s }, z3.s\n"
+ ".inst 0xc1391b00 // fmla za.s[x8, 0], { z24.s-z27.s }, z9.s\n"
+ ".inst 0xc1381ae1 // fmla za.s[x8, 1], { z23.s-z26.s }, z8.s\n"
+ ".inst 0xc1301ae2 // fmla za.s[x8, 2], { z23.s-z26.s }, z0.s\n"
+ ".inst 0xc1311b20 // fmla za.s[x8, 0], { z25.s-z28.s }, z1.s\n"
+ ".inst 0xc1371b01 // fmla za.s[x8, 1], { z24.s-z27.s }, z7.s\n"
+ ".inst 0xc1361b02 // fmla za.s[x8, 2], { z24.s-z27.s }, z6.s\n"
+ ".inst 0xc0060c0c // mova { z12.d-z15.d }, za.d[x8, #0]\n"
+ ".inst 0xc1abc8ac // fclamp { z12.s-z15.s }, z5.s, z11.s\n"
+ "st1w { z12.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ ".inst 0xc13a1b21 // fmla za.s[x8, 1], { z25.s-z28.s }, z10.s\n"
+ "st1w { z13.s }, p1, [x27]\n"
+ "add x27, x27, x25, LSL #2\n"
+ ".inst 0xc1321b22 // fmla za.s[x8, 2], { z25.s-z28.s }, z2.s\n"
+ "add x8, x8, #0x1\n"
+ "st1w { z14.s }, p1, [x24]\n"
+ "add x24, x24, x22, LSL #2\n"
+ "st1w { z15.s }, p1, [x23]\n"
+ "add x23, x23, x21, LSL #2\n"
+ ".inst 0xc0040e02 // mova za.d[x8, #2], { z16.d-z19.d }\n"
+ "16:" // Main loop skip tail
+ "cbz x11, 18f\n"
+ "17:" // Right padding loop
+ ".inst 0xc0060c0c // mova { z12.d-z15.d }, za.d[x8, #0]\n"
+ "add x8, x8, #0x1\n"
+ "subs x11, x11, #0x1\n"
+ ".inst 0xc1abc8ac // fclamp { z12.s-z15.s }, z5.s, z11.s\n"
+ "st1w { z12.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ ".inst 0xc0040e02 // mova za.d[x8, #2], { z16.d-z19.d }\n"
+ "st1w { z13.s }, p1, [x27]\n"
+ "add x27, x27, x25, LSL #2\n"
+ "st1w { z14.s }, p1, [x24]\n"
+ "add x24, x24, x22, LSL #2\n"
+ "st1w { z15.s }, p1, [x23]\n"
+ "add x23, x23, x21, LSL #2\n"
+ "bgt 17b\n"
+ "18:" // End
+ "ldr x22, [%x[args], %[offsetof_Args_weights]]\n"
+ "incb x22, ALL, MUL #9\n"
+ "str x22, [%x[args], %[offsetof_Args_weights]]\n"
+ "incw x15\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_in_vl]]\n"
+ "whilelt p1.s, x15, x16\n"
+ "ldr x13, [%x[args], %[offsetof_Args_inptr]]\n"
+ "add x13, x13, x19, LSL #2\n"
+ "str x13, [%x[args], %[offsetof_Args_inptr]]\n"
+ "ldr x10, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "ldr x23, [%x[args], %[offsetof_Args_ld_out_vls]]\n"
+ "ldp x22, x21, [x10, #0x0]\n"
+ "ldp x20, x19, [x23, #0x0]\n"
+ "add x22, x22, x20, LSL #2\n"
+ "add x21, x21, x19, LSL #2\n"
+ "stp x22, x21, [x10, #0x0]\n"
+ "ldp x22, x21, [x10, #0x10]\n"
+ "ldp x20, x19, [x23, #0x10]\n"
+ "add x22, x22, x20, LSL #2\n"
+ "add x21, x21, x19, LSL #2\n"
+ "stp x22, x21, [x10, #0x10]\n"
+ "b.any 1b\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [ld_in_col] "r" (ld_in_col), [ld_in_row] "r" (ld_in_row), [offsetof_Args_bias] "I" (offsetof(Args, bias)), [offsetof_Args_clamp_max] "I" (offsetof(Args, clamp_max)), [offsetof_Args_clamp_min] "I" (offsetof(Args, clamp_min)), [offsetof_Args_current_channel] "I" (offsetof(Args, current_channel)), [offsetof_Args_inptr] "I" (offsetof(Args, inptr)), [offsetof_Args_input_cols] "I" (offsetof(Args, input_cols)), [offsetof_Args_ld_in_vl] "I" (offsetof(Args, ld_in_vl)), [offsetof_Args_ld_out_cols] "I" (offsetof(Args, ld_out_cols)), [offsetof_Args_ld_out_vls] "I" (offsetof(Args, ld_out_vls)), [offsetof_Args_n_channels] "I" (offsetof(Args, n_channels)), [offsetof_Args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_Args_output_cols] "I" (offsetof(Args, output_cols)), [offsetof_Args_pad_bottom] "I" (offsetof(Args, pad_bottom)), [offsetof_Args_pad_left] "I" (offsetof(Args, pad_left)), [offsetof_Args_pad_top] "I" (offsetof(Args, pad_top)), [offsetof_Args_weights] "I" (offsetof(Args, weights))
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_planar_3x3_s2_4rows_mla_za.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_planar_3x3_s2_4rows_mla_za.hpp
new file mode 100644
index 0000000..18a5729
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_planar_3x3_s2_4rows_mla_za.hpp
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_fp32_planar_3x3_s2_4rows_mla_za_impl(
+ const float *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const float *weights,
+ const float *bias,
+ float **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ float act_min,
+ float act_max
+);
+
+class sme2_fp32_planar_3x3_s2_4rows_mla_za : public PlanarStrategy<float, float>
+{
+ using Parent = PlanarStrategy<float, float>;
+
+ public:
+ using return_type = float;
+ constexpr static auto output_rows = 4u;
+ constexpr static auto kernel_rows = 3u, kernel_cols = 3u;
+ constexpr static auto stride_rows = 2u, stride_cols = 2u;
+ constexpr static auto vl_type = arm_gemm::VLType::SME;
+
+ sme2_fp32_planar_3x3_s2_4rows_mla_za(const CPUInfo *)
+ : Parent(kernel_rows, kernel_cols, stride_rows, stride_cols, output_rows, vl_type)
+ {
+ }
+
+ typename Parent::KernelType get_kernel(void) const override
+ {
+ return sme2_fp32_planar_3x3_s2_4rows_mla_za_impl;
+ }
+};
+
+} // namespace depthwise
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_planar_3x3_s2_4rows_mla_za/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_planar_3x3_s2_4rows_mla_za/generic.cpp
new file mode 100644
index 0000000..289803c
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_planar_3x3_s2_4rows_mla_za/generic.cpp
@@ -0,0 +1,650 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <algorithm>
+#include <cstddef>
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_fp32_planar_3x3_s2_4rows_mla_za_impl(
+ const float *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const float *weights,
+ const float *bias,
+ float **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ float act_min,
+ float act_max
+)
+{
+ struct Args
+ {
+ const float *inptr;
+ size_t ld_in_vl;
+ long unsigned int pad_top, pad_bottom, pad_left;
+ const float *weights;
+ const float *bias;
+ long unsigned int input_cols, output_cols;
+ float **outptrs;
+ const size_t *ld_out_cols;
+ const size_t *ld_out_vls;
+ long unsigned int current_channel, n_channels;
+ float clamp_min, clamp_max;
+ };
+
+ Args args = { inptr, ld_in_vl, pad_top, 9u - std::min(9u, pad_top + valid_input_rows), pad_left, weights, bias, valid_input_cols, output_cols, outptrs, outlds, outvllds, start_channel, valid_channels, act_min, act_max };
+
+ __asm__ __volatile__(
+ "ldr x7, [%x[args], %[offsetof_Args_pad_bottom]]\n"
+ "mov x19, #0x9\n"
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "sub x19, x19, x7\n"
+ "ldr x17, [%x[args], %[offsetof_Args_pad_top]]\n"
+ "ptrue p2.b\n"
+ ".inst 0x25207812 // ptrue pn10.b\n"
+ "ld1rw { z28.s }, p2/Z, [%x[args], %[offsetof_Args_clamp_min]]\n"
+ "ldr x16, [%x[args], %[offsetof_Args_n_channels]]\n"
+ "whilelt p1.s, XZR, x16\n"
+ "whilelt p9.s, XZR, x19\n"
+ "ld1rw { z19.s }, p2/Z, [%x[args], %[offsetof_Args_clamp_max]]\n"
+ "whilelt p8.s, XZR, x17\n"
+ "eor p8.b, p2/Z, p8.b, p9.b\n"
+ "ldr x15, [%x[args], %[offsetof_Args_current_channel]]\n"
+ "1:" // Channel loop
+ "ldr x19, [%x[args], %[offsetof_Args_bias]]\n"
+ "fmov z24.s, #0x0\n"
+ "cbz x19, 2f\n"
+ "ld1w { z24.s }, p1/Z, [x19, x15, LSL #2]\n"
+ "2:" // Load bias: Done
+ "ldr x14, [%x[args], %[offsetof_Args_input_cols]]\n"
+ "sub x19, x14, #0x1\n"
+ "orr x23, x19, %x[ld_in_col], LSL #18\n"
+ "mov z25.d, z24.d\n"
+ "ldr x22, [%x[args], %[offsetof_Args_weights]]\n"
+ ".inst 0xa0404ac2 // ld1w { z2.s-z3.s }, pn10.b/Z, [x22]\n"
+ "orr x23, x16, x23, LSL #20\n"
+ "mov x21, #0x9\n"
+ "ldr x13, [%x[args], %[offsetof_Args_inptr]]\n"
+ "ld1w { z7.s }, p2/Z, [x22, #2, MUL VL]\n"
+ "addvl x22, x22, #3\n"
+ "add x20, x17, x7\n"
+ ".inst 0xa0404ac4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x22]\n"
+ "lsl x19, %x[ld_in_row], #0x2\n"
+ "mov z26.d, z24.d\n"
+ "mov z27.d, z24.d\n"
+ "ld1w { z6.s }, p2/Z, [x22, #2, MUL VL]\n"
+ "addvl x22, x22, #3\n"
+ "mov x8, #0x0\n"
+ "ldr x11, [%x[args], %[offsetof_Args_output_cols]]\n"
+ ".inst 0xa1404ac1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x22]\n"
+ "lsl x23, x23, #0x2\n"
+ "sub x21, x21, x20\n"
+ "ld1w { z8.s }, p2/Z, [x22, #2, MUL VL]\n"
+ "madd x19, x19, x17, x13\n"
+ "3:" // Issue prefetches
+ "subs x21, x21, #0x1\n"
+ ".inst 0xf8b74a7c // rprfm pldstrm, x23, [x19]\n"
+ "add x19, x19, %x[ld_in_col], LSL #2\n"
+ "bgt 3b\n"
+ "ldr x10, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "lsl x19, %x[ld_in_row], #0x2\n"
+ "msub x13, x17, x19, x13\n"
+ ".inst 0xc0040f00 // mova za.d[x8, #0], { z24.d-z27.d }\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_out_cols]]\n"
+ ".inst 0xc0040f01 // mova za.d[x8, #1], { z24.d-z27.d }\n"
+ "mov x21, #0x2\n"
+ "ldp x9, x28, [x10], #0x10\n"
+ ".inst 0xc0040f02 // mova za.d[x8, #2], { z24.d-z27.d }\n"
+ "ldp x27, x26, [x19], #0x10\n"
+ "ldr x20, [%x[args], %[offsetof_Args_pad_left]]\n"
+ "ldp x25, x24, [x10], #0x10\n"
+ "ldp x23, x22, [x19], #0x10\n"
+ "cbz x20, 5f\n"
+ "cmp x20, x21\n"
+ "csel x19, x20, x21, LT\n"
+ "sub x20, x20, x19\n"
+ "sub x21, x21, x19\n"
+ "cbz x20, 5f\n"
+ ".inst 0xc0060c14 // mova { z20.d-z23.d }, za.d[x8, #0]\n"
+ "and x21, x20, #0x1\n"
+ "add x20, x20, #0x1\n"
+ ".inst 0xc1b3cb94 // fclamp { z20.s-z23.s }, z28.s, z19.s\n"
+ "lsr x20, x20, #0x1\n"
+ "sub x11, x11, x20\n"
+ "4:" // Left padding
+ "subs x20, x20, #0x1\n"
+ "st1w { z20.s }, p1, [x9]\n"
+ "add x9, x9, x27, LSL #2\n"
+ "st1w { z21.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ "st1w { z22.s }, p1, [x25]\n"
+ "add x25, x25, x23, LSL #2\n"
+ "st1w { z23.s }, p1, [x24]\n"
+ "add x24, x24, x22, LSL #2\n"
+ "bgt 4b\n"
+ "5:" // Left padding: End
+ "adds XZR, x17, x7\n"
+ "bne 10f\n"
+ "cbz x21, 8f\n"
+ "cmp x21, #0x1\n"
+ "sub x14, x14, x21\n"
+ "beq 7f\n"
+ "6:" // Unpadded: 2 priming loads
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ "ld1w { z12.s }, p1/Z, [x13]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "ld1w { z29.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z13.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z30.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z14.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z31.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z15.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1321980 // fmla za.s[x8, 0], { z12.s-z15.s }, z2.s\n"
+ "ld1w { z0.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1341ba0 // fmla za.s[x8, 0], { z29.s-z0.s }, z4.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ ".inst 0xc13119a0 // fmla za.s[x8, 0], { z13.s-z16.s }, z1.s\n"
+ "7:" // Unpadded: 1 priming loads
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ "ld1w { z12.s }, p1/Z, [x13]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "ld1w { z29.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z13.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z30.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z14.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z31.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z15.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1331980 // fmla za.s[x8, 0], { z12.s-z15.s }, z3.s\n"
+ "ld1w { z0.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1351ba0 // fmla za.s[x8, 0], { z29.s-z0.s }, z5.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ ".inst 0xc13919a0 // fmla za.s[x8, 0], { z13.s-z16.s }, z9.s\n"
+ "8:" // Unpadded: 0 priming loads
+ "cmp x14, #0x2\n"
+ "blt 16f\n"
+ "add x20, x13, %x[ld_in_row], LSL #2\n"
+ "ld1w { z12.s }, p1/Z, [x13]\n"
+ "sub x14, x14, #0x2\n"
+ "ld1w { z29.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ "sub x11, x11, #0x1\n"
+ "ld1w { z13.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ "lsr x19, x14, #0x1\n"
+ "ld1w { z30.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ "cmp x19, x11\n"
+ "ld1w { z14.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ "csel x21, x19, x11, LT\n"
+ "ld1w { z31.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "ld1w { z15.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ "and x14, x14, #0x1\n"
+ "ld1w { z0.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ "sub x11, x11, x21\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "cbz x21, 15f\n"
+ "9:" // Unpadded: Main loop
+ ".inst 0xc1371980 // fmla za.s[x8, 0], { z12.s-z15.s }, z7.s\n"
+ "add x20, x13, %x[ld_in_row], LSL #2\n"
+ "subs x21, x21, #0x1\n"
+ ".inst 0xc1321981 // fmla za.s[x8, 1], { z12.s-z15.s }, z2.s\n"
+ "ld1w { z12.s }, p1/Z, [x13]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1361ba0 // fmla za.s[x8, 0], { z29.s-z0.s }, z6.s\n"
+ ".inst 0xc1341ba1 // fmla za.s[x8, 1], { z29.s-z0.s }, z4.s\n"
+ "ld1w { z29.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc13819a0 // fmla za.s[x8, 0], { z13.s-z16.s }, z8.s\n"
+ ".inst 0xc13119a1 // fmla za.s[x8, 1], { z13.s-z16.s }, z1.s\n"
+ "ld1w { z13.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ "ld1w { z30.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc0060c14 // mova { z20.d-z23.d }, za.d[x8, #0]\n"
+ "add x8, x8, #0x1\n"
+ "ld1w { z14.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1b3cb94 // fclamp { z20.s-z23.s }, z28.s, z19.s\n"
+ "st1w { z20.s }, p1, [x9]\n"
+ "ld1w { z31.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ "add x9, x9, x27, LSL #2\n"
+ "st1w { z21.s }, p1, [x28]\n"
+ "ld1w { z15.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1331980 // fmla za.s[x8, 0], { z12.s-z15.s }, z3.s\n"
+ "add x28, x28, x26, LSL #2\n"
+ "ld1w { z0.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1351ba0 // fmla za.s[x8, 0], { z29.s-z0.s }, z5.s\n"
+ "st1w { z22.s }, p1, [x25]\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ ".inst 0xc13919a0 // fmla za.s[x8, 0], { z13.s-z16.s }, z9.s\n"
+ "add x25, x25, x23, LSL #2\n"
+ "st1w { z23.s }, p1, [x24]\n"
+ "ld1w { z12.s }, p1/Z, [x13]\n"
+ "add x24, x24, x22, LSL #2\n"
+ ".inst 0xc0040f02 // mova za.d[x8, #2], { z24.d-z27.d }\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "ld1w { z29.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z13.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z30.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z14.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z31.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z15.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z0.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "bgt 9b\n"
+ "b 15f\n"
+ "10:" // Padded
+ "cbz x21, 13f\n"
+ "cmp x21, #0x1\n"
+ "sub x14, x14, x21\n"
+ "beq 12f\n"
+ "11:" // Padded: 2 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z12.s }, p0/Z, [x13]\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z29.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z13.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z30.s }, p0/Z, [x19]\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z14.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z31.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z15.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x8\n"
+ ".inst 0xc1321980 // fmla za.s[x8, 0], { z12.s-z15.s }, z2.s\n"
+ "ld1w { z0.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1341ba0 // fmla za.s[x8, 0], { z29.s-z0.s }, z4.s\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ ".inst 0xc13119a0 // fmla za.s[x8, 0], { z13.s-z16.s }, z1.s\n"
+ "12:" // Padded: 1 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z12.s }, p0/Z, [x13]\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z29.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z13.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z30.s }, p0/Z, [x19]\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z14.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z31.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z15.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x8\n"
+ ".inst 0xc1331980 // fmla za.s[x8, 0], { z12.s-z15.s }, z3.s\n"
+ "ld1w { z0.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1351ba0 // fmla za.s[x8, 0], { z29.s-z0.s }, z5.s\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ ".inst 0xc13919a0 // fmla za.s[x8, 0], { z13.s-z16.s }, z9.s\n"
+ "13:" // Padded: 0 priming loads
+ "cmp x14, #0x2\n"
+ "blt 16f\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z12.s }, p0/Z, [x13]\n"
+ "add x20, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z29.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z13.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z30.s }, p0/Z, [x20]\n"
+ "mov x12, #0x4\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z14.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "sub x14, x14, #0x2\n"
+ "ld1w { z31.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z15.s }, p0/Z, [x20]\n"
+ "sub x11, x11, #0x1\n"
+ "lsr x19, x14, #0x1\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z0.s }, p0/Z, [x20]\n"
+ "mov x12, #0x8\n"
+ "cmp x19, x11\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ "csel x21, x19, x11, LT\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "and x14, x14, #0x1\n"
+ "sub x11, x11, x21\n"
+ "cbz x21, 15f\n"
+ "14:" // Padded: Main loop
+ ".inst 0xc1371980 // fmla za.s[x8, 0], { z12.s-z15.s }, z7.s\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1321981 // fmla za.s[x8, 1], { z12.s-z15.s }, z2.s\n"
+ "ld1w { z12.s }, p0/Z, [x13]\n"
+ "add x20, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ ".inst 0xc1361ba0 // fmla za.s[x8, 0], { z29.s-z0.s }, z6.s\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1341ba1 // fmla za.s[x8, 1], { z29.s-z0.s }, z4.s\n"
+ "ld1w { z29.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc13819a0 // fmla za.s[x8, 0], { z13.s-z16.s }, z8.s\n"
+ "subs x21, x21, #0x1\n"
+ ".inst 0xc13119a1 // fmla za.s[x8, 1], { z13.s-z16.s }, z1.s\n"
+ "ld1w { z13.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x4\n"
+ "ld1w { z30.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc0060c14 // mova { z20.d-z23.d }, za.d[x8, #0]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z14.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1b3cb94 // fclamp { z20.s-z23.s }, z28.s, z19.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z31.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ "st1w { z20.s }, p1, [x9]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z15.s }, p0/Z, [x20]\n"
+ "add x8, x8, #0x1\n"
+ "st1w { z21.s }, p1, [x28]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z0.s }, p0/Z, [x20]\n"
+ "st1w { z22.s }, p1, [x25]\n"
+ "mov x12, #0x8\n"
+ ".inst 0xc1331980 // fmla za.s[x8, 0], { z12.s-z15.s }, z3.s\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ "st1w { z23.s }, p1, [x24]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1351ba0 // fmla za.s[x8, 0], { z29.s-z0.s }, z5.s\n"
+ "mov x12, #0x0\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z12.s }, p0/Z, [x13]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ ".inst 0xc13919a0 // fmla za.s[x8, 0], { z13.s-z16.s }, z9.s\n"
+ "ld1w { z29.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc0040f02 // mova za.d[x8, #2], { z24.d-z27.d }\n"
+ "ld1w { z13.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x4\n"
+ "ld1w { z30.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z14.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z31.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z15.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x8\n"
+ "ld1w { z0.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x9, x9, x27, LSL #2\n"
+ "add x28, x28, x26, LSL #2\n"
+ "add x25, x25, x23, LSL #2\n"
+ "add x24, x24, x22, LSL #2\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "bgt 14b\n"
+ "15:" // Main loop tail
+ ".inst 0xc1371980 // fmla za.s[x8, 0], { z12.s-z15.s }, z7.s\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1321981 // fmla za.s[x8, 1], { z12.s-z15.s }, z2.s\n"
+ "ld1w { z12.s }, p0/Z, [x13]\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ ".inst 0xc1361ba0 // fmla za.s[x8, 0], { z29.s-z0.s }, z6.s\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ ".inst 0xc1341ba1 // fmla za.s[x8, 1], { z29.s-z0.s }, z4.s\n"
+ "ld1w { z29.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc13819a0 // fmla za.s[x8, 0], { z13.s-z16.s }, z8.s\n"
+ ".inst 0xc13119a1 // fmla za.s[x8, 1], { z13.s-z16.s }, z1.s\n"
+ "ld1w { z13.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x4\n"
+ "ld1w { z30.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc0060c14 // mova { z20.d-z23.d }, za.d[x8, #0]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z14.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1b3cb94 // fclamp { z20.s-z23.s }, z28.s, z19.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z31.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "st1w { z20.s }, p1, [x9]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z15.s }, p0/Z, [x19]\n"
+ "add x8, x8, #0x1\n"
+ "st1w { z21.s }, p1, [x28]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z0.s }, p0/Z, [x19]\n"
+ "st1w { z22.s }, p1, [x25]\n"
+ "mov x12, #0x8\n"
+ ".inst 0xc1331980 // fmla za.s[x8, 0], { z12.s-z15.s }, z3.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "st1w { z23.s }, p1, [x24]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1351ba0 // fmla za.s[x8, 0], { z29.s-z0.s }, z5.s\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x9, x9, x27, LSL #2\n"
+ "add x28, x28, x26, LSL #2\n"
+ "add x25, x25, x23, LSL #2\n"
+ ".inst 0xc0040f02 // mova za.d[x8, #2], { z24.d-z27.d }\n"
+ "add x24, x24, x22, LSL #2\n"
+ ".inst 0xc13919a0 // fmla za.s[x8, 0], { z13.s-z16.s }, z9.s\n"
+ "16:" // Main loop skip tail
+ "cbz x14, 17f\n" // Skip remainder inputs
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z12.s }, p0/Z, [x13]\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z29.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z13.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z30.s }, p0/Z, [x19]\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z14.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z31.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z15.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x8\n"
+ ".inst 0xc1371980 // fmla za.s[x8, 0], { z12.s-z15.s }, z7.s\n"
+ "ld1w { z0.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1361ba0 // fmla za.s[x8, 0], { z29.s-z0.s }, z6.s\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0xc1321981 // fmla za.s[x8, 1], { z12.s-z15.s }, z2.s\n"
+ "sub x11, x11, #0x1\n"
+ ".inst 0xc13819a0 // fmla za.s[x8, 0], { z13.s-z16.s }, z8.s\n"
+ ".inst 0xc1341ba1 // fmla za.s[x8, 1], { z29.s-z0.s }, z4.s\n"
+ ".inst 0xc0060c14 // mova { z20.d-z23.d }, za.d[x8, #0]\n"
+ ".inst 0xc1b3cb94 // fclamp { z20.s-z23.s }, z28.s, z19.s\n"
+ "st1w { z20.s }, p1, [x9]\n"
+ "add x9, x9, x27, LSL #2\n"
+ ".inst 0xc13119a1 // fmla za.s[x8, 1], { z13.s-z16.s }, z1.s\n"
+ "add x8, x8, #0x1\n"
+ "st1w { z21.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ "st1w { z22.s }, p1, [x25]\n"
+ "add x25, x25, x23, LSL #2\n"
+ ".inst 0xc0040f02 // mova za.d[x8, #2], { z24.d-z27.d }\n"
+ "st1w { z23.s }, p1, [x24]\n"
+ "add x24, x24, x22, LSL #2\n"
+ "17:" // Tail input: End
+ "cbz x11, 19f\n"
+ "18:" // Right padding loop
+ ".inst 0xc0060c14 // mova { z20.d-z23.d }, za.d[x8, #0]\n"
+ "add x8, x8, #0x1\n"
+ "subs x11, x11, #0x1\n"
+ ".inst 0xc1b3cb94 // fclamp { z20.s-z23.s }, z28.s, z19.s\n"
+ "st1w { z20.s }, p1, [x9]\n"
+ "add x9, x9, x27, LSL #2\n"
+ ".inst 0xc0040f02 // mova za.d[x8, #2], { z24.d-z27.d }\n"
+ "st1w { z21.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ "st1w { z22.s }, p1, [x25]\n"
+ "add x25, x25, x23, LSL #2\n"
+ "st1w { z23.s }, p1, [x24]\n"
+ "add x24, x24, x22, LSL #2\n"
+ "bgt 18b\n"
+ "19:" // End
+ "ldr x22, [%x[args], %[offsetof_Args_weights]]\n"
+ "incb x22, ALL, MUL #9\n"
+ "str x22, [%x[args], %[offsetof_Args_weights]]\n"
+ "incw x15\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_in_vl]]\n"
+ "whilelt p1.s, x15, x16\n"
+ "ldr x13, [%x[args], %[offsetof_Args_inptr]]\n"
+ "add x13, x13, x19, LSL #2\n"
+ "str x13, [%x[args], %[offsetof_Args_inptr]]\n"
+ "ldr x10, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "ldr x23, [%x[args], %[offsetof_Args_ld_out_vls]]\n"
+ "ldp x22, x21, [x10, #0x0]\n"
+ "ldp x20, x19, [x23, #0x0]\n"
+ "add x22, x22, x20, LSL #2\n"
+ "add x21, x21, x19, LSL #2\n"
+ "stp x22, x21, [x10, #0x0]\n"
+ "ldp x22, x21, [x10, #0x10]\n"
+ "ldp x20, x19, [x23, #0x10]\n"
+ "add x22, x22, x20, LSL #2\n"
+ "add x21, x21, x19, LSL #2\n"
+ "stp x22, x21, [x10, #0x10]\n"
+ "b.any 1b\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [ld_in_col] "r" (ld_in_col), [ld_in_row] "r" (ld_in_row), [offsetof_Args_bias] "I" (offsetof(Args, bias)), [offsetof_Args_clamp_max] "I" (offsetof(Args, clamp_max)), [offsetof_Args_clamp_min] "I" (offsetof(Args, clamp_min)), [offsetof_Args_current_channel] "I" (offsetof(Args, current_channel)), [offsetof_Args_inptr] "I" (offsetof(Args, inptr)), [offsetof_Args_input_cols] "I" (offsetof(Args, input_cols)), [offsetof_Args_ld_in_vl] "I" (offsetof(Args, ld_in_vl)), [offsetof_Args_ld_out_cols] "I" (offsetof(Args, ld_out_cols)), [offsetof_Args_ld_out_vls] "I" (offsetof(Args, ld_out_vls)), [offsetof_Args_n_channels] "I" (offsetof(Args, n_channels)), [offsetof_Args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_Args_output_cols] "I" (offsetof(Args, output_cols)), [offsetof_Args_pad_bottom] "I" (offsetof(Args, pad_bottom)), [offsetof_Args_pad_left] "I" (offsetof(Args, pad_left)), [offsetof_Args_pad_top] "I" (offsetof(Args, pad_top)), [offsetof_Args_weights] "I" (offsetof(Args, weights))
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_planar_5x5_s1_4rows_mla_za.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_planar_5x5_s1_4rows_mla_za.hpp
new file mode 100644
index 0000000..0fa0300
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_planar_5x5_s1_4rows_mla_za.hpp
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_fp32_planar_5x5_s1_4rows_mla_za_impl(
+ const float *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const float *weights,
+ const float *bias,
+ float **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ float act_min,
+ float act_max
+);
+
+class sme2_fp32_planar_5x5_s1_4rows_mla_za : public PlanarStrategy<float, float>
+{
+ using Parent = PlanarStrategy<float, float>;
+
+ public:
+ using return_type = float;
+ constexpr static auto output_rows = 4u;
+ constexpr static auto kernel_rows = 5u, kernel_cols = 5u;
+ constexpr static auto stride_rows = 1u, stride_cols = 1u;
+ constexpr static auto vl_type = arm_gemm::VLType::SME;
+
+ sme2_fp32_planar_5x5_s1_4rows_mla_za(const CPUInfo *)
+ : Parent(kernel_rows, kernel_cols, stride_rows, stride_cols, output_rows, vl_type)
+ {
+ }
+
+ typename Parent::KernelType get_kernel(void) const override
+ {
+ return sme2_fp32_planar_5x5_s1_4rows_mla_za_impl;
+ }
+};
+
+} // namespace depthwise
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_planar_5x5_s1_4rows_mla_za/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_planar_5x5_s1_4rows_mla_za/generic.cpp
new file mode 100644
index 0000000..0753e2d
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_planar_5x5_s1_4rows_mla_za/generic.cpp
@@ -0,0 +1,883 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <algorithm>
+#include <cstddef>
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_fp32_planar_5x5_s1_4rows_mla_za_impl(
+ const float *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const float *weights,
+ const float *bias,
+ float **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ float act_min,
+ float act_max
+)
+{
+ struct Args
+ {
+ const float *inptr;
+ size_t ld_in_vl;
+ long unsigned int pad_top, pad_bottom, pad_left;
+ const float *weights;
+ const float *bias;
+ long unsigned int input_cols, output_cols;
+ float **outptrs;
+ const size_t *ld_out_cols;
+ const size_t *ld_out_vls;
+ long unsigned int current_channel, n_channels;
+ float clamp_min, clamp_max;
+ };
+
+ Args args = { inptr, ld_in_vl, pad_top, 8u - std::min(8u, pad_top + valid_input_rows), pad_left, weights, bias, valid_input_cols, output_cols, outptrs, outlds, outvllds, start_channel, valid_channels, act_min, act_max };
+
+ __asm__ __volatile__(
+ "ldr x6, [%x[args], %[offsetof_Args_pad_bottom]]\n"
+ "mov x19, #0x8\n"
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "sub x19, x19, x6\n"
+ "ldr x7, [%x[args], %[offsetof_Args_pad_top]]\n"
+ "ptrue p2.b\n"
+ ".inst 0x25207812 // ptrue pn10.b\n"
+ "ld1rw { z22.s }, p2/Z, [%x[args], %[offsetof_Args_clamp_min]]\n"
+ "ldr x17, [%x[args], %[offsetof_Args_n_channels]]\n"
+ "whilelt p1.s, XZR, x17\n"
+ "whilelt p9.s, XZR, x19\n"
+ "ld1rw { z11.s }, p2/Z, [%x[args], %[offsetof_Args_clamp_max]]\n"
+ "whilelt p8.s, XZR, x7\n"
+ "eor p8.b, p2/Z, p8.b, p9.b\n"
+ "ldr x16, [%x[args], %[offsetof_Args_current_channel]]\n"
+ "1:" // Channel loop
+ "ldr x19, [%x[args], %[offsetof_Args_bias]]\n"
+ "fmov z28.s, #0x0\n"
+ "cbz x19, 2f\n"
+ "ld1w { z28.s }, p1/Z, [x19, x16, LSL #2]\n"
+ "2:" // Load bias: Done
+ "ldr x15, [%x[args], %[offsetof_Args_input_cols]]\n"
+ "sub x19, x15, #0x1\n"
+ "orr x22, x19, %x[ld_in_col], LSL #18\n"
+ "mov z29.d, z28.d\n"
+ "ldr x14, [%x[args], %[offsetof_Args_weights]]\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "orr x22, x17, x22, LSL #20\n"
+ "mov x21, #0x8\n"
+ "ldr x13, [%x[args], %[offsetof_Args_inptr]]\n"
+ ".inst 0xa04149c2 // ld1w { z2.s-z3.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "add x20, x7, x6\n"
+ "lsl x19, %x[ld_in_row], #0x2\n"
+ "ld1w { z10.s }, p2/Z, [x14, #4, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ "mov z30.d, z28.d\n"
+ "mov z31.d, z28.d\n"
+ ".inst 0xa14049c0 // ld1w { z0.s, z8.s }, pn10.b/Z, [x14]\n"
+ "mov x8, #0x0\n"
+ "ldr x11, [%x[args], %[offsetof_Args_output_cols]]\n"
+ "lsl x22, x22, #0x2\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "sub x21, x21, x20\n"
+ "madd x19, x19, x7, x13\n"
+ "ld1w { z1.s }, p2/Z, [x14, #4, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ "3:" // Issue prefetches
+ "subs x21, x21, #0x1\n"
+ ".inst 0xf8b64a7c // rprfm pldstrm, x22, [x19]\n"
+ "add x19, x19, %x[ld_in_col], LSL #2\n"
+ "bgt 3b\n"
+ "ldr x10, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "lsl x19, %x[ld_in_row], #0x2\n"
+ "msub x13, x7, x19, x13\n"
+ ".inst 0xc0040f80 // mova za.d[x8, #0], { z28.d-z31.d }\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_out_cols]]\n"
+ ".inst 0xc0040f81 // mova za.d[x8, #1], { z28.d-z31.d }\n"
+ "mov x9, #0x4\n"
+ "ldp x28, x27, [x10], #0x10\n"
+ ".inst 0xc0040f82 // mova za.d[x8, #2], { z28.d-z31.d }\n"
+ "ldp x26, x25, [x19], #0x10\n"
+ ".inst 0xc0040f83 // mova za.d[x8, #3], { z28.d-z31.d }\n"
+ "ldr x20, [%x[args], %[offsetof_Args_pad_left]]\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ "ldp x24, x23, [x10], #0x10\n"
+ "ldp x22, x21, [x19], #0x10\n"
+ "cbz x20, 5f\n"
+ "cmp x20, x9\n"
+ "csel x19, x20, x9, LT\n"
+ "sub x20, x20, x19\n"
+ "sub x9, x9, x19\n"
+ "cbz x20, 5f\n"
+ ".inst 0xc0060c18 // mova { z24.d-z27.d }, za.d[x8, #0]\n"
+ "sub x11, x11, x20\n"
+ ".inst 0xc1abcad8 // fclamp { z24.s-z27.s }, z22.s, z11.s\n"
+ "4:" // Left padding
+ "subs x20, x20, #0x1\n"
+ "st1w { z24.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ "st1w { z25.s }, p1, [x27]\n"
+ "add x27, x27, x25, LSL #2\n"
+ "st1w { z26.s }, p1, [x24]\n"
+ "add x24, x24, x22, LSL #2\n"
+ "st1w { z27.s }, p1, [x23]\n"
+ "add x23, x23, x21, LSL #2\n"
+ "bgt 4b\n"
+ "5:" // Left padding: End
+ "adds XZR, x7, x6\n"
+ "bne 12f\n"
+ "cbz x9, 10f\n"
+ "cmp x9, #0x1\n"
+ "sub x15, x15, x9\n"
+ "beq 9f\n"
+ "cmp x9, #0x2\n"
+ "beq 8f\n"
+ "cmp x9, #0x3\n"
+ "beq 7f\n"
+ "6:" // Unpadded: 4 priming loads
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ "ld1w { z14.s }, p1/Z, [x13]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "ld1w { z15.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc13419c0 // fmla za.s[x8, 0], { z14.s-z17.s }, z4.s\n"
+ "ld1w { z18.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc13019e0 // fmla za.s[x8, 0], { z15.s-z18.s }, z0.s\n"
+ "ld1w { z19.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1341a00 // fmla za.s[x8, 0], { z16.s-z19.s }, z4.s\n"
+ "ld1w { z20.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xa14049c0 // ld1w { z0.s, z8.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1301a20 // fmla za.s[x8, 0], { z17.s-z20.s }, z0.s\n"
+ "ld1w { z21.s }, p1/Z, [x19]\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "ldr x14, [%x[args], %[offsetof_Args_weights]]\n"
+ ".inst 0xc1341a40 // fmla za.s[x8, 0], { z18.s-z21.s }, z4.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xa14049c0 // ld1w { z0.s, z8.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ "7:" // Unpadded: 3 priming loads
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ "ld1w { z14.s }, p1/Z, [x13]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "ld1w { z15.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc13519c0 // fmla za.s[x8, 0], { z14.s-z17.s }, z5.s\n"
+ ".inst 0xc13419c1 // fmla za.s[x8, 1], { z14.s-z17.s }, z4.s\n"
+ "ld1w { z18.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc13819e0 // fmla za.s[x8, 0], { z15.s-z18.s }, z8.s\n"
+ "ld1w { z19.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc13019e1 // fmla za.s[x8, 1], { z15.s-z18.s }, z0.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1351a00 // fmla za.s[x8, 0], { z16.s-z19.s }, z5.s\n"
+ "ld1w { z20.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1341a01 // fmla za.s[x8, 1], { z16.s-z19.s }, z4.s\n"
+ ".inst 0xa14049c0 // ld1w { z0.s, z8.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1381a20 // fmla za.s[x8, 0], { z17.s-z20.s }, z8.s\n"
+ "ld1w { z21.s }, p1/Z, [x19]\n"
+ ".inst 0xc1301a21 // fmla za.s[x8, 1], { z17.s-z20.s }, z0.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "ldr x14, [%x[args], %[offsetof_Args_weights]]\n"
+ ".inst 0xc1351a40 // fmla za.s[x8, 0], { z18.s-z21.s }, z5.s\n"
+ ".inst 0xa04149c2 // ld1w { z2.s-z3.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc1341a41 // fmla za.s[x8, 1], { z18.s-z21.s }, z4.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xa14049c0 // ld1w { z0.s, z8.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ "8:" // Unpadded: 2 priming loads
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ "ld1w { z14.s }, p1/Z, [x13]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "ld1w { z15.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc13219c0 // fmla za.s[x8, 0], { z14.s-z17.s }, z2.s\n"
+ ".inst 0xc13519c1 // fmla za.s[x8, 1], { z14.s-z17.s }, z5.s\n"
+ "ld1w { z18.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc13419c2 // fmla za.s[x8, 2], { z14.s-z17.s }, z4.s\n"
+ "ld1w { z19.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc13619e0 // fmla za.s[x8, 0], { z15.s-z18.s }, z6.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xc13819e1 // fmla za.s[x8, 1], { z15.s-z18.s }, z8.s\n"
+ ".inst 0xa04149c2 // ld1w { z2.s-z3.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc13019e2 // fmla za.s[x8, 2], { z15.s-z18.s }, z0.s\n"
+ "ld1w { z20.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1321a00 // fmla za.s[x8, 0], { z16.s-z19.s }, z2.s\n"
+ ".inst 0xa14049c0 // ld1w { z0.s, z8.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xc1351a01 // fmla za.s[x8, 1], { z16.s-z19.s }, z5.s\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1341a02 // fmla za.s[x8, 2], { z16.s-z19.s }, z4.s\n"
+ "ld1w { z21.s }, p1/Z, [x19]\n"
+ ".inst 0xc1361a20 // fmla za.s[x8, 0], { z17.s-z20.s }, z6.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xc1381a21 // fmla za.s[x8, 1], { z17.s-z20.s }, z8.s\n"
+ ".inst 0xa04149c2 // ld1w { z2.s-z3.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "ldr x14, [%x[args], %[offsetof_Args_weights]]\n"
+ ".inst 0xc1301a22 // fmla za.s[x8, 2], { z17.s-z20.s }, z0.s\n"
+ ".inst 0xc1321a40 // fmla za.s[x8, 0], { z18.s-z21.s }, z2.s\n"
+ ".inst 0xa04149c2 // ld1w { z2.s-z3.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc1351a41 // fmla za.s[x8, 1], { z18.s-z21.s }, z5.s\n"
+ ".inst 0xc1341a42 // fmla za.s[x8, 2], { z18.s-z21.s }, z4.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xa14049c0 // ld1w { z0.s, z8.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ "9:" // Unpadded: 1 priming loads
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ "ld1w { z14.s }, p1/Z, [x13]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "ld1w { z15.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc13319c0 // fmla za.s[x8, 0], { z14.s-z17.s }, z3.s\n"
+ ".inst 0xc13219c1 // fmla za.s[x8, 1], { z14.s-z17.s }, z2.s\n"
+ "ld1w { z18.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc13519c2 // fmla za.s[x8, 2], { z14.s-z17.s }, z5.s\n"
+ "ld1w { z19.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc13419c3 // fmla za.s[x8, 3], { z14.s-z17.s }, z4.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xc13719e0 // fmla za.s[x8, 0], { z15.s-z18.s }, z7.s\n"
+ ".inst 0xa04149c2 // ld1w { z2.s-z3.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc13619e1 // fmla za.s[x8, 1], { z15.s-z18.s }, z6.s\n"
+ "ld1w { z20.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc13819e2 // fmla za.s[x8, 2], { z15.s-z18.s }, z8.s\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc13019e3 // fmla za.s[x8, 3], { z15.s-z18.s }, z0.s\n"
+ ".inst 0xa14049c0 // ld1w { z0.s, z8.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1331a00 // fmla za.s[x8, 0], { z16.s-z19.s }, z3.s\n"
+ "ld1w { z21.s }, p1/Z, [x19]\n"
+ ".inst 0xc1321a01 // fmla za.s[x8, 1], { z16.s-z19.s }, z2.s\n"
+ ".inst 0xa04149c2 // ld1w { z2.s-z3.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc1351a02 // fmla za.s[x8, 2], { z16.s-z19.s }, z5.s\n"
+ ".inst 0xc1341a03 // fmla za.s[x8, 3], { z16.s-z19.s }, z4.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "ldr x14, [%x[args], %[offsetof_Args_weights]]\n"
+ ".inst 0xc1371a20 // fmla za.s[x8, 0], { z17.s-z20.s }, z7.s\n"
+ "ld1w { z10.s }, p2/Z, [x14, #4, MUL VL]\n"
+ ".inst 0xc1361a21 // fmla za.s[x8, 1], { z17.s-z20.s }, z6.s\n"
+ ".inst 0xc1381a22 // fmla za.s[x8, 2], { z17.s-z20.s }, z8.s\n"
+ ".inst 0xc1301a23 // fmla za.s[x8, 3], { z17.s-z20.s }, z0.s\n"
+ ".inst 0xc1331a40 // fmla za.s[x8, 0], { z18.s-z21.s }, z3.s\n"
+ ".inst 0xc1321a41 // fmla za.s[x8, 1], { z18.s-z21.s }, z2.s\n"
+ ".inst 0xa04149c2 // ld1w { z2.s-z3.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc1351a42 // fmla za.s[x8, 2], { z18.s-z21.s }, z5.s\n"
+ ".inst 0xc1341a43 // fmla za.s[x8, 3], { z18.s-z21.s }, z4.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xa14049c0 // ld1w { z0.s, z8.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "ld1w { z1.s }, p2/Z, [x14, #4, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ "10:" // Unpadded: 0 priming loads
+ "cbz x15, 20f\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ "ld1w { z14.s }, p1/Z, [x13]\n"
+ "sub x15, x15, #0x1\n"
+ "ld1w { z15.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "sub x11, x11, #0x1\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "cmp x15, x11\n"
+ "ld1w { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "csel x20, x15, x11, LT\n"
+ "ld1w { z18.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "ld1w { z19.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "sub x11, x11, x20\n"
+ "ld1w { z20.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z21.s }, p1/Z, [x19]\n"
+ "cbz x20, 19f\n"
+ "11:" // Unpadded: Main loop
+ ".inst 0xc13a19c0 // fmla za.s[x8, 0], { z14.s-z17.s }, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x14, #4, MUL VL]\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ "subs x20, x20, #0x1\n"
+ ".inst 0xc13119e0 // fmla za.s[x8, 0], { z15.s-z18.s }, z1.s\n"
+ ".inst 0xc13319c1 // fmla za.s[x8, 1], { z14.s-z17.s }, z3.s\n"
+ ".inst 0xc13219c2 // fmla za.s[x8, 2], { z14.s-z17.s }, z2.s\n"
+ ".inst 0xa04149c2 // ld1w { z2.s-z3.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc13519c3 // fmla za.s[x8, 3], { z14.s-z17.s }, z5.s\n"
+ ".inst 0xc13419c4 // fmla za.s[x8, 4], { z14.s-z17.s }, z4.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc13a1a00 // fmla za.s[x8, 0], { z16.s-z19.s }, z10.s\n"
+ "ld1w { z1.s }, p2/Z, [x14, #4, MUL VL]\n"
+ ".inst 0xc13719e1 // fmla za.s[x8, 1], { z15.s-z18.s }, z7.s\n"
+ "ld1w { z14.s }, p1/Z, [x13]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ ".inst 0xc13619e2 // fmla za.s[x8, 2], { z15.s-z18.s }, z6.s\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc13819e3 // fmla za.s[x8, 3], { z15.s-z18.s }, z8.s\n"
+ ".inst 0xc13019e4 // fmla za.s[x8, 4], { z15.s-z18.s }, z0.s\n"
+ ".inst 0xa14049c0 // ld1w { z0.s, z8.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1311a20 // fmla za.s[x8, 0], { z17.s-z20.s }, z1.s\n"
+ "ld1w { z10.s }, p2/Z, [x14, #4, MUL VL]\n"
+ ".inst 0xc1331a01 // fmla za.s[x8, 1], { z16.s-z19.s }, z3.s\n"
+ "ld1w { z15.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1321a02 // fmla za.s[x8, 2], { z16.s-z19.s }, z2.s\n"
+ ".inst 0xa04149c2 // ld1w { z2.s-z3.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc1351a03 // fmla za.s[x8, 3], { z16.s-z19.s }, z5.s\n"
+ ".inst 0xc1341a04 // fmla za.s[x8, 4], { z16.s-z19.s }, z4.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "ldr x14, [%x[args], %[offsetof_Args_weights]]\n"
+ ".inst 0xc13a1a40 // fmla za.s[x8, 0], { z18.s-z21.s }, z10.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1371a21 // fmla za.s[x8, 1], { z17.s-z20.s }, z7.s\n"
+ "ld1w { z10.s }, p2/Z, [x14, #4, MUL VL]\n"
+ ".inst 0xc1361a22 // fmla za.s[x8, 2], { z17.s-z20.s }, z6.s\n"
+ ".inst 0xc1381a23 // fmla za.s[x8, 3], { z17.s-z20.s }, z8.s\n"
+ ".inst 0xc1301a24 // fmla za.s[x8, 4], { z17.s-z20.s }, z0.s\n"
+ "ld1w { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc0060c18 // mova { z24.d-z27.d }, za.d[x8, #0]\n"
+ ".inst 0xc1abcad8 // fclamp { z24.s-z27.s }, z22.s, z11.s\n"
+ "st1w { z24.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ ".inst 0xc1331a41 // fmla za.s[x8, 1], { z18.s-z21.s }, z3.s\n"
+ "st1w { z25.s }, p1, [x27]\n"
+ "add x27, x27, x25, LSL #2\n"
+ ".inst 0xc1321a42 // fmla za.s[x8, 2], { z18.s-z21.s }, z2.s\n"
+ ".inst 0xa04149c2 // ld1w { z2.s-z3.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "st1w { z26.s }, p1, [x24]\n"
+ "add x24, x24, x22, LSL #2\n"
+ ".inst 0xc1351a43 // fmla za.s[x8, 3], { z18.s-z21.s }, z5.s\n"
+ "st1w { z27.s }, p1, [x23]\n"
+ "add x23, x23, x21, LSL #2\n"
+ ".inst 0xc1341a44 // fmla za.s[x8, 4], { z18.s-z21.s }, z4.s\n"
+ "ld1w { z18.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "add x8, x8, #0x1\n"
+ "ld1w { z19.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ "ld1w { z20.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xa14049c0 // ld1w { z0.s, z8.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "ld1w { z1.s }, p2/Z, [x14, #4, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ "ld1w { z21.s }, p1/Z, [x19]\n"
+ "bgt 11b\n"
+ "b 19f\n"
+ "12:" // Padded
+ "cbz x9, 17f\n"
+ "cmp x9, #0x1\n"
+ "sub x15, x15, x9\n"
+ "beq 16f\n"
+ "cmp x9, #0x2\n"
+ "beq 15f\n"
+ "cmp x9, #0x3\n"
+ "beq 14f\n"
+ "13:" // Padded: 4 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z14.s }, p0/Z, [x13]\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z15.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z17.s }, p0/Z, [x19]\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc13419c0 // fmla za.s[x8, 0], { z14.s-z17.s }, z4.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z18.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc13019e0 // fmla za.s[x8, 0], { z15.s-z18.s }, z0.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z19.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1341a00 // fmla za.s[x8, 0], { z16.s-z19.s }, z4.s\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "addvl x14, x14, #5\n"
+ "ld1w { z20.s }, p0/Z, [x19]\n"
+ ".inst 0xa14049c0 // ld1w { z0.s, z8.s }, pn10.b/Z, [x14]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xc1301a20 // fmla za.s[x8, 0], { z17.s-z20.s }, z0.s\n"
+ "addvl x14, x14, #5\n"
+ "ld1w { z21.s }, p0/Z, [x19]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "ldr x14, [%x[args], %[offsetof_Args_weights]]\n"
+ ".inst 0xc1341a40 // fmla za.s[x8, 0], { z18.s-z21.s }, z4.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xa14049c0 // ld1w { z0.s, z8.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ "14:" // Padded: 3 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z14.s }, p0/Z, [x13]\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z15.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z17.s }, p0/Z, [x19]\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc13519c0 // fmla za.s[x8, 0], { z14.s-z17.s }, z5.s\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc13419c1 // fmla za.s[x8, 1], { z14.s-z17.s }, z4.s\n"
+ "ld1w { z18.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ ".inst 0xc13819e0 // fmla za.s[x8, 0], { z15.s-z18.s }, z8.s\n"
+ "ld1w { z19.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc13019e1 // fmla za.s[x8, 1], { z15.s-z18.s }, z0.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1351a00 // fmla za.s[x8, 0], { z16.s-z19.s }, z5.s\n"
+ "ld1w { z20.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xc1341a01 // fmla za.s[x8, 1], { z16.s-z19.s }, z4.s\n"
+ ".inst 0xa14049c0 // ld1w { z0.s, z8.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ ".inst 0xc1381a20 // fmla za.s[x8, 0], { z17.s-z20.s }, z8.s\n"
+ "ld1w { z21.s }, p0/Z, [x19]\n"
+ ".inst 0xc1301a21 // fmla za.s[x8, 1], { z17.s-z20.s }, z0.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "ldr x14, [%x[args], %[offsetof_Args_weights]]\n"
+ ".inst 0xc1351a40 // fmla za.s[x8, 0], { z18.s-z21.s }, z5.s\n"
+ ".inst 0xa04149c2 // ld1w { z2.s-z3.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc1341a41 // fmla za.s[x8, 1], { z18.s-z21.s }, z4.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xa14049c0 // ld1w { z0.s, z8.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ "15:" // Padded: 2 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z14.s }, p0/Z, [x13]\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z15.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z17.s }, p0/Z, [x19]\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc13219c0 // fmla za.s[x8, 0], { z14.s-z17.s }, z2.s\n"
+ ".inst 0xa04149c2 // ld1w { z2.s-z3.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc13519c1 // fmla za.s[x8, 1], { z14.s-z17.s }, z5.s\n"
+ "ld1w { z18.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc13419c2 // fmla za.s[x8, 2], { z14.s-z17.s }, z4.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z19.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc13619e0 // fmla za.s[x8, 0], { z15.s-z18.s }, z6.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc13819e1 // fmla za.s[x8, 1], { z15.s-z18.s }, z8.s\n"
+ "ld1w { z20.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xc13019e2 // fmla za.s[x8, 2], { z15.s-z18.s }, z0.s\n"
+ ".inst 0xa14049c0 // ld1w { z0.s, z8.s }, pn10.b/Z, [x14]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ ".inst 0xc1321a00 // fmla za.s[x8, 0], { z16.s-z19.s }, z2.s\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1351a01 // fmla za.s[x8, 1], { z16.s-z19.s }, z5.s\n"
+ "ld1w { z21.s }, p0/Z, [x19]\n"
+ ".inst 0xc1341a02 // fmla za.s[x8, 2], { z16.s-z19.s }, z4.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xc1361a20 // fmla za.s[x8, 0], { z17.s-z20.s }, z6.s\n"
+ ".inst 0xa04149c2 // ld1w { z2.s-z3.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "ldr x14, [%x[args], %[offsetof_Args_weights]]\n"
+ ".inst 0xc1381a21 // fmla za.s[x8, 1], { z17.s-z20.s }, z8.s\n"
+ ".inst 0xc1301a22 // fmla za.s[x8, 2], { z17.s-z20.s }, z0.s\n"
+ ".inst 0xc1321a40 // fmla za.s[x8, 0], { z18.s-z21.s }, z2.s\n"
+ ".inst 0xa04149c2 // ld1w { z2.s-z3.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc1351a41 // fmla za.s[x8, 1], { z18.s-z21.s }, z5.s\n"
+ ".inst 0xc1341a42 // fmla za.s[x8, 2], { z18.s-z21.s }, z4.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xa14049c0 // ld1w { z0.s, z8.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ "16:" // Padded: 1 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z14.s }, p0/Z, [x13]\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z15.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z17.s }, p0/Z, [x19]\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc13319c0 // fmla za.s[x8, 0], { z14.s-z17.s }, z3.s\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc13219c1 // fmla za.s[x8, 1], { z14.s-z17.s }, z2.s\n"
+ "ld1w { z18.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc13519c2 // fmla za.s[x8, 2], { z14.s-z17.s }, z5.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z19.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc13419c3 // fmla za.s[x8, 3], { z14.s-z17.s }, z4.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ ".inst 0xc13719e0 // fmla za.s[x8, 0], { z15.s-z18.s }, z7.s\n"
+ ".inst 0xa04149c2 // ld1w { z2.s-z3.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc13619e1 // fmla za.s[x8, 1], { z15.s-z18.s }, z6.s\n"
+ "ld1w { z20.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xc13819e2 // fmla za.s[x8, 2], { z15.s-z18.s }, z8.s\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc13019e3 // fmla za.s[x8, 3], { z15.s-z18.s }, z0.s\n"
+ ".inst 0xa14049c0 // ld1w { z0.s, z8.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1331a00 // fmla za.s[x8, 0], { z16.s-z19.s }, z3.s\n"
+ "ld1w { z21.s }, p0/Z, [x19]\n"
+ ".inst 0xc1321a01 // fmla za.s[x8, 1], { z16.s-z19.s }, z2.s\n"
+ ".inst 0xa04149c2 // ld1w { z2.s-z3.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc1351a02 // fmla za.s[x8, 2], { z16.s-z19.s }, z5.s\n"
+ ".inst 0xc1341a03 // fmla za.s[x8, 3], { z16.s-z19.s }, z4.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "ldr x14, [%x[args], %[offsetof_Args_weights]]\n"
+ ".inst 0xc1371a20 // fmla za.s[x8, 0], { z17.s-z20.s }, z7.s\n"
+ "ld1w { z10.s }, p2/Z, [x14, #4, MUL VL]\n"
+ ".inst 0xc1361a21 // fmla za.s[x8, 1], { z17.s-z20.s }, z6.s\n"
+ ".inst 0xc1381a22 // fmla za.s[x8, 2], { z17.s-z20.s }, z8.s\n"
+ ".inst 0xc1301a23 // fmla za.s[x8, 3], { z17.s-z20.s }, z0.s\n"
+ ".inst 0xc1331a40 // fmla za.s[x8, 0], { z18.s-z21.s }, z3.s\n"
+ ".inst 0xc1321a41 // fmla za.s[x8, 1], { z18.s-z21.s }, z2.s\n"
+ ".inst 0xa04149c2 // ld1w { z2.s-z3.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc1351a42 // fmla za.s[x8, 2], { z18.s-z21.s }, z5.s\n"
+ ".inst 0xc1341a43 // fmla za.s[x8, 3], { z18.s-z21.s }, z4.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xa14049c0 // ld1w { z0.s, z8.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "ld1w { z1.s }, p2/Z, [x14, #4, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ "17:" // Padded: 0 priming loads
+ "cbz x15, 20f\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z14.s }, p0/Z, [x13]\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z15.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z17.s }, p0/Z, [x19]\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z18.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "sub x15, x15, #0x1\n"
+ "ld1w { z19.s }, p0/Z, [x19]\n"
+ "sub x11, x11, #0x1\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "cmp x15, x11\n"
+ "ld1w { z20.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z21.s }, p0/Z, [x19]\n"
+ "csel x20, x15, x11, LT\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "sub x11, x11, x20\n"
+ "cbz x20, 19f\n"
+ "18:" // Padded: Main loop
+ ".inst 0xc13a19c0 // fmla za.s[x8, 0], { z14.s-z17.s }, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x14, #4, MUL VL]\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc13119e0 // fmla za.s[x8, 0], { z15.s-z18.s }, z1.s\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ "subs x20, x20, #0x1\n"
+ ".inst 0xc13319c1 // fmla za.s[x8, 1], { z14.s-z17.s }, z3.s\n"
+ ".inst 0xc13219c2 // fmla za.s[x8, 2], { z14.s-z17.s }, z2.s\n"
+ ".inst 0xa04149c2 // ld1w { z2.s-z3.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc13519c3 // fmla za.s[x8, 3], { z14.s-z17.s }, z5.s\n"
+ ".inst 0xc13419c4 // fmla za.s[x8, 4], { z14.s-z17.s }, z4.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc13a1a00 // fmla za.s[x8, 0], { z16.s-z19.s }, z10.s\n"
+ "ld1w { z1.s }, p2/Z, [x14, #4, MUL VL]\n"
+ ".inst 0xc13719e1 // fmla za.s[x8, 1], { z15.s-z18.s }, z7.s\n"
+ "ld1w { z14.s }, p0/Z, [x13]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ ".inst 0xc13619e2 // fmla za.s[x8, 2], { z15.s-z18.s }, z6.s\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc13819e3 // fmla za.s[x8, 3], { z15.s-z18.s }, z8.s\n"
+ ".inst 0xc13019e4 // fmla za.s[x8, 4], { z15.s-z18.s }, z0.s\n"
+ ".inst 0xa14049c0 // ld1w { z0.s, z8.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1311a20 // fmla za.s[x8, 0], { z17.s-z20.s }, z1.s\n"
+ "ld1w { z10.s }, p2/Z, [x14, #4, MUL VL]\n"
+ ".inst 0xc1331a01 // fmla za.s[x8, 1], { z16.s-z19.s }, z3.s\n"
+ "ld1w { z15.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc1321a02 // fmla za.s[x8, 2], { z16.s-z19.s }, z2.s\n"
+ ".inst 0xa04149c2 // ld1w { z2.s-z3.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc1351a03 // fmla za.s[x8, 3], { z16.s-z19.s }, z5.s\n"
+ ".inst 0xc1341a04 // fmla za.s[x8, 4], { z16.s-z19.s }, z4.s\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x4\n"
+ ".inst 0xc13a1a40 // fmla za.s[x8, 0], { z18.s-z21.s }, z10.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ldr x14, [%x[args], %[offsetof_Args_weights]]\n"
+ ".inst 0xc1371a21 // fmla za.s[x8, 1], { z17.s-z20.s }, z7.s\n"
+ "ld1w { z10.s }, p2/Z, [x14, #4, MUL VL]\n"
+ ".inst 0xc1361a22 // fmla za.s[x8, 2], { z17.s-z20.s }, z6.s\n"
+ ".inst 0xc1381a23 // fmla za.s[x8, 3], { z17.s-z20.s }, z8.s\n"
+ ".inst 0xc1301a24 // fmla za.s[x8, 4], { z17.s-z20.s }, z0.s\n"
+ "ld1w { z17.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc0060c18 // mova { z24.d-z27.d }, za.d[x8, #0]\n"
+ ".inst 0xc1abcad8 // fclamp { z24.s-z27.s }, z22.s, z11.s\n"
+ "st1w { z24.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ ".inst 0xc1331a41 // fmla za.s[x8, 1], { z18.s-z21.s }, z3.s\n"
+ "st1w { z25.s }, p1, [x27]\n"
+ "add x27, x27, x25, LSL #2\n"
+ ".inst 0xc1321a42 // fmla za.s[x8, 2], { z18.s-z21.s }, z2.s\n"
+ ".inst 0xa04149c2 // ld1w { z2.s-z3.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "st1w { z26.s }, p1, [x24]\n"
+ "add x24, x24, x22, LSL #2\n"
+ ".inst 0xc1351a43 // fmla za.s[x8, 3], { z18.s-z21.s }, z5.s\n"
+ "st1w { z27.s }, p1, [x23]\n"
+ "add x23, x23, x21, LSL #2\n"
+ ".inst 0xc1341a44 // fmla za.s[x8, 4], { z18.s-z21.s }, z4.s\n"
+ "ld1w { z18.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z19.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ "add x8, x8, #0x1\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ "ld1w { z20.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xa14049c0 // ld1w { z0.s, z8.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "ld1w { z1.s }, p2/Z, [x14, #4, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ "ld1w { z21.s }, p0/Z, [x19]\n"
+ "bgt 18b\n"
+ "19:" // Main loop tail
+ ".inst 0xc13a19c0 // fmla za.s[x8, 0], { z14.s-z17.s }, z10.s\n"
+ "ld1w { z10.s }, p2/Z, [x14, #4, MUL VL]\n"
+ ".inst 0xc13119e0 // fmla za.s[x8, 0], { z15.s-z18.s }, z1.s\n"
+ ".inst 0xc13319c1 // fmla za.s[x8, 1], { z14.s-z17.s }, z3.s\n"
+ ".inst 0xc13219c2 // fmla za.s[x8, 2], { z14.s-z17.s }, z2.s\n"
+ ".inst 0xa04149c2 // ld1w { z2.s-z3.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc13519c3 // fmla za.s[x8, 3], { z14.s-z17.s }, z5.s\n"
+ ".inst 0xc13419c4 // fmla za.s[x8, 4], { z14.s-z17.s }, z4.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc13a1a00 // fmla za.s[x8, 0], { z16.s-z19.s }, z10.s\n"
+ "ld1w { z1.s }, p2/Z, [x14, #4, MUL VL]\n"
+ ".inst 0xc13719e1 // fmla za.s[x8, 1], { z15.s-z18.s }, z7.s\n"
+ ".inst 0xc13619e2 // fmla za.s[x8, 2], { z15.s-z18.s }, z6.s\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc13819e3 // fmla za.s[x8, 3], { z15.s-z18.s }, z8.s\n"
+ ".inst 0xc13019e4 // fmla za.s[x8, 4], { z15.s-z18.s }, z0.s\n"
+ ".inst 0xa14049c0 // ld1w { z0.s, z8.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1311a20 // fmla za.s[x8, 0], { z17.s-z20.s }, z1.s\n"
+ "ld1w { z10.s }, p2/Z, [x14, #4, MUL VL]\n"
+ ".inst 0xc1331a01 // fmla za.s[x8, 1], { z16.s-z19.s }, z3.s\n"
+ ".inst 0xc1321a02 // fmla za.s[x8, 2], { z16.s-z19.s }, z2.s\n"
+ ".inst 0xa04149c2 // ld1w { z2.s-z3.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc1351a03 // fmla za.s[x8, 3], { z16.s-z19.s }, z5.s\n"
+ ".inst 0xc1341a04 // fmla za.s[x8, 4], { z16.s-z19.s }, z4.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xc13a1a40 // fmla za.s[x8, 0], { z18.s-z21.s }, z10.s\n"
+ ".inst 0xc1371a21 // fmla za.s[x8, 1], { z17.s-z20.s }, z7.s\n"
+ ".inst 0xc1361a22 // fmla za.s[x8, 2], { z17.s-z20.s }, z6.s\n"
+ ".inst 0xc1381a23 // fmla za.s[x8, 3], { z17.s-z20.s }, z8.s\n"
+ ".inst 0xc1301a24 // fmla za.s[x8, 4], { z17.s-z20.s }, z0.s\n"
+ ".inst 0xc0060c18 // mova { z24.d-z27.d }, za.d[x8, #0]\n"
+ ".inst 0xc1abcad8 // fclamp { z24.s-z27.s }, z22.s, z11.s\n"
+ "st1w { z24.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ ".inst 0xc1331a41 // fmla za.s[x8, 1], { z18.s-z21.s }, z3.s\n"
+ "st1w { z25.s }, p1, [x27]\n"
+ "add x27, x27, x25, LSL #2\n"
+ ".inst 0xc1321a42 // fmla za.s[x8, 2], { z18.s-z21.s }, z2.s\n"
+ "st1w { z26.s }, p1, [x24]\n"
+ "add x24, x24, x22, LSL #2\n"
+ ".inst 0xc1351a43 // fmla za.s[x8, 3], { z18.s-z21.s }, z5.s\n"
+ "st1w { z27.s }, p1, [x23]\n"
+ "add x23, x23, x21, LSL #2\n"
+ ".inst 0xc1341a44 // fmla za.s[x8, 4], { z18.s-z21.s }, z4.s\n"
+ "add x8, x8, #0x1\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ "20:" // Main loop skip tail
+ "cbz x11, 22f\n"
+ "21:" // Right padding loop
+ ".inst 0xc0060c18 // mova { z24.d-z27.d }, za.d[x8, #0]\n"
+ "add x8, x8, #0x1\n"
+ "subs x11, x11, #0x1\n"
+ ".inst 0xc1abcad8 // fclamp { z24.s-z27.s }, z22.s, z11.s\n"
+ "st1w { z24.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ "st1w { z25.s }, p1, [x27]\n"
+ "add x27, x27, x25, LSL #2\n"
+ "st1w { z26.s }, p1, [x24]\n"
+ "add x24, x24, x22, LSL #2\n"
+ "st1w { z27.s }, p1, [x23]\n"
+ "add x23, x23, x21, LSL #2\n"
+ "bgt 21b\n"
+ "22:" // End
+ "ldr x14, [%x[args], %[offsetof_Args_weights]]\n"
+ "incb x14, ALL, MUL #16\n"
+ "incb x14, ALL, MUL #9\n"
+ "str x14, [%x[args], %[offsetof_Args_weights]]\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_in_vl]]\n"
+ "incw x16\n"
+ "whilelt p1.s, x16, x17\n"
+ "ldr x13, [%x[args], %[offsetof_Args_inptr]]\n"
+ "add x13, x13, x19, LSL #2\n"
+ "str x13, [%x[args], %[offsetof_Args_inptr]]\n"
+ "ldr x10, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "ldr x23, [%x[args], %[offsetof_Args_ld_out_vls]]\n"
+ "ldp x22, x21, [x10, #0x0]\n"
+ "ldp x20, x19, [x23, #0x0]\n"
+ "add x22, x22, x20, LSL #2\n"
+ "add x21, x21, x19, LSL #2\n"
+ "stp x22, x21, [x10, #0x0]\n"
+ "ldp x22, x21, [x10, #0x10]\n"
+ "ldp x20, x19, [x23, #0x10]\n"
+ "add x22, x22, x20, LSL #2\n"
+ "add x21, x21, x19, LSL #2\n"
+ "stp x22, x21, [x10, #0x10]\n"
+ "b.any 1b\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [ld_in_col] "r" (ld_in_col), [ld_in_row] "r" (ld_in_row), [offsetof_Args_bias] "I" (offsetof(Args, bias)), [offsetof_Args_clamp_max] "I" (offsetof(Args, clamp_max)), [offsetof_Args_clamp_min] "I" (offsetof(Args, clamp_min)), [offsetof_Args_current_channel] "I" (offsetof(Args, current_channel)), [offsetof_Args_inptr] "I" (offsetof(Args, inptr)), [offsetof_Args_input_cols] "I" (offsetof(Args, input_cols)), [offsetof_Args_ld_in_vl] "I" (offsetof(Args, ld_in_vl)), [offsetof_Args_ld_out_cols] "I" (offsetof(Args, ld_out_cols)), [offsetof_Args_ld_out_vls] "I" (offsetof(Args, ld_out_vls)), [offsetof_Args_n_channels] "I" (offsetof(Args, n_channels)), [offsetof_Args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_Args_output_cols] "I" (offsetof(Args, output_cols)), [offsetof_Args_pad_bottom] "I" (offsetof(Args, pad_bottom)), [offsetof_Args_pad_left] "I" (offsetof(Args, pad_left)), [offsetof_Args_pad_top] "I" (offsetof(Args, pad_top)), [offsetof_Args_weights] "I" (offsetof(Args, weights))
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_planar_5x5_s2_4rows_mla_za.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_planar_5x5_s2_4rows_mla_za.hpp
new file mode 100644
index 0000000..cae4b24
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_planar_5x5_s2_4rows_mla_za.hpp
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_fp32_planar_5x5_s2_4rows_mla_za_impl(
+ const float *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const float *weights,
+ const float *bias,
+ float **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ float act_min,
+ float act_max
+);
+
+class sme2_fp32_planar_5x5_s2_4rows_mla_za : public PlanarStrategy<float, float>
+{
+ using Parent = PlanarStrategy<float, float>;
+
+ public:
+ using return_type = float;
+ constexpr static auto output_rows = 4u;
+ constexpr static auto kernel_rows = 5u, kernel_cols = 5u;
+ constexpr static auto stride_rows = 2u, stride_cols = 2u;
+ constexpr static auto vl_type = arm_gemm::VLType::SME;
+
+ sme2_fp32_planar_5x5_s2_4rows_mla_za(const CPUInfo *)
+ : Parent(kernel_rows, kernel_cols, stride_rows, stride_cols, output_rows, vl_type)
+ {
+ }
+
+ typename Parent::KernelType get_kernel(void) const override
+ {
+ return sme2_fp32_planar_5x5_s2_4rows_mla_za_impl;
+ }
+};
+
+} // namespace depthwise
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_planar_5x5_s2_4rows_mla_za/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_planar_5x5_s2_4rows_mla_za/generic.cpp
new file mode 100644
index 0000000..8920b3b
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_planar_5x5_s2_4rows_mla_za/generic.cpp
@@ -0,0 +1,1172 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <algorithm>
+#include <cstddef>
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_fp32_planar_5x5_s2_4rows_mla_za_impl(
+ const float *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const float *weights,
+ const float *bias,
+ float **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ float act_min,
+ float act_max
+)
+{
+ struct Args
+ {
+ const float *inptr;
+ size_t ld_in_vl;
+ long unsigned int pad_top, pad_bottom, pad_left;
+ const float *weights;
+ const float *bias;
+ long unsigned int input_cols, output_cols;
+ float **outptrs;
+ const size_t *ld_out_cols;
+ const size_t *ld_out_vls;
+ long unsigned int current_channel, n_channels;
+ float clamp_min, clamp_max;
+ };
+
+ Args args = { inptr, ld_in_vl, pad_top, 11u - std::min(11u, pad_top + valid_input_rows), pad_left, weights, bias, valid_input_cols, output_cols, outptrs, outlds, outvllds, start_channel, valid_channels, act_min, act_max };
+
+ __asm__ __volatile__(
+ "ldr x6, [%x[args], %[offsetof_Args_pad_bottom]]\n"
+ "mov x19, #0xb\n"
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "sub x19, x19, x6\n"
+ "ldr x7, [%x[args], %[offsetof_Args_pad_top]]\n"
+ "ptrue p2.b\n"
+ ".inst 0x25207812 // ptrue pn10.b\n"
+ "ld1rw { z0.s }, p2/Z, [%x[args], %[offsetof_Args_clamp_min]]\n"
+ "ldr x17, [%x[args], %[offsetof_Args_n_channels]]\n"
+ "whilelt p1.s, XZR, x17\n"
+ "whilelt p9.s, XZR, x19\n"
+ "ld1rw { z17.s }, p2/Z, [%x[args], %[offsetof_Args_clamp_max]]\n"
+ "whilelt p8.s, XZR, x7\n"
+ "eor p8.b, p2/Z, p8.b, p9.b\n"
+ "ldr x16, [%x[args], %[offsetof_Args_current_channel]]\n"
+ "1:" // Channel loop
+ "ldr x19, [%x[args], %[offsetof_Args_bias]]\n"
+ "fmov z28.s, #0x0\n"
+ "cbz x19, 2f\n"
+ "ld1w { z28.s }, p1/Z, [x19, x16, LSL #2]\n"
+ "2:" // Load bias: Done
+ "ldr x15, [%x[args], %[offsetof_Args_input_cols]]\n"
+ "sub x19, x15, #0x1\n"
+ "orr x22, x19, %x[ld_in_col], LSL #18\n"
+ "mov z29.d, z28.d\n"
+ "ldr x14, [%x[args], %[offsetof_Args_weights]]\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "orr x22, x17, x22, LSL #20\n"
+ "mov x21, #0xb\n"
+ "ldr x13, [%x[args], %[offsetof_Args_inptr]]\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "add x20, x7, x6\n"
+ "lsl x19, %x[ld_in_row], #0x2\n"
+ "ld1w { z8.s }, p2/Z, [x14, #4, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ "mov z30.d, z28.d\n"
+ "mov z31.d, z28.d\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ "mov x8, #0x0\n"
+ "ldr x11, [%x[args], %[offsetof_Args_output_cols]]\n"
+ "lsl x22, x22, #0x2\n"
+ ".inst 0xa14149c2 // ld1w { z2.s, z10.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "sub x21, x21, x20\n"
+ "madd x19, x19, x7, x13\n"
+ "ld1w { z3.s }, p2/Z, [x14, #4, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ "3:" // Issue prefetches
+ "subs x21, x21, #0x1\n"
+ ".inst 0xf8b64a7c // rprfm pldstrm, x22, [x19]\n"
+ "add x19, x19, %x[ld_in_col], LSL #2\n"
+ "bgt 3b\n"
+ "ldr x10, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "lsl x19, %x[ld_in_row], #0x2\n"
+ "msub x13, x7, x19, x13\n"
+ ".inst 0xc0040f80 // mova za.d[x8, #0], { z28.d-z31.d }\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_out_cols]]\n"
+ ".inst 0xc0040f81 // mova za.d[x8, #1], { z28.d-z31.d }\n"
+ "mov x21, #0x4\n"
+ "ldp x9, x28, [x10], #0x10\n"
+ ".inst 0xc0040f82 // mova za.d[x8, #2], { z28.d-z31.d }\n"
+ "ldp x27, x26, [x19], #0x10\n"
+ ".inst 0xc0040f83 // mova za.d[x8, #3], { z28.d-z31.d }\n"
+ "ldr x20, [%x[args], %[offsetof_Args_pad_left]]\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ "ldp x25, x24, [x10], #0x10\n"
+ "ldp x23, x22, [x19], #0x10\n"
+ "cbz x20, 5f\n"
+ "cmp x20, x21\n"
+ "csel x19, x20, x21, LT\n"
+ "sub x20, x20, x19\n"
+ "sub x21, x21, x19\n"
+ "cbz x20, 5f\n"
+ ".inst 0xc0060c18 // mova { z24.d-z27.d }, za.d[x8, #0]\n"
+ "and x21, x20, #0x1\n"
+ "add x20, x20, #0x1\n"
+ ".inst 0xc1b1c818 // fclamp { z24.s-z27.s }, z0.s, z17.s\n"
+ "lsr x20, x20, #0x1\n"
+ "sub x11, x11, x20\n"
+ "4:" // Left padding
+ "subs x20, x20, #0x1\n"
+ "st1w { z24.s }, p1, [x9]\n"
+ "add x9, x9, x27, LSL #2\n"
+ "st1w { z25.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ "st1w { z26.s }, p1, [x25]\n"
+ "add x25, x25, x23, LSL #2\n"
+ "st1w { z27.s }, p1, [x24]\n"
+ "add x24, x24, x22, LSL #2\n"
+ "bgt 4b\n"
+ "5:" // Left padding: End
+ "adds XZR, x7, x6\n"
+ "bne 12f\n"
+ "cbz x21, 10f\n"
+ "cmp x21, #0x1\n"
+ "sub x15, x15, x21\n"
+ "beq 9f\n"
+ "cmp x21, #0x2\n"
+ "beq 8f\n"
+ "cmp x21, #0x3\n"
+ "beq 7f\n"
+ "6:" // Unpadded: 4 priming loads
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ "ld1w { z11.s }, p1/Z, [x13]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "ld1w { z21.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z12.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z22.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z13.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z23.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z14.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1341960 // fmla za.s[x8, 0], { z11.s-z14.s }, z4.s\n"
+ "ld1w { z24.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1311aa0 // fmla za.s[x8, 0], { z21.s-z24.s }, z1.s\n"
+ "ld1w { z15.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1341980 // fmla za.s[x8, 0], { z12.s-z15.s }, z4.s\n"
+ "ld1w { z25.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1311ac0 // fmla za.s[x8, 0], { z22.s-z25.s }, z1.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "ldr x14, [%x[args], %[offsetof_Args_weights]]\n"
+ ".inst 0xc13419a0 // fmla za.s[x8, 0], { z13.s-z16.s }, z4.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ "7:" // Unpadded: 3 priming loads
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ "ld1w { z11.s }, p1/Z, [x13]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "ld1w { z21.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z12.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z22.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z13.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z23.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z14.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1351960 // fmla za.s[x8, 0], { z11.s-z14.s }, z5.s\n"
+ "ld1w { z24.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1391aa0 // fmla za.s[x8, 0], { z21.s-z24.s }, z9.s\n"
+ "ld1w { z15.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1351980 // fmla za.s[x8, 0], { z12.s-z15.s }, z5.s\n"
+ "ld1w { z25.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1391ac0 // fmla za.s[x8, 0], { z22.s-z25.s }, z9.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "ldr x14, [%x[args], %[offsetof_Args_weights]]\n"
+ ".inst 0xc13519a0 // fmla za.s[x8, 0], { z13.s-z16.s }, z5.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa14149c2 // ld1w { z2.s, z10.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ "8:" // Unpadded: 2 priming loads
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ "ld1w { z11.s }, p1/Z, [x13]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "ld1w { z21.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z12.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z22.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z13.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z23.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z14.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1361960 // fmla za.s[x8, 0], { z11.s-z14.s }, z6.s\n"
+ ".inst 0xc1341961 // fmla za.s[x8, 1], { z11.s-z14.s }, z4.s\n"
+ "ld1w { z24.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1321aa0 // fmla za.s[x8, 0], { z21.s-z24.s }, z2.s\n"
+ "ld1w { z15.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1311aa1 // fmla za.s[x8, 1], { z21.s-z24.s }, z1.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1361980 // fmla za.s[x8, 0], { z12.s-z15.s }, z6.s\n"
+ ".inst 0xc1341981 // fmla za.s[x8, 1], { z12.s-z15.s }, z4.s\n"
+ "ld1w { z25.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xc1311ac1 // fmla za.s[x8, 1], { z22.s-z25.s }, z1.s\n"
+ ".inst 0xa14149c2 // ld1w { z2.s, z10.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1321ac0 // fmla za.s[x8, 0], { z22.s-z25.s }, z2.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xc13419a1 // fmla za.s[x8, 1], { z13.s-z16.s }, z4.s\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "ldr x14, [%x[args], %[offsetof_Args_weights]]\n"
+ ".inst 0xc13619a0 // fmla za.s[x8, 0], { z13.s-z16.s }, z6.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa14149c2 // ld1w { z2.s, z10.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ "9:" // Unpadded: 1 priming loads
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ "ld1w { z11.s }, p1/Z, [x13]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "ld1w { z21.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z12.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z22.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z13.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z23.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z14.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1371960 // fmla za.s[x8, 0], { z11.s-z14.s }, z7.s\n"
+ ".inst 0xc1351961 // fmla za.s[x8, 1], { z11.s-z14.s }, z5.s\n"
+ "ld1w { z24.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc13a1aa0 // fmla za.s[x8, 0], { z21.s-z24.s }, z10.s\n"
+ "ld1w { z15.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1391aa1 // fmla za.s[x8, 1], { z21.s-z24.s }, z9.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1371980 // fmla za.s[x8, 0], { z12.s-z15.s }, z7.s\n"
+ ".inst 0xc1351981 // fmla za.s[x8, 1], { z12.s-z15.s }, z5.s\n"
+ "ld1w { z25.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xc1391ac1 // fmla za.s[x8, 1], { z22.s-z25.s }, z9.s\n"
+ ".inst 0xa14149c2 // ld1w { z2.s, z10.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc13a1ac0 // fmla za.s[x8, 0], { z22.s-z25.s }, z10.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xc13519a1 // fmla za.s[x8, 1], { z13.s-z16.s }, z5.s\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "ldr x14, [%x[args], %[offsetof_Args_weights]]\n"
+ ".inst 0xc13719a0 // fmla za.s[x8, 0], { z13.s-z16.s }, z7.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "ld1w { z8.s }, p2/Z, [x14, #4, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa14149c2 // ld1w { z2.s, z10.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "ld1w { z3.s }, p2/Z, [x14, #4, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ "10:" // Unpadded: 0 priming loads
+ "cmp x15, #0x2\n"
+ "blt 20f\n"
+ "add x20, x13, %x[ld_in_row], LSL #2\n"
+ "ld1w { z11.s }, p1/Z, [x13]\n"
+ "sub x15, x15, #0x2\n"
+ "ld1w { z21.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ "sub x11, x11, #0x1\n"
+ "ld1w { z12.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ "lsr x19, x15, #0x1\n"
+ "ld1w { z22.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ "cmp x19, x11\n"
+ "ld1w { z13.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ "csel x21, x19, x11, LT\n"
+ "ld1w { z23.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "ld1w { z14.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ "and x15, x15, #0x1\n"
+ "ld1w { z24.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ "sub x11, x11, x21\n"
+ "ld1w { z15.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ "ld1w { z25.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "cbz x21, 19f\n"
+ "11:" // Unpadded: Main loop
+ ".inst 0xc1381960 // fmla za.s[x8, 0], { z11.s-z14.s }, z8.s\n"
+ "ld1w { z8.s }, p2/Z, [x14, #4, MUL VL]\n"
+ "add x20, x13, %x[ld_in_row], LSL #2\n"
+ "subs x21, x21, #0x1\n"
+ ".inst 0xc1361961 // fmla za.s[x8, 1], { z11.s-z14.s }, z6.s\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc1341962 // fmla za.s[x8, 2], { z11.s-z14.s }, z4.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1331aa0 // fmla za.s[x8, 0], { z21.s-z24.s }, z3.s\n"
+ "ld1w { z3.s }, p2/Z, [x14, #4, MUL VL]\n"
+ ".inst 0xc1321aa1 // fmla za.s[x8, 1], { z21.s-z24.s }, z2.s\n"
+ ".inst 0xa14149c2 // ld1w { z2.s, z10.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc1311aa2 // fmla za.s[x8, 2], { z21.s-z24.s }, z1.s\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1381980 // fmla za.s[x8, 0], { z12.s-z15.s }, z8.s\n"
+ "ld1w { z8.s }, p2/Z, [x14, #4, MUL VL]\n"
+ ".inst 0xc1361981 // fmla za.s[x8, 1], { z12.s-z15.s }, z6.s\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc1341982 // fmla za.s[x8, 2], { z12.s-z15.s }, z4.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "ldr x14, [%x[args], %[offsetof_Args_weights]]\n"
+ ".inst 0xc1331ac0 // fmla za.s[x8, 0], { z22.s-z25.s }, z3.s\n"
+ "ld1w { z11.s }, p1/Z, [x13]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1321ac1 // fmla za.s[x8, 1], { z22.s-z25.s }, z2.s\n"
+ "ld1w { z21.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1311ac2 // fmla za.s[x8, 2], { z22.s-z25.s }, z1.s\n"
+ "ld1w { z12.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ "ld1w { z22.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc13819a0 // fmla za.s[x8, 0], { z13.s-z16.s }, z8.s\n"
+ ".inst 0xc13619a1 // fmla za.s[x8, 1], { z13.s-z16.s }, z6.s\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc13419a2 // fmla za.s[x8, 2], { z13.s-z16.s }, z4.s\n"
+ "ld1w { z13.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ "ld1w { z23.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc0060c18 // mova { z24.d-z27.d }, za.d[x8, #0]\n"
+ "add x8, x8, #0x1\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1b1c818 // fclamp { z24.s-z27.s }, z0.s, z17.s\n"
+ "st1w { z24.s }, p1, [x9]\n"
+ "ld1w { z14.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1371960 // fmla za.s[x8, 0], { z11.s-z14.s }, z7.s\n"
+ "add x9, x9, x27, LSL #2\n"
+ ".inst 0xc1351961 // fmla za.s[x8, 1], { z11.s-z14.s }, z5.s\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ "st1w { z25.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ ".inst 0xa14149c2 // ld1w { z2.s, z10.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ "st1w { z26.s }, p1, [x25]\n"
+ "add x25, x25, x23, LSL #2\n"
+ "ld1w { z24.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc13a1aa0 // fmla za.s[x8, 0], { z21.s-z24.s }, z10.s\n"
+ "st1w { z27.s }, p1, [x24]\n"
+ ".inst 0xc1391aa1 // fmla za.s[x8, 1], { z21.s-z24.s }, z9.s\n"
+ "ld1w { z15.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ "add x24, x24, x22, LSL #2\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xc1351981 // fmla za.s[x8, 1], { z12.s-z15.s }, z5.s\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1371980 // fmla za.s[x8, 0], { z12.s-z15.s }, z7.s\n"
+ "ld1w { z25.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xc1391ac1 // fmla za.s[x8, 1], { z22.s-z25.s }, z9.s\n"
+ ".inst 0xa14149c2 // ld1w { z2.s, z10.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc13a1ac0 // fmla za.s[x8, 0], { z22.s-z25.s }, z10.s\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xc13519a1 // fmla za.s[x8, 1], { z13.s-z16.s }, z5.s\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc13719a0 // fmla za.s[x8, 0], { z13.s-z16.s }, z7.s\n"
+ "ldr x14, [%x[args], %[offsetof_Args_weights]]\n"
+ "ld1w { z11.s }, p1/Z, [x13]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "ld1w { z21.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z12.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z22.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z13.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z23.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z14.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z24.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z15.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "ld1w { z8.s }, p2/Z, [x14, #4, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ "ld1w { z25.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa14149c2 // ld1w { z2.s, z10.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "ld1w { z3.s }, p2/Z, [x14, #4, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "bgt 11b\n"
+ "b 19f\n"
+ "12:" // Padded
+ "cbz x21, 17f\n"
+ "cmp x21, #0x1\n"
+ "sub x15, x15, x21\n"
+ "beq 16f\n"
+ "cmp x21, #0x2\n"
+ "beq 15f\n"
+ "cmp x21, #0x3\n"
+ "beq 14f\n"
+ "13:" // Padded: 4 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z11.s }, p0/Z, [x13]\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z21.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z12.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z22.s }, p0/Z, [x19]\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z13.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z23.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z14.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x8\n"
+ ".inst 0xc1341960 // fmla za.s[x8, 0], { z11.s-z14.s }, z4.s\n"
+ "ld1w { z24.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1311aa0 // fmla za.s[x8, 0], { z21.s-z24.s }, z1.s\n"
+ "ld1w { z15.s }, p0/Z, [x19]\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ ".inst 0xc1341980 // fmla za.s[x8, 0], { z12.s-z15.s }, z4.s\n"
+ "addvl x14, x14, #5\n"
+ "ld1w { z25.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1311ac0 // fmla za.s[x8, 0], { z22.s-z25.s }, z1.s\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "ldr x14, [%x[args], %[offsetof_Args_weights]]\n"
+ ".inst 0xc13419a0 // fmla za.s[x8, 0], { z13.s-z16.s }, z4.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ "14:" // Padded: 3 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z11.s }, p0/Z, [x13]\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z21.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z12.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z22.s }, p0/Z, [x19]\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z13.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z23.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z14.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x8\n"
+ ".inst 0xc1351960 // fmla za.s[x8, 0], { z11.s-z14.s }, z5.s\n"
+ "ld1w { z24.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1391aa0 // fmla za.s[x8, 0], { z21.s-z24.s }, z9.s\n"
+ "ld1w { z15.s }, p0/Z, [x19]\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ ".inst 0xc1351980 // fmla za.s[x8, 0], { z12.s-z15.s }, z5.s\n"
+ "addvl x14, x14, #5\n"
+ "ld1w { z25.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1391ac0 // fmla za.s[x8, 0], { z22.s-z25.s }, z9.s\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "ldr x14, [%x[args], %[offsetof_Args_weights]]\n"
+ ".inst 0xc13519a0 // fmla za.s[x8, 0], { z13.s-z16.s }, z5.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa14149c2 // ld1w { z2.s, z10.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ "15:" // Padded: 2 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z11.s }, p0/Z, [x13]\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z21.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z12.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z22.s }, p0/Z, [x19]\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z13.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z23.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z14.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x8\n"
+ ".inst 0xc1361960 // fmla za.s[x8, 0], { z11.s-z14.s }, z6.s\n"
+ "ld1w { z24.s }, p0/Z, [x19]\n"
+ ".inst 0xc1341961 // fmla za.s[x8, 1], { z11.s-z14.s }, z4.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z15.s }, p0/Z, [x19]\n"
+ ".inst 0xc1321aa0 // fmla za.s[x8, 0], { z21.s-z24.s }, z2.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ ".inst 0xc1311aa1 // fmla za.s[x8, 1], { z21.s-z24.s }, z1.s\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ ".inst 0xc1361980 // fmla za.s[x8, 0], { z12.s-z15.s }, z6.s\n"
+ "ld1w { z25.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc1341981 // fmla za.s[x8, 1], { z12.s-z15.s }, z4.s\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa14149c2 // ld1w { z2.s, z10.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1321ac0 // fmla za.s[x8, 0], { z22.s-z25.s }, z2.s\n"
+ ".inst 0xc1311ac1 // fmla za.s[x8, 1], { z22.s-z25.s }, z1.s\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xc13419a1 // fmla za.s[x8, 1], { z13.s-z16.s }, z4.s\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "ldr x14, [%x[args], %[offsetof_Args_weights]]\n"
+ ".inst 0xc13619a0 // fmla za.s[x8, 0], { z13.s-z16.s }, z6.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa14149c2 // ld1w { z2.s, z10.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ "16:" // Padded: 1 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z11.s }, p0/Z, [x13]\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z21.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z12.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z22.s }, p0/Z, [x19]\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z13.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z23.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z14.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x8\n"
+ ".inst 0xc1371960 // fmla za.s[x8, 0], { z11.s-z14.s }, z7.s\n"
+ "ld1w { z24.s }, p0/Z, [x19]\n"
+ ".inst 0xc1351961 // fmla za.s[x8, 1], { z11.s-z14.s }, z5.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z15.s }, p0/Z, [x19]\n"
+ ".inst 0xc13a1aa0 // fmla za.s[x8, 0], { z21.s-z24.s }, z10.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ ".inst 0xc1391aa1 // fmla za.s[x8, 1], { z21.s-z24.s }, z9.s\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ ".inst 0xc1371980 // fmla za.s[x8, 0], { z12.s-z15.s }, z7.s\n"
+ "ld1w { z25.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc1351981 // fmla za.s[x8, 1], { z12.s-z15.s }, z5.s\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa14149c2 // ld1w { z2.s, z10.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc13a1ac0 // fmla za.s[x8, 0], { z22.s-z25.s }, z10.s\n"
+ ".inst 0xc1391ac1 // fmla za.s[x8, 1], { z22.s-z25.s }, z9.s\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xc13519a1 // fmla za.s[x8, 1], { z13.s-z16.s }, z5.s\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "ldr x14, [%x[args], %[offsetof_Args_weights]]\n"
+ ".inst 0xc13719a0 // fmla za.s[x8, 0], { z13.s-z16.s }, z7.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "ld1w { z8.s }, p2/Z, [x14, #4, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa14149c2 // ld1w { z2.s, z10.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "ld1w { z3.s }, p2/Z, [x14, #4, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ "17:" // Padded: 0 priming loads
+ "cmp x15, #0x2\n"
+ "blt 20f\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z11.s }, p0/Z, [x13]\n"
+ "add x20, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z21.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z12.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z22.s }, p0/Z, [x20]\n"
+ "mov x12, #0x4\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z13.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z23.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z14.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x8\n"
+ "ld1w { z24.s }, p0/Z, [x20]\n"
+ "sub x15, x15, #0x2\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "sub x11, x11, #0x1\n"
+ "ld1w { z15.s }, p0/Z, [x20]\n"
+ "lsr x19, x15, #0x1\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "cmp x19, x11\n"
+ "ld1w { z25.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ "csel x21, x19, x11, LT\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "and x15, x15, #0x1\n"
+ "sub x11, x11, x21\n"
+ "cbz x21, 19f\n"
+ "18:" // Padded: Main loop
+ ".inst 0xc1381960 // fmla za.s[x8, 0], { z11.s-z14.s }, z8.s\n"
+ "ld1w { z8.s }, p2/Z, [x14, #4, MUL VL]\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1361961 // fmla za.s[x8, 1], { z11.s-z14.s }, z6.s\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "add x20, x13, %x[ld_in_row], LSL #2\n"
+ "subs x21, x21, #0x1\n"
+ ".inst 0xc1341962 // fmla za.s[x8, 2], { z11.s-z14.s }, z4.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1331aa0 // fmla za.s[x8, 0], { z21.s-z24.s }, z3.s\n"
+ "ld1w { z3.s }, p2/Z, [x14, #4, MUL VL]\n"
+ ".inst 0xc1321aa1 // fmla za.s[x8, 1], { z21.s-z24.s }, z2.s\n"
+ ".inst 0xa14149c2 // ld1w { z2.s, z10.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc1311aa2 // fmla za.s[x8, 2], { z21.s-z24.s }, z1.s\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1381980 // fmla za.s[x8, 0], { z12.s-z15.s }, z8.s\n"
+ "ld1w { z11.s }, p0/Z, [x13]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ ".inst 0xc1361981 // fmla za.s[x8, 1], { z12.s-z15.s }, z6.s\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1341982 // fmla za.s[x8, 2], { z12.s-z15.s }, z4.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xc1331ac0 // fmla za.s[x8, 0], { z22.s-z25.s }, z3.s\n"
+ "ld1w { z8.s }, p2/Z, [x14, #4, MUL VL]\n"
+ "ldr x14, [%x[args], %[offsetof_Args_weights]]\n"
+ ".inst 0xc1321ac1 // fmla za.s[x8, 1], { z22.s-z25.s }, z2.s\n"
+ "ld1w { z21.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc1311ac2 // fmla za.s[x8, 2], { z22.s-z25.s }, z1.s\n"
+ "ld1w { z12.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x4\n"
+ "ld1w { z22.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc13819a0 // fmla za.s[x8, 0], { z13.s-z16.s }, z8.s\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc13619a1 // fmla za.s[x8, 1], { z13.s-z16.s }, z6.s\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc13419a2 // fmla za.s[x8, 2], { z13.s-z16.s }, z4.s\n"
+ "ld1w { z13.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z23.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc0060c18 // mova { z24.d-z27.d }, za.d[x8, #0]\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "add x8, x8, #0x1\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1b1c818 // fclamp { z24.s-z27.s }, z0.s, z17.s\n"
+ "ld1w { z14.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "st1w { z24.s }, p1, [x9]\n"
+ "mov x12, #0x8\n"
+ ".inst 0xc1371960 // fmla za.s[x8, 0], { z11.s-z14.s }, z7.s\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ "add x9, x9, x27, LSL #2\n"
+ ".inst 0xc1351961 // fmla za.s[x8, 1], { z11.s-z14.s }, z5.s\n"
+ ".inst 0xa14149c2 // ld1w { z2.s, z10.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ "st1w { z25.s }, p1, [x28]\n"
+ "ld1w { z24.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc13a1aa0 // fmla za.s[x8, 0], { z21.s-z24.s }, z10.s\n"
+ ".inst 0xc1391aa1 // fmla za.s[x8, 1], { z21.s-z24.s }, z9.s\n"
+ "ld1w { z15.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xc1351981 // fmla za.s[x8, 1], { z12.s-z15.s }, z5.s\n"
+ "add x28, x28, x26, LSL #2\n"
+ "st1w { z26.s }, p1, [x25]\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1371980 // fmla za.s[x8, 0], { z12.s-z15.s }, z7.s\n"
+ "add x25, x25, x23, LSL #2\n"
+ "ld1w { z25.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "st1w { z27.s }, p1, [x24]\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ "mov x12, #0x0\n"
+ ".inst 0xc1391ac1 // fmla za.s[x8, 1], { z22.s-z25.s }, z9.s\n"
+ "add x24, x24, x22, LSL #2\n"
+ ".inst 0xa14149c2 // ld1w { z2.s, z10.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc13a1ac0 // fmla za.s[x8, 0], { z22.s-z25.s }, z10.s\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ "ld1w { z11.s }, p0/Z, [x13]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xc13519a1 // fmla za.s[x8, 1], { z13.s-z16.s }, z5.s\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc13719a0 // fmla za.s[x8, 0], { z13.s-z16.s }, z7.s\n"
+ "ldr x14, [%x[args], %[offsetof_Args_weights]]\n"
+ "ld1w { z21.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z12.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x4\n"
+ "ld1w { z22.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z13.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z23.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z14.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x8\n"
+ "ld1w { z24.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z15.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "ld1w { z8.s }, p2/Z, [x14, #4, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ "ld1w { z25.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa14149c2 // ld1w { z2.s, z10.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "ld1w { z3.s }, p2/Z, [x14, #4, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "bgt 18b\n"
+ "19:" // Main loop tail
+ ".inst 0xc1381960 // fmla za.s[x8, 0], { z11.s-z14.s }, z8.s\n"
+ "ld1w { z8.s }, p2/Z, [x14, #4, MUL VL]\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1361961 // fmla za.s[x8, 1], { z11.s-z14.s }, z6.s\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1341962 // fmla za.s[x8, 2], { z11.s-z14.s }, z4.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1331aa0 // fmla za.s[x8, 0], { z21.s-z24.s }, z3.s\n"
+ "ld1w { z3.s }, p2/Z, [x14, #4, MUL VL]\n"
+ ".inst 0xc1321aa1 // fmla za.s[x8, 1], { z21.s-z24.s }, z2.s\n"
+ ".inst 0xa14149c2 // ld1w { z2.s, z10.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc1311aa2 // fmla za.s[x8, 2], { z21.s-z24.s }, z1.s\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1381980 // fmla za.s[x8, 0], { z12.s-z15.s }, z8.s\n"
+ "ld1w { z11.s }, p0/Z, [x13]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ ".inst 0xc1361981 // fmla za.s[x8, 1], { z12.s-z15.s }, z6.s\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc1341982 // fmla za.s[x8, 2], { z12.s-z15.s }, z4.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xc1331ac0 // fmla za.s[x8, 0], { z22.s-z25.s }, z3.s\n"
+ "ld1w { z8.s }, p2/Z, [x14, #4, MUL VL]\n"
+ "ldr x14, [%x[args], %[offsetof_Args_weights]]\n"
+ ".inst 0xc1321ac1 // fmla za.s[x8, 1], { z22.s-z25.s }, z2.s\n"
+ "ld1w { z21.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc1311ac2 // fmla za.s[x8, 2], { z22.s-z25.s }, z1.s\n"
+ "ld1w { z12.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x4\n"
+ "ld1w { z22.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc13819a0 // fmla za.s[x8, 0], { z13.s-z16.s }, z8.s\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc13619a1 // fmla za.s[x8, 1], { z13.s-z16.s }, z6.s\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc13419a2 // fmla za.s[x8, 2], { z13.s-z16.s }, z4.s\n"
+ "ld1w { z13.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z23.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc0060c18 // mova { z24.d-z27.d }, za.d[x8, #0]\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "add x8, x8, #0x1\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1b1c818 // fclamp { z24.s-z27.s }, z0.s, z17.s\n"
+ "ld1w { z14.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "st1w { z24.s }, p1, [x9]\n"
+ "mov x12, #0x8\n"
+ ".inst 0xc1371960 // fmla za.s[x8, 0], { z11.s-z14.s }, z7.s\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ "add x9, x9, x27, LSL #2\n"
+ ".inst 0xc1351961 // fmla za.s[x8, 1], { z11.s-z14.s }, z5.s\n"
+ ".inst 0xa14149c2 // ld1w { z2.s, z10.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ "st1w { z25.s }, p1, [x28]\n"
+ "ld1w { z24.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc13a1aa0 // fmla za.s[x8, 0], { z21.s-z24.s }, z10.s\n"
+ ".inst 0xc1391aa1 // fmla za.s[x8, 1], { z21.s-z24.s }, z9.s\n"
+ "ld1w { z15.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xc1351981 // fmla za.s[x8, 1], { z12.s-z15.s }, z5.s\n"
+ "add x28, x28, x26, LSL #2\n"
+ "st1w { z26.s }, p1, [x25]\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1371980 // fmla za.s[x8, 0], { z12.s-z15.s }, z7.s\n"
+ "add x25, x25, x23, LSL #2\n"
+ "ld1w { z25.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "st1w { z27.s }, p1, [x24]\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xc1391ac1 // fmla za.s[x8, 1], { z22.s-z25.s }, z9.s\n"
+ "add x24, x24, x22, LSL #2\n"
+ ".inst 0xa14149c2 // ld1w { z2.s, z10.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc13a1ac0 // fmla za.s[x8, 0], { z22.s-z25.s }, z10.s\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xc13519a1 // fmla za.s[x8, 1], { z13.s-z16.s }, z5.s\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "ldr x14, [%x[args], %[offsetof_Args_weights]]\n"
+ ".inst 0xc13719a0 // fmla za.s[x8, 0], { z13.s-z16.s }, z7.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "ld1w { z8.s }, p2/Z, [x14, #4, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xa14149c2 // ld1w { z2.s, z10.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "ld1w { z3.s }, p2/Z, [x14, #4, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ "20:" // Main loop skip tail
+ "cbz x15, 21f\n" // Skip remainder inputs
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z11.s }, p0/Z, [x13]\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z21.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z12.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z22.s }, p0/Z, [x19]\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z13.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z23.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z14.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x8\n"
+ ".inst 0xc1381960 // fmla za.s[x8, 0], { z11.s-z14.s }, z8.s\n"
+ "ld1w { z24.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1331aa0 // fmla za.s[x8, 0], { z21.s-z24.s }, z3.s\n"
+ "ld1w { z15.s }, p0/Z, [x19]\n"
+ "ld1w { z8.s }, p2/Z, [x14, #4, MUL VL]\n"
+ ".inst 0xc1361961 // fmla za.s[x8, 1], { z11.s-z14.s }, z6.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ ".inst 0xc1341962 // fmla za.s[x8, 2], { z11.s-z14.s }, z4.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ "sub x11, x11, #0x1\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1381980 // fmla za.s[x8, 0], { z12.s-z15.s }, z8.s\n"
+ "ld1w { z25.s }, p0/Z, [x19]\n"
+ ".inst 0xc1321aa1 // fmla za.s[x8, 1], { z21.s-z24.s }, z2.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z3.s }, p2/Z, [x14, #4, MUL VL]\n"
+ ".inst 0xc1311aa2 // fmla za.s[x8, 2], { z21.s-z24.s }, z1.s\n"
+ ".inst 0xa14049c1 // ld1w { z1.s, z9.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xc1331ac0 // fmla za.s[x8, 0], { z22.s-z25.s }, z3.s\n"
+ ".inst 0xa14149c2 // ld1w { z2.s, z10.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ "addvl x14, x14, #5\n"
+ ".inst 0xc1361981 // fmla za.s[x8, 1], { z12.s-z15.s }, z6.s\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0xc1341982 // fmla za.s[x8, 2], { z12.s-z15.s }, z4.s\n"
+ "ld1w { z8.s }, p2/Z, [x14, #4, MUL VL]\n"
+ ".inst 0xc13819a0 // fmla za.s[x8, 0], { z13.s-z16.s }, z8.s\n"
+ ".inst 0xc1321ac1 // fmla za.s[x8, 1], { z22.s-z25.s }, z2.s\n"
+ ".inst 0xa04049c4 // ld1w { z4.s-z5.s }, pn10.b/Z, [x14]\n"
+ ".inst 0xc1311ac2 // fmla za.s[x8, 2], { z22.s-z25.s }, z1.s\n"
+ ".inst 0xa04149c6 // ld1w { z6.s-z7.s }, pn10.b/Z, [x14, #0x2, MUL VL]\n"
+ ".inst 0xc0060c18 // mova { z24.d-z27.d }, za.d[x8, #0]\n"
+ ".inst 0xc1b1c818 // fclamp { z24.s-z27.s }, z0.s, z17.s\n"
+ "st1w { z24.s }, p1, [x9]\n"
+ "add x9, x9, x27, LSL #2\n"
+ ".inst 0xc13619a1 // fmla za.s[x8, 1], { z13.s-z16.s }, z6.s\n"
+ "st1w { z25.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ ".inst 0xc13419a2 // fmla za.s[x8, 2], { z13.s-z16.s }, z4.s\n"
+ "add x8, x8, #0x1\n"
+ "st1w { z26.s }, p1, [x25]\n"
+ "add x25, x25, x23, LSL #2\n"
+ "st1w { z27.s }, p1, [x24]\n"
+ "add x24, x24, x22, LSL #2\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ "21:" // Tail input: End
+ "cbz x11, 23f\n"
+ "22:" // Right padding loop
+ ".inst 0xc0060c18 // mova { z24.d-z27.d }, za.d[x8, #0]\n"
+ "add x8, x8, #0x1\n"
+ "subs x11, x11, #0x1\n"
+ ".inst 0xc1b1c818 // fclamp { z24.s-z27.s }, z0.s, z17.s\n"
+ "st1w { z24.s }, p1, [x9]\n"
+ "add x9, x9, x27, LSL #2\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ "st1w { z25.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ "st1w { z26.s }, p1, [x25]\n"
+ "add x25, x25, x23, LSL #2\n"
+ "st1w { z27.s }, p1, [x24]\n"
+ "add x24, x24, x22, LSL #2\n"
+ "bgt 22b\n"
+ "23:" // End
+ "ldr x14, [%x[args], %[offsetof_Args_weights]]\n"
+ "incb x14, ALL, MUL #16\n"
+ "incb x14, ALL, MUL #9\n"
+ "str x14, [%x[args], %[offsetof_Args_weights]]\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_in_vl]]\n"
+ "incw x16\n"
+ "whilelt p1.s, x16, x17\n"
+ "ldr x13, [%x[args], %[offsetof_Args_inptr]]\n"
+ "add x13, x13, x19, LSL #2\n"
+ "str x13, [%x[args], %[offsetof_Args_inptr]]\n"
+ "ldr x10, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "ldr x23, [%x[args], %[offsetof_Args_ld_out_vls]]\n"
+ "ldp x22, x21, [x10, #0x0]\n"
+ "ldp x20, x19, [x23, #0x0]\n"
+ "add x22, x22, x20, LSL #2\n"
+ "add x21, x21, x19, LSL #2\n"
+ "stp x22, x21, [x10, #0x0]\n"
+ "ldp x22, x21, [x10, #0x10]\n"
+ "ldp x20, x19, [x23, #0x10]\n"
+ "add x22, x22, x20, LSL #2\n"
+ "add x21, x21, x19, LSL #2\n"
+ "stp x22, x21, [x10, #0x10]\n"
+ "b.any 1b\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [ld_in_col] "r" (ld_in_col), [ld_in_row] "r" (ld_in_row), [offsetof_Args_bias] "I" (offsetof(Args, bias)), [offsetof_Args_clamp_max] "I" (offsetof(Args, clamp_max)), [offsetof_Args_clamp_min] "I" (offsetof(Args, clamp_min)), [offsetof_Args_current_channel] "I" (offsetof(Args, current_channel)), [offsetof_Args_inptr] "I" (offsetof(Args, inptr)), [offsetof_Args_input_cols] "I" (offsetof(Args, input_cols)), [offsetof_Args_ld_in_vl] "I" (offsetof(Args, ld_in_vl)), [offsetof_Args_ld_out_cols] "I" (offsetof(Args, ld_out_cols)), [offsetof_Args_ld_out_vls] "I" (offsetof(Args, ld_out_vls)), [offsetof_Args_n_channels] "I" (offsetof(Args, n_channels)), [offsetof_Args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_Args_output_cols] "I" (offsetof(Args, output_cols)), [offsetof_Args_pad_bottom] "I" (offsetof(Args, pad_bottom)), [offsetof_Args_pad_left] "I" (offsetof(Args, pad_left)), [offsetof_Args_pad_top] "I" (offsetof(Args, pad_top)), [offsetof_Args_weights] "I" (offsetof(Args, weights))
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32bf16fp32_planar_3x3_s1_4rows_dot_za.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32bf16fp32_planar_3x3_s1_4rows_dot_za.hpp
new file mode 100644
index 0000000..f09c616
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32bf16fp32_planar_3x3_s1_4rows_dot_za.hpp
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_fp32bf16fp32_planar_3x3_s1_4rows_dot_za_impl(
+ const float *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const float *weights,
+ const float *bias,
+ float **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ float act_min,
+ float act_max
+);
+
+class sme2_fp32bf16fp32_planar_3x3_s1_4rows_dot_za : public PlanarStrategy<float, float>
+{
+ using Parent = PlanarStrategy<float, float>;
+
+ public:
+ using return_type = float;
+ constexpr static auto output_rows = 4u;
+ constexpr static auto kernel_rows = 3u, kernel_cols = 3u;
+ constexpr static auto stride_rows = 1u, stride_cols = 1u;
+ constexpr static auto vl_type = arm_gemm::VLType::SME;
+
+ sme2_fp32bf16fp32_planar_3x3_s1_4rows_dot_za(const CPUInfo *)
+ : Parent(kernel_rows, kernel_cols, stride_rows, stride_cols, output_rows, vl_type)
+ {
+ }
+
+ typename Parent::KernelType get_kernel(void) const override
+ {
+ return sme2_fp32bf16fp32_planar_3x3_s1_4rows_dot_za_impl;
+ }
+};
+
+} // namespace depthwise
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32bf16fp32_planar_3x3_s1_4rows_dot_za/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32bf16fp32_planar_3x3_s1_4rows_dot_za/generic.cpp
new file mode 100644
index 0000000..e6c0cb7
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32bf16fp32_planar_3x3_s1_4rows_dot_za/generic.cpp
@@ -0,0 +1,560 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <algorithm>
+#include <cstddef>
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_fp32bf16fp32_planar_3x3_s1_4rows_dot_za_impl(
+ const float *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const float *weights,
+ const float *bias,
+ float **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ float act_min,
+ float act_max
+)
+{
+ struct Args
+ {
+ const float *inptr;
+ size_t ld_in_vl;
+ long unsigned int pad_top, pad_bottom, pad_left;
+ const float *weights;
+ const float *bias;
+ long unsigned int input_cols, output_cols;
+ float **outptrs;
+ const size_t *ld_out_cols;
+ const size_t *ld_out_vls;
+ long unsigned int current_channel, n_channels;
+ float clamp_min, clamp_max;
+ };
+
+ Args args = { inptr, ld_in_vl, pad_top, 6u - std::min(6u, pad_top + valid_input_rows), pad_left, weights, bias, valid_input_cols, output_cols, outptrs, outlds, outvllds, start_channel, valid_channels, act_min, act_max };
+
+ __asm__ __volatile__(
+ "ldr x7, [%x[args], %[offsetof_Args_pad_bottom]]\n"
+ "mov x19, #0x6\n"
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "sub x19, x19, x7\n"
+ "ldr x17, [%x[args], %[offsetof_Args_pad_top]]\n"
+ "ptrue p2.b\n"
+ "ld1rw { z28.s }, p2/Z, [%x[args], %[offsetof_Args_clamp_min]]\n"
+ "ldr x16, [%x[args], %[offsetof_Args_n_channels]]\n"
+ "whilelt p1.s, XZR, x16\n"
+ "whilelt p9.s, XZR, x19\n"
+ "ld1rw { z29.s }, p2/Z, [%x[args], %[offsetof_Args_clamp_max]]\n"
+ "whilelt p8.s, XZR, x17\n"
+ "eor p8.b, p2/Z, p8.b, p9.b\n"
+ "ldr x15, [%x[args], %[offsetof_Args_current_channel]]\n"
+ "1:" // Channel loop
+ "ldr x19, [%x[args], %[offsetof_Args_bias]]\n"
+ "fmov z22.s, #0x0\n"
+ "cbz x19, 2f\n"
+ "ld1w { z22.s }, p1/Z, [x19, x15, LSL #2]\n"
+ "2:" // Load bias: Done
+ "ldr x19, [%x[args], %[offsetof_Args_weights]]\n"
+ "mov x20, x19\n"
+ "fmov z9.s, #0x0\n"
+ "ld1w { z25.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #3\n"
+ "incb x19\n"
+ "ld1w { z27.s }, p2/Z, [x20]\n"
+ ".inst 0x648aab29 // bfcvtnt z9.h, p2/M, z25.s\n"
+ "incb x20, ALL, MUL #3\n"
+ "ld1w { z21.s }, p2/Z, [x20]\n"
+ "mov x20, x19\n"
+ ".inst 0x658aab28 // bfcvt z8.h, p2/M, z25.s\n"
+ "ld1w { z25.s }, p2/Z, [x20]\n"
+ ".inst 0x658aab66 // bfcvt z6.h, p2/M, z27.s\n"
+ "fmov z2.s, #0x0\n"
+ "incb x20, ALL, MUL #3\n"
+ ".inst 0x658aab21 // bfcvt z1.h, p2/M, z25.s\n"
+ ".inst 0x648aab68 // bfcvtnt z8.h, p2/M, z27.s\n"
+ "incb x19\n"
+ "ld1w { z27.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #3\n"
+ ".inst 0x648aaaa6 // bfcvtnt z6.h, p2/M, z21.s\n"
+ ".inst 0x658aaaa5 // bfcvt z5.h, p2/M, z21.s\n"
+ "ld1w { z21.s }, p2/Z, [x20]\n"
+ "mov x20, x19\n"
+ ".inst 0x648aab22 // bfcvtnt z2.h, p2/M, z25.s\n"
+ "ld1w { z25.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #3\n"
+ ".inst 0x648aab61 // bfcvtnt z1.h, p2/M, z27.s\n"
+ ".inst 0x658aab6c // bfcvt z12.h, p2/M, z27.s\n"
+ "ld1w { z27.s }, p2/Z, [x20]\n"
+ "ldr x14, [%x[args], %[offsetof_Args_input_cols]]\n"
+ "incb x20, ALL, MUL #3\n"
+ "fmov z7.s, #0x0\n"
+ ".inst 0x658aab24 // bfcvt z4.h, p2/M, z25.s\n"
+ "ldr x13, [%x[args], %[offsetof_Args_inptr]]\n"
+ ".inst 0x658aab60 // bfcvt z0.h, p2/M, z27.s\n"
+ ".inst 0x648aaaac // bfcvtnt z12.h, p2/M, z21.s\n"
+ "sub x19, x14, #0x1\n"
+ "orr x22, x19, %x[ld_in_col], LSL #18\n"
+ ".inst 0x658aaaaa // bfcvt z10.h, p2/M, z21.s\n"
+ "ld1w { z21.s }, p2/Z, [x20]\n"
+ "orr x22, x16, x22, LSL #20\n"
+ "mov x21, #0x6\n"
+ "add x20, x17, x7\n"
+ "lsl x19, %x[ld_in_row], #0x2\n"
+ "mov z23.d, z22.d\n"
+ ".inst 0x648aab27 // bfcvtnt z7.h, p2/M, z25.s\n"
+ ".inst 0x648aab64 // bfcvtnt z4.h, p2/M, z27.s\n"
+ ".inst 0x648aaaa0 // bfcvtnt z0.h, p2/M, z21.s\n"
+ "mov x8, #0x0\n"
+ "ldr x11, [%x[args], %[offsetof_Args_output_cols]]\n"
+ ".inst 0x658aaaa3 // bfcvt z3.h, p2/M, z21.s\n"
+ "lsl x22, x22, #0x2\n"
+ "sub x21, x21, x20\n"
+ "madd x19, x19, x17, x13\n"
+ "3:" // Issue prefetches
+ "subs x21, x21, #0x1\n"
+ ".inst 0xf8b64a7c // rprfm pldstrm, x22, [x19]\n"
+ "add x19, x19, %x[ld_in_col], LSL #2\n"
+ "bgt 3b\n"
+ "ldr x10, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "lsl x19, %x[ld_in_row], #0x2\n"
+ "msub x13, x17, x19, x13\n"
+ ".inst 0xc0040ac0 // mova za.d[x8, #0], { z22.d-z23.d }\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_out_cols]]\n"
+ ".inst 0xc0040ac1 // mova za.d[x8, #1], { z22.d-z23.d }\n"
+ "mov x9, #0x2\n"
+ "ldp x28, x27, [x10], #0x10\n"
+ ".inst 0xc0040ac2 // mova za.d[x8, #2], { z22.d-z23.d }\n"
+ "ldp x26, x25, [x19], #0x10\n"
+ ".inst 0xc0040ac3 // mova za.d[x8, #3], { z22.d-z23.d }\n"
+ "ldr x20, [%x[args], %[offsetof_Args_pad_left]]\n"
+ ".inst 0xc0040ac4 // mova za.d[x8, #4], { z22.d-z23.d }\n"
+ "ldp x24, x23, [x10], #0x10\n"
+ ".inst 0xc0040ac5 // mova za.d[x8, #5], { z22.d-z23.d }\n"
+ "ldp x22, x21, [x19], #0x10\n"
+ "cbz x20, 5f\n"
+ "cmp x20, x9\n"
+ "csel x19, x20, x9, LT\n"
+ "sub x20, x20, x19\n"
+ "sub x9, x9, x19\n"
+ "cbz x20, 5f\n"
+ ".inst 0xc0060818 // mova { z24.d-z25.d }, za.d[x8, #0]\n"
+ "sub x11, x11, x20\n"
+ ".inst 0xc006083a // mova { z26.d-z27.d }, za.d[x8, #1]\n"
+ ".inst 0xc1bdcb98 // fclamp { z24.s-z27.s }, z28.s, z29.s\n"
+ "4:" // Left padding
+ "subs x20, x20, #0x1\n"
+ "st1w { z24.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ "st1w { z26.s }, p1, [x27]\n"
+ "add x27, x27, x25, LSL #2\n"
+ "st1w { z25.s }, p1, [x24]\n"
+ "add x24, x24, x22, LSL #2\n"
+ "st1w { z27.s }, p1, [x23]\n"
+ "add x23, x23, x21, LSL #2\n"
+ "bgt 4b\n"
+ "5:" // Left padding: End
+ "adds XZR, x17, x7\n"
+ "bne 10f\n"
+ "cbz x9, 8f\n"
+ "cmp x9, #0x1\n"
+ "sub x14, x14, x9\n"
+ "beq 7f\n"
+ "6:" // Unpadded: 2 priming loads
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x13]\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ ".inst 0xc12811b0 // bfdot za.s[x8, 0], { z13.h-z14.h }, z8.h\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ ".inst 0xc12911b1 // bfdot za.s[x8, 1], { z13.h-z14.h }, z9.h\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ ".inst 0x648aaa0f // bfcvtnt z15.h, p2/M, z16.s\n"
+ ".inst 0xc12511d0 // bfdot za.s[x8, 0], { z14.h-z15.h }, z5.h\n"
+ ".inst 0xc12611d1 // bfdot za.s[x8, 1], { z14.h-z15.h }, z6.h\n"
+ "7:" // Unpadded: 1 priming loads
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x13]\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ ".inst 0xc12111b0 // bfdot za.s[x8, 0], { z13.h-z14.h }, z1.h\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ ".inst 0xc12211b1 // bfdot za.s[x8, 1], { z13.h-z14.h }, z2.h\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ ".inst 0x648aaa0f // bfcvtnt z15.h, p2/M, z16.s\n"
+ ".inst 0xc12811b2 // bfdot za.s[x8, 2], { z13.h-z14.h }, z8.h\n"
+ ".inst 0xc12911b3 // bfdot za.s[x8, 3], { z13.h-z14.h }, z9.h\n"
+ ".inst 0xc12a11d0 // bfdot za.s[x8, 0], { z14.h-z15.h }, z10.h\n"
+ ".inst 0xc12c11d1 // bfdot za.s[x8, 1], { z14.h-z15.h }, z12.h\n"
+ ".inst 0xc12511d2 // bfdot za.s[x8, 2], { z14.h-z15.h }, z5.h\n"
+ ".inst 0xc12611d3 // bfdot za.s[x8, 3], { z14.h-z15.h }, z6.h\n"
+ "8:" // Unpadded: 0 priming loads
+ "cbz x14, 16f\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x13]\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ "sub x14, x14, #0x1\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "sub x11, x11, #0x1\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ "cmp x14, x11\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "csel x20, x14, x11, LT\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ ".inst 0x648aaa0f // bfcvtnt z15.h, p2/M, z16.s\n"
+ "sub x11, x11, x20\n"
+ "cbz x20, 15f\n"
+ "9:" // Unpadded: Main loop
+ ".inst 0xc12411b0 // bfdot za.s[x8, 0], { z13.h-z14.h }, z4.h\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ "ld1w { z21.s }, p1/Z, [x13]\n"
+ "subs x20, x20, #0x1\n"
+ ".inst 0xc12711b1 // bfdot za.s[x8, 1], { z13.h-z14.h }, z7.h\n"
+ "ld1w { z20.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "ld1w { z19.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc12311d0 // bfdot za.s[x8, 0], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xc12011d1 // bfdot za.s[x8, 1], { z14.h-z15.h }, z0.h\n"
+ "ld1w { z18.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc12111b2 // bfdot za.s[x8, 2], { z13.h-z14.h }, z1.h\n"
+ "ld1w { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc12211b3 // bfdot za.s[x8, 3], { z13.h-z14.h }, z2.h\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ ".inst 0xc12811b4 // bfdot za.s[x8, 4], { z13.h-z14.h }, z8.h\n"
+ ".inst 0xc12911b5 // bfdot za.s[x8, 5], { z13.h-z14.h }, z9.h\n"
+ ".inst 0x658aaaad // bfcvt z13.h, p2/M, z21.s\n"
+ ".inst 0x648aaa8d // bfcvtnt z13.h, p2/M, z20.s\n"
+ ".inst 0xc12a11d2 // bfdot za.s[x8, 2], { z14.h-z15.h }, z10.h\n"
+ ".inst 0xc12c11d3 // bfdot za.s[x8, 3], { z14.h-z15.h }, z12.h\n"
+ ".inst 0xc12511d4 // bfdot za.s[x8, 4], { z14.h-z15.h }, z5.h\n"
+ ".inst 0xc12611d5 // bfdot za.s[x8, 5], { z14.h-z15.h }, z6.h\n"
+ ".inst 0x658aaa6e // bfcvt z14.h, p2/M, z19.s\n"
+ ".inst 0x658aaa2f // bfcvt z15.h, p2/M, z17.s\n"
+ ".inst 0xc0060818 // mova { z24.d-z25.d }, za.d[x8, #0]\n"
+ ".inst 0x648aaa4e // bfcvtnt z14.h, p2/M, z18.s\n"
+ ".inst 0x648aaa0f // bfcvtnt z15.h, p2/M, z16.s\n"
+ ".inst 0xc006083a // mova { z26.d-z27.d }, za.d[x8, #1]\n"
+ "add x8, x8, #0x2\n"
+ ".inst 0xc1bdcb98 // fclamp { z24.s-z27.s }, z28.s, z29.s\n"
+ "st1w { z24.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ "st1w { z26.s }, p1, [x27]\n"
+ "add x27, x27, x25, LSL #2\n"
+ ".inst 0xc0040ac4 // mova za.d[x8, #4], { z22.d-z23.d }\n"
+ "st1w { z25.s }, p1, [x24]\n"
+ "add x24, x24, x22, LSL #2\n"
+ ".inst 0xc0040ac5 // mova za.d[x8, #5], { z22.d-z23.d }\n"
+ "st1w { z27.s }, p1, [x23]\n"
+ "add x23, x23, x21, LSL #2\n"
+ "bgt 9b\n"
+ "b 15f\n"
+ "10:" // Padded
+ "cbz x9, 13f\n"
+ "cmp x9, #0x1\n"
+ "sub x14, x14, x9\n"
+ "beq 12f\n"
+ "11:" // Padded: 2 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x13]\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc12811b0 // bfdot za.s[x8, 0], { z13.h-z14.h }, z8.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x648aaa0f // bfcvtnt z15.h, p2/M, z16.s\n"
+ ".inst 0xc12911b1 // bfdot za.s[x8, 1], { z13.h-z14.h }, z9.h\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ ".inst 0xc12511d0 // bfdot za.s[x8, 0], { z14.h-z15.h }, z5.h\n"
+ ".inst 0xc12611d1 // bfdot za.s[x8, 1], { z14.h-z15.h }, z6.h\n"
+ "12:" // Padded: 1 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x13]\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc12111b0 // bfdot za.s[x8, 0], { z13.h-z14.h }, z1.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x648aaa0f // bfcvtnt z15.h, p2/M, z16.s\n"
+ ".inst 0xc12211b1 // bfdot za.s[x8, 1], { z13.h-z14.h }, z2.h\n"
+ ".inst 0xc12811b2 // bfdot za.s[x8, 2], { z13.h-z14.h }, z8.h\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ ".inst 0xc12911b3 // bfdot za.s[x8, 3], { z13.h-z14.h }, z9.h\n"
+ ".inst 0xc12a11d0 // bfdot za.s[x8, 0], { z14.h-z15.h }, z10.h\n"
+ ".inst 0xc12c11d1 // bfdot za.s[x8, 1], { z14.h-z15.h }, z12.h\n"
+ ".inst 0xc12511d2 // bfdot za.s[x8, 2], { z14.h-z15.h }, z5.h\n"
+ ".inst 0xc12611d3 // bfdot za.s[x8, 3], { z14.h-z15.h }, z6.h\n"
+ "13:" // Padded: 0 priming loads
+ "cbz x14, 16f\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x13]\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "sub x14, x14, #0x1\n"
+ ".inst 0x648aaa0f // bfcvtnt z15.h, p2/M, z16.s\n"
+ "sub x11, x11, #0x1\n"
+ "cmp x14, x11\n"
+ "csel x20, x14, x11, LT\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "sub x11, x11, x20\n"
+ "cbz x20, 15f\n"
+ "14:" // Padded: Main loop
+ "mov x12, #0x0\n"
+ ".inst 0xc12411b0 // bfdot za.s[x8, 0], { z13.h-z14.h }, z4.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z21.s }, p0/Z, [x13]\n"
+ ".inst 0xc12711b1 // bfdot za.s[x8, 1], { z13.h-z14.h }, z7.h\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z20.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z19.s }, p0/Z, [x19]\n"
+ ".inst 0xc12311d0 // bfdot za.s[x8, 0], { z14.h-z15.h }, z3.h\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xc12011d1 // bfdot za.s[x8, 1], { z14.h-z15.h }, z0.h\n"
+ "ld1w { z18.s }, p0/Z, [x19]\n"
+ "mov x12, #0x4\n"
+ ".inst 0xc12111b2 // bfdot za.s[x8, 2], { z13.h-z14.h }, z1.h\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc12211b3 // bfdot za.s[x8, 3], { z13.h-z14.h }, z2.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z17.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc12811b4 // bfdot za.s[x8, 4], { z13.h-z14.h }, z8.h\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "subs x20, x20, #0x1\n"
+ ".inst 0xc12911b5 // bfdot za.s[x8, 5], { z13.h-z14.h }, z9.h\n"
+ ".inst 0x658aaaad // bfcvt z13.h, p2/M, z21.s\n"
+ ".inst 0x648aaa8d // bfcvtnt z13.h, p2/M, z20.s\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ ".inst 0xc12a11d2 // bfdot za.s[x8, 2], { z14.h-z15.h }, z10.h\n"
+ ".inst 0xc12c11d3 // bfdot za.s[x8, 3], { z14.h-z15.h }, z12.h\n"
+ ".inst 0xc12511d4 // bfdot za.s[x8, 4], { z14.h-z15.h }, z5.h\n"
+ ".inst 0xc12611d5 // bfdot za.s[x8, 5], { z14.h-z15.h }, z6.h\n"
+ ".inst 0x658aaa6e // bfcvt z14.h, p2/M, z19.s\n"
+ ".inst 0x658aaa2f // bfcvt z15.h, p2/M, z17.s\n"
+ ".inst 0xc0060818 // mova { z24.d-z25.d }, za.d[x8, #0]\n"
+ ".inst 0x648aaa4e // bfcvtnt z14.h, p2/M, z18.s\n"
+ ".inst 0x648aaa0f // bfcvtnt z15.h, p2/M, z16.s\n"
+ ".inst 0xc006083a // mova { z26.d-z27.d }, za.d[x8, #1]\n"
+ "add x8, x8, #0x2\n"
+ ".inst 0xc1bdcb98 // fclamp { z24.s-z27.s }, z28.s, z29.s\n"
+ "st1w { z24.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ "st1w { z26.s }, p1, [x27]\n"
+ "add x27, x27, x25, LSL #2\n"
+ ".inst 0xc0040ac4 // mova za.d[x8, #4], { z22.d-z23.d }\n"
+ "st1w { z25.s }, p1, [x24]\n"
+ "add x24, x24, x22, LSL #2\n"
+ ".inst 0xc0040ac5 // mova za.d[x8, #5], { z22.d-z23.d }\n"
+ "st1w { z27.s }, p1, [x23]\n"
+ "add x23, x23, x21, LSL #2\n"
+ "bgt 14b\n"
+ "15:" // Main loop tail
+ ".inst 0xc12411b0 // bfdot za.s[x8, 0], { z13.h-z14.h }, z4.h\n"
+ ".inst 0xc12711b1 // bfdot za.s[x8, 1], { z13.h-z14.h }, z7.h\n"
+ ".inst 0xc12311d0 // bfdot za.s[x8, 0], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xc12011d1 // bfdot za.s[x8, 1], { z14.h-z15.h }, z0.h\n"
+ ".inst 0xc12111b2 // bfdot za.s[x8, 2], { z13.h-z14.h }, z1.h\n"
+ ".inst 0xc12211b3 // bfdot za.s[x8, 3], { z13.h-z14.h }, z2.h\n"
+ ".inst 0xc12811b4 // bfdot za.s[x8, 4], { z13.h-z14.h }, z8.h\n"
+ ".inst 0xc12911b5 // bfdot za.s[x8, 5], { z13.h-z14.h }, z9.h\n"
+ ".inst 0xc0060818 // mova { z24.d-z25.d }, za.d[x8, #0]\n"
+ ".inst 0xc006083a // mova { z26.d-z27.d }, za.d[x8, #1]\n"
+ ".inst 0xc1bdcb98 // fclamp { z24.s-z27.s }, z28.s, z29.s\n"
+ "st1w { z24.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ ".inst 0xc12a11d2 // bfdot za.s[x8, 2], { z14.h-z15.h }, z10.h\n"
+ "st1w { z26.s }, p1, [x27]\n"
+ "add x27, x27, x25, LSL #2\n"
+ ".inst 0xc12c11d3 // bfdot za.s[x8, 3], { z14.h-z15.h }, z12.h\n"
+ "st1w { z25.s }, p1, [x24]\n"
+ "add x24, x24, x22, LSL #2\n"
+ ".inst 0xc12511d4 // bfdot za.s[x8, 4], { z14.h-z15.h }, z5.h\n"
+ "st1w { z27.s }, p1, [x23]\n"
+ "add x23, x23, x21, LSL #2\n"
+ ".inst 0xc12611d5 // bfdot za.s[x8, 5], { z14.h-z15.h }, z6.h\n"
+ "add x8, x8, #0x2\n"
+ ".inst 0xc0040ac4 // mova za.d[x8, #4], { z22.d-z23.d }\n"
+ ".inst 0xc0040ac5 // mova za.d[x8, #5], { z22.d-z23.d }\n"
+ "16:" // Main loop skip tail
+ "cbz x11, 18f\n"
+ "17:" // Right padding loop
+ ".inst 0xc0060818 // mova { z24.d-z25.d }, za.d[x8, #0]\n"
+ "subs x11, x11, #0x1\n"
+ ".inst 0xc006083a // mova { z26.d-z27.d }, za.d[x8, #1]\n"
+ "add x8, x8, #0x2\n"
+ ".inst 0xc1bdcb98 // fclamp { z24.s-z27.s }, z28.s, z29.s\n"
+ "st1w { z24.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ "st1w { z26.s }, p1, [x27]\n"
+ "add x27, x27, x25, LSL #2\n"
+ ".inst 0xc0040ac4 // mova za.d[x8, #4], { z22.d-z23.d }\n"
+ "st1w { z25.s }, p1, [x24]\n"
+ "add x24, x24, x22, LSL #2\n"
+ ".inst 0xc0040ac5 // mova za.d[x8, #5], { z22.d-z23.d }\n"
+ "st1w { z27.s }, p1, [x23]\n"
+ "add x23, x23, x21, LSL #2\n"
+ "bgt 17b\n"
+ "18:" // End
+ "ldr x19, [%x[args], %[offsetof_Args_weights]]\n"
+ "incb x19, ALL, MUL #9\n"
+ "str x19, [%x[args], %[offsetof_Args_weights]]\n"
+ "incw x15\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_in_vl]]\n"
+ "whilelt p1.s, x15, x16\n"
+ "ldr x13, [%x[args], %[offsetof_Args_inptr]]\n"
+ "add x13, x13, x19, LSL #2\n"
+ "str x13, [%x[args], %[offsetof_Args_inptr]]\n"
+ "ldr x10, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "ldr x23, [%x[args], %[offsetof_Args_ld_out_vls]]\n"
+ "ldp x22, x21, [x10, #0x0]\n"
+ "ldp x20, x19, [x23, #0x0]\n"
+ "add x22, x22, x20, LSL #2\n"
+ "add x21, x21, x19, LSL #2\n"
+ "stp x22, x21, [x10, #0x0]\n"
+ "ldp x22, x21, [x10, #0x10]\n"
+ "ldp x20, x19, [x23, #0x10]\n"
+ "add x22, x22, x20, LSL #2\n"
+ "add x21, x21, x19, LSL #2\n"
+ "stp x22, x21, [x10, #0x10]\n"
+ "b.any 1b\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [ld_in_col] "r" (ld_in_col), [ld_in_row] "r" (ld_in_row), [offsetof_Args_bias] "I" (offsetof(Args, bias)), [offsetof_Args_clamp_max] "I" (offsetof(Args, clamp_max)), [offsetof_Args_clamp_min] "I" (offsetof(Args, clamp_min)), [offsetof_Args_current_channel] "I" (offsetof(Args, current_channel)), [offsetof_Args_inptr] "I" (offsetof(Args, inptr)), [offsetof_Args_input_cols] "I" (offsetof(Args, input_cols)), [offsetof_Args_ld_in_vl] "I" (offsetof(Args, ld_in_vl)), [offsetof_Args_ld_out_cols] "I" (offsetof(Args, ld_out_cols)), [offsetof_Args_ld_out_vls] "I" (offsetof(Args, ld_out_vls)), [offsetof_Args_n_channels] "I" (offsetof(Args, n_channels)), [offsetof_Args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_Args_output_cols] "I" (offsetof(Args, output_cols)), [offsetof_Args_pad_bottom] "I" (offsetof(Args, pad_bottom)), [offsetof_Args_pad_left] "I" (offsetof(Args, pad_left)), [offsetof_Args_pad_top] "I" (offsetof(Args, pad_top)), [offsetof_Args_weights] "I" (offsetof(Args, weights))
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32bf16fp32_planar_3x3_s2_4rows_dot_za.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32bf16fp32_planar_3x3_s2_4rows_dot_za.hpp
new file mode 100644
index 0000000..89b9199
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32bf16fp32_planar_3x3_s2_4rows_dot_za.hpp
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_fp32bf16fp32_planar_3x3_s2_4rows_dot_za_impl(
+ const float *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const float *weights,
+ const float *bias,
+ float **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ float act_min,
+ float act_max
+);
+
+class sme2_fp32bf16fp32_planar_3x3_s2_4rows_dot_za : public PlanarStrategy<float, float>
+{
+ using Parent = PlanarStrategy<float, float>;
+
+ public:
+ using return_type = float;
+ constexpr static auto output_rows = 4u;
+ constexpr static auto kernel_rows = 3u, kernel_cols = 3u;
+ constexpr static auto stride_rows = 2u, stride_cols = 2u;
+ constexpr static auto vl_type = arm_gemm::VLType::SME;
+
+ sme2_fp32bf16fp32_planar_3x3_s2_4rows_dot_za(const CPUInfo *)
+ : Parent(kernel_rows, kernel_cols, stride_rows, stride_cols, output_rows, vl_type)
+ {
+ }
+
+ typename Parent::KernelType get_kernel(void) const override
+ {
+ return sme2_fp32bf16fp32_planar_3x3_s2_4rows_dot_za_impl;
+ }
+};
+
+} // namespace depthwise
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32bf16fp32_planar_3x3_s2_4rows_dot_za/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32bf16fp32_planar_3x3_s2_4rows_dot_za/generic.cpp
new file mode 100644
index 0000000..253f0da
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32bf16fp32_planar_3x3_s2_4rows_dot_za/generic.cpp
@@ -0,0 +1,763 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <algorithm>
+#include <cstddef>
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_fp32bf16fp32_planar_3x3_s2_4rows_dot_za_impl(
+ const float *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const float *weights,
+ const float *bias,
+ float **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ float act_min,
+ float act_max
+)
+{
+ struct Args
+ {
+ const float *inptr;
+ size_t ld_in_vl;
+ long unsigned int pad_top, pad_bottom, pad_left;
+ const float *weights;
+ const float *bias;
+ long unsigned int input_cols, output_cols;
+ float **outptrs;
+ const size_t *ld_out_cols;
+ const size_t *ld_out_vls;
+ long unsigned int current_channel, n_channels;
+ float clamp_min, clamp_max;
+ };
+
+ Args args = { inptr, ld_in_vl, pad_top, 9u - std::min(9u, pad_top + valid_input_rows), pad_left, weights, bias, valid_input_cols, output_cols, outptrs, outlds, outvllds, start_channel, valid_channels, act_min, act_max };
+
+ __asm__ __volatile__(
+ "ldr x7, [%x[args], %[offsetof_Args_pad_bottom]]\n"
+ "mov x19, #0x9\n"
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "sub x19, x19, x7\n"
+ "ldr x17, [%x[args], %[offsetof_Args_pad_top]]\n"
+ "ptrue p2.b\n"
+ "ld1rw { z27.s }, p2/Z, [%x[args], %[offsetof_Args_clamp_min]]\n"
+ "ldr x16, [%x[args], %[offsetof_Args_n_channels]]\n"
+ "whilelt p1.s, XZR, x16\n"
+ "whilelt p9.s, XZR, x19\n"
+ "ld1rw { z23.s }, p2/Z, [%x[args], %[offsetof_Args_clamp_max]]\n"
+ "whilelt p8.s, XZR, x17\n"
+ "eor p8.b, p2/Z, p8.b, p9.b\n"
+ "ldr x15, [%x[args], %[offsetof_Args_current_channel]]\n"
+ "1:" // Channel loop
+ "ldr x19, [%x[args], %[offsetof_Args_bias]]\n"
+ "fmov z4.s, #0x0\n"
+ "cbz x19, 2f\n"
+ "ld1w { z4.s }, p1/Z, [x19, x15, LSL #2]\n"
+ "2:" // Load bias: Done
+ "ldr x19, [%x[args], %[offsetof_Args_weights]]\n"
+ "mov x20, x19\n"
+ "ld1w { z19.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #3\n"
+ "incb x19\n"
+ "ld1w { z24.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #3\n"
+ ".inst 0x658aaa69 // bfcvt z9.h, p2/M, z19.s\n"
+ "ld1w { z12.s }, p2/Z, [x20]\n"
+ "mov x20, x19\n"
+ ".inst 0x648aab09 // bfcvtnt z9.h, p2/M, z24.s\n"
+ "incb x19\n"
+ "ld1w { z19.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #3\n"
+ ".inst 0x658aa983 // bfcvt z3.h, p2/M, z12.s\n"
+ ".inst 0x658aaa62 // bfcvt z2.h, p2/M, z19.s\n"
+ "ld1w { z24.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #3\n"
+ "ldr x14, [%x[args], %[offsetof_Args_input_cols]]\n"
+ ".inst 0x648aab02 // bfcvtnt z2.h, p2/M, z24.s\n"
+ "ld1w { z12.s }, p2/Z, [x20]\n"
+ "mov x20, x19\n"
+ ".inst 0x658aa980 // bfcvt z0.h, p2/M, z12.s\n"
+ "ldr x13, [%x[args], %[offsetof_Args_inptr]]\n"
+ "ld1w { z19.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #3\n"
+ ".inst 0x658aaa6a // bfcvt z10.h, p2/M, z19.s\n"
+ "sub x19, x14, #0x1\n"
+ "ld1w { z24.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #3\n"
+ "orr x22, x19, %x[ld_in_col], LSL #18\n"
+ "mov z5.d, z4.d\n"
+ "ld1w { z12.s }, p2/Z, [x20]\n"
+ "orr x22, x16, x22, LSL #20\n"
+ "mov x21, #0x9\n"
+ "mov z6.d, z4.d\n"
+ "add x20, x17, x7\n"
+ "lsl x19, %x[ld_in_row], #0x2\n"
+ "mov z7.d, z4.d\n"
+ ".inst 0x648aab0a // bfcvtnt z10.h, p2/M, z24.s\n"
+ ".inst 0x658aa981 // bfcvt z1.h, p2/M, z12.s\n"
+ "mov x8, #0x0\n"
+ "ldr x11, [%x[args], %[offsetof_Args_output_cols]]\n"
+ "lsl x22, x22, #0x2\n"
+ "sub x21, x21, x20\n"
+ "madd x19, x19, x17, x13\n"
+ "3:" // Issue prefetches
+ "subs x21, x21, #0x1\n"
+ ".inst 0xf8b64a7c // rprfm pldstrm, x22, [x19]\n"
+ "add x19, x19, %x[ld_in_col], LSL #2\n"
+ "bgt 3b\n"
+ "ldr x10, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "lsl x19, %x[ld_in_row], #0x2\n"
+ "msub x13, x17, x19, x13\n"
+ ".inst 0xc0040c80 // mova za.d[x8, #0], { z4.d-z7.d }\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_out_cols]]\n"
+ ".inst 0xc0040c81 // mova za.d[x8, #1], { z4.d-z7.d }\n"
+ "mov x21, #0x2\n"
+ "ldp x9, x28, [x10], #0x10\n"
+ ".inst 0xc0040c82 // mova za.d[x8, #2], { z4.d-z7.d }\n"
+ "ldp x27, x26, [x19], #0x10\n"
+ "ldr x20, [%x[args], %[offsetof_Args_pad_left]]\n"
+ "ldp x25, x24, [x10], #0x10\n"
+ "ldp x23, x22, [x19], #0x10\n"
+ "cbz x20, 5f\n"
+ "cmp x20, x21\n"
+ "csel x19, x20, x21, LT\n"
+ "sub x20, x20, x19\n"
+ "sub x21, x21, x19\n"
+ "cbz x20, 5f\n"
+ ".inst 0xc0060c1c // mova { z28.d-z31.d }, za.d[x8, #0]\n"
+ "and x21, x20, #0x1\n"
+ "add x20, x20, #0x1\n"
+ ".inst 0xc1b7cb7c // fclamp { z28.s-z31.s }, z27.s, z23.s\n"
+ "lsr x20, x20, #0x1\n"
+ "sub x11, x11, x20\n"
+ "4:" // Left padding
+ "subs x20, x20, #0x1\n"
+ "st1w { z28.s }, p1, [x9]\n"
+ "add x9, x9, x27, LSL #2\n"
+ "st1w { z29.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ "st1w { z30.s }, p1, [x25]\n"
+ "add x25, x25, x23, LSL #2\n"
+ "st1w { z31.s }, p1, [x24]\n"
+ "add x24, x24, x22, LSL #2\n"
+ "bgt 4b\n"
+ "5:" // Left padding: End
+ "adds XZR, x17, x7\n"
+ "bne 10f\n"
+ "cbz x21, 8f\n"
+ "cmp x21, #0x1\n"
+ "sub x14, x14, x21\n"
+ "beq 7f\n"
+ "6:" // Unpadded: 2 priming loads
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x13]\n"
+ ".inst 0x658aaa0b // bfcvt z11.h, p2/M, z16.s\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0b // bfcvtnt z11.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0c // bfcvtnt z12.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "ld1w { z22.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaace // bfcvt z14.h, p2/M, z22.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ ".inst 0xc1391170 // bfdot za.s[x8, 0], { z11.h-z14.h }, z9.h\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ ".inst 0xc1331190 // bfdot za.s[x8, 0], { z12.h-z15.h }, z3.h\n"
+ "7:" // Unpadded: 1 priming loads
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x13]\n"
+ ".inst 0x658aaa0b // bfcvt z11.h, p2/M, z16.s\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0b // bfcvtnt z11.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0c // bfcvtnt z12.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ ".inst 0xc1321170 // bfdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ ".inst 0xc1301190 // bfdot za.s[x8, 0], { z12.h-z15.h }, z0.h\n"
+ "8:" // Unpadded: 0 priming loads
+ "cmp x14, #0x2\n"
+ "blt 16f\n"
+ "add x20, x13, %x[ld_in_row], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x13]\n"
+ ".inst 0x658aaa0b // bfcvt z11.h, p2/M, z16.s\n"
+ "sub x14, x14, #0x2\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ "sub x11, x11, #0x1\n"
+ ".inst 0x648aaa0b // bfcvtnt z11.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "lsr x19, x14, #0x1\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ "cmp x19, x11\n"
+ ".inst 0x648aaa0c // bfcvtnt z12.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ "csel x21, x19, x11, LT\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ "and x14, x14, #0x1\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ "sub x11, x11, x21\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ "cbz x21, 15f\n"
+ "9:" // Unpadded: Main loop
+ "add x20, x13, %x[ld_in_row], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x13]\n"
+ ".inst 0xc13a1170 // bfdot za.s[x8, 0], { z11.h-z14.h }, z10.h\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "ld1w { z18.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1391171 // bfdot za.s[x8, 1], { z11.h-z14.h }, z9.h\n"
+ ".inst 0x658aaa0b // bfcvt z11.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1311190 // bfdot za.s[x8, 0], { z12.h-z15.h }, z1.h\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ "ld1w { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1331191 // bfdot za.s[x8, 1], { z12.h-z15.h }, z3.h\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ ".inst 0x648aaa4b // bfcvtnt z11.h, p2/M, z18.s\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa2c // bfcvtnt z12.h, p2/M, z17.s\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ ".inst 0xc0060c1c // mova { z28.d-z31.d }, za.d[x8, #0]\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ "add x8, x8, #0x1\n"
+ "ld1w { z16.s }, p1/Z, [x13]\n"
+ ".inst 0xc1321170 // bfdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ ".inst 0x658aaa0b // bfcvt z11.h, p2/M, z16.s\n"
+ "subs x21, x21, #0x1\n"
+ "ld1w { z20.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1b7cb7c // fclamp { z28.s-z31.s }, z27.s, z23.s\n"
+ "st1w { z28.s }, p1, [x9]\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ ".inst 0xc1301190 // bfdot za.s[x8, 0], { z12.h-z15.h }, z0.h\n"
+ "add x9, x9, x27, LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "st1w { z29.s }, p1, [x28]\n"
+ "ld1w { z19.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "add x28, x28, x26, LSL #2\n"
+ "st1w { z30.s }, p1, [x25]\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ "add x25, x25, x23, LSL #2\n"
+ "ld1w { z18.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "st1w { z31.s }, p1, [x24]\n"
+ "add x24, x24, x22, LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ ".inst 0xc0040c82 // mova za.d[x8, #2], { z4.d-z7.d }\n"
+ "ld1w { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa8b // bfcvtnt z11.h, p2/M, z20.s\n"
+ ".inst 0x648aaa6c // bfcvtnt z12.h, p2/M, z19.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ ".inst 0x648aaa4d // bfcvtnt z13.h, p2/M, z18.s\n"
+ ".inst 0x648aaa2e // bfcvtnt z14.h, p2/M, z17.s\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ "bgt 9b\n"
+ "b 15f\n"
+ "10:" // Padded
+ "cbz x21, 13f\n"
+ "cmp x21, #0x1\n"
+ "sub x14, x14, x21\n"
+ "beq 12f\n"
+ "11:" // Padded: 2 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x13]\n"
+ ".inst 0x658aaa0b // bfcvt z11.h, p2/M, z16.s\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x648aaa0b // bfcvtnt z11.h, p2/M, z16.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x648aaa0c // bfcvtnt z12.h, p2/M, z16.s\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ ".inst 0xc1391170 // bfdot za.s[x8, 0], { z11.h-z14.h }, z9.h\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ ".inst 0xc1331190 // bfdot za.s[x8, 0], { z12.h-z15.h }, z3.h\n"
+ "12:" // Padded: 1 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x13]\n"
+ ".inst 0x658aaa0b // bfcvt z11.h, p2/M, z16.s\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x648aaa0b // bfcvtnt z11.h, p2/M, z16.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x648aaa0c // bfcvtnt z12.h, p2/M, z16.s\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ ".inst 0xc1321170 // bfdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ ".inst 0xc1301190 // bfdot za.s[x8, 0], { z12.h-z15.h }, z0.h\n"
+ "13:" // Padded: 0 priming loads
+ "cmp x14, #0x2\n"
+ "blt 16f\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x13]\n"
+ ".inst 0x658aaa0b // bfcvt z11.h, p2/M, z16.s\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x648aaa0b // bfcvtnt z11.h, p2/M, z16.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x648aaa0c // bfcvtnt z12.h, p2/M, z16.s\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x8\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ "sub x14, x14, #0x2\n"
+ "sub x11, x11, #0x1\n"
+ "lsr x19, x14, #0x1\n"
+ "cmp x19, x11\n"
+ "csel x20, x19, x11, LT\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "and x14, x14, #0x1\n"
+ "sub x11, x11, x20\n"
+ "cbz x20, 15f\n"
+ "14:" // Padded: Main loop
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z18.s }, p0/Z, [x13]\n"
+ ".inst 0xc13a1170 // bfdot za.s[x8, 0], { z11.h-z14.h }, z10.h\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z19.s }, p0/Z, [x19]\n"
+ ".inst 0xc1391171 // bfdot za.s[x8, 1], { z11.h-z14.h }, z9.h\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0xc1311190 // bfdot za.s[x8, 0], { z12.h-z15.h }, z1.h\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z17.s }, p0/Z, [x19]\n"
+ ".inst 0xc1331191 // bfdot za.s[x8, 1], { z12.h-z15.h }, z3.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa4b // bfcvt z11.h, p2/M, z18.s\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z18.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa6b // bfcvtnt z11.h, p2/M, z19.s\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x8\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x648aaa2c // bfcvtnt z12.h, p2/M, z17.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z17.s }, p0/Z, [x19]\n"
+ ".inst 0x648aaa4d // bfcvtnt z13.h, p2/M, z18.s\n"
+ "mov x12, #0x0\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ ".inst 0xc0060c1c // mova { z28.d-z31.d }, za.d[x8, #0]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x13]\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa2f // bfcvt z15.h, p2/M, z17.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z21.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1b7cb7c // fclamp { z28.s-z31.s }, z27.s, z23.s\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z17.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "st1w { z28.s }, p1, [x9]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x4\n"
+ "ld1w { z20.s }, p0/Z, [x19]\n"
+ "st1w { z29.s }, p1, [x28]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z19.s }, p0/Z, [x19]\n"
+ "st1w { z30.s }, p1, [x25]\n"
+ "add x8, x8, #0x1\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1321170 // bfdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ ".inst 0x658aaa0b // bfcvt z11.h, p2/M, z16.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z18.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1301190 // bfdot za.s[x8, 0], { z12.h-z15.h }, z0.h\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa2c // bfcvt z12.h, p2/M, z17.s\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x8\n"
+ "ld1w { z17.s }, p0/Z, [x19]\n"
+ ".inst 0x658aaa6d // bfcvt z13.h, p2/M, z19.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "subs x20, x20, #0x1\n"
+ "add x9, x9, x27, LSL #2\n"
+ "st1w { z31.s }, p1, [x24]\n"
+ ".inst 0xc0040c82 // mova za.d[x8, #2], { z4.d-z7.d }\n"
+ "add x28, x28, x26, LSL #2\n"
+ "add x25, x25, x23, LSL #2\n"
+ ".inst 0x648aaaab // bfcvtnt z11.h, p2/M, z21.s\n"
+ ".inst 0x648aaa8c // bfcvtnt z12.h, p2/M, z20.s\n"
+ "add x24, x24, x22, LSL #2\n"
+ ".inst 0x648aaa4d // bfcvtnt z13.h, p2/M, z18.s\n"
+ ".inst 0x648aaa2e // bfcvtnt z14.h, p2/M, z17.s\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ "bgt 14b\n"
+ "15:" // Main loop tail
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z17.s }, p0/Z, [x13]\n"
+ ".inst 0xc13a1170 // bfdot za.s[x8, 0], { z11.h-z14.h }, z10.h\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z19.s }, p0/Z, [x19]\n"
+ ".inst 0xc1391171 // bfdot za.s[x8, 1], { z11.h-z14.h }, z9.h\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0xc1311190 // bfdot za.s[x8, 0], { z12.h-z15.h }, z1.h\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z18.s }, p0/Z, [x19]\n"
+ ".inst 0xc1331191 // bfdot za.s[x8, 1], { z12.h-z15.h }, z3.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa2b // bfcvt z11.h, p2/M, z17.s\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z17.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa6b // bfcvtnt z11.h, p2/M, z19.s\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ ".inst 0x648aaa4c // bfcvtnt z12.h, p2/M, z18.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0x648aaa2d // bfcvtnt z13.h, p2/M, z17.s\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0xc0060c1c // mova { z28.d-z31.d }, za.d[x8, #0]\n"
+ "add x8, x8, #0x1\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ ".inst 0xc1321170 // bfdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ ".inst 0xc1b7cb7c // fclamp { z28.s-z31.s }, z27.s, z23.s\n"
+ "st1w { z28.s }, p1, [x9]\n"
+ "add x9, x9, x27, LSL #2\n"
+ "st1w { z29.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ ".inst 0xc0040c82 // mova za.d[x8, #2], { z4.d-z7.d }\n"
+ "add x13, x13, %x[ld_in_col], LSL #2\n"
+ "st1w { z30.s }, p1, [x25]\n"
+ "add x25, x25, x23, LSL #2\n"
+ ".inst 0xc1301190 // bfdot za.s[x8, 0], { z12.h-z15.h }, z0.h\n"
+ "st1w { z31.s }, p1, [x24]\n"
+ "add x24, x24, x22, LSL #2\n"
+ "16:" // Main loop skip tail
+ "cbz x14, 17f\n" // Skip remainder inputs
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x13]\n"
+ ".inst 0x658aaa0b // bfcvt z11.h, p2/M, z16.s\n"
+ "add x19, x13, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x648aaa0b // bfcvtnt z11.h, p2/M, z16.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x648aaa0c // bfcvtnt z12.h, p2/M, z16.s\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ ".inst 0xc13a1170 // bfdot za.s[x8, 0], { z11.h-z14.h }, z10.h\n"
+ "sub x11, x11, #0x1\n"
+ ".inst 0xc1311190 // bfdot za.s[x8, 0], { z12.h-z15.h }, z1.h\n"
+ ".inst 0xc1391171 // bfdot za.s[x8, 1], { z11.h-z14.h }, z9.h\n"
+ ".inst 0xc0060c1c // mova { z28.d-z31.d }, za.d[x8, #0]\n"
+ ".inst 0xc1b7cb7c // fclamp { z28.s-z31.s }, z27.s, z23.s\n"
+ "st1w { z28.s }, p1, [x9]\n"
+ "add x9, x9, x27, LSL #2\n"
+ ".inst 0xc1331191 // bfdot za.s[x8, 1], { z12.h-z15.h }, z3.h\n"
+ "add x8, x8, #0x1\n"
+ "st1w { z29.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ "st1w { z30.s }, p1, [x25]\n"
+ "add x25, x25, x23, LSL #2\n"
+ ".inst 0xc0040c82 // mova za.d[x8, #2], { z4.d-z7.d }\n"
+ "st1w { z31.s }, p1, [x24]\n"
+ "add x24, x24, x22, LSL #2\n"
+ "17:" // Tail input: End
+ "cbz x11, 19f\n"
+ "18:" // Right padding loop
+ ".inst 0xc0060c1c // mova { z28.d-z31.d }, za.d[x8, #0]\n"
+ "add x8, x8, #0x1\n"
+ "subs x11, x11, #0x1\n"
+ ".inst 0xc1b7cb7c // fclamp { z28.s-z31.s }, z27.s, z23.s\n"
+ "st1w { z28.s }, p1, [x9]\n"
+ "add x9, x9, x27, LSL #2\n"
+ ".inst 0xc0040c82 // mova za.d[x8, #2], { z4.d-z7.d }\n"
+ "st1w { z29.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ "st1w { z30.s }, p1, [x25]\n"
+ "add x25, x25, x23, LSL #2\n"
+ "st1w { z31.s }, p1, [x24]\n"
+ "add x24, x24, x22, LSL #2\n"
+ "bgt 18b\n"
+ "19:" // End
+ "ldr x19, [%x[args], %[offsetof_Args_weights]]\n"
+ "incb x19, ALL, MUL #9\n"
+ "str x19, [%x[args], %[offsetof_Args_weights]]\n"
+ "incw x15\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_in_vl]]\n"
+ "whilelt p1.s, x15, x16\n"
+ "ldr x13, [%x[args], %[offsetof_Args_inptr]]\n"
+ "add x13, x13, x19, LSL #2\n"
+ "str x13, [%x[args], %[offsetof_Args_inptr]]\n"
+ "ldr x10, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "ldr x23, [%x[args], %[offsetof_Args_ld_out_vls]]\n"
+ "ldp x22, x21, [x10, #0x0]\n"
+ "ldp x20, x19, [x23, #0x0]\n"
+ "add x22, x22, x20, LSL #2\n"
+ "add x21, x21, x19, LSL #2\n"
+ "stp x22, x21, [x10, #0x0]\n"
+ "ldp x22, x21, [x10, #0x10]\n"
+ "ldp x20, x19, [x23, #0x10]\n"
+ "add x22, x22, x20, LSL #2\n"
+ "add x21, x21, x19, LSL #2\n"
+ "stp x22, x21, [x10, #0x10]\n"
+ "b.any 1b\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [ld_in_col] "r" (ld_in_col), [ld_in_row] "r" (ld_in_row), [offsetof_Args_bias] "I" (offsetof(Args, bias)), [offsetof_Args_clamp_max] "I" (offsetof(Args, clamp_max)), [offsetof_Args_clamp_min] "I" (offsetof(Args, clamp_min)), [offsetof_Args_current_channel] "I" (offsetof(Args, current_channel)), [offsetof_Args_inptr] "I" (offsetof(Args, inptr)), [offsetof_Args_input_cols] "I" (offsetof(Args, input_cols)), [offsetof_Args_ld_in_vl] "I" (offsetof(Args, ld_in_vl)), [offsetof_Args_ld_out_cols] "I" (offsetof(Args, ld_out_cols)), [offsetof_Args_ld_out_vls] "I" (offsetof(Args, ld_out_vls)), [offsetof_Args_n_channels] "I" (offsetof(Args, n_channels)), [offsetof_Args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_Args_output_cols] "I" (offsetof(Args, output_cols)), [offsetof_Args_pad_bottom] "I" (offsetof(Args, pad_bottom)), [offsetof_Args_pad_left] "I" (offsetof(Args, pad_left)), [offsetof_Args_pad_top] "I" (offsetof(Args, pad_top)), [offsetof_Args_weights] "I" (offsetof(Args, weights))
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32bf16fp32_planar_5x5_s1_4rows_dot_za.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32bf16fp32_planar_5x5_s1_4rows_dot_za.hpp
new file mode 100644
index 0000000..c2d439f
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32bf16fp32_planar_5x5_s1_4rows_dot_za.hpp
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_fp32bf16fp32_planar_5x5_s1_4rows_dot_za_impl(
+ const float *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const float *weights,
+ const float *bias,
+ float **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ float act_min,
+ float act_max
+);
+
+class sme2_fp32bf16fp32_planar_5x5_s1_4rows_dot_za : public PlanarStrategy<float, float>
+{
+ using Parent = PlanarStrategy<float, float>;
+
+ public:
+ using return_type = float;
+ constexpr static auto output_rows = 4u;
+ constexpr static auto kernel_rows = 5u, kernel_cols = 5u;
+ constexpr static auto stride_rows = 1u, stride_cols = 1u;
+ constexpr static auto vl_type = arm_gemm::VLType::SME;
+
+ sme2_fp32bf16fp32_planar_5x5_s1_4rows_dot_za(const CPUInfo *)
+ : Parent(kernel_rows, kernel_cols, stride_rows, stride_cols, output_rows, vl_type)
+ {
+ }
+
+ typename Parent::KernelType get_kernel(void) const override
+ {
+ return sme2_fp32bf16fp32_planar_5x5_s1_4rows_dot_za_impl;
+ }
+};
+
+} // namespace depthwise
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32bf16fp32_planar_5x5_s1_4rows_dot_za/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32bf16fp32_planar_5x5_s1_4rows_dot_za/generic.cpp
new file mode 100644
index 0000000..17f2455
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32bf16fp32_planar_5x5_s1_4rows_dot_za/generic.cpp
@@ -0,0 +1,1151 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <algorithm>
+#include <cstddef>
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_fp32bf16fp32_planar_5x5_s1_4rows_dot_za_impl(
+ const float *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const float *weights,
+ const float *bias,
+ float **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ float act_min,
+ float act_max
+)
+{
+ struct Args
+ {
+ const float *inptr;
+ size_t ld_in_vl;
+ long unsigned int pad_top, pad_bottom, pad_left;
+ const float *weights;
+ const float *bias;
+ long unsigned int input_cols, output_cols;
+ float **outptrs;
+ const size_t *ld_out_cols;
+ const size_t *ld_out_vls;
+ long unsigned int current_channel, n_channels;
+ float clamp_min, clamp_max;
+ };
+
+ Args args = { inptr, ld_in_vl, pad_top, 8u - std::min(8u, pad_top + valid_input_rows), pad_left, weights, bias, valid_input_cols, output_cols, outptrs, outlds, outvllds, start_channel, valid_channels, act_min, act_max };
+
+ __asm__ __volatile__(
+ "ldr x6, [%x[args], %[offsetof_Args_pad_bottom]]\n"
+ "mov x19, #0x8\n"
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "sub x19, x19, x6\n"
+ "ldr x5, [%x[args], %[offsetof_Args_pad_top]]\n"
+ "ptrue p2.b\n"
+ ".inst 0x25207812 // ptrue pn10.b\n"
+ "ld1rw { z26.s }, p2/Z, [%x[args], %[offsetof_Args_clamp_min]]\n"
+ "ldr x7, [%x[args], %[offsetof_Args_n_channels]]\n"
+ "whilelt p1.s, XZR, x7\n"
+ "whilelt p9.s, XZR, x19\n"
+ "ld1rw { z31.s }, p2/Z, [%x[args], %[offsetof_Args_clamp_max]]\n"
+ "whilelt p8.s, XZR, x5\n"
+ "addvl SP, SP, #-30\n"
+ "ldr x17, [%x[args], %[offsetof_Args_current_channel]]\n"
+ "eor p8.b, p2/Z, p8.b, p9.b\n"
+ "1:" // Channel loop
+ "ldr x19, [%x[args], %[offsetof_Args_bias]]\n"
+ "fmov z24.s, #0x0\n"
+ "cbz x19, 2f\n"
+ "ld1w { z24.s }, p1/Z, [x19, x17, LSL #2]\n"
+ "2:" // Load bias: Done
+ "ldr x19, [%x[args], %[offsetof_Args_weights]]\n"
+ "mov x20, x19\n"
+ "ld1w { z18.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ "ld1w { z11.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ "fmov z4.s, #0x0\n"
+ "incb x19\n"
+ "ld1w { z3.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ ".inst 0x658aaa45 // bfcvt z5.h, p2/M, z18.s\n"
+ ".inst 0x658aa966 // bfcvt z6.h, p2/M, z11.s\n"
+ "ld1w { z17.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ "addvl x23, SP, #30\n"
+ ".inst 0x648aaa44 // bfcvtnt z4.h, p2/M, z18.s\n"
+ "ld1w { z16.s }, p2/Z, [x20]\n"
+ "mov x20, x19\n"
+ ".inst 0x658aa867 // bfcvt z7.h, p2/M, z3.s\n"
+ "addvl x23, x23, #-6\n"
+ "ld1w { z18.s }, p2/Z, [x20]\n"
+ ".inst 0x658aaa28 // bfcvt z8.h, p2/M, z17.s\n"
+ "incb x20, ALL, MUL #5\n"
+ "st1h { z4.h }, p2, [x23]\n"
+ ".inst 0x648aa965 // bfcvtnt z5.h, p2/M, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ "fmov z4.s, #0x0\n"
+ "st1h { z5.h }, p2, [x23, #1, MUL VL]\n"
+ ".inst 0x648aa866 // bfcvtnt z6.h, p2/M, z3.s\n"
+ "ld1w { z3.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ ".inst 0x658aaa45 // bfcvt z5.h, p2/M, z18.s\n"
+ ".inst 0x648aaa27 // bfcvtnt z7.h, p2/M, z17.s\n"
+ "incb x19\n"
+ "ld1w { z17.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ "st1h { z6.h }, p2, [x23, #2, MUL VL]\n"
+ ".inst 0x648aaa08 // bfcvtnt z8.h, p2/M, z16.s\n"
+ ".inst 0x658aaa09 // bfcvt z9.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p2/Z, [x20]\n"
+ ".inst 0x658aa966 // bfcvt z6.h, p2/M, z11.s\n"
+ "mov x20, x19\n"
+ "st1h { z7.h }, p2, [x23, #3, MUL VL]\n"
+ ".inst 0x648aaa44 // bfcvtnt z4.h, p2/M, z18.s\n"
+ ".inst 0x658aa867 // bfcvt z7.h, p2/M, z3.s\n"
+ "ld1w { z18.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ "st1h { z8.h }, p2, [x23, #4, MUL VL]\n"
+ ".inst 0x648aa965 // bfcvtnt z5.h, p2/M, z11.s\n"
+ ".inst 0x658aaa28 // bfcvt z8.h, p2/M, z17.s\n"
+ "incb x19\n"
+ "st1h { z9.h }, p2, [x23, #5, MUL VL]\n"
+ "addvl x23, x23, #-6\n"
+ "ld1w { z11.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ "st1h { z4.h }, p2, [x23]\n"
+ "fmov z4.s, #0x0\n"
+ ".inst 0x648aa866 // bfcvtnt z6.h, p2/M, z3.s\n"
+ "ldr x16, [%x[args], %[offsetof_Args_input_cols]]\n"
+ "st1h { z5.h }, p2, [x23, #1, MUL VL]\n"
+ "ld1w { z3.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ ".inst 0x658aaa45 // bfcvt z5.h, p2/M, z18.s\n"
+ "st1h { z6.h }, p2, [x23, #2, MUL VL]\n"
+ ".inst 0x648aaa27 // bfcvtnt z7.h, p2/M, z17.s\n"
+ "ld1w { z17.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ ".inst 0x658aa966 // bfcvt z6.h, p2/M, z11.s\n"
+ ".inst 0x648aaa08 // bfcvtnt z8.h, p2/M, z16.s\n"
+ "st1h { z7.h }, p2, [x23, #3, MUL VL]\n"
+ "ldr x15, [%x[args], %[offsetof_Args_inptr]]\n"
+ ".inst 0x658aaa09 // bfcvt z9.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p2/Z, [x20]\n"
+ "mov x20, x19\n"
+ ".inst 0x648aaa44 // bfcvtnt z4.h, p2/M, z18.s\n"
+ ".inst 0x658aa867 // bfcvt z7.h, p2/M, z3.s\n"
+ "ld1w { z18.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ "st1h { z8.h }, p2, [x23, #4, MUL VL]\n"
+ "st1h { z9.h }, p2, [x23, #5, MUL VL]\n"
+ "addvl x23, x23, #-6\n"
+ ".inst 0x648aa965 // bfcvtnt z5.h, p2/M, z11.s\n"
+ ".inst 0x658aaa28 // bfcvt z8.h, p2/M, z17.s\n"
+ "ld1w { z11.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ "st1h { z4.h }, p2, [x23]\n"
+ ".inst 0x648aa866 // bfcvtnt z6.h, p2/M, z3.s\n"
+ "ld1w { z3.s }, p2/Z, [x20]\n"
+ "fmov z4.s, #0x0\n"
+ "st1h { z5.h }, p2, [x23, #1, MUL VL]\n"
+ "incb x20, ALL, MUL #5\n"
+ ".inst 0x658aaa45 // bfcvt z5.h, p2/M, z18.s\n"
+ "st1h { z6.h }, p2, [x23, #2, MUL VL]\n"
+ ".inst 0x648aaa27 // bfcvtnt z7.h, p2/M, z17.s\n"
+ "incb x19\n"
+ "ld1w { z17.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ ".inst 0x658aa966 // bfcvt z6.h, p2/M, z11.s\n"
+ "st1h { z7.h }, p2, [x23, #3, MUL VL]\n"
+ ".inst 0x648aaa08 // bfcvtnt z8.h, p2/M, z16.s\n"
+ ".inst 0x658aaa09 // bfcvt z9.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p2/Z, [x20]\n"
+ "mov x20, x19\n"
+ ".inst 0x658aa867 // bfcvt z7.h, p2/M, z3.s\n"
+ ".inst 0x648aaa44 // bfcvtnt z4.h, p2/M, z18.s\n"
+ "ld1w { z18.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ ".inst 0x648aa965 // bfcvtnt z5.h, p2/M, z11.s\n"
+ "ld1w { z11.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ "st1h { z8.h }, p2, [x23, #4, MUL VL]\n"
+ ".inst 0x648aa866 // bfcvtnt z6.h, p2/M, z3.s\n"
+ ".inst 0x658aaa28 // bfcvt z8.h, p2/M, z17.s\n"
+ "ld1w { z3.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ ".inst 0x648aaa27 // bfcvtnt z7.h, p2/M, z17.s\n"
+ "ld1w { z17.s }, p2/Z, [x20]\n"
+ "st1h { z9.h }, p2, [x23, #5, MUL VL]\n"
+ "addvl x23, x23, #-6\n"
+ "st1h { z4.h }, p2, [x23]\n"
+ ".inst 0x648aaa08 // bfcvtnt z8.h, p2/M, z16.s\n"
+ "incb x20, ALL, MUL #5\n"
+ "fmov z4.s, #0x0\n"
+ "st1h { z5.h }, p2, [x23, #1, MUL VL]\n"
+ ".inst 0x658aaa45 // bfcvt z5.h, p2/M, z18.s\n"
+ ".inst 0x658aaa09 // bfcvt z9.h, p2/M, z16.s\n"
+ "sub x19, x16, #0x1\n"
+ "st1h { z6.h }, p2, [x23, #2, MUL VL]\n"
+ ".inst 0x658aa966 // bfcvt z6.h, p2/M, z11.s\n"
+ "ld1w { z16.s }, p2/Z, [x20]\n"
+ "orr x22, x19, %x[ld_in_col], LSL #18\n"
+ "st1h { z7.h }, p2, [x23, #3, MUL VL]\n"
+ ".inst 0x658aa867 // bfcvt z7.h, p2/M, z3.s\n"
+ "orr x22, x7, x22, LSL #20\n"
+ "mov x21, #0x8\n"
+ "st1h { z8.h }, p2, [x23, #4, MUL VL]\n"
+ ".inst 0x658aaa28 // bfcvt z8.h, p2/M, z17.s\n"
+ "add x20, x5, x6\n"
+ "lsl x19, %x[ld_in_row], #0x2\n"
+ "st1h { z9.h }, p2, [x23, #5, MUL VL]\n"
+ "addvl x23, x23, #-6\n"
+ "mov z25.d, z24.d\n"
+ ".inst 0x648aaa44 // bfcvtnt z4.h, p2/M, z18.s\n"
+ "st1h { z4.h }, p2, [x23]\n"
+ ".inst 0x648aa965 // bfcvtnt z5.h, p2/M, z11.s\n"
+ ".inst 0x648aa866 // bfcvtnt z6.h, p2/M, z3.s\n"
+ "mov x11, #0x0\n"
+ "st1h { z5.h }, p2, [x23, #1, MUL VL]\n"
+ ".inst 0x648aaa27 // bfcvtnt z7.h, p2/M, z17.s\n"
+ ".inst 0x648aaa08 // bfcvtnt z8.h, p2/M, z16.s\n"
+ "mov x8, #0x8\n"
+ "st1h { z6.h }, p2, [x23, #2, MUL VL]\n"
+ ".inst 0x658aaa09 // bfcvt z9.h, p2/M, z16.s\n"
+ "ldr x14, [%x[args], %[offsetof_Args_output_cols]]\n"
+ "lsl x22, x22, #0x2\n"
+ "st1h { z7.h }, p2, [x23, #3, MUL VL]\n"
+ "sub x21, x21, x20\n"
+ "madd x19, x19, x5, x15\n"
+ "st1h { z8.h }, p2, [x23, #4, MUL VL]\n"
+ "st1h { z9.h }, p2, [x23, #5, MUL VL]\n"
+ "3:" // Issue prefetches
+ "subs x21, x21, #0x1\n"
+ ".inst 0xf8b64a7c // rprfm pldstrm, x22, [x19]\n"
+ "add x19, x19, %x[ld_in_col], LSL #2\n"
+ "bgt 3b\n"
+ "ldr x24, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "lsl x19, %x[ld_in_row], #0x2\n"
+ "msub x15, x5, x19, x15\n"
+ ".inst 0xc0046b00 // mova za.d[x11, #0], { z24.d-z25.d }\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_out_cols]]\n"
+ ".inst 0xc0046b01 // mova za.d[x11, #1], { z24.d-z25.d }\n"
+ "mov x21, #0x4\n"
+ "ldp x13, x0, [x24], #0x10\n"
+ ".inst 0xc0046b02 // mova za.d[x11, #2], { z24.d-z25.d }\n"
+ "ldp x10, x9, [x19], #0x10\n"
+ ".inst 0xc0046b03 // mova za.d[x11, #3], { z24.d-z25.d }\n"
+ "ldr x20, [%x[args], %[offsetof_Args_pad_left]]\n"
+ ".inst 0xc0046b04 // mova za.d[x11, #4], { z24.d-z25.d }\n"
+ "ldp x28, x27, [x24], #0x10\n"
+ ".inst 0xc0046b05 // mova za.d[x11, #5], { z24.d-z25.d }\n"
+ "ldp x26, x25, [x19], #0x10\n"
+ ".inst 0xc0046b06 // mova za.d[x11, #6], { z24.d-z25.d }\n"
+ ".inst 0xc0046b07 // mova za.d[x11, #7], { z24.d-z25.d }\n"
+ ".inst 0xc0040b00 // mova za.d[x8, #0], { z24.d-z25.d }\n"
+ ".inst 0xc0040b01 // mova za.d[x8, #1], { z24.d-z25.d }\n"
+ "cbz x20, 5f\n"
+ "cmp x20, x21\n"
+ "csel x19, x20, x21, LT\n"
+ "sub x20, x20, x19\n"
+ "sub x21, x21, x19\n"
+ "cbz x20, 5f\n"
+ ".inst 0xc0066800 // mova { z0.d-z1.d }, za.d[x11, #0]\n"
+ "sub x14, x14, x20\n"
+ ".inst 0xc0066822 // mova { z2.d-z3.d }, za.d[x11, #1]\n"
+ ".inst 0xc1bfcb40 // fclamp { z0.s-z3.s }, z26.s, z31.s\n"
+ "4:" // Left padding
+ "subs x20, x20, #0x1\n"
+ "st1w { z0.s }, p1, [x13]\n"
+ "add x13, x13, x10, LSL #2\n"
+ "st1w { z2.s }, p1, [x0]\n"
+ "add x0, x0, x9, LSL #2\n"
+ "st1w { z1.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ "st1w { z3.s }, p1, [x27]\n"
+ "add x27, x27, x25, LSL #2\n"
+ "bgt 4b\n"
+ "5:" // Left padding: End
+ "adds XZR, x5, x6\n"
+ "bne 12f\n"
+ "cbz x21, 10f\n"
+ "cmp x21, #0x1\n"
+ "sub x16, x16, x21\n"
+ "beq 9f\n"
+ "cmp x21, #0x2\n"
+ "beq 8f\n"
+ "cmp x21, #0x3\n"
+ "beq 7f\n"
+ "6:" // Unpadded: 4 priming loads
+ "add x20, x15, %x[ld_in_row], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x15]\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "addvl x19, SP, #24\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0c // bfcvtnt z12.h, p2/M, z16.s\n"
+ "add x15, x15, %x[ld_in_col], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ ".inst 0xa0402a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1257190 // bfdot za.s[x11, 0], { z12.h-z13.h }, z5.h\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ ".inst 0xc1247191 // bfdot za.s[x11, 1], { z12.h-z13.h }, z4.h\n"
+ ".inst 0xa0412a66 // ld1h { z6.h-z7.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc12771b0 // bfdot za.s[x11, 0], { z13.h-z14.h }, z7.h\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ ".inst 0x648aaa0f // bfcvtnt z15.h, p2/M, z16.s\n"
+ ".inst 0xc12671b1 // bfdot za.s[x11, 1], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xa0422a68 // ld1h { z8.h-z9.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc12971d0 // bfdot za.s[x11, 0], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d1 // bfdot za.s[x11, 1], { z14.h-z15.h }, z8.h\n"
+ "7:" // Unpadded: 3 priming loads
+ "add x21, x15, %x[ld_in_row], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x15]\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "addvl x20, SP, #18\n"
+ "ld1w { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0c // bfcvtnt z12.h, p2/M, z16.s\n"
+ "addvl x19, SP, #24\n"
+ "ld1w { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ "add x15, x15, %x[ld_in_col], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ ".inst 0xa0402a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1257190 // bfdot za.s[x11, 0], { z12.h-z13.h }, z5.h\n"
+ "ld1w { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ ".inst 0xc1247191 // bfdot za.s[x11, 1], { z12.h-z13.h }, z4.h\n"
+ ".inst 0xa0402a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1257192 // bfdot za.s[x11, 2], { z12.h-z13.h }, z5.h\n"
+ ".inst 0xa0412a86 // ld1h { z6.h-z7.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc1247193 // bfdot za.s[x11, 3], { z12.h-z13.h }, z4.h\n"
+ "ld1w { z16.s }, p1/Z, [x21]\n"
+ ".inst 0x648aaa0f // bfcvtnt z15.h, p2/M, z16.s\n"
+ ".inst 0xc12771b0 // bfdot za.s[x11, 0], { z13.h-z14.h }, z7.h\n"
+ ".inst 0xc12671b1 // bfdot za.s[x11, 1], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xa0412a66 // ld1h { z6.h-z7.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xa0422a88 // ld1h { z8.h-z9.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc12771b2 // bfdot za.s[x11, 2], { z13.h-z14.h }, z7.h\n"
+ ".inst 0xc12671b3 // bfdot za.s[x11, 3], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xc12971d0 // bfdot za.s[x11, 0], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d1 // bfdot za.s[x11, 1], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xa0422a68 // ld1h { z8.h-z9.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc12971d2 // bfdot za.s[x11, 2], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d3 // bfdot za.s[x11, 3], { z14.h-z15.h }, z8.h\n"
+ "8:" // Unpadded: 2 priming loads
+ "add x22, x15, %x[ld_in_row], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x15]\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "addvl x21, SP, #12\n"
+ "ld1w { z16.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0c // bfcvtnt z12.h, p2/M, z16.s\n"
+ "addvl x20, SP, #18\n"
+ "ld1w { z16.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ "addvl x19, SP, #24\n"
+ "ld1w { z16.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "add x15, x15, %x[ld_in_col], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ ".inst 0xa0402aa4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x21]\n"
+ ".inst 0xc1257190 // bfdot za.s[x11, 0], { z12.h-z13.h }, z5.h\n"
+ "ld1w { z16.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ ".inst 0xc1247191 // bfdot za.s[x11, 1], { z12.h-z13.h }, z4.h\n"
+ ".inst 0xa0402a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1257192 // bfdot za.s[x11, 2], { z12.h-z13.h }, z5.h\n"
+ ".inst 0xa0412aa6 // ld1h { z6.h-z7.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0xc1247193 // bfdot za.s[x11, 3], { z12.h-z13.h }, z4.h\n"
+ "ld1w { z16.s }, p1/Z, [x22]\n"
+ ".inst 0x648aaa0f // bfcvtnt z15.h, p2/M, z16.s\n"
+ ".inst 0xc12771b0 // bfdot za.s[x11, 0], { z13.h-z14.h }, z7.h\n"
+ ".inst 0xa0402a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc12671b1 // bfdot za.s[x11, 1], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xa0412a86 // ld1h { z6.h-z7.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc1257194 // bfdot za.s[x11, 4], { z12.h-z13.h }, z5.h\n"
+ ".inst 0xa0422aa8 // ld1h { z8.h-z9.h }, pn10.b/Z, [x21, #0x4, MUL VL]\n"
+ ".inst 0xc1247195 // bfdot za.s[x11, 5], { z12.h-z13.h }, z4.h\n"
+ ".inst 0xc12771b2 // bfdot za.s[x11, 2], { z13.h-z14.h }, z7.h\n"
+ ".inst 0xc12671b3 // bfdot za.s[x11, 3], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xa0412a66 // ld1h { z6.h-z7.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc12971d0 // bfdot za.s[x11, 0], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d1 // bfdot za.s[x11, 1], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xa0422a88 // ld1h { z8.h-z9.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc12771b4 // bfdot za.s[x11, 4], { z13.h-z14.h }, z7.h\n"
+ ".inst 0xc12671b5 // bfdot za.s[x11, 5], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xc12971d2 // bfdot za.s[x11, 2], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d3 // bfdot za.s[x11, 3], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xa0422a68 // ld1h { z8.h-z9.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc12971d4 // bfdot za.s[x11, 4], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d5 // bfdot za.s[x11, 5], { z14.h-z15.h }, z8.h\n"
+ "9:" // Unpadded: 1 priming loads
+ "add x23, x15, %x[ld_in_row], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x15]\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "addvl x22, SP, #6\n"
+ "ld1w { z16.s }, p1/Z, [x23]\n"
+ "add x23, x23, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0c // bfcvtnt z12.h, p2/M, z16.s\n"
+ "addvl x21, SP, #12\n"
+ "ld1w { z16.s }, p1/Z, [x23]\n"
+ "add x23, x23, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ "addvl x20, SP, #18\n"
+ "ld1w { z16.s }, p1/Z, [x23]\n"
+ "add x23, x23, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "addvl x19, SP, #24\n"
+ "ld1w { z16.s }, p1/Z, [x23]\n"
+ "add x23, x23, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ "add x15, x15, %x[ld_in_col], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x23]\n"
+ "add x23, x23, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ ".inst 0xa0402ac4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x22]\n"
+ ".inst 0xc1257190 // bfdot za.s[x11, 0], { z12.h-z13.h }, z5.h\n"
+ "ld1w { z16.s }, p1/Z, [x23]\n"
+ "add x23, x23, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ ".inst 0xc1247191 // bfdot za.s[x11, 1], { z12.h-z13.h }, z4.h\n"
+ ".inst 0xa0402aa4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x21]\n"
+ ".inst 0xc1257192 // bfdot za.s[x11, 2], { z12.h-z13.h }, z5.h\n"
+ ".inst 0xa0412ac6 // ld1h { z6.h-z7.h }, pn10.b/Z, [x22, #0x2, MUL VL]\n"
+ ".inst 0xc1247193 // bfdot za.s[x11, 3], { z12.h-z13.h }, z4.h\n"
+ "ld1w { z16.s }, p1/Z, [x23]\n"
+ ".inst 0x648aaa0f // bfcvtnt z15.h, p2/M, z16.s\n"
+ ".inst 0xc12771b0 // bfdot za.s[x11, 0], { z13.h-z14.h }, z7.h\n"
+ ".inst 0xa0402a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc12671b1 // bfdot za.s[x11, 1], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xa0412aa6 // ld1h { z6.h-z7.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0xc1257194 // bfdot za.s[x11, 4], { z12.h-z13.h }, z5.h\n"
+ ".inst 0xa0422ac8 // ld1h { z8.h-z9.h }, pn10.b/Z, [x22, #0x4, MUL VL]\n"
+ ".inst 0xc1247195 // bfdot za.s[x11, 5], { z12.h-z13.h }, z4.h\n"
+ ".inst 0xa0402a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc12771b2 // bfdot za.s[x11, 2], { z13.h-z14.h }, z7.h\n"
+ ".inst 0xc12671b3 // bfdot za.s[x11, 3], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xa0412a86 // ld1h { z6.h-z7.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc12971d0 // bfdot za.s[x11, 0], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d1 // bfdot za.s[x11, 1], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xa0422aa8 // ld1h { z8.h-z9.h }, pn10.b/Z, [x21, #0x4, MUL VL]\n"
+ ".inst 0xc1257196 // bfdot za.s[x11, 6], { z12.h-z13.h }, z5.h\n"
+ ".inst 0xc1247197 // bfdot za.s[x11, 7], { z12.h-z13.h }, z4.h\n"
+ ".inst 0xc12771b4 // bfdot za.s[x11, 4], { z13.h-z14.h }, z7.h\n"
+ ".inst 0xc12671b5 // bfdot za.s[x11, 5], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xa0412a66 // ld1h { z6.h-z7.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc12971d2 // bfdot za.s[x11, 2], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d3 // bfdot za.s[x11, 3], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xa0422a88 // ld1h { z8.h-z9.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc12771b6 // bfdot za.s[x11, 6], { z13.h-z14.h }, z7.h\n"
+ ".inst 0xc12671b7 // bfdot za.s[x11, 7], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xc12971d4 // bfdot za.s[x11, 4], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d5 // bfdot za.s[x11, 5], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xa0422a68 // ld1h { z8.h-z9.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc12971d6 // bfdot za.s[x11, 6], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d7 // bfdot za.s[x11, 7], { z14.h-z15.h }, z8.h\n"
+ "10:" // Unpadded: 0 priming loads
+ ".inst 0xa0402be4 // ld1h { z4.h-z5.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xa0412be6 // ld1h { z6.h-z7.h }, pn10.b/Z, [SP, #0x2, MUL VL]\n"
+ ".inst 0xa0422be8 // ld1h { z8.h-z9.h }, pn10.b/Z, [SP, #0x4, MUL VL]\n"
+ "cbz x16, 20f\n"
+ "add x19, x15, %x[ld_in_row], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x15]\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "sub x16, x16, #0x1\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "sub x14, x14, #0x1\n"
+ ".inst 0x648aaa0c // bfcvtnt z12.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ "cmp x16, x14\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "csel x24, x16, x14, LT\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ "add x15, x15, %x[ld_in_col], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ "sub x14, x14, x24\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ ".inst 0x648aaa0f // bfcvtnt z15.h, p2/M, z16.s\n"
+ "cbz x24, 19f\n"
+ "11:" // Unpadded: Main loop
+ "addvl x23, SP, #6\n"
+ ".inst 0xc1257190 // bfdot za.s[x11, 0], { z12.h-z13.h }, z5.h\n"
+ "addvl x22, SP, #12\n"
+ "ld1w { z23.s }, p1/Z, [x15]\n"
+ ".inst 0xc1247191 // bfdot za.s[x11, 1], { z12.h-z13.h }, z4.h\n"
+ ".inst 0xa0402ae4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x23]\n"
+ "addvl x21, SP, #18\n"
+ "addvl x20, SP, #24\n"
+ ".inst 0xc1257192 // bfdot za.s[x11, 2], { z12.h-z13.h }, z5.h\n"
+ "add x19, x15, %x[ld_in_row], LSL #2\n"
+ "ld1w { z22.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1247193 // bfdot za.s[x11, 3], { z12.h-z13.h }, z4.h\n"
+ ".inst 0xa0402ac4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x22]\n"
+ "subs x24, x24, #0x1\n"
+ "add x15, x15, %x[ld_in_col], LSL #2\n"
+ ".inst 0xc12771b0 // bfdot za.s[x11, 0], { z13.h-z14.h }, z7.h\n"
+ "ld1w { z21.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc12671b1 // bfdot za.s[x11, 1], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xa0412ae6 // ld1h { z6.h-z7.h }, pn10.b/Z, [x23, #0x2, MUL VL]\n"
+ ".inst 0xc1257194 // bfdot za.s[x11, 4], { z12.h-z13.h }, z5.h\n"
+ "ld1w { z20.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1247195 // bfdot za.s[x11, 5], { z12.h-z13.h }, z4.h\n"
+ ".inst 0xa0402aa4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x21]\n"
+ ".inst 0xc12771b2 // bfdot za.s[x11, 2], { z13.h-z14.h }, z7.h\n"
+ "ld1w { z19.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc12671b3 // bfdot za.s[x11, 3], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xa0412ac6 // ld1h { z6.h-z7.h }, pn10.b/Z, [x22, #0x2, MUL VL]\n"
+ ".inst 0xc12971d0 // bfdot za.s[x11, 0], { z14.h-z15.h }, z9.h\n"
+ "ld1w { z18.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc12871d1 // bfdot za.s[x11, 1], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xa0422ae8 // ld1h { z8.h-z9.h }, pn10.b/Z, [x23, #0x4, MUL VL]\n"
+ ".inst 0xc1257196 // bfdot za.s[x11, 6], { z12.h-z13.h }, z5.h\n"
+ "ld1w { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1247197 // bfdot za.s[x11, 7], { z12.h-z13.h }, z4.h\n"
+ ".inst 0xa0402a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc12771b4 // bfdot za.s[x11, 4], { z13.h-z14.h }, z7.h\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ ".inst 0xc12671b5 // bfdot za.s[x11, 5], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xa0412aa6 // ld1h { z6.h-z7.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0xc12971d2 // bfdot za.s[x11, 2], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d3 // bfdot za.s[x11, 3], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xa0422ac8 // ld1h { z8.h-z9.h }, pn10.b/Z, [x22, #0x4, MUL VL]\n"
+ ".inst 0xc12771b6 // bfdot za.s[x11, 6], { z13.h-z14.h }, z7.h\n"
+ ".inst 0xc12671b7 // bfdot za.s[x11, 7], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xa0412a86 // ld1h { z6.h-z7.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc12971d4 // bfdot za.s[x11, 4], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d5 // bfdot za.s[x11, 5], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xa0422aa8 // ld1h { z8.h-z9.h }, pn10.b/Z, [x21, #0x4, MUL VL]\n"
+ ".inst 0xc12971d6 // bfdot za.s[x11, 6], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d7 // bfdot za.s[x11, 7], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xa0422a88 // ld1h { z8.h-z9.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc1251190 // bfdot za.s[x8, 0], { z12.h-z13.h }, z5.h\n"
+ ".inst 0xc1241191 // bfdot za.s[x8, 1], { z12.h-z13.h }, z4.h\n"
+ ".inst 0x658aaaec // bfcvt z12.h, p2/M, z23.s\n"
+ ".inst 0xa0402be4 // ld1h { z4.h-z5.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xc12711b0 // bfdot za.s[x8, 0], { z13.h-z14.h }, z7.h\n"
+ ".inst 0x648aaacc // bfcvtnt z12.h, p2/M, z22.s\n"
+ ".inst 0xc12611b1 // bfdot za.s[x8, 1], { z13.h-z14.h }, z6.h\n"
+ ".inst 0x658aaaad // bfcvt z13.h, p2/M, z21.s\n"
+ ".inst 0xa0412be6 // ld1h { z6.h-z7.h }, pn10.b/Z, [SP, #0x2, MUL VL]\n"
+ ".inst 0xc12911d0 // bfdot za.s[x8, 0], { z14.h-z15.h }, z9.h\n"
+ ".inst 0x648aaa8d // bfcvtnt z13.h, p2/M, z20.s\n"
+ ".inst 0xc12811d1 // bfdot za.s[x8, 1], { z14.h-z15.h }, z8.h\n"
+ ".inst 0x658aaa6e // bfcvt z14.h, p2/M, z19.s\n"
+ ".inst 0x658aaa2f // bfcvt z15.h, p2/M, z17.s\n"
+ "add x8, x8, #0x2\n"
+ ".inst 0xc0066800 // mova { z0.d-z1.d }, za.d[x11, #0]\n"
+ ".inst 0xa0422be8 // ld1h { z8.h-z9.h }, pn10.b/Z, [SP, #0x4, MUL VL]\n"
+ ".inst 0x648aaa4e // bfcvtnt z14.h, p2/M, z18.s\n"
+ ".inst 0xc0066822 // mova { z2.d-z3.d }, za.d[x11, #1]\n"
+ ".inst 0xc1bfcb40 // fclamp { z0.s-z3.s }, z26.s, z31.s\n"
+ "st1w { z0.s }, p1, [x13]\n"
+ "add x13, x13, x10, LSL #2\n"
+ "st1w { z2.s }, p1, [x0]\n"
+ "add x0, x0, x9, LSL #2\n"
+ "add x11, x11, #0x2\n"
+ ".inst 0xc0040b00 // mova za.d[x8, #0], { z24.d-z25.d }\n"
+ "st1w { z1.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ ".inst 0xc0040b01 // mova za.d[x8, #1], { z24.d-z25.d }\n"
+ ".inst 0x648aaa0f // bfcvtnt z15.h, p2/M, z16.s\n"
+ "st1w { z3.s }, p1, [x27]\n"
+ "add x27, x27, x25, LSL #2\n"
+ "bgt 11b\n"
+ "b 19f\n"
+ "12:" // Padded
+ "cbz x21, 17f\n"
+ "cmp x21, #0x1\n"
+ "sub x16, x16, x21\n"
+ "beq 16f\n"
+ "cmp x21, #0x2\n"
+ "beq 15f\n"
+ "cmp x21, #0x3\n"
+ "beq 14f\n"
+ "13:" // Padded: 4 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x15]\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "add x20, x15, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ ".inst 0x648aaa0c // bfcvtnt z12.h, p2/M, z16.s\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "mov x12, #0x4\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "addvl x19, SP, #24\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xa0402a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1257190 // bfdot za.s[x11, 0], { z12.h-z13.h }, z5.h\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ ".inst 0xc1247191 // bfdot za.s[x11, 1], { z12.h-z13.h }, z4.h\n"
+ ".inst 0xa0412a66 // ld1h { z6.h-z7.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ "add x15, x15, %x[ld_in_col], LSL #2\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ ".inst 0x648aaa0f // bfcvtnt z15.h, p2/M, z16.s\n"
+ ".inst 0xc12771b0 // bfdot za.s[x11, 0], { z13.h-z14.h }, z7.h\n"
+ ".inst 0xc12671b1 // bfdot za.s[x11, 1], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xa0422a68 // ld1h { z8.h-z9.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc12971d0 // bfdot za.s[x11, 0], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d1 // bfdot za.s[x11, 1], { z14.h-z15.h }, z8.h\n"
+ "14:" // Padded: 3 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x15]\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "add x21, x15, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0x648aaa0c // bfcvtnt z12.h, p2/M, z16.s\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "mov x12, #0x4\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "addvl x20, SP, #18\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xa0402a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1257190 // bfdot za.s[x11, 0], { z12.h-z13.h }, z5.h\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ "addvl x19, SP, #24\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xc1247191 // bfdot za.s[x11, 1], { z12.h-z13.h }, z4.h\n"
+ ".inst 0xa0402a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19]\n"
+ "add x15, x15, %x[ld_in_col], LSL #2\n"
+ ".inst 0xa0412a86 // ld1h { z6.h-z7.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc1257192 // bfdot za.s[x11, 2], { z12.h-z13.h }, z5.h\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0xc1247193 // bfdot za.s[x11, 3], { z12.h-z13.h }, z4.h\n"
+ ".inst 0x648aaa0f // bfcvtnt z15.h, p2/M, z16.s\n"
+ ".inst 0xc12771b0 // bfdot za.s[x11, 0], { z13.h-z14.h }, z7.h\n"
+ ".inst 0xa0422a88 // ld1h { z8.h-z9.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc12671b1 // bfdot za.s[x11, 1], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xa0412a66 // ld1h { z6.h-z7.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc12771b2 // bfdot za.s[x11, 2], { z13.h-z14.h }, z7.h\n"
+ ".inst 0xc12671b3 // bfdot za.s[x11, 3], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xc12971d0 // bfdot za.s[x11, 0], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d1 // bfdot za.s[x11, 1], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xa0422a68 // ld1h { z8.h-z9.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc12971d2 // bfdot za.s[x11, 2], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d3 // bfdot za.s[x11, 3], { z14.h-z15.h }, z8.h\n"
+ "15:" // Padded: 2 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x15]\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "add x22, x15, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x22]\n"
+ ".inst 0x648aaa0c // bfcvtnt z12.h, p2/M, z16.s\n"
+ "add x22, x22, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x22]\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ "add x22, x22, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z16.s }, p0/Z, [x22]\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "mov x12, #0x4\n"
+ "add x22, x22, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "addvl x21, SP, #12\n"
+ "ld1w { z16.s }, p0/Z, [x22]\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ "add x22, x22, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xa0402aa4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x21]\n"
+ ".inst 0xc1257190 // bfdot za.s[x11, 0], { z12.h-z13.h }, z5.h\n"
+ "ld1w { z16.s }, p0/Z, [x22]\n"
+ "addvl x20, SP, #18\n"
+ "add x22, x22, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xc1247191 // bfdot za.s[x11, 1], { z12.h-z13.h }, z4.h\n"
+ ".inst 0xa0402a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20]\n"
+ "addvl x19, SP, #24\n"
+ ".inst 0xa0412aa6 // ld1h { z6.h-z7.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0xc1257192 // bfdot za.s[x11, 2], { z12.h-z13.h }, z5.h\n"
+ "add x15, x15, %x[ld_in_col], LSL #2\n"
+ "ld1w { z16.s }, p0/Z, [x22]\n"
+ ".inst 0xc1247193 // bfdot za.s[x11, 3], { z12.h-z13.h }, z4.h\n"
+ ".inst 0x648aaa0f // bfcvtnt z15.h, p2/M, z16.s\n"
+ ".inst 0xa0402a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc12771b0 // bfdot za.s[x11, 0], { z13.h-z14.h }, z7.h\n"
+ ".inst 0xc12671b1 // bfdot za.s[x11, 1], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xa0412a86 // ld1h { z6.h-z7.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xa0422aa8 // ld1h { z8.h-z9.h }, pn10.b/Z, [x21, #0x4, MUL VL]\n"
+ ".inst 0xc1257194 // bfdot za.s[x11, 4], { z12.h-z13.h }, z5.h\n"
+ ".inst 0xc1247195 // bfdot za.s[x11, 5], { z12.h-z13.h }, z4.h\n"
+ ".inst 0xc12771b2 // bfdot za.s[x11, 2], { z13.h-z14.h }, z7.h\n"
+ ".inst 0xc12671b3 // bfdot za.s[x11, 3], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xa0412a66 // ld1h { z6.h-z7.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc12971d0 // bfdot za.s[x11, 0], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d1 // bfdot za.s[x11, 1], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xa0422a88 // ld1h { z8.h-z9.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc12771b4 // bfdot za.s[x11, 4], { z13.h-z14.h }, z7.h\n"
+ ".inst 0xc12671b5 // bfdot za.s[x11, 5], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xc12971d2 // bfdot za.s[x11, 2], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d3 // bfdot za.s[x11, 3], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xa0422a68 // ld1h { z8.h-z9.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc12971d4 // bfdot za.s[x11, 4], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d5 // bfdot za.s[x11, 5], { z14.h-z15.h }, z8.h\n"
+ "16:" // Padded: 1 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x15]\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "add x23, x15, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x23]\n"
+ ".inst 0x648aaa0c // bfcvtnt z12.h, p2/M, z16.s\n"
+ "add x23, x23, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x23]\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ "add x23, x23, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z16.s }, p0/Z, [x23]\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "mov x12, #0x4\n"
+ "add x23, x23, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x23]\n"
+ "add x23, x23, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "addvl x22, SP, #6\n"
+ "ld1w { z16.s }, p0/Z, [x23]\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ "add x23, x23, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xa0402ac4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x22]\n"
+ ".inst 0xc1257190 // bfdot za.s[x11, 0], { z12.h-z13.h }, z5.h\n"
+ "ld1w { z16.s }, p0/Z, [x23]\n"
+ "addvl x21, SP, #12\n"
+ "add x23, x23, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xc1247191 // bfdot za.s[x11, 1], { z12.h-z13.h }, z4.h\n"
+ ".inst 0xa0402aa4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x21]\n"
+ "addvl x20, SP, #18\n"
+ ".inst 0xa0412ac6 // ld1h { z6.h-z7.h }, pn10.b/Z, [x22, #0x2, MUL VL]\n"
+ ".inst 0xc1257192 // bfdot za.s[x11, 2], { z12.h-z13.h }, z5.h\n"
+ "addvl x19, SP, #24\n"
+ "add x15, x15, %x[ld_in_col], LSL #2\n"
+ "ld1w { z16.s }, p0/Z, [x23]\n"
+ ".inst 0xc1247193 // bfdot za.s[x11, 3], { z12.h-z13.h }, z4.h\n"
+ ".inst 0x648aaa0f // bfcvtnt z15.h, p2/M, z16.s\n"
+ ".inst 0xa0402a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc12771b0 // bfdot za.s[x11, 0], { z13.h-z14.h }, z7.h\n"
+ ".inst 0xc12671b1 // bfdot za.s[x11, 1], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xa0412aa6 // ld1h { z6.h-z7.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0xa0422ac8 // ld1h { z8.h-z9.h }, pn10.b/Z, [x22, #0x4, MUL VL]\n"
+ ".inst 0xc1257194 // bfdot za.s[x11, 4], { z12.h-z13.h }, z5.h\n"
+ ".inst 0xc1247195 // bfdot za.s[x11, 5], { z12.h-z13.h }, z4.h\n"
+ ".inst 0xa0402a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc12771b2 // bfdot za.s[x11, 2], { z13.h-z14.h }, z7.h\n"
+ ".inst 0xc12671b3 // bfdot za.s[x11, 3], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xa0412a86 // ld1h { z6.h-z7.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc12971d0 // bfdot za.s[x11, 0], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d1 // bfdot za.s[x11, 1], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xa0422aa8 // ld1h { z8.h-z9.h }, pn10.b/Z, [x21, #0x4, MUL VL]\n"
+ ".inst 0xc1257196 // bfdot za.s[x11, 6], { z12.h-z13.h }, z5.h\n"
+ ".inst 0xc1247197 // bfdot za.s[x11, 7], { z12.h-z13.h }, z4.h\n"
+ ".inst 0xc12771b4 // bfdot za.s[x11, 4], { z13.h-z14.h }, z7.h\n"
+ ".inst 0xc12671b5 // bfdot za.s[x11, 5], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xa0412a66 // ld1h { z6.h-z7.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc12971d2 // bfdot za.s[x11, 2], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d3 // bfdot za.s[x11, 3], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xa0422a88 // ld1h { z8.h-z9.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc12771b6 // bfdot za.s[x11, 6], { z13.h-z14.h }, z7.h\n"
+ ".inst 0xc12671b7 // bfdot za.s[x11, 7], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xc12971d4 // bfdot za.s[x11, 4], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d5 // bfdot za.s[x11, 5], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xa0422a68 // ld1h { z8.h-z9.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc12971d6 // bfdot za.s[x11, 6], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d7 // bfdot za.s[x11, 7], { z14.h-z15.h }, z8.h\n"
+ "17:" // Padded: 0 priming loads
+ ".inst 0xa0402be4 // ld1h { z4.h-z5.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xa0412be6 // ld1h { z6.h-z7.h }, pn10.b/Z, [SP, #0x2, MUL VL]\n"
+ ".inst 0xa0422be8 // ld1h { z8.h-z9.h }, pn10.b/Z, [SP, #0x4, MUL VL]\n"
+ "cbz x16, 20f\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x15]\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "add x19, x15, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x648aaa0c // bfcvtnt z12.h, p2/M, z16.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "sub x16, x16, #0x1\n"
+ ".inst 0x648aaa0f // bfcvtnt z15.h, p2/M, z16.s\n"
+ "sub x14, x14, #0x1\n"
+ "cmp x16, x14\n"
+ "csel x24, x16, x14, LT\n"
+ "add x15, x15, %x[ld_in_col], LSL #2\n"
+ "sub x14, x14, x24\n"
+ "cbz x24, 19f\n"
+ "18:" // Padded: Main loop
+ "addvl x23, SP, #6\n"
+ ".inst 0xc1257190 // bfdot za.s[x11, 0], { z12.h-z13.h }, z5.h\n"
+ "addvl x22, SP, #12\n"
+ ".inst 0xc1247191 // bfdot za.s[x11, 1], { z12.h-z13.h }, z4.h\n"
+ ".inst 0xa0402ae4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x23]\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1257192 // bfdot za.s[x11, 2], { z12.h-z13.h }, z5.h\n"
+ "ld1w { z23.s }, p0/Z, [x15]\n"
+ "add x21, x15, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ ".inst 0xc1247193 // bfdot za.s[x11, 3], { z12.h-z13.h }, z4.h\n"
+ ".inst 0xa0402ac4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x22]\n"
+ "addvl x20, SP, #18\n"
+ "addvl x19, SP, #24\n"
+ ".inst 0xc12771b0 // bfdot za.s[x11, 0], { z13.h-z14.h }, z7.h\n"
+ "ld1w { z22.s }, p0/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc12671b1 // bfdot za.s[x11, 1], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xa0412ae6 // ld1h { z6.h-z7.h }, pn10.b/Z, [x23, #0x2, MUL VL]\n"
+ "subs x24, x24, #0x1\n"
+ "add x15, x15, %x[ld_in_col], LSL #2\n"
+ ".inst 0xc1257194 // bfdot za.s[x11, 4], { z12.h-z13.h }, z5.h\n"
+ "ld1w { z21.s }, p0/Z, [x21]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x4\n"
+ ".inst 0xc1247195 // bfdot za.s[x11, 5], { z12.h-z13.h }, z4.h\n"
+ ".inst 0xa0402a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc12771b2 // bfdot za.s[x11, 2], { z13.h-z14.h }, z7.h\n"
+ "ld1w { z20.s }, p0/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc12671b3 // bfdot za.s[x11, 3], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xa0412ac6 // ld1h { z6.h-z7.h }, pn10.b/Z, [x22, #0x2, MUL VL]\n"
+ ".inst 0xc12971d0 // bfdot za.s[x11, 0], { z14.h-z15.h }, z9.h\n"
+ "ld1w { z19.s }, p0/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ ".inst 0xc12871d1 // bfdot za.s[x11, 1], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xa0422ae8 // ld1h { z8.h-z9.h }, pn10.b/Z, [x23, #0x4, MUL VL]\n"
+ ".inst 0xc1257196 // bfdot za.s[x11, 6], { z12.h-z13.h }, z5.h\n"
+ "ld1w { z18.s }, p0/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc1247197 // bfdot za.s[x11, 7], { z12.h-z13.h }, z4.h\n"
+ ".inst 0xa0402a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc12771b4 // bfdot za.s[x11, 4], { z13.h-z14.h }, z7.h\n"
+ "ld1w { z17.s }, p0/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xc12671b5 // bfdot za.s[x11, 5], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xa0412a86 // ld1h { z6.h-z7.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc12971d2 // bfdot za.s[x11, 2], { z14.h-z15.h }, z9.h\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0xc12871d3 // bfdot za.s[x11, 3], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xa0422ac8 // ld1h { z8.h-z9.h }, pn10.b/Z, [x22, #0x4, MUL VL]\n"
+ ".inst 0xc12771b6 // bfdot za.s[x11, 6], { z13.h-z14.h }, z7.h\n"
+ ".inst 0xc12671b7 // bfdot za.s[x11, 7], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xa0412a66 // ld1h { z6.h-z7.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc12971d4 // bfdot za.s[x11, 4], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d5 // bfdot za.s[x11, 5], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xa0422a88 // ld1h { z8.h-z9.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc12971d6 // bfdot za.s[x11, 6], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d7 // bfdot za.s[x11, 7], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xa0422a68 // ld1h { z8.h-z9.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc1251190 // bfdot za.s[x8, 0], { z12.h-z13.h }, z5.h\n"
+ ".inst 0xc1241191 // bfdot za.s[x8, 1], { z12.h-z13.h }, z4.h\n"
+ ".inst 0x658aaaec // bfcvt z12.h, p2/M, z23.s\n"
+ ".inst 0xa0402be4 // ld1h { z4.h-z5.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xc12711b0 // bfdot za.s[x8, 0], { z13.h-z14.h }, z7.h\n"
+ ".inst 0x648aaacc // bfcvtnt z12.h, p2/M, z22.s\n"
+ ".inst 0xc12611b1 // bfdot za.s[x8, 1], { z13.h-z14.h }, z6.h\n"
+ ".inst 0x658aaaad // bfcvt z13.h, p2/M, z21.s\n"
+ ".inst 0xa0412be6 // ld1h { z6.h-z7.h }, pn10.b/Z, [SP, #0x2, MUL VL]\n"
+ ".inst 0xc12911d0 // bfdot za.s[x8, 0], { z14.h-z15.h }, z9.h\n"
+ ".inst 0x648aaa8d // bfcvtnt z13.h, p2/M, z20.s\n"
+ ".inst 0xc12811d1 // bfdot za.s[x8, 1], { z14.h-z15.h }, z8.h\n"
+ ".inst 0x658aaa6e // bfcvt z14.h, p2/M, z19.s\n"
+ ".inst 0x658aaa2f // bfcvt z15.h, p2/M, z17.s\n"
+ "add x8, x8, #0x2\n"
+ ".inst 0xc0066800 // mova { z0.d-z1.d }, za.d[x11, #0]\n"
+ ".inst 0xa0422be8 // ld1h { z8.h-z9.h }, pn10.b/Z, [SP, #0x4, MUL VL]\n"
+ ".inst 0x648aaa4e // bfcvtnt z14.h, p2/M, z18.s\n"
+ ".inst 0xc0066822 // mova { z2.d-z3.d }, za.d[x11, #1]\n"
+ ".inst 0xc1bfcb40 // fclamp { z0.s-z3.s }, z26.s, z31.s\n"
+ "st1w { z0.s }, p1, [x13]\n"
+ "add x13, x13, x10, LSL #2\n"
+ "st1w { z2.s }, p1, [x0]\n"
+ "add x0, x0, x9, LSL #2\n"
+ "add x11, x11, #0x2\n"
+ ".inst 0xc0040b00 // mova za.d[x8, #0], { z24.d-z25.d }\n"
+ "st1w { z1.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ ".inst 0xc0040b01 // mova za.d[x8, #1], { z24.d-z25.d }\n"
+ ".inst 0x648aaa0f // bfcvtnt z15.h, p2/M, z16.s\n"
+ "st1w { z3.s }, p1, [x27]\n"
+ "add x27, x27, x25, LSL #2\n"
+ "bgt 18b\n"
+ "19:" // Main loop tail
+ "addvl x22, SP, #6\n"
+ ".inst 0xc1257190 // bfdot za.s[x11, 0], { z12.h-z13.h }, z5.h\n"
+ "addvl x21, SP, #12\n"
+ ".inst 0xc1247191 // bfdot za.s[x11, 1], { z12.h-z13.h }, z4.h\n"
+ ".inst 0xa0402ac4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x22]\n"
+ "addvl x20, SP, #18\n"
+ "addvl x19, SP, #24\n"
+ ".inst 0xc1257192 // bfdot za.s[x11, 2], { z12.h-z13.h }, z5.h\n"
+ ".inst 0xc1247193 // bfdot za.s[x11, 3], { z12.h-z13.h }, z4.h\n"
+ ".inst 0xa0402aa4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x21]\n"
+ ".inst 0xc12771b0 // bfdot za.s[x11, 0], { z13.h-z14.h }, z7.h\n"
+ ".inst 0xc12671b1 // bfdot za.s[x11, 1], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xa0412ac6 // ld1h { z6.h-z7.h }, pn10.b/Z, [x22, #0x2, MUL VL]\n"
+ ".inst 0xc1257194 // bfdot za.s[x11, 4], { z12.h-z13.h }, z5.h\n"
+ ".inst 0xc1247195 // bfdot za.s[x11, 5], { z12.h-z13.h }, z4.h\n"
+ ".inst 0xa0402a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc12771b2 // bfdot za.s[x11, 2], { z13.h-z14.h }, z7.h\n"
+ ".inst 0xc12671b3 // bfdot za.s[x11, 3], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xa0412aa6 // ld1h { z6.h-z7.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0xc12971d0 // bfdot za.s[x11, 0], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d1 // bfdot za.s[x11, 1], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xa0422ac8 // ld1h { z8.h-z9.h }, pn10.b/Z, [x22, #0x4, MUL VL]\n"
+ ".inst 0xc1257196 // bfdot za.s[x11, 6], { z12.h-z13.h }, z5.h\n"
+ ".inst 0xc1247197 // bfdot za.s[x11, 7], { z12.h-z13.h }, z4.h\n"
+ ".inst 0xa0402a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc12771b4 // bfdot za.s[x11, 4], { z13.h-z14.h }, z7.h\n"
+ ".inst 0xc12671b5 // bfdot za.s[x11, 5], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xa0412a86 // ld1h { z6.h-z7.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc12971d2 // bfdot za.s[x11, 2], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d3 // bfdot za.s[x11, 3], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xa0422aa8 // ld1h { z8.h-z9.h }, pn10.b/Z, [x21, #0x4, MUL VL]\n"
+ ".inst 0xc12771b6 // bfdot za.s[x11, 6], { z13.h-z14.h }, z7.h\n"
+ ".inst 0xc12671b7 // bfdot za.s[x11, 7], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xa0412a66 // ld1h { z6.h-z7.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc12971d4 // bfdot za.s[x11, 4], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d5 // bfdot za.s[x11, 5], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xa0422a88 // ld1h { z8.h-z9.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc12971d6 // bfdot za.s[x11, 6], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12871d7 // bfdot za.s[x11, 7], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xa0422a68 // ld1h { z8.h-z9.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc1251190 // bfdot za.s[x8, 0], { z12.h-z13.h }, z5.h\n"
+ ".inst 0xc1241191 // bfdot za.s[x8, 1], { z12.h-z13.h }, z4.h\n"
+ ".inst 0xc12711b0 // bfdot za.s[x8, 0], { z13.h-z14.h }, z7.h\n"
+ ".inst 0xc12611b1 // bfdot za.s[x8, 1], { z13.h-z14.h }, z6.h\n"
+ ".inst 0xc12911d0 // bfdot za.s[x8, 0], { z14.h-z15.h }, z9.h\n"
+ ".inst 0xc12811d1 // bfdot za.s[x8, 1], { z14.h-z15.h }, z8.h\n"
+ "add x8, x8, #0x2\n"
+ ".inst 0xc0066800 // mova { z0.d-z1.d }, za.d[x11, #0]\n"
+ ".inst 0xc0066822 // mova { z2.d-z3.d }, za.d[x11, #1]\n"
+ ".inst 0xc1bfcb40 // fclamp { z0.s-z3.s }, z26.s, z31.s\n"
+ "st1w { z0.s }, p1, [x13]\n"
+ "add x13, x13, x10, LSL #2\n"
+ "st1w { z2.s }, p1, [x0]\n"
+ "add x0, x0, x9, LSL #2\n"
+ "add x11, x11, #0x2\n"
+ ".inst 0xc0040b00 // mova za.d[x8, #0], { z24.d-z25.d }\n"
+ "st1w { z1.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ ".inst 0xc0040b01 // mova za.d[x8, #1], { z24.d-z25.d }\n"
+ "st1w { z3.s }, p1, [x27]\n"
+ "add x27, x27, x25, LSL #2\n"
+ "20:" // Main loop skip tail
+ "cbz x14, 22f\n"
+ "21:" // Right padding loop
+ ".inst 0xc0066800 // mova { z0.d-z1.d }, za.d[x11, #0]\n"
+ "add x8, x8, #0x2\n"
+ "subs x14, x14, #0x1\n"
+ ".inst 0xc0066822 // mova { z2.d-z3.d }, za.d[x11, #1]\n"
+ ".inst 0xc1bfcb40 // fclamp { z0.s-z3.s }, z26.s, z31.s\n"
+ "st1w { z0.s }, p1, [x13]\n"
+ "add x13, x13, x10, LSL #2\n"
+ "st1w { z2.s }, p1, [x0]\n"
+ "add x0, x0, x9, LSL #2\n"
+ "add x11, x11, #0x2\n"
+ ".inst 0xc0040b00 // mova za.d[x8, #0], { z24.d-z25.d }\n"
+ "st1w { z1.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ ".inst 0xc0040b01 // mova za.d[x8, #1], { z24.d-z25.d }\n"
+ "st1w { z3.s }, p1, [x27]\n"
+ "add x27, x27, x25, LSL #2\n"
+ "bgt 21b\n"
+ "22:" // End
+ "ldr x19, [%x[args], %[offsetof_Args_weights]]\n"
+ "incb x19, ALL, MUL #16\n"
+ "incb x19, ALL, MUL #9\n"
+ "str x19, [%x[args], %[offsetof_Args_weights]]\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_in_vl]]\n"
+ "incw x17\n"
+ "whilelt p1.s, x17, x7\n"
+ "ldr x15, [%x[args], %[offsetof_Args_inptr]]\n"
+ "add x15, x15, x19, LSL #2\n"
+ "str x15, [%x[args], %[offsetof_Args_inptr]]\n"
+ "ldr x24, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "ldr x23, [%x[args], %[offsetof_Args_ld_out_vls]]\n"
+ "ldp x22, x21, [x24, #0x0]\n"
+ "ldp x20, x19, [x23, #0x0]\n"
+ "add x22, x22, x20, LSL #2\n"
+ "add x21, x21, x19, LSL #2\n"
+ "stp x22, x21, [x24, #0x0]\n"
+ "ldp x22, x21, [x24, #0x10]\n"
+ "ldp x20, x19, [x23, #0x10]\n"
+ "add x22, x22, x20, LSL #2\n"
+ "add x21, x21, x19, LSL #2\n"
+ "stp x22, x21, [x24, #0x10]\n"
+ "b.any 1b\n"
+ "addvl SP, SP, #30\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [ld_in_col] "r" (ld_in_col), [ld_in_row] "r" (ld_in_row), [offsetof_Args_bias] "I" (offsetof(Args, bias)), [offsetof_Args_clamp_max] "I" (offsetof(Args, clamp_max)), [offsetof_Args_clamp_min] "I" (offsetof(Args, clamp_min)), [offsetof_Args_current_channel] "I" (offsetof(Args, current_channel)), [offsetof_Args_inptr] "I" (offsetof(Args, inptr)), [offsetof_Args_input_cols] "I" (offsetof(Args, input_cols)), [offsetof_Args_ld_in_vl] "I" (offsetof(Args, ld_in_vl)), [offsetof_Args_ld_out_cols] "I" (offsetof(Args, ld_out_cols)), [offsetof_Args_ld_out_vls] "I" (offsetof(Args, ld_out_vls)), [offsetof_Args_n_channels] "I" (offsetof(Args, n_channels)), [offsetof_Args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_Args_output_cols] "I" (offsetof(Args, output_cols)), [offsetof_Args_pad_bottom] "I" (offsetof(Args, pad_bottom)), [offsetof_Args_pad_left] "I" (offsetof(Args, pad_left)), [offsetof_Args_pad_top] "I" (offsetof(Args, pad_top)), [offsetof_Args_weights] "I" (offsetof(Args, weights))
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x0", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32bf16fp32_planar_5x5_s2_4rows_dot_za.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32bf16fp32_planar_5x5_s2_4rows_dot_za.hpp
new file mode 100644
index 0000000..c99cf51
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32bf16fp32_planar_5x5_s2_4rows_dot_za.hpp
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_fp32bf16fp32_planar_5x5_s2_4rows_dot_za_impl(
+ const float *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const float *weights,
+ const float *bias,
+ float **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ float act_min,
+ float act_max
+);
+
+class sme2_fp32bf16fp32_planar_5x5_s2_4rows_dot_za : public PlanarStrategy<float, float>
+{
+ using Parent = PlanarStrategy<float, float>;
+
+ public:
+ using return_type = float;
+ constexpr static auto output_rows = 4u;
+ constexpr static auto kernel_rows = 5u, kernel_cols = 5u;
+ constexpr static auto stride_rows = 2u, stride_cols = 2u;
+ constexpr static auto vl_type = arm_gemm::VLType::SME;
+
+ sme2_fp32bf16fp32_planar_5x5_s2_4rows_dot_za(const CPUInfo *)
+ : Parent(kernel_rows, kernel_cols, stride_rows, stride_cols, output_rows, vl_type)
+ {
+ }
+
+ typename Parent::KernelType get_kernel(void) const override
+ {
+ return sme2_fp32bf16fp32_planar_5x5_s2_4rows_dot_za_impl;
+ }
+};
+
+} // namespace depthwise
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32bf16fp32_planar_5x5_s2_4rows_dot_za/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32bf16fp32_planar_5x5_s2_4rows_dot_za/generic.cpp
new file mode 100644
index 0000000..eae8994
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32bf16fp32_planar_5x5_s2_4rows_dot_za/generic.cpp
@@ -0,0 +1,1246 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <algorithm>
+#include <cstddef>
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_fp32bf16fp32_planar_5x5_s2_4rows_dot_za_impl(
+ const float *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const float *weights,
+ const float *bias,
+ float **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ float act_min,
+ float act_max
+)
+{
+ struct Args
+ {
+ const float *inptr;
+ size_t ld_in_vl;
+ long unsigned int pad_top, pad_bottom, pad_left;
+ const float *weights;
+ const float *bias;
+ long unsigned int input_cols, output_cols;
+ float **outptrs;
+ const size_t *ld_out_cols;
+ const size_t *ld_out_vls;
+ long unsigned int current_channel, n_channels;
+ float clamp_min, clamp_max;
+ };
+
+ Args args = { inptr, ld_in_vl, pad_top, 11u - std::min(11u, pad_top + valid_input_rows), pad_left, weights, bias, valid_input_cols, output_cols, outptrs, outlds, outvllds, start_channel, valid_channels, act_min, act_max };
+
+ __asm__ __volatile__(
+ "ldr x4, [%x[args], %[offsetof_Args_pad_bottom]]\n"
+ "mov x19, #0xb\n"
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "sub x19, x19, x4\n"
+ "ldr x5, [%x[args], %[offsetof_Args_pad_top]]\n"
+ "ptrue p2.b\n"
+ ".inst 0x25207812 // ptrue pn10.b\n"
+ "ld1rw { z30.s }, p2/Z, [%x[args], %[offsetof_Args_clamp_min]]\n"
+ "ldr x6, [%x[args], %[offsetof_Args_n_channels]]\n"
+ "whilelt p1.s, XZR, x6\n"
+ "whilelt p9.s, XZR, x19\n"
+ "ld1rw { z22.s }, p2/Z, [%x[args], %[offsetof_Args_clamp_max]]\n"
+ "whilelt p8.s, XZR, x5\n"
+ "addvl SP, SP, #-15\n"
+ "ldr x7, [%x[args], %[offsetof_Args_current_channel]]\n"
+ "eor p8.b, p2/Z, p8.b, p9.b\n"
+ "1:" // Channel loop
+ "ldr x19, [%x[args], %[offsetof_Args_bias]]\n"
+ "fmov z4.s, #0x0\n"
+ "cbz x19, 2f\n"
+ "ld1w { z4.s }, p1/Z, [x19, x7, LSL #2]\n"
+ "2:" // Load bias: Done
+ "ldr x19, [%x[args], %[offsetof_Args_weights]]\n"
+ "mov x20, x19\n"
+ "ld1w { z31.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ "ld1w { z16.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ ".inst 0x658aabe1 // bfcvt z1.h, p2/M, z31.s\n"
+ "incb x19\n"
+ "ld1w { z13.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ ".inst 0x658aa9a9 // bfcvt z9.h, p2/M, z13.s\n"
+ "addvl x23, SP, #15\n"
+ "ld1w { z18.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ ".inst 0x648aaa01 // bfcvtnt z1.h, p2/M, z16.s\n"
+ "addvl x23, x23, #-3\n"
+ "ld1w { z15.s }, p2/Z, [x20]\n"
+ "mov x20, x19\n"
+ "st1h { z1.h }, p2, [x23]\n"
+ ".inst 0x648aaa49 // bfcvtnt z9.h, p2/M, z18.s\n"
+ "ld1w { z31.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ ".inst 0x658aabe1 // bfcvt z1.h, p2/M, z31.s\n"
+ "incb x19\n"
+ "ld1w { z16.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ "st1h { z9.h }, p2, [x23, #1, MUL VL]\n"
+ ".inst 0x658aa9e2 // bfcvt z2.h, p2/M, z15.s\n"
+ "ld1w { z13.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ ".inst 0x658aa9a9 // bfcvt z9.h, p2/M, z13.s\n"
+ ".inst 0x648aaa01 // bfcvtnt z1.h, p2/M, z16.s\n"
+ "ld1w { z18.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ "st1h { z2.h }, p2, [x23, #2, MUL VL]\n"
+ "addvl x23, x23, #-3\n"
+ "ld1w { z15.s }, p2/Z, [x20]\n"
+ "mov x20, x19\n"
+ "st1h { z1.h }, p2, [x23]\n"
+ ".inst 0x648aaa49 // bfcvtnt z9.h, p2/M, z18.s\n"
+ "ld1w { z31.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ "incb x19\n"
+ ".inst 0x658aabe1 // bfcvt z1.h, p2/M, z31.s\n"
+ "ld1w { z16.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ ".inst 0x658aa9e2 // bfcvt z2.h, p2/M, z15.s\n"
+ "st1h { z9.h }, p2, [x23, #1, MUL VL]\n"
+ "ld1w { z13.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ ".inst 0x658aa9a9 // bfcvt z9.h, p2/M, z13.s\n"
+ "st1h { z2.h }, p2, [x23, #2, MUL VL]\n"
+ "ld1w { z18.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ "addvl x23, x23, #-3\n"
+ ".inst 0x648aaa01 // bfcvtnt z1.h, p2/M, z16.s\n"
+ "ld1w { z15.s }, p2/Z, [x20]\n"
+ "mov x20, x19\n"
+ "st1h { z1.h }, p2, [x23]\n"
+ ".inst 0x648aaa49 // bfcvtnt z9.h, p2/M, z18.s\n"
+ "ld1w { z31.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ ".inst 0x658aabe1 // bfcvt z1.h, p2/M, z31.s\n"
+ "incb x19\n"
+ "ld1w { z16.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ ".inst 0x658aa9e2 // bfcvt z2.h, p2/M, z15.s\n"
+ "st1h { z9.h }, p2, [x23, #1, MUL VL]\n"
+ "ld1w { z13.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ ".inst 0x648aaa01 // bfcvtnt z1.h, p2/M, z16.s\n"
+ ".inst 0x658aa9a9 // bfcvt z9.h, p2/M, z13.s\n"
+ "ld1w { z18.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ "ldr x17, [%x[args], %[offsetof_Args_input_cols]]\n"
+ "st1h { z2.h }, p2, [x23, #2, MUL VL]\n"
+ "ld1w { z15.s }, p2/Z, [x20]\n"
+ "mov x20, x19\n"
+ "addvl x23, x23, #-3\n"
+ "st1h { z1.h }, p2, [x23]\n"
+ "ld1w { z31.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ ".inst 0x648aaa49 // bfcvtnt z9.h, p2/M, z18.s\n"
+ "st1h { z9.h }, p2, [x23, #1, MUL VL]\n"
+ "ld1w { z16.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ ".inst 0x658aabe1 // bfcvt z1.h, p2/M, z31.s\n"
+ ".inst 0x658aa9e2 // bfcvt z2.h, p2/M, z15.s\n"
+ "ld1w { z13.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ ".inst 0x658aa9a9 // bfcvt z9.h, p2/M, z13.s\n"
+ "ldr x16, [%x[args], %[offsetof_Args_inptr]]\n"
+ "ld1w { z18.s }, p2/Z, [x20]\n"
+ "incb x20, ALL, MUL #5\n"
+ "sub x19, x17, #0x1\n"
+ "st1h { z2.h }, p2, [x23, #2, MUL VL]\n"
+ "ld1w { z15.s }, p2/Z, [x20]\n"
+ "orr x22, x19, %x[ld_in_col], LSL #18\n"
+ "addvl x23, x23, #-3\n"
+ "mov z5.d, z4.d\n"
+ "orr x22, x6, x22, LSL #20\n"
+ "mov x21, #0xb\n"
+ "mov z6.d, z4.d\n"
+ "mov z7.d, z4.d\n"
+ "add x20, x5, x4\n"
+ "lsl x19, %x[ld_in_row], #0x2\n"
+ ".inst 0x648aaa01 // bfcvtnt z1.h, p2/M, z16.s\n"
+ "st1h { z1.h }, p2, [x23]\n"
+ ".inst 0x648aaa49 // bfcvtnt z9.h, p2/M, z18.s\n"
+ "st1h { z9.h }, p2, [x23, #1, MUL VL]\n"
+ ".inst 0x658aa9e2 // bfcvt z2.h, p2/M, z15.s\n"
+ "mov x8, #0x0\n"
+ "st1h { z2.h }, p2, [x23, #2, MUL VL]\n"
+ "ldr x15, [%x[args], %[offsetof_Args_output_cols]]\n"
+ "lsl x22, x22, #0x2\n"
+ "sub x21, x21, x20\n"
+ "madd x19, x19, x5, x16\n"
+ "3:" // Issue prefetches
+ "subs x21, x21, #0x1\n"
+ ".inst 0xf8b64a7c // rprfm pldstrm, x22, [x19]\n"
+ "add x19, x19, %x[ld_in_col], LSL #2\n"
+ "bgt 3b\n"
+ "ldr x24, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "lsl x19, %x[ld_in_row], #0x2\n"
+ "msub x16, x5, x19, x16\n"
+ ".inst 0xc0040c80 // mova za.d[x8, #0], { z4.d-z7.d }\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_out_cols]]\n"
+ ".inst 0xc0040c81 // mova za.d[x8, #1], { z4.d-z7.d }\n"
+ "mov x21, #0x4\n"
+ "ldp x14, x13, [x24], #0x10\n"
+ ".inst 0xc0040c82 // mova za.d[x8, #2], { z4.d-z7.d }\n"
+ "ldp x11, x10, [x19], #0x10\n"
+ ".inst 0xc0040c83 // mova za.d[x8, #3], { z4.d-z7.d }\n"
+ "ldr x20, [%x[args], %[offsetof_Args_pad_left]]\n"
+ ".inst 0xc0040c84 // mova za.d[x8, #4], { z4.d-z7.d }\n"
+ "ldp x9, x28, [x24], #0x10\n"
+ "ldp x27, x26, [x19], #0x10\n"
+ "cbz x20, 5f\n"
+ "cmp x20, x21\n"
+ "csel x19, x20, x21, LT\n"
+ "sub x20, x20, x19\n"
+ "sub x21, x21, x19\n"
+ "cbz x20, 5f\n"
+ ".inst 0xc0060c18 // mova { z24.d-z27.d }, za.d[x8, #0]\n"
+ "and x21, x20, #0x1\n"
+ "add x20, x20, #0x1\n"
+ ".inst 0xc1b6cbd8 // fclamp { z24.s-z27.s }, z30.s, z22.s\n"
+ "lsr x20, x20, #0x1\n"
+ "sub x15, x15, x20\n"
+ "4:" // Left padding
+ "subs x20, x20, #0x1\n"
+ "st1w { z24.s }, p1, [x14]\n"
+ "add x14, x14, x11, LSL #2\n"
+ "st1w { z25.s }, p1, [x13]\n"
+ "add x13, x13, x10, LSL #2\n"
+ "st1w { z26.s }, p1, [x9]\n"
+ "add x9, x9, x27, LSL #2\n"
+ "st1w { z27.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ "bgt 4b\n"
+ "5:" // Left padding: End
+ "adds XZR, x5, x4\n"
+ "bne 12f\n"
+ "cbz x21, 10f\n"
+ "cmp x21, #0x1\n"
+ "sub x17, x17, x21\n"
+ "beq 9f\n"
+ "cmp x21, #0x2\n"
+ "beq 8f\n"
+ "cmp x21, #0x3\n"
+ "beq 7f\n"
+ "6:" // Unpadded: 4 priming loads
+ "add x20, x16, %x[ld_in_row], LSL #2\n"
+ "ld1w { z23.s }, p1/Z, [x16]\n"
+ ".inst 0x658aaaea // bfcvt z10.h, p2/M, z23.s\n"
+ "addvl x19, SP, #12\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0a // bfcvtnt z10.h, p2/M, z16.s\n"
+ "add x16, x16, %x[ld_in_col], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0b // bfcvt z11.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0b // bfcvtnt z11.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0c // bfcvtnt z12.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ ".inst 0xa1402a61 // ld1h { z1.h, z9.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1311150 // bfdot za.s[x8, 0], { z10.h-z13.h }, z1.h\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ ".inst 0xc1391170 // bfdot za.s[x8, 0], { z11.h-z14.h }, z9.h\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ "ld1h { z2.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc1321190 // bfdot za.s[x8, 0], { z12.h-z15.h }, z2.h\n"
+ "7:" // Unpadded: 3 priming loads
+ "add x20, x16, %x[ld_in_row], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x16]\n"
+ ".inst 0x658aaa0a // bfcvt z10.h, p2/M, z16.s\n"
+ "addvl x19, SP, #9\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0a // bfcvtnt z10.h, p2/M, z16.s\n"
+ "add x16, x16, %x[ld_in_col], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0b // bfcvt z11.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0b // bfcvtnt z11.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0c // bfcvtnt z12.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ ".inst 0xa1402a61 // ld1h { z1.h, z9.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1311150 // bfdot za.s[x8, 0], { z10.h-z13.h }, z1.h\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ ".inst 0xc1391170 // bfdot za.s[x8, 0], { z11.h-z14.h }, z9.h\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ "ld1h { z2.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc1321190 // bfdot za.s[x8, 0], { z12.h-z15.h }, z2.h\n"
+ "8:" // Unpadded: 2 priming loads
+ "add x21, x16, %x[ld_in_row], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x16]\n"
+ ".inst 0x658aaa0a // bfcvt z10.h, p2/M, z16.s\n"
+ "addvl x20, SP, #6\n"
+ "ld1w { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0a // bfcvtnt z10.h, p2/M, z16.s\n"
+ "addvl x19, SP, #12\n"
+ "ld1w { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0b // bfcvt z11.h, p2/M, z16.s\n"
+ "add x16, x16, %x[ld_in_col], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0b // bfcvtnt z11.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0c // bfcvtnt z12.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ ".inst 0xa1402a81 // ld1h { z1.h, z9.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1311150 // bfdot za.s[x8, 0], { z10.h-z13.h }, z1.h\n"
+ "ld1w { z16.s }, p1/Z, [x21]\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1391170 // bfdot za.s[x8, 0], { z11.h-z14.h }, z9.h\n"
+ ".inst 0xa1402a61 // ld1h { z1.h, z9.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1311151 // bfdot za.s[x8, 1], { z10.h-z13.h }, z1.h\n"
+ "ld1w { z16.s }, p1/Z, [x21]\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ ".inst 0xc1391171 // bfdot za.s[x8, 1], { z11.h-z14.h }, z9.h\n"
+ "ld1h { z2.h }, p2/Z, [x20, #2, MUL VL]\n"
+ ".inst 0xc1321190 // bfdot za.s[x8, 0], { z12.h-z15.h }, z2.h\n"
+ "ld1h { z2.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc1321191 // bfdot za.s[x8, 1], { z12.h-z15.h }, z2.h\n"
+ "9:" // Unpadded: 1 priming loads
+ "add x21, x16, %x[ld_in_row], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x16]\n"
+ ".inst 0x658aaa0a // bfcvt z10.h, p2/M, z16.s\n"
+ "addvl x20, SP, #3\n"
+ "ld1w { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0a // bfcvtnt z10.h, p2/M, z16.s\n"
+ "addvl x19, SP, #9\n"
+ "ld1w { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0b // bfcvt z11.h, p2/M, z16.s\n"
+ "add x16, x16, %x[ld_in_col], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0b // bfcvtnt z11.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0c // bfcvtnt z12.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ ".inst 0xa1402a81 // ld1h { z1.h, z9.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1311150 // bfdot za.s[x8, 0], { z10.h-z13.h }, z1.h\n"
+ "ld1w { z16.s }, p1/Z, [x21]\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1391170 // bfdot za.s[x8, 0], { z11.h-z14.h }, z9.h\n"
+ ".inst 0xa1402a61 // ld1h { z1.h, z9.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1311151 // bfdot za.s[x8, 1], { z10.h-z13.h }, z1.h\n"
+ "ld1w { z16.s }, p1/Z, [x21]\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ ".inst 0xc1391171 // bfdot za.s[x8, 1], { z11.h-z14.h }, z9.h\n"
+ "ld1h { z2.h }, p2/Z, [x20, #2, MUL VL]\n"
+ ".inst 0xc1321190 // bfdot za.s[x8, 0], { z12.h-z15.h }, z2.h\n"
+ "ld1h { z2.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc1321191 // bfdot za.s[x8, 1], { z12.h-z15.h }, z2.h\n"
+ "10:" // Unpadded: 0 priming loads
+ "cmp x17, #0x2\n"
+ ".inst 0xa1402be1 // ld1h { z1.h, z9.h }, pn10.b/Z, [SP]\n"
+ "ld1h { z2.h }, p2/Z, [SP, #2, MUL VL]\n"
+ "blt 20f\n"
+ "add x20, x16, %x[ld_in_row], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x16]\n"
+ ".inst 0x658aaa0a // bfcvt z10.h, p2/M, z16.s\n"
+ "sub x17, x17, #0x2\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ "sub x15, x15, #0x1\n"
+ ".inst 0x648aaa0a // bfcvtnt z10.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0b // bfcvt z11.h, p2/M, z16.s\n"
+ "lsr x19, x17, #0x1\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ "cmp x19, x15\n"
+ ".inst 0x648aaa0b // bfcvtnt z11.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "csel x25, x19, x15, LT\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0c // bfcvtnt z12.h, p2/M, z16.s\n"
+ "add x16, x16, %x[ld_in_col], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ "and x17, x17, #0x1\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "sub x15, x15, x25\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x20]\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ "cbz x25, 19f\n"
+ "11:" // Unpadded: Main loop
+ ".inst 0xc1311150 // bfdot za.s[x8, 0], { z10.h-z13.h }, z1.h\n"
+ "addvl x24, SP, #6\n"
+ "addvl x23, SP, #12\n"
+ "ld1w { z18.s }, p1/Z, [x16]\n"
+ ".inst 0xc1391170 // bfdot za.s[x8, 0], { z11.h-z14.h }, z9.h\n"
+ ".inst 0xa1402b01 // ld1h { z1.h, z9.h }, pn10.b/Z, [x24]\n"
+ "add x22, x16, %x[ld_in_row], LSL #2\n"
+ "addvl x21, SP, #3\n"
+ ".inst 0xc1311151 // bfdot za.s[x8, 1], { z10.h-z13.h }, z1.h\n"
+ "ld1w { z17.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row], LSL #2\n"
+ "add x16, x16, %x[ld_in_col], LSL #2\n"
+ ".inst 0xc1391171 // bfdot za.s[x8, 1], { z11.h-z14.h }, z9.h\n"
+ ".inst 0xa1402ae1 // ld1h { z1.h, z9.h }, pn10.b/Z, [x23]\n"
+ "addvl x20, SP, #9\n"
+ "add x19, x16, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1311152 // bfdot za.s[x8, 2], { z10.h-z13.h }, z1.h\n"
+ "ld1w { z16.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa4a // bfcvt z10.h, p2/M, z18.s\n"
+ ".inst 0xc1321190 // bfdot za.s[x8, 0], { z12.h-z15.h }, z2.h\n"
+ "ld1h { z2.h }, p2/Z, [x24, #2, MUL VL]\n"
+ ".inst 0x648aaa2a // bfcvtnt z10.h, p2/M, z17.s\n"
+ "subs x25, x25, #0x1\n"
+ "ld1w { z17.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1391172 // bfdot za.s[x8, 2], { z11.h-z14.h }, z9.h\n"
+ ".inst 0x658aaa0b // bfcvt z11.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1321191 // bfdot za.s[x8, 1], { z12.h-z15.h }, z2.h\n"
+ ".inst 0x648aaa2b // bfcvtnt z11.h, p2/M, z17.s\n"
+ "ld1w { z17.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc0060c18 // mova { z24.d-z27.d }, za.d[x8, #0]\n"
+ ".inst 0xc1b6cbd8 // fclamp { z24.s-z27.s }, z30.s, z22.s\n"
+ "ld1h { z2.h }, p2/Z, [x23, #2, MUL VL]\n"
+ ".inst 0xc1321192 // bfdot za.s[x8, 2], { z12.h-z15.h }, z2.h\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "add x8, x8, #0x1\n"
+ "ld1w { z16.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ ".inst 0x648aaa2c // bfcvtnt z12.h, p2/M, z17.s\n"
+ "ld1w { z16.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "st1w { z24.s }, p1, [x14]\n"
+ "ld1w { z16.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ "add x14, x14, x11, LSL #2\n"
+ ".inst 0xa1402aa1 // ld1h { z1.h, z9.h }, pn10.b/Z, [x21]\n"
+ ".inst 0xc1311150 // bfdot za.s[x8, 0], { z10.h-z13.h }, z1.h\n"
+ "st1w { z25.s }, p1, [x13]\n"
+ "add x13, x13, x10, LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x22]\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ "add x22, x22, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1391170 // bfdot za.s[x8, 0], { z11.h-z14.h }, z9.h\n"
+ ".inst 0xa1402a81 // ld1h { z1.h, z9.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1311151 // bfdot za.s[x8, 1], { z10.h-z13.h }, z1.h\n"
+ "st1w { z26.s }, p1, [x9]\n"
+ "add x9, x9, x27, LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x22]\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ ".inst 0xc1391171 // bfdot za.s[x8, 1], { z11.h-z14.h }, z9.h\n"
+ "ld1w { z16.s }, p1/Z, [x16]\n"
+ ".inst 0x658aaa0a // bfcvt z10.h, p2/M, z16.s\n"
+ "st1w { z27.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc0040c84 // mova za.d[x8, #4], { z4.d-z7.d }\n"
+ ".inst 0x648aaa0a // bfcvtnt z10.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0b // bfcvt z11.h, p2/M, z16.s\n"
+ "add x16, x16, %x[ld_in_col], LSL #2\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0b // bfcvtnt z11.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1h { z2.h }, p2/Z, [x21, #2, MUL VL]\n"
+ ".inst 0xc1321190 // bfdot za.s[x8, 0], { z12.h-z15.h }, z2.h\n"
+ "ld1w { z19.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1w { z18.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "ld1h { z2.h }, p2/Z, [x20, #2, MUL VL]\n"
+ ".inst 0xc1321191 // bfdot za.s[x8, 1], { z12.h-z15.h }, z2.h\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa2d // bfcvt z13.h, p2/M, z17.s\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ "ld1w { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa6c // bfcvtnt z12.h, p2/M, z19.s\n"
+ ".inst 0x648aaa4d // bfcvtnt z13.h, p2/M, z18.s\n"
+ "ld1w { z16.s }, p1/Z, [x19]\n"
+ ".inst 0x648aaa2e // bfcvtnt z14.h, p2/M, z17.s\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ ".inst 0xa1402be1 // ld1h { z1.h, z9.h }, pn10.b/Z, [SP]\n"
+ "ld1h { z2.h }, p2/Z, [SP, #2, MUL VL]\n"
+ "bgt 11b\n"
+ "b 19f\n"
+ "12:" // Padded
+ "cbz x21, 17f\n"
+ "cmp x21, #0x1\n"
+ "sub x17, x17, x21\n"
+ "beq 16f\n"
+ "cmp x21, #0x2\n"
+ "beq 15f\n"
+ "cmp x21, #0x3\n"
+ "beq 14f\n"
+ "13:" // Padded: 4 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x16]\n"
+ ".inst 0x658aaa0a // bfcvt z10.h, p2/M, z16.s\n"
+ "add x20, x16, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ ".inst 0x648aaa0a // bfcvtnt z10.h, p2/M, z16.s\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ ".inst 0x658aaa0b // bfcvt z11.h, p2/M, z16.s\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ ".inst 0x648aaa0b // bfcvtnt z11.h, p2/M, z16.s\n"
+ "mov x12, #0x4\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0c // bfcvtnt z12.h, p2/M, z16.s\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x8\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ "addvl x19, SP, #12\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0xa1402a61 // ld1h { z1.h, z9.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1311150 // bfdot za.s[x8, 0], { z10.h-z13.h }, z1.h\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ ".inst 0xc1391170 // bfdot za.s[x8, 0], { z11.h-z14.h }, z9.h\n"
+ "ld1h { z2.h }, p2/Z, [x19, #2, MUL VL]\n"
+ "add x16, x16, %x[ld_in_col], LSL #2\n"
+ ".inst 0xc1321190 // bfdot za.s[x8, 0], { z12.h-z15.h }, z2.h\n"
+ "14:" // Padded: 3 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x16]\n"
+ ".inst 0x658aaa0a // bfcvt z10.h, p2/M, z16.s\n"
+ "add x20, x16, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ ".inst 0x648aaa0a // bfcvtnt z10.h, p2/M, z16.s\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ ".inst 0x658aaa0b // bfcvt z11.h, p2/M, z16.s\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ ".inst 0x648aaa0b // bfcvtnt z11.h, p2/M, z16.s\n"
+ "mov x12, #0x4\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0c // bfcvtnt z12.h, p2/M, z16.s\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x8\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ "addvl x19, SP, #9\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0xa1402a61 // ld1h { z1.h, z9.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1311150 // bfdot za.s[x8, 0], { z10.h-z13.h }, z1.h\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x20]\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ ".inst 0xc1391170 // bfdot za.s[x8, 0], { z11.h-z14.h }, z9.h\n"
+ "ld1h { z2.h }, p2/Z, [x19, #2, MUL VL]\n"
+ "add x16, x16, %x[ld_in_col], LSL #2\n"
+ ".inst 0xc1321190 // bfdot za.s[x8, 0], { z12.h-z15.h }, z2.h\n"
+ "15:" // Padded: 2 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x16]\n"
+ ".inst 0x658aaa0a // bfcvt z10.h, p2/M, z16.s\n"
+ "add x21, x16, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0x648aaa0a // bfcvtnt z10.h, p2/M, z16.s\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0x658aaa0b // bfcvt z11.h, p2/M, z16.s\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0x648aaa0b // bfcvtnt z11.h, p2/M, z16.s\n"
+ "mov x12, #0x4\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0c // bfcvtnt z12.h, p2/M, z16.s\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x8\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ "addvl x20, SP, #6\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0xa1402a81 // ld1h { z1.h, z9.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1311150 // bfdot za.s[x8, 0], { z10.h-z13.h }, z1.h\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ "addvl x19, SP, #12\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc1391170 // bfdot za.s[x8, 0], { z11.h-z14.h }, z9.h\n"
+ ".inst 0xa1402a61 // ld1h { z1.h, z9.h }, pn10.b/Z, [x19]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0xc1311151 // bfdot za.s[x8, 1], { z10.h-z13.h }, z1.h\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ "add x16, x16, %x[ld_in_col], LSL #2\n"
+ "ld1h { z2.h }, p2/Z, [x20, #2, MUL VL]\n"
+ ".inst 0xc1391171 // bfdot za.s[x8, 1], { z11.h-z14.h }, z9.h\n"
+ ".inst 0xc1321190 // bfdot za.s[x8, 0], { z12.h-z15.h }, z2.h\n"
+ "ld1h { z2.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc1321191 // bfdot za.s[x8, 1], { z12.h-z15.h }, z2.h\n"
+ "16:" // Padded: 1 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x16]\n"
+ ".inst 0x658aaa0a // bfcvt z10.h, p2/M, z16.s\n"
+ "add x21, x16, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0x648aaa0a // bfcvtnt z10.h, p2/M, z16.s\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0x658aaa0b // bfcvt z11.h, p2/M, z16.s\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0x648aaa0b // bfcvtnt z11.h, p2/M, z16.s\n"
+ "mov x12, #0x4\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0c // bfcvtnt z12.h, p2/M, z16.s\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x8\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ "addvl x20, SP, #3\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0xa1402a81 // ld1h { z1.h, z9.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1311150 // bfdot za.s[x8, 0], { z10.h-z13.h }, z1.h\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ "addvl x19, SP, #9\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc1391170 // bfdot za.s[x8, 0], { z11.h-z14.h }, z9.h\n"
+ ".inst 0xa1402a61 // ld1h { z1.h, z9.h }, pn10.b/Z, [x19]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0xc1311151 // bfdot za.s[x8, 1], { z10.h-z13.h }, z1.h\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ "add x16, x16, %x[ld_in_col], LSL #2\n"
+ "ld1h { z2.h }, p2/Z, [x20, #2, MUL VL]\n"
+ ".inst 0xc1391171 // bfdot za.s[x8, 1], { z11.h-z14.h }, z9.h\n"
+ ".inst 0xc1321190 // bfdot za.s[x8, 0], { z12.h-z15.h }, z2.h\n"
+ "ld1h { z2.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc1321191 // bfdot za.s[x8, 1], { z12.h-z15.h }, z2.h\n"
+ "17:" // Padded: 0 priming loads
+ "cmp x17, #0x2\n"
+ ".inst 0xa1402be1 // ld1h { z1.h, z9.h }, pn10.b/Z, [SP]\n"
+ "ld1h { z2.h }, p2/Z, [SP, #2, MUL VL]\n"
+ "blt 20f\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x16]\n"
+ ".inst 0x658aaa0a // bfcvt z10.h, p2/M, z16.s\n"
+ "add x19, x16, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x648aaa0a // bfcvtnt z10.h, p2/M, z16.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x658aaa0b // bfcvt z11.h, p2/M, z16.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x648aaa0b // bfcvtnt z11.h, p2/M, z16.s\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0c // bfcvtnt z12.h, p2/M, z16.s\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x8\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ "sub x17, x17, #0x2\n"
+ "sub x15, x15, #0x1\n"
+ "lsr x19, x17, #0x1\n"
+ "cmp x19, x15\n"
+ "csel x23, x19, x15, LT\n"
+ "add x16, x16, %x[ld_in_col], LSL #2\n"
+ "and x17, x17, #0x1\n"
+ "sub x15, x15, x23\n"
+ "cbz x23, 19f\n"
+ "18:" // Padded: Main loop
+ ".inst 0xc1311150 // bfdot za.s[x8, 0], { z10.h-z13.h }, z1.h\n"
+ "addvl x22, SP, #6\n"
+ "addvl x20, SP, #12\n"
+ ".inst 0xc1391170 // bfdot za.s[x8, 0], { z11.h-z14.h }, z9.h\n"
+ ".inst 0xa1402ac1 // ld1h { z1.h, z9.h }, pn10.b/Z, [x22]\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1311151 // bfdot za.s[x8, 1], { z10.h-z13.h }, z1.h\n"
+ "ld1w { z16.s }, p0/Z, [x16]\n"
+ "add x19, x16, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ ".inst 0xc1391171 // bfdot za.s[x8, 1], { z11.h-z14.h }, z9.h\n"
+ ".inst 0xa1402a81 // ld1h { z1.h, z9.h }, pn10.b/Z, [x20]\n"
+ "addvl x21, SP, #3\n"
+ "add x16, x16, %x[ld_in_col], LSL #2\n"
+ ".inst 0xc1311152 // bfdot za.s[x8, 2], { z10.h-z13.h }, z1.h\n"
+ "ld1w { z20.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z17.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xc1321190 // bfdot za.s[x8, 0], { z12.h-z15.h }, z2.h\n"
+ "mov x12, #0x4\n"
+ "ld1h { z2.h }, p2/Z, [x22, #2, MUL VL]\n"
+ ".inst 0xc1391172 // bfdot za.s[x8, 2], { z11.h-z14.h }, z9.h\n"
+ ".inst 0x658aaa0a // bfcvt z10.h, p2/M, z16.s\n"
+ "ld1w { z19.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1321191 // bfdot za.s[x8, 1], { z12.h-z15.h }, z2.h\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ ".inst 0x658aaa2b // bfcvt z11.h, p2/M, z17.s\n"
+ "ld1w { z18.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0x648aaa8a // bfcvtnt z10.h, p2/M, z20.s\n"
+ "ld1h { z2.h }, p2/Z, [x20, #2, MUL VL]\n"
+ ".inst 0xc1321192 // bfdot za.s[x8, 2], { z12.h-z15.h }, z2.h\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "addvl x20, SP, #9\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ "mov x12, #0x8\n"
+ "ld1w { z17.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa6b // bfcvtnt z11.h, p2/M, z19.s\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa4c // bfcvtnt z12.h, p2/M, z18.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ ".inst 0x648aaa2d // bfcvtnt z13.h, p2/M, z17.s\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ ".inst 0xa1402aa1 // ld1h { z1.h, z9.h }, pn10.b/Z, [x21]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ ".inst 0xc0060c18 // mova { z24.d-z27.d }, za.d[x8, #0]\n"
+ "add x8, x8, #0x1\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ ".inst 0xc1311150 // bfdot za.s[x8, 0], { z10.h-z13.h }, z1.h\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z17.s }, p0/Z, [x19]\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1391170 // bfdot za.s[x8, 0], { z11.h-z14.h }, z9.h\n"
+ ".inst 0xa1402a81 // ld1h { z1.h, z9.h }, pn10.b/Z, [x20]\n"
+ "ld1w { z16.s }, p0/Z, [x16]\n"
+ "add x19, x16, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ ".inst 0xc1311151 // bfdot za.s[x8, 1], { z10.h-z13.h }, z1.h\n"
+ "ld1w { z21.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0x658aaa2f // bfcvt z15.h, p2/M, z17.s\n"
+ "ld1w { z17.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xc1391171 // bfdot za.s[x8, 1], { z11.h-z14.h }, z9.h\n"
+ "mov x12, #0x4\n"
+ "ld1w { z20.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0a // bfcvt z10.h, p2/M, z16.s\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa2b // bfcvt z11.h, p2/M, z17.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1h { z2.h }, p2/Z, [x21, #2, MUL VL]\n"
+ ".inst 0xc1321190 // bfdot za.s[x8, 0], { z12.h-z15.h }, z2.h\n"
+ "subs x23, x23, #0x1\n"
+ "ld1w { z19.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc1b6cbd8 // fclamp { z24.s-z27.s }, z30.s, z22.s\n"
+ "ld1w { z17.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "st1w { z24.s }, p1, [x14]\n"
+ "mov x12, #0x8\n"
+ "ld1w { z18.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ "st1w { z25.s }, p1, [x13]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1h { z2.h }, p2/Z, [x20, #2, MUL VL]\n"
+ ".inst 0xc1321191 // bfdot za.s[x8, 1], { z12.h-z15.h }, z2.h\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ ".inst 0x658aaa2d // bfcvt z13.h, p2/M, z17.s\n"
+ "ld1w { z17.s }, p0/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ "ld1w { z16.s }, p0/Z, [x19]\n"
+ "add x14, x14, x11, LSL #2\n"
+ "add x13, x13, x10, LSL #2\n"
+ "st1w { z26.s }, p1, [x9]\n"
+ "add x9, x9, x27, LSL #2\n"
+ "st1w { z27.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ ".inst 0xc0040c84 // mova za.d[x8, #4], { z4.d-z7.d }\n"
+ ".inst 0xa1402be1 // ld1h { z1.h, z9.h }, pn10.b/Z, [SP]\n"
+ ".inst 0x648aaaaa // bfcvtnt z10.h, p2/M, z21.s\n"
+ ".inst 0x648aaa8b // bfcvtnt z11.h, p2/M, z20.s\n"
+ "add x16, x16, %x[ld_in_col], LSL #2\n"
+ "ld1h { z2.h }, p2/Z, [SP, #2, MUL VL]\n"
+ ".inst 0x648aaa6c // bfcvtnt z12.h, p2/M, z19.s\n"
+ ".inst 0x648aaa4d // bfcvtnt z13.h, p2/M, z18.s\n"
+ ".inst 0x648aaa2e // bfcvtnt z14.h, p2/M, z17.s\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ "bgt 18b\n"
+ "19:" // Main loop tail
+ ".inst 0xc1311150 // bfdot za.s[x8, 0], { z10.h-z13.h }, z1.h\n"
+ "addvl x23, SP, #6\n"
+ "addvl x22, SP, #12\n"
+ ".inst 0xc1391170 // bfdot za.s[x8, 0], { z11.h-z14.h }, z9.h\n"
+ ".inst 0xa1402ae1 // ld1h { z1.h, z9.h }, pn10.b/Z, [x23]\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1311151 // bfdot za.s[x8, 1], { z10.h-z13.h }, z1.h\n"
+ "ld1w { z16.s }, p0/Z, [x16]\n"
+ "add x21, x16, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ ".inst 0xc1391171 // bfdot za.s[x8, 1], { z11.h-z14.h }, z9.h\n"
+ ".inst 0xa1402ac1 // ld1h { z1.h, z9.h }, pn10.b/Z, [x22]\n"
+ "addvl x20, SP, #3\n"
+ "addvl x19, SP, #9\n"
+ ".inst 0xc1311152 // bfdot za.s[x8, 2], { z10.h-z13.h }, z1.h\n"
+ "ld1w { z20.s }, p0/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z17.s }, p0/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xc1321190 // bfdot za.s[x8, 0], { z12.h-z15.h }, z2.h\n"
+ "mov x12, #0x4\n"
+ "ld1h { z2.h }, p2/Z, [x23, #2, MUL VL]\n"
+ ".inst 0xc1391172 // bfdot za.s[x8, 2], { z11.h-z14.h }, z9.h\n"
+ ".inst 0x658aaa0a // bfcvt z10.h, p2/M, z16.s\n"
+ "ld1w { z19.s }, p0/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1321191 // bfdot za.s[x8, 1], { z12.h-z15.h }, z2.h\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ ".inst 0x658aaa2b // bfcvt z11.h, p2/M, z17.s\n"
+ "ld1w { z18.s }, p0/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0x648aaa8a // bfcvtnt z10.h, p2/M, z20.s\n"
+ "ld1h { z2.h }, p2/Z, [x22, #2, MUL VL]\n"
+ ".inst 0xc1321192 // bfdot za.s[x8, 2], { z12.h-z15.h }, z2.h\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ "add x16, x16, %x[ld_in_col], LSL #2\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ "mov x12, #0x8\n"
+ "ld1w { z17.s }, p0/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa6b // bfcvtnt z11.h, p2/M, z19.s\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa4c // bfcvtnt z12.h, p2/M, z18.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ ".inst 0x648aaa2d // bfcvtnt z13.h, p2/M, z17.s\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ ".inst 0xa1402a81 // ld1h { z1.h, z9.h }, pn10.b/Z, [x20]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0xc0060c18 // mova { z24.d-z27.d }, za.d[x8, #0]\n"
+ "add x8, x8, #0x1\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ ".inst 0xc1311150 // bfdot za.s[x8, 0], { z10.h-z13.h }, z1.h\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0xc1391170 // bfdot za.s[x8, 0], { z11.h-z14.h }, z9.h\n"
+ ".inst 0xa1402a61 // ld1h { z1.h, z9.h }, pn10.b/Z, [x19]\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ ".inst 0xc1311151 // bfdot za.s[x8, 1], { z10.h-z13.h }, z1.h\n"
+ "ld1h { z2.h }, p2/Z, [x20, #2, MUL VL]\n"
+ ".inst 0xc1b6cbd8 // fclamp { z24.s-z27.s }, z30.s, z22.s\n"
+ ".inst 0xc1391171 // bfdot za.s[x8, 1], { z11.h-z14.h }, z9.h\n"
+ "st1w { z24.s }, p1, [x14]\n"
+ "add x14, x14, x11, LSL #2\n"
+ ".inst 0xa1402be1 // ld1h { z1.h, z9.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xc1321190 // bfdot za.s[x8, 0], { z12.h-z15.h }, z2.h\n"
+ "ld1h { z2.h }, p2/Z, [x19, #2, MUL VL]\n"
+ "st1w { z25.s }, p1, [x13]\n"
+ "add x13, x13, x10, LSL #2\n"
+ "st1w { z26.s }, p1, [x9]\n"
+ "add x9, x9, x27, LSL #2\n"
+ ".inst 0xc0040c84 // mova za.d[x8, #4], { z4.d-z7.d }\n"
+ "st1w { z27.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ ".inst 0xc1321191 // bfdot za.s[x8, 1], { z12.h-z15.h }, z2.h\n"
+ "ld1h { z2.h }, p2/Z, [SP, #2, MUL VL]\n"
+ "20:" // Main loop skip tail
+ "cbz x17, 21f\n" // Skip remainder inputs
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x16]\n"
+ ".inst 0x658aaa0a // bfcvt z10.h, p2/M, z16.s\n"
+ "add x21, x16, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0x648aaa0a // bfcvtnt z10.h, p2/M, z16.s\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0x658aaa0b // bfcvt z11.h, p2/M, z16.s\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0x648aaa0b // bfcvtnt z11.h, p2/M, z16.s\n"
+ "mov x12, #0x4\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0c // bfcvt z12.h, p2/M, z16.s\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x648aaa0c // bfcvtnt z12.h, p2/M, z16.s\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x658aaa0d // bfcvt z13.h, p2/M, z16.s\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x8\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0x648aaa0d // bfcvtnt z13.h, p2/M, z16.s\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0x658aaa0e // bfcvt z14.h, p2/M, z16.s\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0x648aaa0e // bfcvtnt z14.h, p2/M, z16.s\n"
+ ".inst 0xc1311150 // bfdot za.s[x8, 0], { z10.h-z13.h }, z1.h\n"
+ "addvl x20, SP, #6\n"
+ "add x21, x21, %x[ld_in_row], LSL #2\n"
+ ".inst 0xc1391170 // bfdot za.s[x8, 0], { z11.h-z14.h }, z9.h\n"
+ ".inst 0xa1402a81 // ld1h { z1.h, z9.h }, pn10.b/Z, [x20]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "addvl x19, SP, #12\n"
+ ".inst 0xc1311151 // bfdot za.s[x8, 1], { z10.h-z13.h }, z1.h\n"
+ "ld1w { z16.s }, p0/Z, [x21]\n"
+ ".inst 0x658aaa0f // bfcvt z15.h, p2/M, z16.s\n"
+ "sub x15, x15, #0x1\n"
+ ".inst 0xc1391171 // bfdot za.s[x8, 1], { z11.h-z14.h }, z9.h\n"
+ ".inst 0xa1402a61 // ld1h { z1.h, z9.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1311152 // bfdot za.s[x8, 2], { z10.h-z13.h }, z1.h\n"
+ ".inst 0xc1321190 // bfdot za.s[x8, 0], { z12.h-z15.h }, z2.h\n"
+ "ld1h { z2.h }, p2/Z, [x20, #2, MUL VL]\n"
+ ".inst 0xc1391172 // bfdot za.s[x8, 2], { z11.h-z14.h }, z9.h\n"
+ ".inst 0xc1321191 // bfdot za.s[x8, 1], { z12.h-z15.h }, z2.h\n"
+ "ld1h { z2.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc0060c18 // mova { z24.d-z27.d }, za.d[x8, #0]\n"
+ ".inst 0xc1b6cbd8 // fclamp { z24.s-z27.s }, z30.s, z22.s\n"
+ "st1w { z24.s }, p1, [x14]\n"
+ "add x14, x14, x11, LSL #2\n"
+ ".inst 0xc1321192 // bfdot za.s[x8, 2], { z12.h-z15.h }, z2.h\n"
+ "add x8, x8, #0x1\n"
+ "st1w { z25.s }, p1, [x13]\n"
+ "add x13, x13, x10, LSL #2\n"
+ "st1w { z26.s }, p1, [x9]\n"
+ "add x9, x9, x27, LSL #2\n"
+ ".inst 0xc0040c84 // mova za.d[x8, #4], { z4.d-z7.d }\n"
+ "st1w { z27.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ "21:" // Tail input: End
+ "cbz x15, 23f\n"
+ "22:" // Right padding loop
+ ".inst 0xc0060c18 // mova { z24.d-z27.d }, za.d[x8, #0]\n"
+ "add x8, x8, #0x1\n"
+ "subs x15, x15, #0x1\n"
+ ".inst 0xc1b6cbd8 // fclamp { z24.s-z27.s }, z30.s, z22.s\n"
+ "st1w { z24.s }, p1, [x14]\n"
+ "add x14, x14, x11, LSL #2\n"
+ ".inst 0xc0040c84 // mova za.d[x8, #4], { z4.d-z7.d }\n"
+ "st1w { z25.s }, p1, [x13]\n"
+ "add x13, x13, x10, LSL #2\n"
+ "st1w { z26.s }, p1, [x9]\n"
+ "add x9, x9, x27, LSL #2\n"
+ "st1w { z27.s }, p1, [x28]\n"
+ "add x28, x28, x26, LSL #2\n"
+ "bgt 22b\n"
+ "23:" // End
+ "ldr x19, [%x[args], %[offsetof_Args_weights]]\n"
+ "incb x19, ALL, MUL #16\n"
+ "incb x19, ALL, MUL #9\n"
+ "str x19, [%x[args], %[offsetof_Args_weights]]\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_in_vl]]\n"
+ "incw x7\n"
+ "whilelt p1.s, x7, x6\n"
+ "ldr x16, [%x[args], %[offsetof_Args_inptr]]\n"
+ "add x16, x16, x19, LSL #2\n"
+ "str x16, [%x[args], %[offsetof_Args_inptr]]\n"
+ "ldr x24, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "ldr x23, [%x[args], %[offsetof_Args_ld_out_vls]]\n"
+ "ldp x22, x21, [x24, #0x0]\n"
+ "ldp x20, x19, [x23, #0x0]\n"
+ "add x22, x22, x20, LSL #2\n"
+ "add x21, x21, x19, LSL #2\n"
+ "stp x22, x21, [x24, #0x0]\n"
+ "ldp x22, x21, [x24, #0x10]\n"
+ "ldp x20, x19, [x23, #0x10]\n"
+ "add x22, x22, x20, LSL #2\n"
+ "add x21, x21, x19, LSL #2\n"
+ "stp x22, x21, [x24, #0x10]\n"
+ "b.any 1b\n"
+ "addvl SP, SP, #15\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [ld_in_col] "r" (ld_in_col), [ld_in_row] "r" (ld_in_row), [offsetof_Args_bias] "I" (offsetof(Args, bias)), [offsetof_Args_clamp_max] "I" (offsetof(Args, clamp_max)), [offsetof_Args_clamp_min] "I" (offsetof(Args, clamp_min)), [offsetof_Args_current_channel] "I" (offsetof(Args, current_channel)), [offsetof_Args_inptr] "I" (offsetof(Args, inptr)), [offsetof_Args_input_cols] "I" (offsetof(Args, input_cols)), [offsetof_Args_ld_in_vl] "I" (offsetof(Args, ld_in_vl)), [offsetof_Args_ld_out_cols] "I" (offsetof(Args, ld_out_cols)), [offsetof_Args_ld_out_vls] "I" (offsetof(Args, ld_out_vls)), [offsetof_Args_n_channels] "I" (offsetof(Args, n_channels)), [offsetof_Args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_Args_output_cols] "I" (offsetof(Args, output_cols)), [offsetof_Args_pad_bottom] "I" (offsetof(Args, pad_bottom)), [offsetof_Args_pad_left] "I" (offsetof(Args, pad_left)), [offsetof_Args_pad_top] "I" (offsetof(Args, pad_top)), [offsetof_Args_weights] "I" (offsetof(Args, weights))
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_s8q_planar_3x3_s1_4rows_dot_za.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_s8q_planar_3x3_s1_4rows_dot_za.hpp
new file mode 100644
index 0000000..be4f02f
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_s8q_planar_3x3_s1_4rows_dot_za.hpp
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_s8q_planar_3x3_s1_4rows_dot_za_impl(
+ const int8_t *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const int8_t *weights,
+ int8_t **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ const arm_gemm::Requantize32 &qp
+);
+
+class sme2_s8q_planar_3x3_s1_4rows_dot_za : public PlanarStrategy<int8_t, int8_t>
+{
+ using Parent = PlanarStrategy<int8_t, int8_t>;
+
+ public:
+ using return_type = int8_t;
+ constexpr static auto output_rows = 4u;
+ constexpr static auto kernel_rows = 3u, kernel_cols = 3u;
+ constexpr static auto stride_rows = 1u, stride_cols = 1u;
+ constexpr static auto vl_type = arm_gemm::VLType::SME;
+
+ sme2_s8q_planar_3x3_s1_4rows_dot_za(const CPUInfo *)
+ : Parent(kernel_rows, kernel_cols, stride_rows, stride_cols, output_rows, vl_type)
+ {
+ }
+
+ typename Parent::KernelType get_kernel(void) const override
+ {
+ return sme2_s8q_planar_3x3_s1_4rows_dot_za_impl;
+ }
+};
+
+} // namespace depthwise
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_s8q_planar_3x3_s1_4rows_dot_za/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_s8q_planar_3x3_s1_4rows_dot_za/generic.cpp
new file mode 100644
index 0000000..7fee92b
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_s8q_planar_3x3_s1_4rows_dot_za/generic.cpp
@@ -0,0 +1,664 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <algorithm>
+#include <cstddef>
+#include "arm_gemm.hpp"
+
+using arm_gemm::Requantize32;
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_s8q_planar_3x3_s1_4rows_dot_za_impl(
+ const int8_t *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const int8_t *weights,
+ int8_t **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ const arm_gemm::Requantize32 &qp
+)
+{
+ struct Args
+ {
+ const int8_t *inptr;
+ size_t ld_in_vl;
+ long unsigned int pad_top, pad_bottom, pad_left;
+ const int8_t *weights;
+ long unsigned int input_cols, output_cols;
+ int8_t **outptrs;
+ const size_t *ld_out_cols;
+ const size_t *ld_out_vls;
+ long unsigned int current_channel, n_channels;
+ };
+
+ Args args = { inptr, ld_in_vl, pad_top, 6u - std::min(6u, pad_top + valid_input_rows), pad_left, weights, valid_input_cols, output_cols, outptrs, outlds, outvllds, start_channel, valid_channels };
+
+ __asm__ __volatile__(
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "ldr x7, [%x[args], %[offsetof_Args_pad_bottom]]\n"
+ "ptrue p2.b\n"
+ "mov x19, #0x6\n"
+ "ldr x8, [%x[args], %[offsetof_Args_pad_top]]\n"
+ "ld1rh { z24.h }, p2/Z, [%x[qp], %[offsetof_Requantize32_a_offset]]\n"
+ "sub x19, x19, x7\n"
+ ".inst 0x25207812 // ptrue pn10.b\n"
+ "ldr x17, [%x[args], %[offsetof_Args_n_channels]]\n"
+ "whilelt p1.s, XZR, x17\n"
+ "whilelt p9.s, XZR, x19\n"
+ "ld1rw { z12.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_c_offset]]\n"
+ "whilelt p8.s, XZR, x8\n"
+ "addvl SP, SP, #-12\n"
+ "ldr x16, [%x[args], %[offsetof_Args_current_channel]]\n"
+ "neg z24.h, p2/M, z24.h\n"
+ "eor p8.b, p2/Z, p8.b, p9.b\n"
+ "ld1rw { z10.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_per_layer_mul]]\n"
+ "ld1rw { z11.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_per_layer_right_shift]]\n"
+ "ld1rw { z22.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_minval]]\n"
+ "ld1rw { z26.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_maxval]]\n"
+ "1:" // Channel loop
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_bias]]\n"
+ "mov z8.s, #0x0\n"
+ "cbz x19, 2f\n"
+ "ld1w { z8.s }, p1/Z, [x19, x16, LSL #2]\n"
+ "2:" // Load bias: Done
+ "ldr x21, [%x[args], %[offsetof_Args_weights]]\n"
+ "mov x19, x21\n"
+ "ld1sb { z27.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "ld1rh { z21.h }, p2/Z, [%x[qp], %[offsetof_Requantize32_b_offset]]\n"
+ "mov z20.h, #0x0\n"
+ "sub z27.h, z27.h, z21.h\n"
+ "incw x21\n"
+ "ld1sb { z23.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "sub z23.h, z23.h, z21.h\n"
+ "trn1 z0.h, z20.h, z27.h\n"
+ "ld1sb { z16.s }, p2/Z, [x19]\n"
+ "sub z16.h, z16.h, z21.h\n"
+ "mov x19, x21\n"
+ "trn1 z1.h, z27.h, z23.h\n"
+ "ld1sb { z27.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "trn1 z2.h, z23.h, z16.h\n"
+ "trn1 z3.h, z16.h, z20.h\n"
+ "ld1sb { z23.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "sub z27.h, z27.h, z21.h\n"
+ "sub z23.h, z23.h, z21.h\n"
+ "ld1sb { z16.s }, p2/Z, [x19]\n"
+ "sub z16.h, z16.h, z21.h\n"
+ "addvl x20, SP, #12\n"
+ "incw x21\n"
+ "addvl x20, x20, #-4\n"
+ "mov x19, x21\n"
+ "st1h { z0.h }, p2, [x20]\n"
+ "trn1 z0.h, z20.h, z27.h\n"
+ "st1h { z1.h }, p2, [x20, #1, MUL VL]\n"
+ "trn1 z1.h, z27.h, z23.h\n"
+ "ld1sb { z27.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "st1h { z2.h }, p2, [x20, #2, MUL VL]\n"
+ "trn1 z2.h, z23.h, z16.h\n"
+ "ld1sb { z23.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "st1h { z3.h }, p2, [x20, #3, MUL VL]\n"
+ "trn1 z3.h, z16.h, z20.h\n"
+ "ld1sb { z16.s }, p2/Z, [x19]\n"
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_muls]]\n"
+ "sub z27.h, z27.h, z21.h\n"
+ "sub z23.h, z23.h, z21.h\n"
+ "addvl x20, x20, #-4\n"
+ "st1h { z0.h }, p2, [x20]\n"
+ "sub z16.h, z16.h, z21.h\n"
+ "st1h { z1.h }, p2, [x20, #1, MUL VL]\n"
+ "mov z9.d, z8.d\n"
+ "st1h { z2.h }, p2, [x20, #2, MUL VL]\n"
+ "trn1 z0.h, z20.h, z27.h\n"
+ "trn1 z1.h, z27.h, z23.h\n"
+ "st1h { z3.h }, p2, [x20, #3, MUL VL]\n"
+ "addvl x20, x20, #-4\n"
+ "trn1 z2.h, z23.h, z16.h\n"
+ "trn1 z3.h, z16.h, z20.h\n"
+ "st1h { z0.h }, p2, [x20]\n"
+ "st1h { z1.h }, p2, [x20, #1, MUL VL]\n"
+ "st1h { z2.h }, p2, [x20, #2, MUL VL]\n"
+ "st1h { z3.h }, p2, [x20, #3, MUL VL]\n"
+ "cbz x19, 3f\n"
+ "ld1w { z10.s }, p1/Z, [x19, x16, LSL #2]\n"
+ "3:" // Load mul: End
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_right_shifts]]\n"
+ "cbz x19, 4f\n"
+ "ld1w { z11.s }, p1/Z, [x19, x16, LSL #2]\n"
+ "4:" // Load right_shift: End
+ "ldr x15, [%x[args], %[offsetof_Args_input_cols]]\n"
+ "sub x19, x15, #0x1\n"
+ "orr x22, x19, %x[ld_in_col], LSL #16\n"
+ "ldr x14, [%x[args], %[offsetof_Args_inptr]]\n"
+ "orr x22, x17, x22, LSL #22\n"
+ "mov x21, #0x6\n"
+ "add x20, x8, x7\n"
+ "lsl x19, %x[ld_in_row], #0x0\n"
+ "ldr x13, [%x[args], %[offsetof_Args_output_cols]]\n"
+ "mov x11, #0x0\n"
+ "lsl x22, x22, #0x0\n"
+ "sub x21, x21, x20\n"
+ "madd x19, x19, x8, x14\n"
+ "5:" // Issue prefetches
+ "subs x21, x21, #0x1\n"
+ ".inst 0xf8b64a7c // rprfm pldstrm, x22, [x19]\n"
+ "add x19, x19, %x[ld_in_col]\n"
+ "bgt 5b\n"
+ "ldr x24, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "lsl x19, %x[ld_in_row], #0x0\n"
+ "msub x14, x8, x19, x14\n"
+ ".inst 0xc0046900 // mova za.d[x11, #0], { z8.d-z9.d }\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_out_cols]]\n"
+ ".inst 0xc0046901 // mova za.d[x11, #1], { z8.d-z9.d }\n"
+ "mov x21, #0x2\n"
+ "ldp x10, x9, [x24], #0x10\n"
+ ".inst 0xc0046902 // mova za.d[x11, #2], { z8.d-z9.d }\n"
+ "ldp x28, x27, [x19], #0x10\n"
+ ".inst 0xc0046903 // mova za.d[x11, #3], { z8.d-z9.d }\n"
+ "ldr x20, [%x[args], %[offsetof_Args_pad_left]]\n"
+ ".inst 0xc0046904 // mova za.d[x11, #4], { z8.d-z9.d }\n"
+ "ldp x26, x25, [x24], #0x10\n"
+ ".inst 0xc0046905 // mova za.d[x11, #5], { z8.d-z9.d }\n"
+ "ldp x24, x23, [x19], #0x10\n"
+ "cbz x20, 7f\n"
+ "cmp x20, x21\n"
+ "csel x19, x20, x21, LT\n"
+ "sub x20, x20, x19\n"
+ "sub x21, x21, x19\n"
+ "cbz x20, 7f\n"
+ ".inst 0xc0066804 // mova { z4.d-z5.d }, za.d[x11, #0]\n"
+ "sub x13, x13, x20\n"
+ ".inst 0xc0066826 // mova { z6.d-z7.d }, za.d[x11, #1]\n"
+ ".inst 0xc1aaac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z10.s\n"
+ ".inst 0xc1abaa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z11.s\n"
+ ".inst 0xc1acab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z12.s\n"
+ ".inst 0xc1bacec4 // sclamp { z4.s-z7.s }, z22.s, z26.s\n"
+ "6:" // Left padding
+ "subs x20, x20, #0x1\n"
+ "st1b { z4.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "st1b { z5.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ "st1b { z7.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ "bgt 6b\n"
+ "7:" // Left padding: End
+ "adds XZR, x8, x7\n"
+ "bne 12f\n"
+ "cbz x21, 10f\n"
+ "cmp x21, #0x1\n"
+ "sub x15, x15, x21\n"
+ "beq 9f\n"
+ "8:" // Unpadded: 2 priming loads
+ "add x20, x14, %x[ld_in_row]\n"
+ "ld1sb { z17.s }, p1/Z, [x14]\n"
+ "addvl x19, SP, #8\n"
+ "ld1sb { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z13.h, z17.h, z16.h\n"
+ "add z13.h, z13.h, z24.h\n"
+ "ld1sb { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "ld1sb { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z14.h, z17.h, z16.h\n"
+ "add z14.h, z14.h, z24.h\n"
+ "ld1sb { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1sb { z16.s }, p1/Z, [x20]\n"
+ "trn1 z15.h, z17.h, z16.h\n"
+ "add z15.h, z15.h, z24.h\n"
+ ".inst 0xa0402a60 // ld1h { z0.h-z1.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc16175a8 // sdot za.s[x11, 0], { z13.h-z14.h }, z1.h\n"
+ ".inst 0xc16075a9 // sdot za.s[x11, 1], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xa0412a62 // ld1h { z2.h-z3.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16375c8 // sdot za.s[x11, 0], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xc16275c9 // sdot za.s[x11, 1], { z14.h-z15.h }, z2.h\n"
+ "9:" // Unpadded: 1 priming loads
+ "add x21, x14, %x[ld_in_row]\n"
+ "ld1sb { z17.s }, p1/Z, [x14]\n"
+ "addvl x20, SP, #4\n"
+ "ld1sb { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z13.h, z17.h, z16.h\n"
+ "add z13.h, z13.h, z24.h\n"
+ "ld1sb { z17.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "addvl x19, SP, #8\n"
+ "ld1sb { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z14.h, z17.h, z16.h\n"
+ "add z14.h, z14.h, z24.h\n"
+ "ld1sb { z17.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "ld1sb { z16.s }, p1/Z, [x21]\n"
+ "trn1 z15.h, z17.h, z16.h\n"
+ "add z15.h, z15.h, z24.h\n"
+ ".inst 0xa0402a80 // ld1h { z0.h-z1.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc16175a8 // sdot za.s[x11, 0], { z13.h-z14.h }, z1.h\n"
+ ".inst 0xc16075a9 // sdot za.s[x11, 1], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xa0402a60 // ld1h { z0.h-z1.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xa0412a82 // ld1h { z2.h-z3.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc16175aa // sdot za.s[x11, 2], { z13.h-z14.h }, z1.h\n"
+ ".inst 0xc16075ab // sdot za.s[x11, 3], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xc16375c8 // sdot za.s[x11, 0], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xc16275c9 // sdot za.s[x11, 1], { z14.h-z15.h }, z2.h\n"
+ ".inst 0xa0412a62 // ld1h { z2.h-z3.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16375ca // sdot za.s[x11, 2], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xc16275cb // sdot za.s[x11, 3], { z14.h-z15.h }, z2.h\n"
+ "10:" // Unpadded: 0 priming loads
+ ".inst 0xa0402be0 // ld1h { z0.h-z1.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xa0412be2 // ld1h { z2.h-z3.h }, pn10.b/Z, [SP, #0x2, MUL VL]\n"
+ "cbz x15, 18f\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ "ld1sb { z17.s }, p1/Z, [x14]\n"
+ "sub x15, x15, #0x1\n"
+ "ld1sb { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z13.h, z17.h, z16.h\n"
+ "sub x13, x13, #0x1\n"
+ "ld1sb { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "cmp x15, x13\n"
+ "add z13.h, z13.h, z24.h\n"
+ "ld1sb { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z14.h, z17.h, z16.h\n"
+ "csel x22, x15, x13, LT\n"
+ "ld1sb { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "add z14.h, z14.h, z24.h\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "ld1sb { z16.s }, p1/Z, [x19]\n"
+ "trn1 z15.h, z17.h, z16.h\n"
+ "add z15.h, z15.h, z24.h\n"
+ "sub x13, x13, x22\n"
+ "cbz x22, 17f\n"
+ "11:" // Unpadded: Main loop
+ ".inst 0xc16175a8 // sdot za.s[x11, 0], { z13.h-z14.h }, z1.h\n"
+ "addvl x21, SP, #4\n"
+ "addvl x20, SP, #8\n"
+ "ld1sb { z21.s }, p1/Z, [x14]\n"
+ ".inst 0xc16075a9 // sdot za.s[x11, 1], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xa0402aa0 // ld1h { z0.h-z1.h }, pn10.b/Z, [x21]\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ "subs x22, x22, #0x1\n"
+ ".inst 0xc16375c8 // sdot za.s[x11, 0], { z14.h-z15.h }, z3.h\n"
+ "ld1sb { z20.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ ".inst 0xc16275c9 // sdot za.s[x11, 1], { z14.h-z15.h }, z2.h\n"
+ ".inst 0xa0412aa2 // ld1h { z2.h-z3.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0xc0066804 // mova { z4.d-z5.d }, za.d[x11, #0]\n"
+ "ld1sb { z19.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc0066826 // mova { z6.d-z7.d }, za.d[x11, #1]\n"
+ ".inst 0xc1aaac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z10.s\n"
+ ".inst 0xc16175aa // sdot za.s[x11, 2], { z13.h-z14.h }, z1.h\n"
+ "ld1sb { z18.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc16075ab // sdot za.s[x11, 3], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xa0402a80 // ld1h { z0.h-z1.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1abaa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z11.s\n"
+ ".inst 0xc16175ac // sdot za.s[x11, 4], { z13.h-z14.h }, z1.h\n"
+ "ld1sb { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc16075ad // sdot za.s[x11, 5], { z13.h-z14.h }, z0.h\n"
+ "ld1sb { z16.s }, p1/Z, [x19]\n"
+ ".inst 0xc1acab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z12.s\n"
+ ".inst 0xc16375ca // sdot za.s[x11, 2], { z14.h-z15.h }, z3.h\n"
+ "trn1 z13.h, z21.h, z20.h\n"
+ ".inst 0xa0402be0 // ld1h { z0.h-z1.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xc16275cb // sdot za.s[x11, 3], { z14.h-z15.h }, z2.h\n"
+ ".inst 0xa0412a82 // ld1h { z2.h-z3.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc1bacec4 // sclamp { z4.s-z7.s }, z22.s, z26.s\n"
+ ".inst 0xc16375cc // sdot za.s[x11, 4], { z14.h-z15.h }, z3.h\n"
+ "st1b { z4.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ "add z13.h, z13.h, z24.h\n"
+ ".inst 0xc16275cd // sdot za.s[x11, 5], { z14.h-z15.h }, z2.h\n"
+ "trn1 z14.h, z19.h, z18.h\n"
+ "trn1 z15.h, z17.h, z16.h\n"
+ "add x11, x11, #0x2\n"
+ ".inst 0xa0412be2 // ld1h { z2.h-z3.h }, pn10.b/Z, [SP, #0x2, MUL VL]\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ ".inst 0xc0046904 // mova za.d[x11, #4], { z8.d-z9.d }\n"
+ "st1b { z5.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ ".inst 0xc0046905 // mova za.d[x11, #5], { z8.d-z9.d }\n"
+ "add z14.h, z14.h, z24.h\n"
+ "st1b { z7.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ "add z15.h, z15.h, z24.h\n"
+ "bgt 11b\n"
+ "b 17f\n"
+ "12:" // Padded
+ "cbz x21, 15f\n"
+ "cmp x21, #0x1\n"
+ "sub x15, x15, x21\n"
+ "beq 14f\n"
+ "13:" // Padded: 2 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z19.s }, p0/Z, [x14]\n"
+ "add z19.h, p0/M, z19.h, z24.h\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z24.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z24.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z24.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z13.h, z19.h, z18.h\n"
+ "trn1 z14.h, z17.h, z16.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z24.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "addvl x19, SP, #8\n"
+ "add z16.h, p0/M, z16.h, z24.h\n"
+ ".inst 0xa0402a60 // ld1h { z0.h-z1.h }, pn10.b/Z, [x19]\n"
+ "trn1 z15.h, z17.h, z16.h\n"
+ ".inst 0xc16175a8 // sdot za.s[x11, 0], { z13.h-z14.h }, z1.h\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ ".inst 0xc16075a9 // sdot za.s[x11, 1], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xa0412a62 // ld1h { z2.h-z3.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16375c8 // sdot za.s[x11, 0], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xc16275c9 // sdot za.s[x11, 1], { z14.h-z15.h }, z2.h\n"
+ "14:" // Padded: 1 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z19.s }, p0/Z, [x14]\n"
+ "add z19.h, p0/M, z19.h, z24.h\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z24.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z24.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z24.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z13.h, z19.h, z18.h\n"
+ "trn1 z14.h, z17.h, z16.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z24.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "addvl x20, SP, #4\n"
+ "add z16.h, p0/M, z16.h, z24.h\n"
+ ".inst 0xa0402a80 // ld1h { z0.h-z1.h }, pn10.b/Z, [x20]\n"
+ "addvl x19, SP, #8\n"
+ "trn1 z15.h, z17.h, z16.h\n"
+ ".inst 0xc16175a8 // sdot za.s[x11, 0], { z13.h-z14.h }, z1.h\n"
+ ".inst 0xc16075a9 // sdot za.s[x11, 1], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xa0402a60 // ld1h { z0.h-z1.h }, pn10.b/Z, [x19]\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ ".inst 0xa0412a82 // ld1h { z2.h-z3.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc16175aa // sdot za.s[x11, 2], { z13.h-z14.h }, z1.h\n"
+ ".inst 0xc16075ab // sdot za.s[x11, 3], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xc16375c8 // sdot za.s[x11, 0], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xc16275c9 // sdot za.s[x11, 1], { z14.h-z15.h }, z2.h\n"
+ ".inst 0xa0412a62 // ld1h { z2.h-z3.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16375ca // sdot za.s[x11, 2], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xc16275cb // sdot za.s[x11, 3], { z14.h-z15.h }, z2.h\n"
+ "15:" // Padded: 0 priming loads
+ ".inst 0xa0402be0 // ld1h { z0.h-z1.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xa0412be2 // ld1h { z2.h-z3.h }, pn10.b/Z, [SP, #0x2, MUL VL]\n"
+ "cbz x15, 18f\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z19.s }, p0/Z, [x14]\n"
+ "add z19.h, p0/M, z19.h, z24.h\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z24.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z24.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z24.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z13.h, z19.h, z18.h\n"
+ "trn1 z14.h, z17.h, z16.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z24.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z24.h\n"
+ "sub x15, x15, #0x1\n"
+ "sub x13, x13, #0x1\n"
+ "cmp x15, x13\n"
+ "trn1 z15.h, z17.h, z16.h\n"
+ "csel x22, x15, x13, LT\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "sub x13, x13, x22\n"
+ "cbz x22, 17f\n"
+ "16:" // Padded: Main loop
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z21.s }, p0/Z, [x14]\n"
+ ".inst 0xc16175a8 // sdot za.s[x11, 0], { z13.h-z14.h }, z1.h\n"
+ ".inst 0xc16075a9 // sdot za.s[x11, 1], { z13.h-z14.h }, z0.h\n"
+ "add z21.h, p0/M, z21.h, z24.h\n"
+ "add x21, x14, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z20.s }, p0/Z, [x21]\n"
+ ".inst 0xc16375c8 // sdot za.s[x11, 0], { z14.h-z15.h }, z3.h\n"
+ "add z20.h, p0/M, z20.h, z24.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0xc16275c9 // sdot za.s[x11, 1], { z14.h-z15.h }, z2.h\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z19.s }, p0/Z, [x21]\n"
+ "add z19.h, p0/M, z19.h, z24.h\n"
+ ".inst 0xc0066804 // mova { z4.d-z5.d }, za.d[x11, #0]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z18.s }, p0/Z, [x21]\n"
+ ".inst 0xc0066826 // mova { z6.d-z7.d }, za.d[x11, #1]\n"
+ "mov x12, #0x4\n"
+ "addvl x20, SP, #4\n"
+ "add z18.h, p0/M, z18.h, z24.h\n"
+ ".inst 0xc1aaac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z10.s\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xa0402a80 // ld1h { z0.h-z1.h }, pn10.b/Z, [x20]\n"
+ "addvl x19, SP, #8\n"
+ ".inst 0xc16175aa // sdot za.s[x11, 2], { z13.h-z14.h }, z1.h\n"
+ "subs x22, x22, #0x1\n"
+ "ld1sb { z17.s }, p0/Z, [x21]\n"
+ ".inst 0xc16075ab // sdot za.s[x11, 3], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xc1abaa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z11.s\n"
+ ".inst 0xa0402a60 // ld1h { z0.h-z1.h }, pn10.b/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z24.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ ".inst 0xa0412a82 // ld1h { z2.h-z3.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc16175ac // sdot za.s[x11, 4], { z13.h-z14.h }, z1.h\n"
+ ".inst 0xc1acab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z12.s\n"
+ "ld1sb { z16.s }, p0/Z, [x21]\n"
+ ".inst 0xc16075ad // sdot za.s[x11, 5], { z13.h-z14.h }, z0.h\n"
+ "add z16.h, p0/M, z16.h, z24.h\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ ".inst 0xc16375ca // sdot za.s[x11, 2], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xa0402be0 // ld1h { z0.h-z1.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xc1bacec4 // sclamp { z4.s-z7.s }, z22.s, z26.s\n"
+ ".inst 0xc16275cb // sdot za.s[x11, 3], { z14.h-z15.h }, z2.h\n"
+ ".inst 0xa0412a62 // ld1h { z2.h-z3.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ "st1b { z4.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ ".inst 0xc16375cc // sdot za.s[x11, 4], { z14.h-z15.h }, z3.h\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "trn1 z13.h, z21.h, z20.h\n"
+ ".inst 0xc16275cd // sdot za.s[x11, 5], { z14.h-z15.h }, z2.h\n"
+ "add x11, x11, #0x2\n"
+ ".inst 0xa0412be2 // ld1h { z2.h-z3.h }, pn10.b/Z, [SP, #0x2, MUL VL]\n"
+ "st1b { z5.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ "st1b { z7.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ ".inst 0xc0046904 // mova za.d[x11, #4], { z8.d-z9.d }\n"
+ ".inst 0xc0046905 // mova za.d[x11, #5], { z8.d-z9.d }\n"
+ "trn1 z14.h, z19.h, z18.h\n"
+ "trn1 z15.h, z17.h, z16.h\n"
+ "bgt 16b\n"
+ "17:" // Main loop tail
+ ".inst 0xc16175a8 // sdot za.s[x11, 0], { z13.h-z14.h }, z1.h\n"
+ "addvl x20, SP, #4\n"
+ "addvl x19, SP, #8\n"
+ ".inst 0xc16075a9 // sdot za.s[x11, 1], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xa0402a80 // ld1h { z0.h-z1.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc16375c8 // sdot za.s[x11, 0], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xc16275c9 // sdot za.s[x11, 1], { z14.h-z15.h }, z2.h\n"
+ ".inst 0xa0412a82 // ld1h { z2.h-z3.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc0066804 // mova { z4.d-z5.d }, za.d[x11, #0]\n"
+ ".inst 0xc0066826 // mova { z6.d-z7.d }, za.d[x11, #1]\n"
+ ".inst 0xc1aaac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z10.s\n"
+ ".inst 0xc16175aa // sdot za.s[x11, 2], { z13.h-z14.h }, z1.h\n"
+ ".inst 0xc1abaa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z11.s\n"
+ ".inst 0xc16075ab // sdot za.s[x11, 3], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xa0402a60 // ld1h { z0.h-z1.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1acab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z12.s\n"
+ ".inst 0xc16175ac // sdot za.s[x11, 4], { z13.h-z14.h }, z1.h\n"
+ ".inst 0xc1bacec4 // sclamp { z4.s-z7.s }, z22.s, z26.s\n"
+ "st1b { z4.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ ".inst 0xc16075ad // sdot za.s[x11, 5], { z13.h-z14.h }, z0.h\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ ".inst 0xc16375ca // sdot za.s[x11, 2], { z14.h-z15.h }, z3.h\n"
+ "st1b { z5.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ ".inst 0xc16275cb // sdot za.s[x11, 3], { z14.h-z15.h }, z2.h\n"
+ ".inst 0xa0412a62 // ld1h { z2.h-z3.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ "st1b { z7.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ ".inst 0xc16375cc // sdot za.s[x11, 4], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xc16275cd // sdot za.s[x11, 5], { z14.h-z15.h }, z2.h\n"
+ "add x11, x11, #0x2\n"
+ ".inst 0xc0046904 // mova za.d[x11, #4], { z8.d-z9.d }\n"
+ ".inst 0xc0046905 // mova za.d[x11, #5], { z8.d-z9.d }\n"
+ "18:" // Main loop skip tail
+ "cbz x13, 20f\n"
+ "19:" // Right padding loop
+ ".inst 0xc0066804 // mova { z4.d-z5.d }, za.d[x11, #0]\n"
+ "subs x13, x13, #0x1\n"
+ ".inst 0xc0066826 // mova { z6.d-z7.d }, za.d[x11, #1]\n"
+ ".inst 0xc1aaac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z10.s\n"
+ "add x11, x11, #0x2\n"
+ ".inst 0xc1abaa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z11.s\n"
+ ".inst 0xc0046904 // mova za.d[x11, #4], { z8.d-z9.d }\n"
+ ".inst 0xc1acab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z12.s\n"
+ ".inst 0xc0046905 // mova za.d[x11, #5], { z8.d-z9.d }\n"
+ ".inst 0xc1bacec4 // sclamp { z4.s-z7.s }, z22.s, z26.s\n"
+ "st1b { z4.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "st1b { z5.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ "st1b { z7.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ "bgt 19b\n"
+ "20:" // End
+ "ldr x21, [%x[args], %[offsetof_Args_weights]]\n"
+ "incw x21, ALL, MUL #9\n"
+ "str x21, [%x[args], %[offsetof_Args_weights]]\n"
+ "incw x16\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_in_vl]]\n"
+ "whilelt p1.s, x16, x17\n"
+ "ldr x14, [%x[args], %[offsetof_Args_inptr]]\n"
+ "add x14, x14, x19\n"
+ "str x14, [%x[args], %[offsetof_Args_inptr]]\n"
+ "ldr x24, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "ldr x23, [%x[args], %[offsetof_Args_ld_out_vls]]\n"
+ "ldp x22, x21, [x24, #0x0]\n"
+ "ldp x20, x19, [x23, #0x0]\n"
+ "add x22, x22, x20\n"
+ "add x21, x21, x19\n"
+ "stp x22, x21, [x24, #0x0]\n"
+ "ldp x22, x21, [x24, #0x10]\n"
+ "ldp x20, x19, [x23, #0x10]\n"
+ "add x22, x22, x20\n"
+ "add x21, x21, x19\n"
+ "stp x22, x21, [x24, #0x10]\n"
+ "b.any 1b\n"
+ "addvl SP, SP, #12\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [ld_in_col] "r" (ld_in_col), [ld_in_row] "r" (ld_in_row), [offsetof_Args_current_channel] "I" (offsetof(Args, current_channel)), [offsetof_Args_inptr] "I" (offsetof(Args, inptr)), [offsetof_Args_input_cols] "I" (offsetof(Args, input_cols)), [offsetof_Args_ld_in_vl] "I" (offsetof(Args, ld_in_vl)), [offsetof_Args_ld_out_cols] "I" (offsetof(Args, ld_out_cols)), [offsetof_Args_ld_out_vls] "I" (offsetof(Args, ld_out_vls)), [offsetof_Args_n_channels] "I" (offsetof(Args, n_channels)), [offsetof_Args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_Args_output_cols] "I" (offsetof(Args, output_cols)), [offsetof_Args_pad_bottom] "I" (offsetof(Args, pad_bottom)), [offsetof_Args_pad_left] "I" (offsetof(Args, pad_left)), [offsetof_Args_pad_top] "I" (offsetof(Args, pad_top)), [offsetof_Args_weights] "I" (offsetof(Args, weights)), [offsetof_Requantize32_a_offset] "I" (offsetof(arm_gemm::Requantize32, a_offset)), [offsetof_Requantize32_b_offset] "I" (offsetof(arm_gemm::Requantize32, b_offset)), [offsetof_Requantize32_bias] "I" (offsetof(arm_gemm::Requantize32, bias)), [offsetof_Requantize32_c_offset] "I" (offsetof(arm_gemm::Requantize32, c_offset)), [offsetof_Requantize32_maxval] "I" (offsetof(arm_gemm::Requantize32, maxval)), [offsetof_Requantize32_minval] "I" (offsetof(arm_gemm::Requantize32, minval)), [offsetof_Requantize32_per_channel_muls] "I" (offsetof(arm_gemm::Requantize32, per_channel_muls)), [offsetof_Requantize32_per_channel_right_shifts] "I" (offsetof(arm_gemm::Requantize32, per_channel_right_shifts)), [offsetof_Requantize32_per_layer_mul] "I" (offsetof(arm_gemm::Requantize32, per_layer_mul)), [offsetof_Requantize32_per_layer_right_shift] "I" (offsetof(arm_gemm::Requantize32, per_layer_right_shift)), [qp] "r" (&qp)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_s8q_planar_3x3_s2_2rows_dot_za/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_s8q_planar_3x3_s2_2rows_dot_za/generic.cpp
new file mode 100644
index 0000000..a9538ac
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_s8q_planar_3x3_s2_2rows_dot_za/generic.cpp
@@ -0,0 +1,592 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <algorithm>
+#include <cstddef>
+#include "arm_gemm.hpp"
+
+using arm_gemm::Requantize32;
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_s8q_planar_3x3_s2_2rows_dot_za_impl(
+ const int8_t *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const int8_t *weights,
+ int8_t **outptrs,
+ const size_t *outlds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ const arm_gemm::Requantize32 &qp
+)
+{
+ struct Args
+ {
+ const int8_t *inptr;
+ long unsigned int pad_top, pad_bottom, pad_left;
+ const int8_t *weights;
+ long unsigned int input_cols, output_cols;
+ int8_t **outptrs;
+ const size_t *ld_out_cols;
+ long unsigned int n, n_channels;
+ };
+
+ Args args = { inptr, pad_top, 5u - std::min(5u, pad_top + valid_input_rows), pad_left, weights, valid_input_cols, output_cols, outptrs, outlds, start_channel, valid_channels };
+
+ __asm__ __volatile__(
+ "ldr x11, [%x[args], %[offsetof_Args_pad_bottom]]\n"
+ "mov x19, #0x5\n"
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "sub x19, x19, x11\n"
+ "ldr x10, [%x[args], %[offsetof_Args_pad_top]]\n"
+ "ptrue p0.b\n"
+ "mov z12.s, #0x0\n"
+ "ldr x22, [%x[args], %[offsetof_Args_n_channels]]\n"
+ "whilelt p5.s, XZR, x22\n"
+ "whilelt p9.s, XZR, x19\n"
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_bias]]\n"
+ "whilelt p8.s, XZR, x10\n"
+ "eor p8.b, p0/Z, p8.b, p9.b\n"
+ "ldr x21, [%x[args], %[offsetof_Args_n]]\n"
+ "cbz x19, 1f\n"
+ "ld1w { z12.s }, p5/Z, [x19, x21, LSL #2]\n"
+ "1:" // Load bias: Done
+ "ldr x20, [%x[args], %[offsetof_Args_weights]]\n"
+ "ld1sb { z27.s }, p0/Z, [x20]\n"
+ "incw x20\n"
+ "mov z0.h, #0x0\n"
+ "ld1sb { z16.s }, p0/Z, [x20]\n"
+ "incw x20\n"
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_muls]]\n"
+ "mov z13.d, z12.d\n"
+ "ld1sb { z22.s }, p0/Z, [x20]\n"
+ "incw x20\n"
+ "ld1sb { z21.s }, p0/Z, [x20]\n"
+ "incw x20\n"
+ "ld1sb { z20.s }, p0/Z, [x20]\n"
+ "incw x20\n"
+ "ld1sb { z18.s }, p0/Z, [x20]\n"
+ "incw x20\n"
+ "ld1sb { z17.s }, p0/Z, [x20]\n"
+ "incw x20\n"
+ "ld1sb { z24.s }, p0/Z, [x20]\n"
+ "incw x20\n"
+ "ld1sb { z19.s }, p0/Z, [x20]\n"
+ "ld1rh { z28.h }, p0/Z, [%x[qp], %[offsetof_Requantize32_b_offset]]\n"
+ "sub z27.h, z27.h, z28.h\n"
+ "sub z16.h, z16.h, z28.h\n"
+ "sub z22.h, z22.h, z28.h\n"
+ "sub z21.h, z21.h, z28.h\n"
+ "trn1 z8.h, z27.h, z21.h\n"
+ "sub z20.h, z20.h, z28.h\n"
+ "sub z18.h, z18.h, z28.h\n"
+ "trn1 z7.h, z16.h, z20.h\n"
+ "sub z17.h, z17.h, z28.h\n"
+ "sub z24.h, z24.h, z28.h\n"
+ "trn1 z6.h, z17.h, z0.h\n"
+ "sub z19.h, z19.h, z28.h\n"
+ "trn1 z5.h, z24.h, z0.h\n"
+ "trn1 z4.h, z22.h, z18.h\n"
+ "trn1 z3.h, z19.h, z0.h\n"
+ "ld1rh { z21.h }, p0/Z, [%x[qp], %[offsetof_Requantize32_a_offset]]\n"
+ "ld1rw { z2.s }, p0/Z, [%x[qp], %[offsetof_Requantize32_c_offset]]\n"
+ "ld1rw { z1.s }, p0/Z, [%x[qp], %[offsetof_Requantize32_per_layer_mul]]\n"
+ "cbz x19, 2f\n"
+ "ld1w { z1.s }, p5/Z, [x19, x21, LSL #2]\n"
+ "2:" // Load mul: End
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_right_shifts]]\n"
+ "ld1rw { z0.s }, p0/Z, [%x[qp], %[offsetof_Requantize32_per_layer_right_shift]]\n"
+ "cbz x19, 3f\n"
+ "ld1w { z0.s }, p5/Z, [x19, x21, LSL #2]\n"
+ "3:" // Load right_shift: End
+ "ldr x28, [%x[args], %[offsetof_Args_input_cols]]\n"
+ "orr x21, x28, %x[ld_in_col], LSL #16\n"
+ "orr x21, x22, x21, LSL #22\n"
+ "ld1rw { z20.s }, p0/Z, [%x[qp], %[offsetof_Requantize32_minval]]\n"
+ "ldr x27, [%x[args], %[offsetof_Args_inptr]]\n"
+ "mov x20, #0x5\n"
+ "add x19, x10, x11\n"
+ "ld1rw { z19.s }, p0/Z, [%x[qp], %[offsetof_Requantize32_maxval]]\n"
+ "mov x9, #0x0\n"
+ "ldr x26, [%x[args], %[offsetof_Args_output_cols]]\n"
+ "lsl x21, x21, #0x0\n"
+ "sub x20, x20, x19\n"
+ "mov x19, x27\n"
+ "4:" // Issue prefetches
+ "subs x20, x20, #0x1\n"
+ ".inst 0xf8b54a7c // rprfm pldstrm, x21, [x19]\n"
+ "add x19, x19, %x[ld_in_col]\n"
+ "bgt 4b\n"
+ "ldr x21, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "lsl x19, %x[ld_in_row], #0x0\n"
+ "msub x27, x10, x19, x27\n"
+ ".inst 0xc0042980 // mova za.d[x9, #0], { z12.d-z13.d }\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_out_cols]]\n"
+ ".inst 0xc0042981 // mova za.d[x9, #1], { z12.d-z13.d }\n"
+ "mov x25, #0x2\n"
+ "ldr x20, [%x[args], %[offsetof_Args_pad_left]]\n"
+ ".inst 0xc0042982 // mova za.d[x9, #2], { z12.d-z13.d }\n"
+ "ldp x24, x23, [x21], #0x10\n"
+ "ldp x22, x21, [x19], #0x10\n"
+ "cbz x20, 6f\n"
+ "cmp x20, x25\n"
+ "csel x19, x20, x25, LT\n"
+ "sub x20, x20, x19\n"
+ "sub x25, x25, x19\n"
+ "cbz x20, 6f\n"
+ ".inst 0xc0062818 // mova { z24.d-z25.d }, za.d[x9, #0]\n"
+ ".inst 0xc1a1a418 // sqdmulh { z24.s-z25.s }, { z24.s-z25.s }, z1.s\n"
+ "and x25, x20, #0x1\n"
+ ".inst 0xc1a0a238 // srshl { z24.s-z25.s }, { z24.s-z25.s }, z0.s\n"
+ "add x20, x20, #0x1\n"
+ "lsr x20, x20, #0x1\n"
+ ".inst 0xc1a2a318 // add { z24.s-z25.s }, { z24.s-z25.s }, z2.s\n"
+ "sub x26, x26, x20\n"
+ ".inst 0xc1b3c698 // sclamp { z24.s-z25.s }, z20.s, z19.s\n"
+ "5:" // Left padding
+ "subs x20, x20, #0x1\n"
+ "st1b { z24.s }, p5, [x24]\n"
+ "add x24, x24, x22\n"
+ "st1b { z25.s }, p5, [x23]\n"
+ "add x23, x23, x21\n"
+ "bgt 5b\n"
+ "6:" // Left padding: End
+ "adds XZR, x10, x11\n"
+ "bne 11f\n"
+ "cbz x25, 9f\n"
+ "cmp x25, #0x1\n"
+ "sub x28, x28, x25\n"
+ "beq 8f\n"
+ "7:" // Unpadded: 2 priming loads
+ "add x19, x27, %x[ld_in_row]\n"
+ "ld1sb { z14.s }, p5/Z, [x27]\n"
+ "sub z14.h, z14.h, z21.h\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ "ld1sb { z18.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z18.h, z18.h, z21.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "ld1sb { z15.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z15.h, z15.h, z21.h\n"
+ "ld1sb { z17.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z17.h, z17.h, z21.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "ld1sb { z16.s }, p5/Z, [x19]\n"
+ "sub z16.h, z16.h, z21.h\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc16835c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xc16635e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z6.h\n"
+ "8:" // Unpadded: 1 priming loads
+ "add x19, x27, %x[ld_in_row]\n"
+ "ld1sb { z14.s }, p5/Z, [x27]\n"
+ "sub z14.h, z14.h, z21.h\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ "ld1sb { z18.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z18.h, z18.h, z21.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "ld1sb { z15.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z15.h, z15.h, z21.h\n"
+ "ld1sb { z17.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z17.h, z17.h, z21.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "ld1sb { z16.s }, p5/Z, [x19]\n"
+ "sub z16.h, z16.h, z21.h\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc16735c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z7.h\n"
+ ".inst 0xc16535e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z5.h\n"
+ "9:" // Unpadded: 0 priming loads
+ "add x20, x27, %x[ld_in_row]\n"
+ "ld1sb { z14.s }, p5/Z, [x27]\n"
+ "sub z14.h, z14.h, z21.h\n"
+ "sub x28, x28, #0x2\n"
+ "ld1sb { z18.s }, p5/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "sub z18.h, z18.h, z21.h\n"
+ "sub x26, x26, #0x1\n"
+ "ld1sb { z15.s }, p5/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "sub z15.h, z15.h, z21.h\n"
+ "lsr x19, x28, #0x1\n"
+ "ld1sb { z17.s }, p5/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "sub z17.h, z17.h, z21.h\n"
+ "cmp x19, x26\n"
+ "ld1sb { z16.s }, p5/Z, [x20]\n"
+ "sub z16.h, z16.h, z21.h\n"
+ "csel x20, x19, x26, LT\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "mov z16.d, z16.d\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ "and x28, x28, #0x1\n"
+ "sub x26, x26, x20\n"
+ "cbz x20, 16f\n"
+ "10:" // Unpadded: Main loop
+ ".inst 0xc16435c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z4.h\n"
+ "add x19, x27, %x[ld_in_row]\n"
+ "subs x20, x20, #0x1\n"
+ ".inst 0xc16835c9 // sdot za.s[x9, 1], { z14.h-z15.h }, z8.h\n"
+ "ld1sb { z14.s }, p5/Z, [x27]\n"
+ "sub z14.h, z14.h, z21.h\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ "ld1sb { z18.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc16335e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z3.h\n"
+ "sub z18.h, z18.h, z21.h\n"
+ ".inst 0xc16635e9 // sdot za.s[x9, 1], { z15.h-z16.h }, z6.h\n"
+ "ld1sb { z15.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z15.h, z15.h, z21.h\n"
+ "ld1sb { z17.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z17.h, z17.h, z21.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "ld1sb { z16.s }, p5/Z, [x19]\n"
+ "sub z16.h, z16.h, z21.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add x19, x27, %x[ld_in_row]\n"
+ ".inst 0xc0062818 // mova { z24.d-z25.d }, za.d[x9, #0]\n"
+ "add x9, x9, #0x1\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc16735c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z7.h\n"
+ ".inst 0xc1a1a418 // sqdmulh { z24.s-z25.s }, { z24.s-z25.s }, z1.s\n"
+ "ld1sb { z14.s }, p5/Z, [x27]\n"
+ ".inst 0xc16535e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z5.h\n"
+ ".inst 0xc1a0a238 // srshl { z24.s-z25.s }, { z24.s-z25.s }, z0.s\n"
+ "ld1sb { z18.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc1a2a318 // add { z24.s-z25.s }, { z24.s-z25.s }, z2.s\n"
+ "ld1sb { z15.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z14.h, z14.h, z21.h\n"
+ "sub z18.h, z18.h, z21.h\n"
+ "ld1sb { z17.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z15.h, z15.h, z21.h\n"
+ "sub z17.h, z17.h, z21.h\n"
+ "ld1sb { z16.s }, p5/Z, [x19]\n"
+ "sub z16.h, z16.h, z21.h\n"
+ ".inst 0xc1b3c698 // sclamp { z24.s-z25.s }, z20.s, z19.s\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ "st1b { z24.s }, p5, [x24]\n"
+ "add x24, x24, x22\n"
+ ".inst 0xc0042982 // mova za.d[x9, #2], { z12.d-z13.d }\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "st1b { z25.s }, p5, [x23]\n"
+ "add x23, x23, x21\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "mov z16.d, z16.d\n"
+ "bgt 10b\n"
+ "b 16f\n"
+ "11:" // Padded
+ "cbz x25, 14f\n"
+ "cmp x25, #0x1\n"
+ "sub x28, x28, x25\n"
+ "beq 13f\n"
+ "12:" // Padded: 2 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25305504 // psel p4.s, p5.s/Z, p8.s[w12]\n"
+ "ld1sb { z14.s }, p4/Z, [x27]\n"
+ "sub z14.h, p4/M, z14.h, z21.h\n"
+ "add x19, x27, %x[ld_in_row]\n"
+ ".inst 0x25705503 // psel p3.s, p5.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z18.s }, p3/Z, [x19]\n"
+ "sub z18.h, p3/M, z18.h, z21.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b05502 // psel p2.s, p5.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z15.s }, p2/Z, [x19]\n"
+ "sub z15.h, p2/M, z15.h, z21.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f05501 // psel p1.s, p5.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z17.s }, p1/Z, [x19]\n"
+ "sub z17.h, p1/M, z17.h, z21.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0x25305500 // psel p0.s, p5.s/Z, p8.s[w12]\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "sub z16.h, p0/M, z16.h, z21.h\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc16835c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z8.h\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ ".inst 0xc16635e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z6.h\n"
+ "13:" // Padded: 1 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25305504 // psel p4.s, p5.s/Z, p8.s[w12]\n"
+ "ld1sb { z14.s }, p4/Z, [x27]\n"
+ "sub z14.h, p4/M, z14.h, z21.h\n"
+ "add x19, x27, %x[ld_in_row]\n"
+ ".inst 0x25705503 // psel p3.s, p5.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z18.s }, p3/Z, [x19]\n"
+ "sub z18.h, p3/M, z18.h, z21.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b05502 // psel p2.s, p5.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z15.s }, p2/Z, [x19]\n"
+ "sub z15.h, p2/M, z15.h, z21.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f05501 // psel p1.s, p5.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z17.s }, p1/Z, [x19]\n"
+ "sub z17.h, p1/M, z17.h, z21.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0x25305500 // psel p0.s, p5.s/Z, p8.s[w12]\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "sub z16.h, p0/M, z16.h, z21.h\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc16735c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z7.h\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ ".inst 0xc16535e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z5.h\n"
+ "14:" // Padded: 0 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25305504 // psel p4.s, p5.s/Z, p8.s[w12]\n"
+ "ld1sb { z14.s }, p4/Z, [x27]\n"
+ "sub z14.h, p4/M, z14.h, z21.h\n"
+ "add x19, x27, %x[ld_in_row]\n"
+ ".inst 0x25705503 // psel p3.s, p5.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z18.s }, p3/Z, [x19]\n"
+ "sub z18.h, p3/M, z18.h, z21.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b05502 // psel p2.s, p5.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z15.s }, p2/Z, [x19]\n"
+ "sub z15.h, p2/M, z15.h, z21.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f05501 // psel p1.s, p5.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z17.s }, p1/Z, [x19]\n"
+ "sub z17.h, p1/M, z17.h, z21.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0x25305500 // psel p0.s, p5.s/Z, p8.s[w12]\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "sub z16.h, p0/M, z16.h, z21.h\n"
+ "sub x28, x28, #0x2\n"
+ "sub x26, x26, #0x1\n"
+ "lsr x19, x28, #0x1\n"
+ "mov z16.d, z16.d\n"
+ "cmp x19, x26\n"
+ "csel x20, x19, x26, LT\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ "and x28, x28, #0x1\n"
+ "sub x26, x26, x20\n"
+ "cbz x20, 16f\n"
+ "15:" // Padded: Main loop
+ ".inst 0xc16435c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z4.h\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25305504 // psel p4.s, p5.s/Z, p8.s[w12]\n"
+ ".inst 0xc16835c9 // sdot za.s[x9, 1], { z14.h-z15.h }, z8.h\n"
+ "add x19, x27, %x[ld_in_row]\n"
+ ".inst 0x25705503 // psel p3.s, p5.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z14.s }, p4/Z, [x27]\n"
+ "ld1sb { z18.s }, p3/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b05502 // psel p2.s, p5.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc16335e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z3.h\n"
+ ".inst 0xc16635e9 // sdot za.s[x9, 1], { z15.h-z16.h }, z6.h\n"
+ "ld1sb { z15.s }, p2/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f05501 // psel p1.s, p5.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z17.s }, p1/Z, [x19]\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z14.h, p4/M, z14.h, z21.h\n"
+ ".inst 0x25305500 // psel p0.s, p5.s/Z, p8.s[w12]\n"
+ "sub z18.h, p3/M, z18.h, z21.h\n"
+ "sub z15.h, p2/M, z15.h, z21.h\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "sub z17.h, p1/M, z17.h, z21.h\n"
+ "sub z16.h, p0/M, z16.h, z21.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xc0062818 // mova { z24.d-z25.d }, za.d[x9, #0]\n"
+ "add x9, x9, #0x1\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc16735c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z7.h\n"
+ ".inst 0xc1a1a418 // sqdmulh { z24.s-z25.s }, { z24.s-z25.s }, z1.s\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25305504 // psel p4.s, p5.s/Z, p8.s[w12]\n"
+ "add x19, x27, %x[ld_in_row]\n"
+ "ld1sb { z14.s }, p4/Z, [x27]\n"
+ ".inst 0xc16535e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z5.h\n"
+ ".inst 0x25705503 // psel p3.s, p5.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z18.s }, p3/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc1a0a238 // srshl { z24.s-z25.s }, { z24.s-z25.s }, z0.s\n"
+ ".inst 0x25b05502 // psel p2.s, p5.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z15.s }, p2/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc1a2a318 // add { z24.s-z25.s }, { z24.s-z25.s }, z2.s\n"
+ ".inst 0x25f05501 // psel p1.s, p5.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x4\n"
+ "ld1sb { z17.s }, p1/Z, [x19]\n"
+ "sub z14.h, p4/M, z14.h, z21.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25305500 // psel p0.s, p5.s/Z, p8.s[w12]\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "sub z18.h, p3/M, z18.h, z21.h\n"
+ "sub z15.h, p2/M, z15.h, z21.h\n"
+ "sub z17.h, p1/M, z17.h, z21.h\n"
+ "subs x20, x20, #0x1\n"
+ ".inst 0xc0042982 // mova za.d[x9, #2], { z12.d-z13.d }\n"
+ "sub z16.h, p0/M, z16.h, z21.h\n"
+ ".inst 0xc1b3c698 // sclamp { z24.s-z25.s }, z20.s, z19.s\n"
+ "st1b { z24.s }, p5, [x24]\n"
+ "add x24, x24, x22\n"
+ "st1b { z25.s }, p5, [x23]\n"
+ "add x23, x23, x21\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "mov z16.d, z16.d\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ "bgt 15b\n"
+ "16:" // Main loop tail
+ ".inst 0xc16435c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z4.h\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25305504 // psel p4.s, p5.s/Z, p8.s[w12]\n"
+ ".inst 0xc16335e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z3.h\n"
+ "add x19, x27, %x[ld_in_row]\n"
+ ".inst 0x25705503 // psel p3.s, p5.s/Z, p8.s[w12, #1]\n"
+ ".inst 0xc16835c9 // sdot za.s[x9, 1], { z14.h-z15.h }, z8.h\n"
+ "ld1sb { z14.s }, p4/Z, [x27]\n"
+ ".inst 0x25b05502 // psel p2.s, p5.s/Z, p8.s[w12, #2]\n"
+ ".inst 0x25f05501 // psel p1.s, p5.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z18.s }, p3/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc16635e9 // sdot za.s[x9, 1], { z15.h-z16.h }, z6.h\n"
+ "mov x12, #0x4\n"
+ ".inst 0xc0062818 // mova { z24.d-z25.d }, za.d[x9, #0]\n"
+ "ld1sb { z15.s }, p2/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc1a1a418 // sqdmulh { z24.s-z25.s }, { z24.s-z25.s }, z1.s\n"
+ "ld1sb { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25305500 // psel p0.s, p5.s/Z, p8.s[w12]\n"
+ "sub z14.h, p4/M, z14.h, z21.h\n"
+ "sub z18.h, p3/M, z18.h, z21.h\n"
+ "sub z15.h, p2/M, z15.h, z21.h\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "add x9, x9, #0x1\n"
+ "sub z17.h, p1/M, z17.h, z21.h\n"
+ "sub z16.h, p0/M, z16.h, z21.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ ".inst 0xc1a0a238 // srshl { z24.s-z25.s }, { z24.s-z25.s }, z0.s\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xc1a2a318 // add { z24.s-z25.s }, { z24.s-z25.s }, z2.s\n"
+ ".inst 0xc16735c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z7.h\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc1b3c698 // sclamp { z24.s-z25.s }, z20.s, z19.s\n"
+ "st1b { z24.s }, p5, [x24]\n"
+ "add x24, x24, x22\n"
+ "st1b { z25.s }, p5, [x23]\n"
+ "add x23, x23, x21\n"
+ ".inst 0xc0042982 // mova za.d[x9, #2], { z12.d-z13.d }\n"
+ ".inst 0xc16535e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z5.h\n"
+ "cbz x28, 17f\n" // Skip remainder inputs
+ "mov x12, #0x0\n"
+ ".inst 0x25305504 // psel p4.s, p5.s/Z, p8.s[w12]\n"
+ "ld1sb { z14.s }, p4/Z, [x27]\n"
+ "sub z14.h, p4/M, z14.h, z21.h\n"
+ "add x19, x27, %x[ld_in_row]\n"
+ ".inst 0x25705503 // psel p3.s, p5.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z18.s }, p3/Z, [x19]\n"
+ "sub z18.h, p3/M, z18.h, z21.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b05502 // psel p2.s, p5.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z15.s }, p2/Z, [x19]\n"
+ "sub z15.h, p2/M, z15.h, z21.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f05501 // psel p1.s, p5.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z17.s }, p1/Z, [x19]\n"
+ "sub z17.h, p1/M, z17.h, z21.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0x25305500 // psel p0.s, p5.s/Z, p8.s[w12]\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "sub z16.h, p0/M, z16.h, z21.h\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc16435c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z4.h\n"
+ "sub x26, x26, #0x1\n"
+ ".inst 0xc16335e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z3.h\n"
+ ".inst 0xc0062818 // mova { z24.d-z25.d }, za.d[x9, #0]\n"
+ ".inst 0xc1a1a418 // sqdmulh { z24.s-z25.s }, { z24.s-z25.s }, z1.s\n"
+ ".inst 0xc1a0a238 // srshl { z24.s-z25.s }, { z24.s-z25.s }, z0.s\n"
+ ".inst 0xc16835c9 // sdot za.s[x9, 1], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xc1a2a318 // add { z24.s-z25.s }, { z24.s-z25.s }, z2.s\n"
+ ".inst 0xc16635e9 // sdot za.s[x9, 1], { z15.h-z16.h }, z6.h\n"
+ "add x9, x9, #0x1\n"
+ ".inst 0xc1b3c698 // sclamp { z24.s-z25.s }, z20.s, z19.s\n"
+ "st1b { z24.s }, p5, [x24]\n"
+ "add x24, x24, x22\n"
+ ".inst 0xc0042982 // mova za.d[x9, #2], { z12.d-z13.d }\n"
+ "st1b { z25.s }, p5, [x23]\n"
+ "add x23, x23, x21\n"
+ "17:" // Tail input: End
+ "cbz x26, 19f\n"
+ "18:" // Right padding loop
+ ".inst 0xc0062818 // mova { z24.d-z25.d }, za.d[x9, #0]\n"
+ ".inst 0xc1a1a418 // sqdmulh { z24.s-z25.s }, { z24.s-z25.s }, z1.s\n"
+ "add x9, x9, #0x1\n"
+ ".inst 0xc1a0a238 // srshl { z24.s-z25.s }, { z24.s-z25.s }, z0.s\n"
+ "subs x26, x26, #0x1\n"
+ ".inst 0xc0042982 // mova za.d[x9, #2], { z12.d-z13.d }\n"
+ ".inst 0xc1a2a318 // add { z24.s-z25.s }, { z24.s-z25.s }, z2.s\n"
+ ".inst 0xc1b3c698 // sclamp { z24.s-z25.s }, z20.s, z19.s\n"
+ "st1b { z24.s }, p5, [x24]\n"
+ "add x24, x24, x22\n"
+ "st1b { z25.s }, p5, [x23]\n"
+ "add x23, x23, x21\n"
+ "bgt 18b\n"
+ "19:" // End
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [ld_in_col] "r" (ld_in_col), [ld_in_row] "r" (ld_in_row), [offsetof_Args_inptr] "I" (offsetof(Args, inptr)), [offsetof_Args_input_cols] "I" (offsetof(Args, input_cols)), [offsetof_Args_ld_out_cols] "I" (offsetof(Args, ld_out_cols)), [offsetof_Args_n] "I" (offsetof(Args, n)), [offsetof_Args_n_channels] "I" (offsetof(Args, n_channels)), [offsetof_Args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_Args_output_cols] "I" (offsetof(Args, output_cols)), [offsetof_Args_pad_bottom] "I" (offsetof(Args, pad_bottom)), [offsetof_Args_pad_left] "I" (offsetof(Args, pad_left)), [offsetof_Args_pad_top] "I" (offsetof(Args, pad_top)), [offsetof_Args_weights] "I" (offsetof(Args, weights)), [offsetof_Requantize32_a_offset] "I" (offsetof(arm_gemm::Requantize32, a_offset)), [offsetof_Requantize32_b_offset] "I" (offsetof(arm_gemm::Requantize32, b_offset)), [offsetof_Requantize32_bias] "I" (offsetof(arm_gemm::Requantize32, bias)), [offsetof_Requantize32_c_offset] "I" (offsetof(arm_gemm::Requantize32, c_offset)), [offsetof_Requantize32_maxval] "I" (offsetof(arm_gemm::Requantize32, maxval)), [offsetof_Requantize32_minval] "I" (offsetof(arm_gemm::Requantize32, minval)), [offsetof_Requantize32_per_channel_muls] "I" (offsetof(arm_gemm::Requantize32, per_channel_muls)), [offsetof_Requantize32_per_channel_right_shifts] "I" (offsetof(arm_gemm::Requantize32, per_channel_right_shifts)), [offsetof_Requantize32_per_layer_mul] "I" (offsetof(arm_gemm::Requantize32, per_layer_mul)), [offsetof_Requantize32_per_layer_right_shift] "I" (offsetof(arm_gemm::Requantize32, per_layer_right_shift)), [qp] "r" (&qp)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x10", "x11", "x12", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_s8q_planar_3x3_s2_4rows_dot_za.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_s8q_planar_3x3_s2_4rows_dot_za.hpp
new file mode 100644
index 0000000..d14d662
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_s8q_planar_3x3_s2_4rows_dot_za.hpp
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_s8q_planar_3x3_s2_4rows_dot_za_impl(
+ const int8_t *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const int8_t *weights,
+ int8_t **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ const arm_gemm::Requantize32 &qp
+);
+
+class sme2_s8q_planar_3x3_s2_4rows_dot_za : public PlanarStrategy<int8_t, int8_t>
+{
+ using Parent = PlanarStrategy<int8_t, int8_t>;
+
+ public:
+ using return_type = int8_t;
+ constexpr static auto output_rows = 4u;
+ constexpr static auto kernel_rows = 3u, kernel_cols = 3u;
+ constexpr static auto stride_rows = 2u, stride_cols = 2u;
+ constexpr static auto vl_type = arm_gemm::VLType::SME;
+
+ sme2_s8q_planar_3x3_s2_4rows_dot_za(const CPUInfo *)
+ : Parent(kernel_rows, kernel_cols, stride_rows, stride_cols, output_rows, vl_type)
+ {
+ }
+
+ typename Parent::KernelType get_kernel(void) const override
+ {
+ return sme2_s8q_planar_3x3_s2_4rows_dot_za_impl;
+ }
+};
+
+} // namespace depthwise
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_s8q_planar_3x3_s2_4rows_dot_za/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_s8q_planar_3x3_s2_4rows_dot_za/generic.cpp
new file mode 100644
index 0000000..fd35da4
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_s8q_planar_3x3_s2_4rows_dot_za/generic.cpp
@@ -0,0 +1,881 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <algorithm>
+#include <cstddef>
+#include "arm_gemm.hpp"
+
+using arm_gemm::Requantize32;
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_s8q_planar_3x3_s2_4rows_dot_za_impl(
+ const int8_t *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const int8_t *weights,
+ int8_t **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ const arm_gemm::Requantize32 &qp
+)
+{
+ struct Args
+ {
+ const int8_t *inptr;
+ size_t ld_in_vl;
+ long unsigned int pad_top, pad_bottom, pad_left;
+ const int8_t *weights;
+ long unsigned int input_cols, output_cols;
+ int8_t **outptrs;
+ const size_t *ld_out_cols;
+ const size_t *ld_out_vls;
+ long unsigned int current_channel, n_channels;
+ };
+
+ Args args = { inptr, ld_in_vl, pad_top, 9u - std::min(9u, pad_top + valid_input_rows), pad_left, weights, valid_input_cols, output_cols, outptrs, outlds, outvllds, start_channel, valid_channels };
+
+ __asm__ __volatile__(
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "ldr x7, [%x[args], %[offsetof_Args_pad_bottom]]\n"
+ "ptrue p2.b\n"
+ "mov x19, #0x9\n"
+ "ldr x8, [%x[args], %[offsetof_Args_pad_top]]\n"
+ "ld1rh { z5.h }, p2/Z, [%x[qp], %[offsetof_Requantize32_a_offset]]\n"
+ "sub x19, x19, x7\n"
+ ".inst 0x25207812 // ptrue pn10.b\n"
+ "ldr x17, [%x[args], %[offsetof_Args_n_channels]]\n"
+ "whilelt p1.s, XZR, x17\n"
+ "whilelt p9.s, XZR, x19\n"
+ "ld1rw { z4.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_c_offset]]\n"
+ "whilelt p8.s, XZR, x8\n"
+ "addvl SP, SP, #-6\n"
+ "ldr x16, [%x[args], %[offsetof_Args_current_channel]]\n"
+ "neg z5.h, p2/M, z5.h\n"
+ "eor p8.b, p2/Z, p8.b, p9.b\n"
+ "ld1rw { z8.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_per_layer_mul]]\n"
+ "ld1rw { z7.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_per_layer_right_shift]]\n"
+ "ld1rw { z27.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_minval]]\n"
+ "ld1rw { z23.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_maxval]]\n"
+ "1:" // Channel loop
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_bias]]\n"
+ "mov z0.s, #0x0\n"
+ "cbz x19, 2f\n"
+ "ld1w { z0.s }, p1/Z, [x19, x16, LSL #2]\n"
+ "2:" // Load bias: Done
+ "ldr x21, [%x[args], %[offsetof_Args_weights]]\n"
+ "mov x19, x21\n"
+ "ld1sb { z24.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "ld1rh { z13.h }, p2/Z, [%x[qp], %[offsetof_Requantize32_b_offset]]\n"
+ "sub z24.h, z24.h, z13.h\n"
+ "incw x21\n"
+ "mov z17.h, #0x0\n"
+ "ld1sb { z25.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "sub z25.h, z25.h, z13.h\n"
+ "trn1 z10.h, z24.h, z25.h\n"
+ "ld1sb { z16.s }, p2/Z, [x19]\n"
+ "sub z16.h, z16.h, z13.h\n"
+ "mov x19, x21\n"
+ "trn1 z11.h, z16.h, z17.h\n"
+ "ld1sb { z24.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "sub z24.h, z24.h, z13.h\n"
+ "addvl x20, SP, #6\n"
+ "ld1sb { z25.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "sub z25.h, z25.h, z13.h\n"
+ "incw x21\n"
+ "ld1sb { z16.s }, p2/Z, [x19]\n"
+ "sub z16.h, z16.h, z13.h\n"
+ "addvl x20, x20, #-2\n"
+ "mov x19, x21\n"
+ "st1h { z10.h }, p2, [x20]\n"
+ "trn1 z10.h, z24.h, z25.h\n"
+ "ld1sb { z24.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "ld1sb { z25.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "st1h { z11.h }, p2, [x20, #1, MUL VL]\n"
+ "trn1 z11.h, z16.h, z17.h\n"
+ "ld1sb { z16.s }, p2/Z, [x19]\n"
+ "sub z24.h, z24.h, z13.h\n"
+ "sub z25.h, z25.h, z13.h\n"
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_muls]]\n"
+ "sub z16.h, z16.h, z13.h\n"
+ "addvl x20, x20, #-2\n"
+ "st1h { z10.h }, p2, [x20]\n"
+ "mov z1.d, z0.d\n"
+ "st1h { z11.h }, p2, [x20, #1, MUL VL]\n"
+ "addvl x20, x20, #-2\n"
+ "mov z2.d, z0.d\n"
+ "mov z3.d, z0.d\n"
+ "trn1 z10.h, z24.h, z25.h\n"
+ "st1h { z10.h }, p2, [x20]\n"
+ "trn1 z11.h, z16.h, z17.h\n"
+ "st1h { z11.h }, p2, [x20, #1, MUL VL]\n"
+ "cbz x19, 3f\n"
+ "ld1w { z8.s }, p1/Z, [x19, x16, LSL #2]\n"
+ "3:" // Load mul: End
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_right_shifts]]\n"
+ "cbz x19, 4f\n"
+ "ld1w { z7.s }, p1/Z, [x19, x16, LSL #2]\n"
+ "4:" // Load right_shift: End
+ "ldr x15, [%x[args], %[offsetof_Args_input_cols]]\n"
+ "sub x19, x15, #0x1\n"
+ "orr x22, x19, %x[ld_in_col], LSL #16\n"
+ "ldr x14, [%x[args], %[offsetof_Args_inptr]]\n"
+ "orr x22, x17, x22, LSL #22\n"
+ "mov x21, #0x9\n"
+ "add x20, x8, x7\n"
+ "lsl x19, %x[ld_in_row], #0x0\n"
+ "ldr x13, [%x[args], %[offsetof_Args_output_cols]]\n"
+ "mov x11, #0x0\n"
+ "lsl x22, x22, #0x0\n"
+ "sub x21, x21, x20\n"
+ "madd x19, x19, x8, x14\n"
+ "5:" // Issue prefetches
+ "subs x21, x21, #0x1\n"
+ ".inst 0xf8b64a7c // rprfm pldstrm, x22, [x19]\n"
+ "add x19, x19, %x[ld_in_col]\n"
+ "bgt 5b\n"
+ "ldr x24, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "lsl x19, %x[ld_in_row], #0x0\n"
+ "msub x14, x8, x19, x14\n"
+ ".inst 0xc0046c00 // mova za.d[x11, #0], { z0.d-z3.d }\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_out_cols]]\n"
+ ".inst 0xc0046c01 // mova za.d[x11, #1], { z0.d-z3.d }\n"
+ "mov x21, #0x2\n"
+ "ldp x10, x9, [x24], #0x10\n"
+ ".inst 0xc0046c02 // mova za.d[x11, #2], { z0.d-z3.d }\n"
+ "ldp x28, x27, [x19], #0x10\n"
+ "ldr x20, [%x[args], %[offsetof_Args_pad_left]]\n"
+ "ldp x26, x25, [x24], #0x10\n"
+ "ldp x24, x23, [x19], #0x10\n"
+ "cbz x20, 7f\n"
+ "cmp x20, x21\n"
+ "csel x19, x20, x21, LT\n"
+ "sub x20, x20, x19\n"
+ "sub x21, x21, x19\n"
+ "cbz x20, 7f\n"
+ ".inst 0xc0066c1c // mova { z28.d-z31.d }, za.d[x11, #0]\n"
+ ".inst 0xc1a8ac1c // sqdmulh { z28.s-z31.s }, { z28.s-z31.s }, z8.s\n"
+ "and x21, x20, #0x1\n"
+ ".inst 0xc1a7aa3c // srshl { z28.s-z31.s }, { z28.s-z31.s }, z7.s\n"
+ "add x20, x20, #0x1\n"
+ "lsr x20, x20, #0x1\n"
+ ".inst 0xc1a4ab1c // add { z28.s-z31.s }, { z28.s-z31.s }, z4.s\n"
+ "sub x13, x13, x20\n"
+ ".inst 0xc1b7cf7c // sclamp { z28.s-z31.s }, z27.s, z23.s\n"
+ "6:" // Left padding
+ "subs x20, x20, #0x1\n"
+ "st1b { z28.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ "st1b { z29.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "st1b { z30.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ "st1b { z31.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ "bgt 6b\n"
+ "7:" // Left padding: End
+ "adds XZR, x8, x7\n"
+ "bne 12f\n"
+ "cbz x21, 10f\n"
+ "cmp x21, #0x1\n"
+ "sub x15, x15, x21\n"
+ "beq 9f\n"
+ "8:" // Unpadded: 2 priming loads
+ "add x20, x14, %x[ld_in_row]\n"
+ "ld1sb { z12.s }, p1/Z, [x14]\n"
+ "addvl x19, SP, #4\n"
+ "ld1sb { z20.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "add z12.h, z12.h, z5.h\n"
+ "ld1sb { z13.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "ld1sb { z19.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z13.h, z13.h, z5.h\n"
+ "ld1sb { z14.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1sb { z18.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z5.h\n"
+ "ld1sb { z15.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1sb { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add z15.h, z15.h, z5.h\n"
+ "ld1sb { z16.s }, p1/Z, [x20]\n"
+ "mov z16.d, z16.d\n"
+ "add z16.h, z16.h, z5.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ "9:" // Unpadded: 1 priming loads
+ "add x20, x14, %x[ld_in_row]\n"
+ "ld1sb { z12.s }, p1/Z, [x14]\n"
+ "addvl x19, SP, #2\n"
+ "ld1sb { z20.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "add z12.h, z12.h, z5.h\n"
+ "ld1sb { z13.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "ld1sb { z19.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z13.h, z13.h, z5.h\n"
+ "ld1sb { z14.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1sb { z18.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z5.h\n"
+ "ld1sb { z15.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1sb { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add z15.h, z15.h, z5.h\n"
+ "ld1sb { z16.s }, p1/Z, [x20]\n"
+ "mov z16.d, z16.d\n"
+ "add z16.h, z16.h, z5.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ "10:" // Unpadded: 0 priming loads
+ "cmp x15, #0x2\n"
+ ".inst 0xa0402bea // ld1h { z10.h-z11.h }, pn10.b/Z, [SP]\n"
+ "blt 18f\n"
+ "add x20, x14, %x[ld_in_row]\n"
+ "ld1sb { z12.s }, p1/Z, [x14]\n"
+ "sub x15, x15, #0x2\n"
+ "ld1sb { z20.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "sub x13, x13, #0x1\n"
+ "ld1sb { z13.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "lsr x19, x15, #0x1\n"
+ "add z12.h, z12.h, z5.h\n"
+ "ld1sb { z19.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "cmp x19, x13\n"
+ "ld1sb { z14.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "csel x22, x19, x13, LT\n"
+ "add z13.h, z13.h, z5.h\n"
+ "ld1sb { z18.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z5.h\n"
+ "ld1sb { z15.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "ld1sb { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add z15.h, z15.h, z5.h\n"
+ "ld1sb { z16.s }, p1/Z, [x20]\n"
+ "mov z16.d, z16.d\n"
+ "add z16.h, z16.h, z5.h\n"
+ "and x15, x15, #0x1\n"
+ "sub x13, x13, x22\n"
+ "cbz x22, 17f\n"
+ "11:" // Unpadded: Main loop
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ "addvl x19, SP, #4\n"
+ "add x21, x14, %x[ld_in_row]\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ "addvl x20, SP, #2\n"
+ "subs x22, x22, #0x1\n"
+ ".inst 0xc17a7589 // sdot za.s[x11, 1], { z12.h-z15.h }, z10.h\n"
+ "ld1sb { z12.s }, p1/Z, [x14]\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ "ld1sb { z20.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0xc17b75a9 // sdot za.s[x11, 1], { z13.h-z16.h }, z11.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "ld1sb { z13.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "add z12.h, z12.h, z5.h\n"
+ ".inst 0xc0066c1c // mova { z28.d-z31.d }, za.d[x11, #0]\n"
+ "ld1sb { z19.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z13.h, z13.h, z5.h\n"
+ "ld1sb { z14.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "add x11, x11, #0x1\n"
+ ".inst 0xc0046c02 // mova za.d[x11, #2], { z0.d-z3.d }\n"
+ "ld1sb { z18.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z5.h\n"
+ "ld1sb { z15.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0xc1a8ac1c // sqdmulh { z28.s-z31.s }, { z28.s-z31.s }, z8.s\n"
+ "ld1sb { z17.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add z15.h, z15.h, z5.h\n"
+ "ld1sb { z16.s }, p1/Z, [x21]\n"
+ "mov z16.d, z16.d\n"
+ "add z16.h, z16.h, z5.h\n"
+ ".inst 0xa0402a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc1a7aa3c // srshl { z28.s-z31.s }, { z28.s-z31.s }, z7.s\n"
+ "ld1sb { z12.s }, p1/Z, [x14]\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ ".inst 0xc1a4ab1c // add { z28.s-z31.s }, { z28.s-z31.s }, z4.s\n"
+ "ld1sb { z20.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ ".inst 0xc1b7cf7c // sclamp { z28.s-z31.s }, z27.s, z23.s\n"
+ "ld1sb { z13.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "st1b { z28.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ "ld1sb { z19.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "st1b { z29.s }, p1, [x9]\n"
+ "ld1sb { z14.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "add x9, x9, x27\n"
+ "st1b { z30.s }, p1, [x26]\n"
+ "ld1sb { z18.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add x26, x26, x24\n"
+ "ld1sb { z15.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "st1b { z31.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ "ld1sb { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add z12.h, z12.h, z5.h\n"
+ "ld1sb { z16.s }, p1/Z, [x19]\n"
+ "mov z16.d, z16.d\n"
+ "add z13.h, z13.h, z5.h\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ ".inst 0xa0402bea // ld1h { z10.h-z11.h }, pn10.b/Z, [SP]\n"
+ "add z14.h, z14.h, z5.h\n"
+ "add z15.h, z15.h, z5.h\n"
+ "add z16.h, z16.h, z5.h\n"
+ "bgt 11b\n"
+ "b 17f\n"
+ "12:" // Padded
+ "cbz x21, 15f\n"
+ "cmp x21, #0x1\n"
+ "sub x15, x15, x21\n"
+ "beq 14f\n"
+ "13:" // Padded: 2 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z12.s }, p0/Z, [x14]\n"
+ "add z12.h, p0/M, z12.h, z5.h\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z5.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z15.s }, p0/Z, [x19]\n"
+ "add z15.h, p0/M, z15.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z17.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z17.h, p0/M, z17.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z5.h\n"
+ "addvl x19, SP, #4\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ "14:" // Padded: 1 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z12.s }, p0/Z, [x14]\n"
+ "add z12.h, p0/M, z12.h, z5.h\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z5.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z15.s }, p0/Z, [x19]\n"
+ "add z15.h, p0/M, z15.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z17.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z17.h, p0/M, z17.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z5.h\n"
+ "addvl x19, SP, #2\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ "15:" // Padded: 0 priming loads
+ "cmp x15, #0x2\n"
+ ".inst 0xa0402bea // ld1h { z10.h-z11.h }, pn10.b/Z, [SP]\n"
+ "blt 18f\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z12.s }, p0/Z, [x14]\n"
+ "add z12.h, p0/M, z12.h, z5.h\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z5.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z15.s }, p0/Z, [x19]\n"
+ "add z15.h, p0/M, z15.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z17.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z17.h, p0/M, z17.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z5.h\n"
+ "sub x15, x15, #0x2\n"
+ "sub x13, x13, #0x1\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "lsr x19, x15, #0x1\n"
+ "cmp x19, x13\n"
+ "mov z16.d, z16.d\n"
+ "csel x21, x19, x13, LT\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "and x15, x15, #0x1\n"
+ "sub x13, x13, x21\n"
+ "cbz x21, 17f\n"
+ "16:" // Padded: Main loop
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ "addvl x19, SP, #4\n"
+ "mov x12, #0x0\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "add x20, x14, %x[ld_in_row]\n"
+ ".inst 0xc17a7589 // sdot za.s[x11, 1], { z12.h-z15.h }, z10.h\n"
+ "ld1sb { z12.s }, p0/Z, [x14]\n"
+ "add z12.h, p0/M, z12.h, z5.h\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z20.s }, p0/Z, [x20]\n"
+ "add z20.h, p0/M, z20.h, z5.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc17b75a9 // sdot za.s[x11, 1], { z13.h-z16.h }, z11.h\n"
+ "ld1sb { z13.s }, p0/Z, [x20]\n"
+ "add z13.h, p0/M, z13.h, z5.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z19.s }, p0/Z, [x20]\n"
+ "mov x12, #0x4\n"
+ "add z19.h, p0/M, z19.h, z5.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z14.s }, p0/Z, [x20]\n"
+ "add z14.h, p0/M, z14.h, z5.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z18.s }, p0/Z, [x20]\n"
+ "add z18.h, p0/M, z18.h, z5.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z15.s }, p0/Z, [x20]\n"
+ "add z15.h, p0/M, z15.h, z5.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z17.s }, p0/Z, [x20]\n"
+ "add z17.h, p0/M, z17.h, z5.h\n"
+ "mov x12, #0x8\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "addvl x19, SP, #2\n"
+ "ld1sb { z16.s }, p0/Z, [x20]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ "mov x12, #0x0\n"
+ ".inst 0xc0066c1c // mova { z28.d-z31.d }, za.d[x11, #0]\n"
+ "add x11, x11, #0x1\n"
+ "add z16.h, p0/M, z16.h, z5.h\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z12.s }, p0/Z, [x14]\n"
+ "add z12.h, p0/M, z12.h, z5.h\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "mov z16.d, z16.d\n"
+ "ld1sb { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ "ld1sb { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z19.s }, p0/Z, [x19]\n"
+ "mov x12, #0x4\n"
+ "add z19.h, p0/M, z19.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc0046c02 // mova za.d[x11, #2], { z0.d-z3.d }\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z15.s }, p0/Z, [x19]\n"
+ ".inst 0xc1a8ac1c // sqdmulh { z28.s-z31.s }, { z28.s-z31.s }, z8.s\n"
+ "add z15.h, p0/M, z15.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z17.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ ".inst 0xc1a7aa3c // srshl { z28.s-z31.s }, { z28.s-z31.s }, z7.s\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "add z17.h, p0/M, z17.h, z5.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z5.h\n"
+ ".inst 0xc1a4ab1c // add { z28.s-z31.s }, { z28.s-z31.s }, z4.s\n"
+ "subs x21, x21, #0x1\n"
+ ".inst 0xa0402bea // ld1h { z10.h-z11.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xc1b7cf7c // sclamp { z28.s-z31.s }, z27.s, z23.s\n"
+ "st1b { z28.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "st1b { z29.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "st1b { z30.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "mov z16.d, z16.d\n"
+ "st1b { z31.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "bgt 16b\n"
+ "17:" // Main loop tail
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ "addvl x19, SP, #4\n"
+ "mov x12, #0x0\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ ".inst 0xc17a7589 // sdot za.s[x11, 1], { z12.h-z15.h }, z10.h\n"
+ "ld1sb { z12.s }, p0/Z, [x14]\n"
+ "add z12.h, p0/M, z12.h, z5.h\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc17b75a9 // sdot za.s[x11, 1], { z13.h-z16.h }, z11.h\n"
+ "ld1sb { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z19.s }, p0/Z, [x19]\n"
+ "mov x12, #0x4\n"
+ "add z19.h, p0/M, z19.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z15.s }, p0/Z, [x19]\n"
+ ".inst 0xc0066c1c // mova { z28.d-z31.d }, za.d[x11, #0]\n"
+ "add z15.h, p0/M, z15.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z17.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ ".inst 0xc1a8ac1c // sqdmulh { z28.s-z31.s }, { z28.s-z31.s }, z8.s\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "add z17.h, p0/M, z17.h, z5.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "addvl x19, SP, #2\n"
+ ".inst 0xc1a7aa3c // srshl { z28.s-z31.s }, { z28.s-z31.s }, z7.s\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "add x11, x11, #0x1\n"
+ "add z16.h, p0/M, z16.h, z5.h\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1a4ab1c // add { z28.s-z31.s }, { z28.s-z31.s }, z4.s\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc1b7cf7c // sclamp { z28.s-z31.s }, z27.s, z23.s\n"
+ "st1b { z28.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ ".inst 0xc0046c02 // mova za.d[x11, #2], { z0.d-z3.d }\n"
+ "st1b { z29.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ ".inst 0xa0402bea // ld1h { z10.h-z11.h }, pn10.b/Z, [SP]\n"
+ "st1b { z30.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ "st1b { z31.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ "18:" // Main loop skip tail
+ "cbz x15, 19f\n" // Skip remainder inputs
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z12.s }, p0/Z, [x14]\n"
+ "add z12.h, p0/M, z12.h, z5.h\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z5.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z15.s }, p0/Z, [x19]\n"
+ "add z15.h, p0/M, z15.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z17.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z17.h, p0/M, z17.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z5.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "mov z16.d, z16.d\n"
+ "addvl x19, SP, #4\n"
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ "sub x13, x13, #0x1\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc0066c1c // mova { z28.d-z31.d }, za.d[x11, #0]\n"
+ ".inst 0xc1a8ac1c // sqdmulh { z28.s-z31.s }, { z28.s-z31.s }, z8.s\n"
+ ".inst 0xc1a7aa3c // srshl { z28.s-z31.s }, { z28.s-z31.s }, z7.s\n"
+ ".inst 0xc17a7589 // sdot za.s[x11, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc1a4ab1c // add { z28.s-z31.s }, { z28.s-z31.s }, z4.s\n"
+ ".inst 0xc17b75a9 // sdot za.s[x11, 1], { z13.h-z16.h }, z11.h\n"
+ "add x11, x11, #0x1\n"
+ ".inst 0xc1b7cf7c // sclamp { z28.s-z31.s }, z27.s, z23.s\n"
+ "st1b { z28.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ ".inst 0xc0046c02 // mova za.d[x11, #2], { z0.d-z3.d }\n"
+ "st1b { z29.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "st1b { z30.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ "st1b { z31.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ "19:" // Tail input: End
+ "cbz x13, 21f\n"
+ "20:" // Right padding loop
+ ".inst 0xc0066c1c // mova { z28.d-z31.d }, za.d[x11, #0]\n"
+ ".inst 0xc1a8ac1c // sqdmulh { z28.s-z31.s }, { z28.s-z31.s }, z8.s\n"
+ "add x11, x11, #0x1\n"
+ ".inst 0xc1a7aa3c // srshl { z28.s-z31.s }, { z28.s-z31.s }, z7.s\n"
+ "subs x13, x13, #0x1\n"
+ ".inst 0xc0046c02 // mova za.d[x11, #2], { z0.d-z3.d }\n"
+ ".inst 0xc1a4ab1c // add { z28.s-z31.s }, { z28.s-z31.s }, z4.s\n"
+ ".inst 0xc1b7cf7c // sclamp { z28.s-z31.s }, z27.s, z23.s\n"
+ "st1b { z28.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ "st1b { z29.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "st1b { z30.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ "st1b { z31.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ "bgt 20b\n"
+ "21:" // End
+ "ldr x21, [%x[args], %[offsetof_Args_weights]]\n"
+ "incw x21, ALL, MUL #9\n"
+ "str x21, [%x[args], %[offsetof_Args_weights]]\n"
+ "incw x16\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_in_vl]]\n"
+ "whilelt p1.s, x16, x17\n"
+ "ldr x14, [%x[args], %[offsetof_Args_inptr]]\n"
+ "add x14, x14, x19\n"
+ "str x14, [%x[args], %[offsetof_Args_inptr]]\n"
+ "ldr x24, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "ldr x23, [%x[args], %[offsetof_Args_ld_out_vls]]\n"
+ "ldp x22, x21, [x24, #0x0]\n"
+ "ldp x20, x19, [x23, #0x0]\n"
+ "add x22, x22, x20\n"
+ "add x21, x21, x19\n"
+ "stp x22, x21, [x24, #0x0]\n"
+ "ldp x22, x21, [x24, #0x10]\n"
+ "ldp x20, x19, [x23, #0x10]\n"
+ "add x22, x22, x20\n"
+ "add x21, x21, x19\n"
+ "stp x22, x21, [x24, #0x10]\n"
+ "b.any 1b\n"
+ "addvl SP, SP, #6\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [ld_in_col] "r" (ld_in_col), [ld_in_row] "r" (ld_in_row), [offsetof_Args_current_channel] "I" (offsetof(Args, current_channel)), [offsetof_Args_inptr] "I" (offsetof(Args, inptr)), [offsetof_Args_input_cols] "I" (offsetof(Args, input_cols)), [offsetof_Args_ld_in_vl] "I" (offsetof(Args, ld_in_vl)), [offsetof_Args_ld_out_cols] "I" (offsetof(Args, ld_out_cols)), [offsetof_Args_ld_out_vls] "I" (offsetof(Args, ld_out_vls)), [offsetof_Args_n_channels] "I" (offsetof(Args, n_channels)), [offsetof_Args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_Args_output_cols] "I" (offsetof(Args, output_cols)), [offsetof_Args_pad_bottom] "I" (offsetof(Args, pad_bottom)), [offsetof_Args_pad_left] "I" (offsetof(Args, pad_left)), [offsetof_Args_pad_top] "I" (offsetof(Args, pad_top)), [offsetof_Args_weights] "I" (offsetof(Args, weights)), [offsetof_Requantize32_a_offset] "I" (offsetof(arm_gemm::Requantize32, a_offset)), [offsetof_Requantize32_b_offset] "I" (offsetof(arm_gemm::Requantize32, b_offset)), [offsetof_Requantize32_bias] "I" (offsetof(arm_gemm::Requantize32, bias)), [offsetof_Requantize32_c_offset] "I" (offsetof(arm_gemm::Requantize32, c_offset)), [offsetof_Requantize32_maxval] "I" (offsetof(arm_gemm::Requantize32, maxval)), [offsetof_Requantize32_minval] "I" (offsetof(arm_gemm::Requantize32, minval)), [offsetof_Requantize32_per_channel_muls] "I" (offsetof(arm_gemm::Requantize32, per_channel_muls)), [offsetof_Requantize32_per_channel_right_shifts] "I" (offsetof(arm_gemm::Requantize32, per_channel_right_shifts)), [offsetof_Requantize32_per_layer_mul] "I" (offsetof(arm_gemm::Requantize32, per_layer_mul)), [offsetof_Requantize32_per_layer_right_shift] "I" (offsetof(arm_gemm::Requantize32, per_layer_right_shift)), [qp] "r" (&qp)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_s8q_planar_5x5_s1_4rows_dot_za.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_s8q_planar_5x5_s1_4rows_dot_za.hpp
new file mode 100644
index 0000000..6f3290f
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_s8q_planar_5x5_s1_4rows_dot_za.hpp
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_s8q_planar_5x5_s1_4rows_dot_za_impl(
+ const int8_t *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const int8_t *weights,
+ int8_t **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ const arm_gemm::Requantize32 &qp
+);
+
+class sme2_s8q_planar_5x5_s1_4rows_dot_za : public PlanarStrategy<int8_t, int8_t>
+{
+ using Parent = PlanarStrategy<int8_t, int8_t>;
+
+ public:
+ using return_type = int8_t;
+ constexpr static auto output_rows = 4u;
+ constexpr static auto kernel_rows = 5u, kernel_cols = 5u;
+ constexpr static auto stride_rows = 1u, stride_cols = 1u;
+ constexpr static auto vl_type = arm_gemm::VLType::SME;
+
+ sme2_s8q_planar_5x5_s1_4rows_dot_za(const CPUInfo *)
+ : Parent(kernel_rows, kernel_cols, stride_rows, stride_cols, output_rows, vl_type)
+ {
+ }
+
+ typename Parent::KernelType get_kernel(void) const override
+ {
+ return sme2_s8q_planar_5x5_s1_4rows_dot_za_impl;
+ }
+};
+
+} // namespace depthwise
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_s8q_planar_5x5_s1_4rows_dot_za/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_s8q_planar_5x5_s1_4rows_dot_za/generic.cpp
new file mode 100644
index 0000000..722fd5e
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_s8q_planar_5x5_s1_4rows_dot_za/generic.cpp
@@ -0,0 +1,1204 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <algorithm>
+#include <cstddef>
+#include "arm_gemm.hpp"
+
+using arm_gemm::Requantize32;
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_s8q_planar_5x5_s1_4rows_dot_za_impl(
+ const int8_t *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const int8_t *weights,
+ int8_t **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ const arm_gemm::Requantize32 &qp
+)
+{
+ struct Args
+ {
+ const int8_t *inptr;
+ size_t ld_in_vl;
+ long unsigned int pad_top, pad_bottom, pad_left;
+ const int8_t *weights;
+ long unsigned int input_cols, output_cols;
+ int8_t **outptrs;
+ const size_t *ld_out_cols;
+ const size_t *ld_out_vls;
+ long unsigned int current_channel, n_channels;
+ };
+
+ Args args = { inptr, ld_in_vl, pad_top, 8u - std::min(8u, pad_top + valid_input_rows), pad_left, weights, valid_input_cols, output_cols, outptrs, outlds, outvllds, start_channel, valid_channels };
+
+ __asm__ __volatile__(
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "ldr x5, [%x[args], %[offsetof_Args_pad_bottom]]\n"
+ "ptrue p2.b\n"
+ "mov x19, #0x8\n"
+ "ldr x6, [%x[args], %[offsetof_Args_pad_top]]\n"
+ "ld1rh { z25.h }, p2/Z, [%x[qp], %[offsetof_Requantize32_a_offset]]\n"
+ "sub x19, x19, x5\n"
+ ".inst 0x25207812 // ptrue pn10.b\n"
+ "ldr x7, [%x[args], %[offsetof_Args_n_channels]]\n"
+ "whilelt p1.s, XZR, x7\n"
+ "whilelt p9.s, XZR, x19\n"
+ "ld1rw { z9.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_c_offset]]\n"
+ "whilelt p8.s, XZR, x6\n"
+ "addvl SP, SP, #-30\n"
+ "ldr x17, [%x[args], %[offsetof_Args_current_channel]]\n"
+ "neg z25.h, p2/M, z25.h\n"
+ "eor p8.b, p2/Z, p8.b, p9.b\n"
+ "ld1rw { z3.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_per_layer_mul]]\n"
+ "ld1rw { z1.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_per_layer_right_shift]]\n"
+ "ld1rw { z24.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_minval]]\n"
+ "ld1rw { z31.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_maxval]]\n"
+ "1:" // Channel loop
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_bias]]\n"
+ "mov z6.s, #0x0\n"
+ "cbz x19, 2f\n"
+ "ld1w { z6.s }, p1/Z, [x19, x17, LSL #2]\n"
+ "2:" // Load bias: Done
+ "ldr x23, [%x[args], %[offsetof_Args_weights]]\n"
+ "mov x21, x23\n"
+ "ld1sb { z18.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "ld1rh { z12.h }, p2/Z, [%x[qp], %[offsetof_Requantize32_b_offset]]\n"
+ "mov z2.h, #0x0\n"
+ "sub z18.h, z18.h, z12.h\n"
+ "incw x23\n"
+ "ld1sb { z17.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "sub z17.h, z17.h, z12.h\n"
+ "trn1 z0.h, z2.h, z18.h\n"
+ "ld1sb { z21.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "sub z21.h, z21.h, z12.h\n"
+ "trn1 z8.h, z18.h, z17.h\n"
+ "ld1sb { z16.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "sub z16.h, z16.h, z12.h\n"
+ "trn1 z4.h, z17.h, z21.h\n"
+ "ld1sb { z15.s }, p2/Z, [x21]\n"
+ "sub z15.h, z15.h, z12.h\n"
+ "mov x21, x23\n"
+ "trn1 z5.h, z21.h, z16.h\n"
+ "ld1sb { z18.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "trn1 z10.h, z16.h, z15.h\n"
+ "trn1 z11.h, z15.h, z2.h\n"
+ "ld1sb { z17.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "sub z18.h, z18.h, z12.h\n"
+ "sub z17.h, z17.h, z12.h\n"
+ "ld1sb { z21.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "sub z21.h, z21.h, z12.h\n"
+ "addvl x20, SP, #30\n"
+ "ld1sb { z16.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "incw x23\n"
+ "sub z16.h, z16.h, z12.h\n"
+ "ld1sb { z15.s }, p2/Z, [x21]\n"
+ "addvl x20, x20, #-6\n"
+ "sub z15.h, z15.h, z12.h\n"
+ "mov x21, x23\n"
+ "st1h { z0.h }, p2, [x20]\n"
+ "trn1 z0.h, z2.h, z18.h\n"
+ "incw x23\n"
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_muls]]\n"
+ "st1h { z8.h }, p2, [x20, #1, MUL VL]\n"
+ "trn1 z8.h, z18.h, z17.h\n"
+ "ld1sb { z18.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z4.h }, p2, [x20, #2, MUL VL]\n"
+ "trn1 z4.h, z17.h, z21.h\n"
+ "ld1sb { z17.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z5.h }, p2, [x20, #3, MUL VL]\n"
+ "trn1 z5.h, z21.h, z16.h\n"
+ "ld1sb { z21.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z10.h }, p2, [x20, #4, MUL VL]\n"
+ "trn1 z10.h, z16.h, z15.h\n"
+ "ld1sb { z16.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z11.h }, p2, [x20, #5, MUL VL]\n"
+ "trn1 z11.h, z15.h, z2.h\n"
+ "sub z18.h, z18.h, z12.h\n"
+ "addvl x20, x20, #-6\n"
+ "sub z17.h, z17.h, z12.h\n"
+ "ld1sb { z15.s }, p2/Z, [x21]\n"
+ "sub z21.h, z21.h, z12.h\n"
+ "mov x21, x23\n"
+ "sub z16.h, z16.h, z12.h\n"
+ "sub z15.h, z15.h, z12.h\n"
+ "st1h { z0.h }, p2, [x20]\n"
+ "incw x23\n"
+ "st1h { z8.h }, p2, [x20, #1, MUL VL]\n"
+ "trn1 z0.h, z2.h, z18.h\n"
+ "trn1 z8.h, z18.h, z17.h\n"
+ "ld1sb { z18.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z4.h }, p2, [x20, #2, MUL VL]\n"
+ "trn1 z4.h, z17.h, z21.h\n"
+ "ld1sb { z17.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z5.h }, p2, [x20, #3, MUL VL]\n"
+ "trn1 z5.h, z21.h, z16.h\n"
+ "ld1sb { z21.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z10.h }, p2, [x20, #4, MUL VL]\n"
+ "trn1 z10.h, z16.h, z15.h\n"
+ "ld1sb { z16.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z11.h }, p2, [x20, #5, MUL VL]\n"
+ "trn1 z11.h, z15.h, z2.h\n"
+ "sub z18.h, z18.h, z12.h\n"
+ "sub z17.h, z17.h, z12.h\n"
+ "ld1sb { z15.s }, p2/Z, [x21]\n"
+ "addvl x20, x20, #-6\n"
+ "sub z21.h, z21.h, z12.h\n"
+ "sub z16.h, z16.h, z12.h\n"
+ "mov x21, x23\n"
+ "st1h { z0.h }, p2, [x20]\n"
+ "sub z15.h, z15.h, z12.h\n"
+ "st1h { z8.h }, p2, [x20, #1, MUL VL]\n"
+ "trn1 z0.h, z2.h, z18.h\n"
+ "trn1 z8.h, z18.h, z17.h\n"
+ "ld1sb { z18.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z4.h }, p2, [x20, #2, MUL VL]\n"
+ "trn1 z4.h, z17.h, z21.h\n"
+ "ld1sb { z17.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z5.h }, p2, [x20, #3, MUL VL]\n"
+ "trn1 z5.h, z21.h, z16.h\n"
+ "ld1sb { z21.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z10.h }, p2, [x20, #4, MUL VL]\n"
+ "trn1 z10.h, z16.h, z15.h\n"
+ "ld1sb { z16.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z11.h }, p2, [x20, #5, MUL VL]\n"
+ "trn1 z11.h, z15.h, z2.h\n"
+ "ld1sb { z15.s }, p2/Z, [x21]\n"
+ "sub z18.h, z18.h, z12.h\n"
+ "addvl x20, x20, #-6\n"
+ "sub z17.h, z17.h, z12.h\n"
+ "sub z21.h, z21.h, z12.h\n"
+ "st1h { z0.h }, p2, [x20]\n"
+ "sub z16.h, z16.h, z12.h\n"
+ "sub z15.h, z15.h, z12.h\n"
+ "st1h { z8.h }, p2, [x20, #1, MUL VL]\n"
+ "st1h { z4.h }, p2, [x20, #2, MUL VL]\n"
+ "mov z7.d, z6.d\n"
+ "trn1 z0.h, z2.h, z18.h\n"
+ "st1h { z5.h }, p2, [x20, #3, MUL VL]\n"
+ "trn1 z8.h, z18.h, z17.h\n"
+ "trn1 z4.h, z17.h, z21.h\n"
+ "st1h { z10.h }, p2, [x20, #4, MUL VL]\n"
+ "trn1 z5.h, z21.h, z16.h\n"
+ "trn1 z10.h, z16.h, z15.h\n"
+ "st1h { z11.h }, p2, [x20, #5, MUL VL]\n"
+ "addvl x20, x20, #-6\n"
+ "trn1 z11.h, z15.h, z2.h\n"
+ "st1h { z0.h }, p2, [x20]\n"
+ "st1h { z8.h }, p2, [x20, #1, MUL VL]\n"
+ "st1h { z4.h }, p2, [x20, #2, MUL VL]\n"
+ "st1h { z5.h }, p2, [x20, #3, MUL VL]\n"
+ "st1h { z10.h }, p2, [x20, #4, MUL VL]\n"
+ "st1h { z11.h }, p2, [x20, #5, MUL VL]\n"
+ "cbz x19, 3f\n"
+ "ld1w { z3.s }, p1/Z, [x19, x17, LSL #2]\n"
+ "3:" // Load mul: End
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_right_shifts]]\n"
+ "cbz x19, 4f\n"
+ "ld1w { z1.s }, p1/Z, [x19, x17, LSL #2]\n"
+ "4:" // Load right_shift: End
+ "ldr x16, [%x[args], %[offsetof_Args_input_cols]]\n"
+ "sub x19, x16, #0x1\n"
+ "orr x22, x19, %x[ld_in_col], LSL #16\n"
+ "ldr x15, [%x[args], %[offsetof_Args_inptr]]\n"
+ "orr x22, x7, x22, LSL #22\n"
+ "mov x21, #0x8\n"
+ "add x20, x6, x5\n"
+ "lsl x19, %x[ld_in_row], #0x0\n"
+ "ldr x14, [%x[args], %[offsetof_Args_output_cols]]\n"
+ "mov x11, #0x0\n"
+ "mov x8, #0x8\n"
+ "lsl x22, x22, #0x0\n"
+ "sub x21, x21, x20\n"
+ "madd x19, x19, x6, x15\n"
+ "5:" // Issue prefetches
+ "subs x21, x21, #0x1\n"
+ ".inst 0xf8b64a7c // rprfm pldstrm, x22, [x19]\n"
+ "add x19, x19, %x[ld_in_col]\n"
+ "bgt 5b\n"
+ "ldr x24, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "lsl x19, %x[ld_in_row], #0x0\n"
+ "msub x15, x6, x19, x15\n"
+ ".inst 0xc00468c0 // mova za.d[x11, #0], { z6.d-z7.d }\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_out_cols]]\n"
+ ".inst 0xc00468c1 // mova za.d[x11, #1], { z6.d-z7.d }\n"
+ "mov x21, #0x4\n"
+ "ldp x13, x4, [x24], #0x10\n"
+ ".inst 0xc00468c2 // mova za.d[x11, #2], { z6.d-z7.d }\n"
+ "ldp x10, x9, [x19], #0x10\n"
+ ".inst 0xc00468c3 // mova za.d[x11, #3], { z6.d-z7.d }\n"
+ "ldr x20, [%x[args], %[offsetof_Args_pad_left]]\n"
+ ".inst 0xc00468c4 // mova za.d[x11, #4], { z6.d-z7.d }\n"
+ "ldp x28, x27, [x24], #0x10\n"
+ ".inst 0xc00468c5 // mova za.d[x11, #5], { z6.d-z7.d }\n"
+ "ldp x26, x25, [x19], #0x10\n"
+ ".inst 0xc00468c6 // mova za.d[x11, #6], { z6.d-z7.d }\n"
+ ".inst 0xc00468c7 // mova za.d[x11, #7], { z6.d-z7.d }\n"
+ ".inst 0xc00408c0 // mova za.d[x8, #0], { z6.d-z7.d }\n"
+ ".inst 0xc00408c1 // mova za.d[x8, #1], { z6.d-z7.d }\n"
+ "cbz x20, 7f\n"
+ "cmp x20, x21\n"
+ "csel x19, x20, x21, LT\n"
+ "sub x20, x20, x19\n"
+ "sub x21, x21, x19\n"
+ "cbz x20, 7f\n"
+ ".inst 0xc006680c // mova { z12.d-z13.d }, za.d[x11, #0]\n"
+ "sub x14, x14, x20\n"
+ ".inst 0xc006682e // mova { z14.d-z15.d }, za.d[x11, #1]\n"
+ ".inst 0xc1a3ac0c // sqdmulh { z12.s-z15.s }, { z12.s-z15.s }, z3.s\n"
+ ".inst 0xc1a1aa2c // srshl { z12.s-z15.s }, { z12.s-z15.s }, z1.s\n"
+ ".inst 0xc1a9ab0c // add { z12.s-z15.s }, { z12.s-z15.s }, z9.s\n"
+ ".inst 0xc1bfcf0c // sclamp { z12.s-z15.s }, z24.s, z31.s\n"
+ "6:" // Left padding
+ "subs x20, x20, #0x1\n"
+ "st1b { z12.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ "st1b { z14.s }, p1, [x4]\n"
+ "add x4, x4, x9\n"
+ "st1b { z13.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ "st1b { z15.s }, p1, [x27]\n"
+ "add x27, x27, x25\n"
+ "bgt 6b\n"
+ "7:" // Left padding: End
+ "adds XZR, x6, x5\n"
+ "bne 14f\n"
+ "cbz x21, 12f\n"
+ "cmp x21, #0x1\n"
+ "sub x16, x16, x21\n"
+ "beq 11f\n"
+ "cmp x21, #0x2\n"
+ "beq 10f\n"
+ "cmp x21, #0x3\n"
+ "beq 9f\n"
+ "8:" // Unpadded: 4 priming loads
+ "add x20, x15, %x[ld_in_row]\n"
+ "ld1sb { z17.s }, p1/Z, [x15]\n"
+ "addvl x19, SP, #24\n"
+ "ld1sb { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z27.h, z17.h, z16.h\n"
+ "add z27.h, z27.h, z25.h\n"
+ "ld1sb { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ "ld1sb { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ "add z28.h, z28.h, z25.h\n"
+ "ld1sb { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1sb { z29.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z29.h, z16.h, z29.h\n"
+ "add z29.h, z29.h, z25.h\n"
+ "ld1sb { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ "ld1sb { z16.s }, p1/Z, [x20]\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ "add z30.h, z30.h, z25.h\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ "9:" // Unpadded: 3 priming loads
+ "add x21, x15, %x[ld_in_row]\n"
+ "ld1sb { z17.s }, p1/Z, [x15]\n"
+ "addvl x20, SP, #18\n"
+ "ld1sb { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z27.h, z17.h, z16.h\n"
+ "add z27.h, z27.h, z25.h\n"
+ "ld1sb { z17.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "addvl x19, SP, #24\n"
+ "ld1sb { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ "add z28.h, z28.h, z25.h\n"
+ "ld1sb { z17.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ "ld1sb { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z29.h, z17.h, z16.h\n"
+ "add z29.h, z29.h, z25.h\n"
+ "ld1sb { z17.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0xa1402a80 // ld1h { z0.h, z8.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ "ld1sb { z16.s }, p1/Z, [x21]\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc168776a // sdot za.s[x11, 2], { z27.h-z28.h }, z8.h\n"
+ "add z30.h, z30.h, z25.h\n"
+ ".inst 0xa0412a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc160776b // sdot za.s[x11, 3], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xa0422a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc165778a // sdot za.s[x11, 2], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778b // sdot za.s[x11, 3], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc16b77aa // sdot za.s[x11, 2], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ab // sdot za.s[x11, 3], { z29.h-z30.h }, z10.h\n"
+ "10:" // Unpadded: 2 priming loads
+ "add x22, x15, %x[ld_in_row]\n"
+ "ld1sb { z17.s }, p1/Z, [x15]\n"
+ "addvl x21, SP, #12\n"
+ "ld1sb { z16.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "trn1 z27.h, z17.h, z16.h\n"
+ "add z27.h, z27.h, z25.h\n"
+ "ld1sb { z17.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "addvl x20, SP, #18\n"
+ "ld1sb { z16.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ "add z28.h, z28.h, z25.h\n"
+ "ld1sb { z17.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "addvl x19, SP, #24\n"
+ "ld1sb { z16.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "trn1 z29.h, z17.h, z16.h\n"
+ "add z29.h, z29.h, z25.h\n"
+ "ld1sb { z17.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ ".inst 0xa1402aa0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x21]\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ "ld1sb { z16.s }, p1/Z, [x22]\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a80 // ld1h { z0.h, z8.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc168776a // sdot za.s[x11, 2], { z27.h-z28.h }, z8.h\n"
+ "add z30.h, z30.h, z25.h\n"
+ ".inst 0xa0412aa4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0xc160776b // sdot za.s[x11, 3], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xa0422aaa // ld1h { z10.h-z11.h }, pn10.b/Z, [x21, #0x4, MUL VL]\n"
+ ".inst 0xc168776c // sdot za.s[x11, 4], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776d // sdot za.s[x11, 5], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xc165778a // sdot za.s[x11, 2], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778b // sdot za.s[x11, 3], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc165778c // sdot za.s[x11, 4], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778d // sdot za.s[x11, 5], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xc16b77aa // sdot za.s[x11, 2], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ab // sdot za.s[x11, 3], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc16b77ac // sdot za.s[x11, 4], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ad // sdot za.s[x11, 5], { z29.h-z30.h }, z10.h\n"
+ "11:" // Unpadded: 1 priming loads
+ "add x23, x15, %x[ld_in_row]\n"
+ "ld1sb { z17.s }, p1/Z, [x15]\n"
+ "addvl x22, SP, #6\n"
+ "ld1sb { z16.s }, p1/Z, [x23]\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ "trn1 z27.h, z17.h, z16.h\n"
+ "add z27.h, z27.h, z25.h\n"
+ "ld1sb { z17.s }, p1/Z, [x23]\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ "addvl x21, SP, #12\n"
+ "ld1sb { z16.s }, p1/Z, [x23]\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ "add z28.h, z28.h, z25.h\n"
+ "ld1sb { z17.s }, p1/Z, [x23]\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ "addvl x20, SP, #18\n"
+ "ld1sb { z16.s }, p1/Z, [x23]\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ "trn1 z29.h, z17.h, z16.h\n"
+ "add z29.h, z29.h, z25.h\n"
+ "ld1sb { z17.s }, p1/Z, [x23]\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ "addvl x19, SP, #24\n"
+ ".inst 0xa1402ac0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x22]\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ "ld1sb { z16.s }, p1/Z, [x23]\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402aa0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x21]\n"
+ ".inst 0xc168776a // sdot za.s[x11, 2], { z27.h-z28.h }, z8.h\n"
+ "add z30.h, z30.h, z25.h\n"
+ ".inst 0xa0412ac4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x22, #0x2, MUL VL]\n"
+ ".inst 0xc160776b // sdot za.s[x11, 3], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a80 // ld1h { z0.h, z8.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412aa4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0xa0422aca // ld1h { z10.h-z11.h }, pn10.b/Z, [x22, #0x4, MUL VL]\n"
+ ".inst 0xc168776c // sdot za.s[x11, 4], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776d // sdot za.s[x11, 5], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc165778a // sdot za.s[x11, 2], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778b // sdot za.s[x11, 3], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422aaa // ld1h { z10.h-z11.h }, pn10.b/Z, [x21, #0x4, MUL VL]\n"
+ ".inst 0xc168776e // sdot za.s[x11, 6], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776f // sdot za.s[x11, 7], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xc165778c // sdot za.s[x11, 4], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778d // sdot za.s[x11, 5], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16b77aa // sdot za.s[x11, 2], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ab // sdot za.s[x11, 3], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc165778e // sdot za.s[x11, 6], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778f // sdot za.s[x11, 7], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xc16b77ac // sdot za.s[x11, 4], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ad // sdot za.s[x11, 5], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc16b77ae // sdot za.s[x11, 6], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77af // sdot za.s[x11, 7], { z29.h-z30.h }, z10.h\n"
+ "12:" // Unpadded: 0 priming loads
+ ".inst 0xa1402be0 // ld1h { z0.h, z8.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xa0412be4 // ld1h { z4.h-z5.h }, pn10.b/Z, [SP, #0x2, MUL VL]\n"
+ ".inst 0xa0422bea // ld1h { z10.h-z11.h }, pn10.b/Z, [SP, #0x4, MUL VL]\n"
+ "cbz x16, 22f\n"
+ "add x19, x15, %x[ld_in_row]\n"
+ "ld1sb { z17.s }, p1/Z, [x15]\n"
+ "sub x16, x16, #0x1\n"
+ "ld1sb { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z27.h, z17.h, z16.h\n"
+ "sub x14, x14, #0x1\n"
+ "ld1sb { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "cmp x16, x14\n"
+ "add z27.h, z27.h, z25.h\n"
+ "ld1sb { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ "csel x24, x16, x14, LT\n"
+ "ld1sb { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "add z28.h, z28.h, z25.h\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ "ld1sb { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z29.h, z17.h, z16.h\n"
+ "add z29.h, z29.h, z25.h\n"
+ "ld1sb { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub x14, x14, x24\n"
+ "ld1sb { z16.s }, p1/Z, [x19]\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ "add z30.h, z30.h, z25.h\n"
+ "cbz x24, 21f\n"
+ "13:" // Unpadded: Main loop
+ "addvl x23, SP, #6\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ "addvl x22, SP, #12\n"
+ "ld1sb { z23.s }, p1/Z, [x15]\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402ae0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x23]\n"
+ "addvl x21, SP, #18\n"
+ "addvl x20, SP, #24\n"
+ ".inst 0xc168776a // sdot za.s[x11, 2], { z27.h-z28.h }, z8.h\n"
+ "add x19, x15, %x[ld_in_row]\n"
+ "ld1sb { z22.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc160776b // sdot za.s[x11, 3], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402ac0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x22]\n"
+ "subs x24, x24, #0x1\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ "ld1sb { z21.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412ae4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x23, #0x2, MUL VL]\n"
+ ".inst 0xc168776c // sdot za.s[x11, 4], { z27.h-z28.h }, z8.h\n"
+ "ld1sb { z20.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc160776d // sdot za.s[x11, 5], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402aa0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x21]\n"
+ ".inst 0xc165778a // sdot za.s[x11, 2], { z28.h-z29.h }, z5.h\n"
+ "ld1sb { z19.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc164778b // sdot za.s[x11, 3], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412ac4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x22, #0x2, MUL VL]\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ "ld1sb { z18.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422aea // ld1h { z10.h-z11.h }, pn10.b/Z, [x23, #0x4, MUL VL]\n"
+ ".inst 0xc168776e // sdot za.s[x11, 6], { z27.h-z28.h }, z8.h\n"
+ "ld1sb { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc160776f // sdot za.s[x11, 7], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a80 // ld1h { z0.h, z8.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc165778c // sdot za.s[x11, 4], { z28.h-z29.h }, z5.h\n"
+ "ld1sb { z16.s }, p1/Z, [x19]\n"
+ ".inst 0xc164778d // sdot za.s[x11, 5], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412aa4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0xc16b77aa // sdot za.s[x11, 2], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ab // sdot za.s[x11, 3], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422aca // ld1h { z10.h-z11.h }, pn10.b/Z, [x22, #0x4, MUL VL]\n"
+ ".inst 0xc165778e // sdot za.s[x11, 6], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778f // sdot za.s[x11, 7], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc16b77ac // sdot za.s[x11, 4], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ad // sdot za.s[x11, 5], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422aaa // ld1h { z10.h-z11.h }, pn10.b/Z, [x21, #0x4, MUL VL]\n"
+ ".inst 0xc16b77ae // sdot za.s[x11, 6], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77af // sdot za.s[x11, 7], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc1681768 // sdot za.s[x8, 0], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc1601769 // sdot za.s[x8, 1], { z27.h-z28.h }, z0.h\n"
+ "trn1 z27.h, z23.h, z22.h\n"
+ ".inst 0xa1402be0 // ld1h { z0.h, z8.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xc1651788 // sdot za.s[x8, 0], { z28.h-z29.h }, z5.h\n"
+ "add z27.h, z27.h, z25.h\n"
+ ".inst 0xc1641789 // sdot za.s[x8, 1], { z28.h-z29.h }, z4.h\n"
+ "trn1 z28.h, z21.h, z20.h\n"
+ ".inst 0xa0412be4 // ld1h { z4.h-z5.h }, pn10.b/Z, [SP, #0x2, MUL VL]\n"
+ ".inst 0xc16b17a8 // sdot za.s[x8, 0], { z29.h-z30.h }, z11.h\n"
+ "add z28.h, z28.h, z25.h\n"
+ ".inst 0xc16a17a9 // sdot za.s[x8, 1], { z29.h-z30.h }, z10.h\n"
+ "trn1 z29.h, z19.h, z18.h\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ "add x8, x8, #0x2\n"
+ ".inst 0xc006680c // mova { z12.d-z13.d }, za.d[x11, #0]\n"
+ ".inst 0xa0422bea // ld1h { z10.h-z11.h }, pn10.b/Z, [SP, #0x4, MUL VL]\n"
+ "add z29.h, z29.h, z25.h\n"
+ ".inst 0xc006682e // mova { z14.d-z15.d }, za.d[x11, #1]\n"
+ ".inst 0xc1a3ac0c // sqdmulh { z12.s-z15.s }, { z12.s-z15.s }, z3.s\n"
+ "add x11, x11, #0x2\n"
+ ".inst 0xc1a1aa2c // srshl { z12.s-z15.s }, { z12.s-z15.s }, z1.s\n"
+ ".inst 0xc00408c0 // mova za.d[x8, #0], { z6.d-z7.d }\n"
+ ".inst 0xc1a9ab0c // add { z12.s-z15.s }, { z12.s-z15.s }, z9.s\n"
+ ".inst 0xc00408c1 // mova za.d[x8, #1], { z6.d-z7.d }\n"
+ ".inst 0xc1bfcf0c // sclamp { z12.s-z15.s }, z24.s, z31.s\n"
+ "st1b { z12.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ "add z30.h, z30.h, z25.h\n"
+ "st1b { z14.s }, p1, [x4]\n"
+ "add x4, x4, x9\n"
+ "st1b { z13.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ "st1b { z15.s }, p1, [x27]\n"
+ "add x27, x27, x25\n"
+ "bgt 13b\n"
+ "b 21f\n"
+ "14:" // Padded
+ "cbz x21, 19f\n"
+ "cmp x21, #0x1\n"
+ "sub x16, x16, x21\n"
+ "beq 18f\n"
+ "cmp x21, #0x2\n"
+ "beq 17f\n"
+ "cmp x21, #0x3\n"
+ "beq 16f\n"
+ "15:" // Padded: 4 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z19.s }, p0/Z, [x15]\n"
+ "add z19.h, p0/M, z19.h, z25.h\n"
+ "add x20, x15, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z18.s }, p0/Z, [x20]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z17.s }, p0/Z, [x20]\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z16.s }, p0/Z, [x20]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "mov x12, #0x4\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z27.h, z19.h, z18.h\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z18.s }, p0/Z, [x20]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z16.s }, p0/Z, [x20]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z17.s }, p0/Z, [x20]\n"
+ "addvl x19, SP, #24\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ "trn1 z29.h, z18.h, z16.h\n"
+ "ld1sb { z16.s }, p0/Z, [x20]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ "16:" // Padded: 3 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z19.s }, p0/Z, [x15]\n"
+ "add z19.h, p0/M, z19.h, z25.h\n"
+ "add x19, x15, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z27.h, z19.h, z18.h\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z17.s }, p0/Z, [x19]\n"
+ "addvl x20, SP, #18\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xa1402a80 // ld1h { z0.h, z8.h }, pn10.b/Z, [x20]\n"
+ "trn1 z29.h, z18.h, z16.h\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "addvl x19, SP, #24\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ ".inst 0xa0412a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc168776a // sdot za.s[x11, 2], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776b // sdot za.s[x11, 3], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa0422a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc165778a // sdot za.s[x11, 2], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778b // sdot za.s[x11, 3], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc16b77aa // sdot za.s[x11, 2], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ab // sdot za.s[x11, 3], { z29.h-z30.h }, z10.h\n"
+ "17:" // Padded: 2 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z19.s }, p0/Z, [x15]\n"
+ "add z19.h, p0/M, z19.h, z25.h\n"
+ "add x19, x15, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z27.h, z19.h, z18.h\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z17.s }, p0/Z, [x19]\n"
+ "addvl x21, SP, #12\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xa1402aa0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x21]\n"
+ "trn1 z29.h, z18.h, z16.h\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "addvl x20, SP, #18\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a80 // ld1h { z0.h, z8.h }, pn10.b/Z, [x20]\n"
+ "addvl x19, SP, #24\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ ".inst 0xa0412aa4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0xc168776a // sdot za.s[x11, 2], { z27.h-z28.h }, z8.h\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ ".inst 0xc160776b // sdot za.s[x11, 3], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xa0422aaa // ld1h { z10.h-z11.h }, pn10.b/Z, [x21, #0x4, MUL VL]\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc168776c // sdot za.s[x11, 4], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776d // sdot za.s[x11, 5], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xc165778a // sdot za.s[x11, 2], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778b // sdot za.s[x11, 3], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc165778c // sdot za.s[x11, 4], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778d // sdot za.s[x11, 5], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xc16b77aa // sdot za.s[x11, 2], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ab // sdot za.s[x11, 3], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc16b77ac // sdot za.s[x11, 4], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ad // sdot za.s[x11, 5], { z29.h-z30.h }, z10.h\n"
+ "18:" // Padded: 1 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z19.s }, p0/Z, [x15]\n"
+ "add z19.h, p0/M, z19.h, z25.h\n"
+ "add x19, x15, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z27.h, z19.h, z18.h\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z17.s }, p0/Z, [x19]\n"
+ "addvl x22, SP, #6\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xa1402ac0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x22]\n"
+ "trn1 z29.h, z18.h, z16.h\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "addvl x21, SP, #12\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402aa0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x21]\n"
+ "addvl x20, SP, #18\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ ".inst 0xa0412ac4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x22, #0x2, MUL VL]\n"
+ ".inst 0xc168776a // sdot za.s[x11, 2], { z27.h-z28.h }, z8.h\n"
+ "addvl x19, SP, #24\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ ".inst 0xc160776b // sdot za.s[x11, 3], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a80 // ld1h { z0.h, z8.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xa0422aca // ld1h { z10.h-z11.h }, pn10.b/Z, [x22, #0x4, MUL VL]\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412aa4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0xc168776c // sdot za.s[x11, 4], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776d // sdot za.s[x11, 5], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc165778a // sdot za.s[x11, 2], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778b // sdot za.s[x11, 3], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422aaa // ld1h { z10.h-z11.h }, pn10.b/Z, [x21, #0x4, MUL VL]\n"
+ ".inst 0xc168776e // sdot za.s[x11, 6], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776f // sdot za.s[x11, 7], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xc165778c // sdot za.s[x11, 4], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778d // sdot za.s[x11, 5], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16b77aa // sdot za.s[x11, 2], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ab // sdot za.s[x11, 3], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc165778e // sdot za.s[x11, 6], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778f // sdot za.s[x11, 7], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xc16b77ac // sdot za.s[x11, 4], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ad // sdot za.s[x11, 5], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc16b77ae // sdot za.s[x11, 6], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77af // sdot za.s[x11, 7], { z29.h-z30.h }, z10.h\n"
+ "19:" // Padded: 0 priming loads
+ ".inst 0xa1402be0 // ld1h { z0.h, z8.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xa0412be4 // ld1h { z4.h-z5.h }, pn10.b/Z, [SP, #0x2, MUL VL]\n"
+ ".inst 0xa0422bea // ld1h { z10.h-z11.h }, pn10.b/Z, [SP, #0x4, MUL VL]\n"
+ "cbz x16, 22f\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z19.s }, p0/Z, [x15]\n"
+ "add z19.h, p0/M, z19.h, z25.h\n"
+ "add x19, x15, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z27.h, z19.h, z18.h\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "sub x16, x16, #0x1\n"
+ "sub x14, x14, #0x1\n"
+ "cmp x16, x14\n"
+ "trn1 z29.h, z19.h, z18.h\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ "csel x24, x16, x14, LT\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ "sub x14, x14, x24\n"
+ "cbz x24, 21f\n"
+ "20:" // Padded: Main loop
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z23.s }, p0/Z, [x15]\n"
+ "add z23.h, p0/M, z23.h, z25.h\n"
+ "add x23, x15, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z22.s }, p0/Z, [x23]\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ "addvl x22, SP, #6\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402ac0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x22]\n"
+ "addvl x21, SP, #12\n"
+ "add z22.h, p0/M, z22.h, z25.h\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc168776a // sdot za.s[x11, 2], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776b // sdot za.s[x11, 3], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402aa0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x21]\n"
+ "addvl x20, SP, #18\n"
+ "addvl x19, SP, #24\n"
+ "ld1sb { z21.s }, p0/Z, [x23]\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ "add z21.h, p0/M, z21.h, z25.h\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412ac4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x22, #0x2, MUL VL]\n"
+ "mov x12, #0x4\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ ".inst 0xc168776c // sdot za.s[x11, 4], { z27.h-z28.h }, z8.h\n"
+ "ld1sb { z20.s }, p0/Z, [x23]\n"
+ "add z20.h, p0/M, z20.h, z25.h\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ ".inst 0xc160776d // sdot za.s[x11, 5], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a80 // ld1h { z0.h, z8.h }, pn10.b/Z, [x20]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "subs x24, x24, #0x1\n"
+ ".inst 0xc165778a // sdot za.s[x11, 2], { z28.h-z29.h }, z5.h\n"
+ "ld1sb { z19.s }, p0/Z, [x23]\n"
+ "add z19.h, p0/M, z19.h, z25.h\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ ".inst 0xc164778b // sdot za.s[x11, 3], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412aa4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ "ld1sb { z18.s }, p0/Z, [x23]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422aca // ld1h { z10.h-z11.h }, pn10.b/Z, [x22, #0x4, MUL VL]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc168776e // sdot za.s[x11, 6], { z27.h-z28.h }, z8.h\n"
+ "ld1sb { z17.s }, p0/Z, [x23]\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ ".inst 0xc160776f // sdot za.s[x11, 7], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xc165778c // sdot za.s[x11, 4], { z28.h-z29.h }, z5.h\n"
+ "ld1sb { z16.s }, p0/Z, [x23]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ ".inst 0xc164778d // sdot za.s[x11, 5], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc16b77aa // sdot za.s[x11, 2], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ab // sdot za.s[x11, 3], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422aaa // ld1h { z10.h-z11.h }, pn10.b/Z, [x21, #0x4, MUL VL]\n"
+ ".inst 0xc165778e // sdot za.s[x11, 6], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778f // sdot za.s[x11, 7], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16b77ac // sdot za.s[x11, 4], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ad // sdot za.s[x11, 5], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc16b77ae // sdot za.s[x11, 6], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77af // sdot za.s[x11, 7], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc1681768 // sdot za.s[x8, 0], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc1601769 // sdot za.s[x8, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402be0 // ld1h { z0.h, z8.h }, pn10.b/Z, [SP]\n"
+ "trn1 z27.h, z23.h, z22.h\n"
+ ".inst 0xc1651788 // sdot za.s[x8, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc1641789 // sdot za.s[x8, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412be4 // ld1h { z4.h-z5.h }, pn10.b/Z, [SP, #0x2, MUL VL]\n"
+ "trn1 z28.h, z21.h, z20.h\n"
+ ".inst 0xc16b17a8 // sdot za.s[x8, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a17a9 // sdot za.s[x8, 1], { z29.h-z30.h }, z10.h\n"
+ "add x8, x8, #0x2\n"
+ ".inst 0xa0422bea // ld1h { z10.h-z11.h }, pn10.b/Z, [SP, #0x4, MUL VL]\n"
+ "trn1 z29.h, z19.h, z18.h\n"
+ ".inst 0xc006680c // mova { z12.d-z13.d }, za.d[x11, #0]\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ ".inst 0xc006682e // mova { z14.d-z15.d }, za.d[x11, #1]\n"
+ ".inst 0xc1a3ac0c // sqdmulh { z12.s-z15.s }, { z12.s-z15.s }, z3.s\n"
+ "add x11, x11, #0x2\n"
+ ".inst 0xc1a1aa2c // srshl { z12.s-z15.s }, { z12.s-z15.s }, z1.s\n"
+ ".inst 0xc00408c0 // mova za.d[x8, #0], { z6.d-z7.d }\n"
+ ".inst 0xc1a9ab0c // add { z12.s-z15.s }, { z12.s-z15.s }, z9.s\n"
+ ".inst 0xc00408c1 // mova za.d[x8, #1], { z6.d-z7.d }\n"
+ ".inst 0xc1bfcf0c // sclamp { z12.s-z15.s }, z24.s, z31.s\n"
+ "st1b { z12.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ "st1b { z14.s }, p1, [x4]\n"
+ "add x4, x4, x9\n"
+ "st1b { z13.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ "st1b { z15.s }, p1, [x27]\n"
+ "add x27, x27, x25\n"
+ "bgt 20b\n"
+ "21:" // Main loop tail
+ "addvl x22, SP, #6\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ "addvl x21, SP, #12\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402ac0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x22]\n"
+ "addvl x20, SP, #18\n"
+ "addvl x19, SP, #24\n"
+ ".inst 0xc168776a // sdot za.s[x11, 2], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776b // sdot za.s[x11, 3], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402aa0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x21]\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412ac4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x22, #0x2, MUL VL]\n"
+ ".inst 0xc168776c // sdot za.s[x11, 4], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776d // sdot za.s[x11, 5], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a80 // ld1h { z0.h, z8.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc165778a // sdot za.s[x11, 2], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778b // sdot za.s[x11, 3], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412aa4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422aca // ld1h { z10.h-z11.h }, pn10.b/Z, [x22, #0x4, MUL VL]\n"
+ ".inst 0xc168776e // sdot za.s[x11, 6], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776f // sdot za.s[x11, 7], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc165778c // sdot za.s[x11, 4], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778d // sdot za.s[x11, 5], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc16b77aa // sdot za.s[x11, 2], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ab // sdot za.s[x11, 3], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422aaa // ld1h { z10.h-z11.h }, pn10.b/Z, [x21, #0x4, MUL VL]\n"
+ ".inst 0xc165778e // sdot za.s[x11, 6], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778f // sdot za.s[x11, 7], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16b77ac // sdot za.s[x11, 4], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ad // sdot za.s[x11, 5], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc16b77ae // sdot za.s[x11, 6], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77af // sdot za.s[x11, 7], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc1681768 // sdot za.s[x8, 0], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc1601769 // sdot za.s[x8, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xc1651788 // sdot za.s[x8, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc1641789 // sdot za.s[x8, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xc16b17a8 // sdot za.s[x8, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a17a9 // sdot za.s[x8, 1], { z29.h-z30.h }, z10.h\n"
+ "add x8, x8, #0x2\n"
+ ".inst 0xc006680c // mova { z12.d-z13.d }, za.d[x11, #0]\n"
+ ".inst 0xc006682e // mova { z14.d-z15.d }, za.d[x11, #1]\n"
+ ".inst 0xc1a3ac0c // sqdmulh { z12.s-z15.s }, { z12.s-z15.s }, z3.s\n"
+ "add x11, x11, #0x2\n"
+ ".inst 0xc1a1aa2c // srshl { z12.s-z15.s }, { z12.s-z15.s }, z1.s\n"
+ ".inst 0xc00408c0 // mova za.d[x8, #0], { z6.d-z7.d }\n"
+ ".inst 0xc1a9ab0c // add { z12.s-z15.s }, { z12.s-z15.s }, z9.s\n"
+ ".inst 0xc00408c1 // mova za.d[x8, #1], { z6.d-z7.d }\n"
+ ".inst 0xc1bfcf0c // sclamp { z12.s-z15.s }, z24.s, z31.s\n"
+ "st1b { z12.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ "st1b { z14.s }, p1, [x4]\n"
+ "add x4, x4, x9\n"
+ "st1b { z13.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ "st1b { z15.s }, p1, [x27]\n"
+ "add x27, x27, x25\n"
+ "22:" // Main loop skip tail
+ "cbz x14, 24f\n"
+ "23:" // Right padding loop
+ ".inst 0xc006680c // mova { z12.d-z13.d }, za.d[x11, #0]\n"
+ "add x8, x8, #0x2\n"
+ "subs x14, x14, #0x1\n"
+ ".inst 0xc006682e // mova { z14.d-z15.d }, za.d[x11, #1]\n"
+ ".inst 0xc1a3ac0c // sqdmulh { z12.s-z15.s }, { z12.s-z15.s }, z3.s\n"
+ "add x11, x11, #0x2\n"
+ ".inst 0xc1a1aa2c // srshl { z12.s-z15.s }, { z12.s-z15.s }, z1.s\n"
+ ".inst 0xc00408c0 // mova za.d[x8, #0], { z6.d-z7.d }\n"
+ ".inst 0xc1a9ab0c // add { z12.s-z15.s }, { z12.s-z15.s }, z9.s\n"
+ ".inst 0xc00408c1 // mova za.d[x8, #1], { z6.d-z7.d }\n"
+ ".inst 0xc1bfcf0c // sclamp { z12.s-z15.s }, z24.s, z31.s\n"
+ "st1b { z12.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ "st1b { z14.s }, p1, [x4]\n"
+ "add x4, x4, x9\n"
+ "st1b { z13.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ "st1b { z15.s }, p1, [x27]\n"
+ "add x27, x27, x25\n"
+ "bgt 23b\n"
+ "24:" // End
+ "ldr x23, [%x[args], %[offsetof_Args_weights]]\n"
+ "incw x23, ALL, MUL #16\n"
+ "incw x23, ALL, MUL #9\n"
+ "str x23, [%x[args], %[offsetof_Args_weights]]\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_in_vl]]\n"
+ "incw x17\n"
+ "whilelt p1.s, x17, x7\n"
+ "ldr x15, [%x[args], %[offsetof_Args_inptr]]\n"
+ "add x15, x15, x19\n"
+ "str x15, [%x[args], %[offsetof_Args_inptr]]\n"
+ "ldr x24, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "ldr x23, [%x[args], %[offsetof_Args_ld_out_vls]]\n"
+ "ldp x22, x21, [x24, #0x0]\n"
+ "ldp x20, x19, [x23, #0x0]\n"
+ "add x22, x22, x20\n"
+ "add x21, x21, x19\n"
+ "stp x22, x21, [x24, #0x0]\n"
+ "ldp x22, x21, [x24, #0x10]\n"
+ "ldp x20, x19, [x23, #0x10]\n"
+ "add x22, x22, x20\n"
+ "add x21, x21, x19\n"
+ "stp x22, x21, [x24, #0x10]\n"
+ "b.any 1b\n"
+ "addvl SP, SP, #30\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [ld_in_col] "r" (ld_in_col), [ld_in_row] "r" (ld_in_row), [offsetof_Args_current_channel] "I" (offsetof(Args, current_channel)), [offsetof_Args_inptr] "I" (offsetof(Args, inptr)), [offsetof_Args_input_cols] "I" (offsetof(Args, input_cols)), [offsetof_Args_ld_in_vl] "I" (offsetof(Args, ld_in_vl)), [offsetof_Args_ld_out_cols] "I" (offsetof(Args, ld_out_cols)), [offsetof_Args_ld_out_vls] "I" (offsetof(Args, ld_out_vls)), [offsetof_Args_n_channels] "I" (offsetof(Args, n_channels)), [offsetof_Args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_Args_output_cols] "I" (offsetof(Args, output_cols)), [offsetof_Args_pad_bottom] "I" (offsetof(Args, pad_bottom)), [offsetof_Args_pad_left] "I" (offsetof(Args, pad_left)), [offsetof_Args_pad_top] "I" (offsetof(Args, pad_top)), [offsetof_Args_weights] "I" (offsetof(Args, weights)), [offsetof_Requantize32_a_offset] "I" (offsetof(arm_gemm::Requantize32, a_offset)), [offsetof_Requantize32_b_offset] "I" (offsetof(arm_gemm::Requantize32, b_offset)), [offsetof_Requantize32_bias] "I" (offsetof(arm_gemm::Requantize32, bias)), [offsetof_Requantize32_c_offset] "I" (offsetof(arm_gemm::Requantize32, c_offset)), [offsetof_Requantize32_maxval] "I" (offsetof(arm_gemm::Requantize32, maxval)), [offsetof_Requantize32_minval] "I" (offsetof(arm_gemm::Requantize32, minval)), [offsetof_Requantize32_per_channel_muls] "I" (offsetof(arm_gemm::Requantize32, per_channel_muls)), [offsetof_Requantize32_per_channel_right_shifts] "I" (offsetof(arm_gemm::Requantize32, per_channel_right_shifts)), [offsetof_Requantize32_per_layer_mul] "I" (offsetof(arm_gemm::Requantize32, per_layer_mul)), [offsetof_Requantize32_per_layer_right_shift] "I" (offsetof(arm_gemm::Requantize32, per_layer_right_shift)), [qp] "r" (&qp)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_s8q_planar_5x5_s2_4rows_dot_za.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_s8q_planar_5x5_s2_4rows_dot_za.hpp
new file mode 100644
index 0000000..e7a781d
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_s8q_planar_5x5_s2_4rows_dot_za.hpp
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_s8q_planar_5x5_s2_4rows_dot_za_impl(
+ const int8_t *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const int8_t *weights,
+ int8_t **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ const arm_gemm::Requantize32 &qp
+);
+
+class sme2_s8q_planar_5x5_s2_4rows_dot_za : public PlanarStrategy<int8_t, int8_t>
+{
+ using Parent = PlanarStrategy<int8_t, int8_t>;
+
+ public:
+ using return_type = int8_t;
+ constexpr static auto output_rows = 4u;
+ constexpr static auto kernel_rows = 5u, kernel_cols = 5u;
+ constexpr static auto stride_rows = 2u, stride_cols = 2u;
+ constexpr static auto vl_type = arm_gemm::VLType::SME;
+
+ sme2_s8q_planar_5x5_s2_4rows_dot_za(const CPUInfo *)
+ : Parent(kernel_rows, kernel_cols, stride_rows, stride_cols, output_rows, vl_type)
+ {
+ }
+
+ typename Parent::KernelType get_kernel(void) const override
+ {
+ return sme2_s8q_planar_5x5_s2_4rows_dot_za_impl;
+ }
+};
+
+} // namespace depthwise
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_s8q_planar_5x5_s2_4rows_dot_za/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_s8q_planar_5x5_s2_4rows_dot_za/generic.cpp
new file mode 100644
index 0000000..81829b5
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_s8q_planar_5x5_s2_4rows_dot_za/generic.cpp
@@ -0,0 +1,1354 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <algorithm>
+#include <cstddef>
+#include "arm_gemm.hpp"
+
+using arm_gemm::Requantize32;
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_s8q_planar_5x5_s2_4rows_dot_za_impl(
+ const int8_t *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const int8_t *weights,
+ int8_t **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ const arm_gemm::Requantize32 &qp
+)
+{
+ struct Args
+ {
+ const int8_t *inptr;
+ size_t ld_in_vl;
+ long unsigned int pad_top, pad_bottom, pad_left;
+ const int8_t *weights;
+ long unsigned int input_cols, output_cols;
+ int8_t **outptrs;
+ const size_t *ld_out_cols;
+ const size_t *ld_out_vls;
+ long unsigned int current_channel, n_channels;
+ };
+
+ Args args = { inptr, ld_in_vl, pad_top, 11u - std::min(11u, pad_top + valid_input_rows), pad_left, weights, valid_input_cols, output_cols, outptrs, outlds, outvllds, start_channel, valid_channels };
+
+ __asm__ __volatile__(
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "ldr x4, [%x[args], %[offsetof_Args_pad_bottom]]\n"
+ "ptrue p2.b\n"
+ "mov x19, #0xb\n"
+ "ldr x5, [%x[args], %[offsetof_Args_pad_top]]\n"
+ "ld1rh { z9.h }, p2/Z, [%x[qp], %[offsetof_Requantize32_a_offset]]\n"
+ "sub x19, x19, x4\n"
+ ".inst 0x25207812 // ptrue pn10.b\n"
+ "ldr x6, [%x[args], %[offsetof_Args_n_channels]]\n"
+ "whilelt p1.s, XZR, x6\n"
+ "whilelt p9.s, XZR, x19\n"
+ "ld1rw { z8.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_c_offset]]\n"
+ "whilelt p8.s, XZR, x5\n"
+ "addvl SP, SP, #-15\n"
+ "ldr x7, [%x[args], %[offsetof_Args_current_channel]]\n"
+ "neg z9.h, p2/M, z9.h\n"
+ "eor p8.b, p2/Z, p8.b, p9.b\n"
+ "ld1rw { z3.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_per_layer_mul]]\n"
+ "ld1rw { z1.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_per_layer_right_shift]]\n"
+ "ld1rw { z26.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_minval]]\n"
+ "ld1rw { z23.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_maxval]]\n"
+ "1:" // Channel loop
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_bias]]\n"
+ "mov z28.s, #0x0\n"
+ "cbz x19, 2f\n"
+ "ld1w { z28.s }, p1/Z, [x19, x7, LSL #2]\n"
+ "2:" // Load bias: Done
+ "ldr x21, [%x[args], %[offsetof_Args_weights]]\n"
+ "mov x19, x21\n"
+ "ld1sb { z12.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "ld1rh { z18.h }, p2/Z, [%x[qp], %[offsetof_Requantize32_b_offset]]\n"
+ "sub z12.h, z12.h, z18.h\n"
+ "incw x21\n"
+ "mov z14.h, #0x0\n"
+ "ld1sb { z25.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z25.h, z25.h, z18.h\n"
+ "trn1 z2.h, z12.h, z25.h\n"
+ "ld1sb { z24.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z24.h, z24.h, z18.h\n"
+ "addvl x20, SP, #15\n"
+ "ld1sb { z17.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z17.h, z17.h, z18.h\n"
+ "trn1 z10.h, z24.h, z17.h\n"
+ "ld1sb { z16.s }, p2/Z, [x19]\n"
+ "mov x19, x21\n"
+ "sub z16.h, z16.h, z18.h\n"
+ "incw x21\n"
+ "ld1sb { z12.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z12.h, z12.h, z18.h\n"
+ "addvl x20, x20, #-3\n"
+ "ld1sb { z25.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z25.h, z25.h, z18.h\n"
+ "trn1 z0.h, z16.h, z14.h\n"
+ "ld1sb { z24.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z24.h, z24.h, z18.h\n"
+ "st1h { z2.h }, p2, [x20]\n"
+ "ld1sb { z17.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z17.h, z17.h, z18.h\n"
+ "trn1 z2.h, z12.h, z25.h\n"
+ "ld1sb { z16.s }, p2/Z, [x19]\n"
+ "mov x19, x21\n"
+ "st1h { z10.h }, p2, [x20, #1, MUL VL]\n"
+ "sub z16.h, z16.h, z18.h\n"
+ "ld1sb { z12.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "trn1 z10.h, z24.h, z17.h\n"
+ "sub z12.h, z12.h, z18.h\n"
+ "ld1sb { z25.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z25.h, z25.h, z18.h\n"
+ "st1h { z0.h }, p2, [x20, #2, MUL VL]\n"
+ "ld1sb { z24.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "trn1 z0.h, z16.h, z14.h\n"
+ "incw x21\n"
+ "ld1sb { z17.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z24.h, z24.h, z18.h\n"
+ "sub z17.h, z17.h, z18.h\n"
+ "ld1sb { z16.s }, p2/Z, [x19]\n"
+ "addvl x20, x20, #-3\n"
+ "mov x19, x21\n"
+ "st1h { z2.h }, p2, [x20]\n"
+ "trn1 z2.h, z12.h, z25.h\n"
+ "ld1sb { z12.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z16.h, z16.h, z18.h\n"
+ "ld1sb { z25.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "st1h { z10.h }, p2, [x20, #1, MUL VL]\n"
+ "trn1 z10.h, z24.h, z17.h\n"
+ "ld1sb { z24.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z12.h, z12.h, z18.h\n"
+ "sub z25.h, z25.h, z18.h\n"
+ "ld1sb { z17.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "st1h { z0.h }, p2, [x20, #2, MUL VL]\n"
+ "trn1 z0.h, z16.h, z14.h\n"
+ "ld1sb { z16.s }, p2/Z, [x19]\n"
+ "incw x21\n"
+ "sub z24.h, z24.h, z18.h\n"
+ "sub z17.h, z17.h, z18.h\n"
+ "addvl x20, x20, #-3\n"
+ "mov x19, x21\n"
+ "st1h { z2.h }, p2, [x20]\n"
+ "sub z16.h, z16.h, z18.h\n"
+ "trn1 z2.h, z12.h, z25.h\n"
+ "ld1sb { z12.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "st1h { z10.h }, p2, [x20, #1, MUL VL]\n"
+ "ld1sb { z25.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "trn1 z10.h, z24.h, z17.h\n"
+ "st1h { z0.h }, p2, [x20, #2, MUL VL]\n"
+ "ld1sb { z24.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "trn1 z0.h, z16.h, z14.h\n"
+ "sub z12.h, z12.h, z18.h\n"
+ "ld1sb { z17.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z25.h, z25.h, z18.h\n"
+ "sub z24.h, z24.h, z18.h\n"
+ "ld1sb { z16.s }, p2/Z, [x19]\n"
+ "sub z17.h, z17.h, z18.h\n"
+ "sub z16.h, z16.h, z18.h\n"
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_muls]]\n"
+ "addvl x20, x20, #-3\n"
+ "st1h { z2.h }, p2, [x20]\n"
+ "mov z29.d, z28.d\n"
+ "mov z30.d, z28.d\n"
+ "st1h { z10.h }, p2, [x20, #1, MUL VL]\n"
+ "mov z31.d, z28.d\n"
+ "trn1 z2.h, z12.h, z25.h\n"
+ "st1h { z0.h }, p2, [x20, #2, MUL VL]\n"
+ "addvl x20, x20, #-3\n"
+ "trn1 z10.h, z24.h, z17.h\n"
+ "trn1 z0.h, z16.h, z14.h\n"
+ "st1h { z2.h }, p2, [x20]\n"
+ "st1h { z10.h }, p2, [x20, #1, MUL VL]\n"
+ "st1h { z0.h }, p2, [x20, #2, MUL VL]\n"
+ "cbz x19, 3f\n"
+ "ld1w { z3.s }, p1/Z, [x19, x7, LSL #2]\n"
+ "3:" // Load mul: End
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_right_shifts]]\n"
+ "cbz x19, 4f\n"
+ "ld1w { z1.s }, p1/Z, [x19, x7, LSL #2]\n"
+ "4:" // Load right_shift: End
+ "ldr x17, [%x[args], %[offsetof_Args_input_cols]]\n"
+ "sub x19, x17, #0x1\n"
+ "orr x22, x19, %x[ld_in_col], LSL #16\n"
+ "ldr x16, [%x[args], %[offsetof_Args_inptr]]\n"
+ "orr x22, x6, x22, LSL #22\n"
+ "mov x21, #0xb\n"
+ "add x20, x5, x4\n"
+ "lsl x19, %x[ld_in_row], #0x0\n"
+ "ldr x15, [%x[args], %[offsetof_Args_output_cols]]\n"
+ "mov x8, #0x0\n"
+ "lsl x22, x22, #0x0\n"
+ "sub x21, x21, x20\n"
+ "madd x19, x19, x5, x16\n"
+ "5:" // Issue prefetches
+ "subs x21, x21, #0x1\n"
+ ".inst 0xf8b64a7c // rprfm pldstrm, x22, [x19]\n"
+ "add x19, x19, %x[ld_in_col]\n"
+ "bgt 5b\n"
+ "ldr x24, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "lsl x19, %x[ld_in_row], #0x0\n"
+ "msub x16, x5, x19, x16\n"
+ ".inst 0xc0040f80 // mova za.d[x8, #0], { z28.d-z31.d }\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_out_cols]]\n"
+ ".inst 0xc0040f81 // mova za.d[x8, #1], { z28.d-z31.d }\n"
+ "mov x21, #0x4\n"
+ "ldp x14, x13, [x24], #0x10\n"
+ ".inst 0xc0040f82 // mova za.d[x8, #2], { z28.d-z31.d }\n"
+ "ldp x11, x10, [x19], #0x10\n"
+ ".inst 0xc0040f83 // mova za.d[x8, #3], { z28.d-z31.d }\n"
+ "ldr x20, [%x[args], %[offsetof_Args_pad_left]]\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ "ldp x9, x28, [x24], #0x10\n"
+ "ldp x27, x26, [x19], #0x10\n"
+ "cbz x20, 7f\n"
+ "cmp x20, x21\n"
+ "csel x19, x20, x21, LT\n"
+ "sub x20, x20, x19\n"
+ "sub x21, x21, x19\n"
+ "cbz x20, 7f\n"
+ ".inst 0xc0060c04 // mova { z4.d-z7.d }, za.d[x8, #0]\n"
+ ".inst 0xc1a3ac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z3.s\n"
+ "and x21, x20, #0x1\n"
+ ".inst 0xc1a1aa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z1.s\n"
+ "add x20, x20, #0x1\n"
+ "lsr x20, x20, #0x1\n"
+ ".inst 0xc1a8ab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z8.s\n"
+ "sub x15, x15, x20\n"
+ ".inst 0xc1b7cf44 // sclamp { z4.s-z7.s }, z26.s, z23.s\n"
+ "6:" // Left padding
+ "subs x20, x20, #0x1\n"
+ "st1b { z4.s }, p1, [x14]\n"
+ "add x14, x14, x11\n"
+ "st1b { z5.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "st1b { z7.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ "bgt 6b\n"
+ "7:" // Left padding: End
+ "adds XZR, x5, x4\n"
+ "bne 14f\n"
+ "cbz x21, 12f\n"
+ "cmp x21, #0x1\n"
+ "sub x17, x17, x21\n"
+ "beq 11f\n"
+ "cmp x21, #0x2\n"
+ "beq 10f\n"
+ "cmp x21, #0x3\n"
+ "beq 9f\n"
+ "8:" // Unpadded: 4 priming loads
+ "add x20, x16, %x[ld_in_row]\n"
+ "ld1sb { z11.s }, p1/Z, [x16]\n"
+ "addvl x19, SP, #12\n"
+ "ld1sb { z21.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "add z11.h, z11.h, z9.h\n"
+ "ld1sb { z12.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "ld1sb { z20.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "add z12.h, z12.h, z9.h\n"
+ "ld1sb { z13.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1sb { z19.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z13.h, z13.h, z9.h\n"
+ "ld1sb { z14.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1sb { z18.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z9.h\n"
+ "ld1sb { z15.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1sb { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add z15.h, z15.h, z9.h\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1sb { z16.s }, p1/Z, [x20]\n"
+ "mov z16.d, z16.d\n"
+ "add z16.h, z16.h, z9.h\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "9:" // Unpadded: 3 priming loads
+ "add x20, x16, %x[ld_in_row]\n"
+ "ld1sb { z11.s }, p1/Z, [x16]\n"
+ "addvl x19, SP, #9\n"
+ "ld1sb { z21.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "add z11.h, z11.h, z9.h\n"
+ "ld1sb { z12.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "ld1sb { z20.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "add z12.h, z12.h, z9.h\n"
+ "ld1sb { z13.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1sb { z19.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z13.h, z13.h, z9.h\n"
+ "ld1sb { z14.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1sb { z18.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z9.h\n"
+ "ld1sb { z15.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1sb { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add z15.h, z15.h, z9.h\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1sb { z16.s }, p1/Z, [x20]\n"
+ "mov z16.d, z16.d\n"
+ "add z16.h, z16.h, z9.h\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "10:" // Unpadded: 2 priming loads
+ "add x21, x16, %x[ld_in_row]\n"
+ "ld1sb { z11.s }, p1/Z, [x16]\n"
+ "addvl x20, SP, #6\n"
+ "ld1sb { z21.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "add z11.h, z11.h, z9.h\n"
+ "ld1sb { z12.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "addvl x19, SP, #12\n"
+ "ld1sb { z20.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "add z12.h, z12.h, z9.h\n"
+ "ld1sb { z13.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "ld1sb { z19.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z13.h, z13.h, z9.h\n"
+ "ld1sb { z14.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "ld1sb { z18.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z9.h\n"
+ "ld1sb { z15.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "ld1sb { z17.s }, p1/Z, [x21]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "add z15.h, z15.h, z9.h\n"
+ ".inst 0xa1402a82 // ld1h { z2.h, z10.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1sb { z16.s }, p1/Z, [x21]\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "add z16.h, z16.h, z9.h\n"
+ "ld1h { z0.h }, p2/Z, [x20, #2, MUL VL]\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "11:" // Unpadded: 1 priming loads
+ "add x21, x16, %x[ld_in_row]\n"
+ "ld1sb { z11.s }, p1/Z, [x16]\n"
+ "addvl x20, SP, #3\n"
+ "ld1sb { z21.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "add z11.h, z11.h, z9.h\n"
+ "ld1sb { z12.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "addvl x19, SP, #9\n"
+ "ld1sb { z20.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "add z12.h, z12.h, z9.h\n"
+ "ld1sb { z13.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "ld1sb { z19.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z13.h, z13.h, z9.h\n"
+ "ld1sb { z14.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "ld1sb { z18.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z9.h\n"
+ "ld1sb { z15.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "ld1sb { z17.s }, p1/Z, [x21]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "add z15.h, z15.h, z9.h\n"
+ ".inst 0xa1402a82 // ld1h { z2.h, z10.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1sb { z16.s }, p1/Z, [x21]\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "add z16.h, z16.h, z9.h\n"
+ "ld1h { z0.h }, p2/Z, [x20, #2, MUL VL]\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "12:" // Unpadded: 0 priming loads
+ "cmp x17, #0x2\n"
+ ".inst 0xa1402be2 // ld1h { z2.h, z10.h }, pn10.b/Z, [SP]\n"
+ "ld1h { z0.h }, p2/Z, [SP, #2, MUL VL]\n"
+ "blt 22f\n"
+ "add x20, x16, %x[ld_in_row]\n"
+ "ld1sb { z11.s }, p1/Z, [x16]\n"
+ "sub x17, x17, #0x2\n"
+ "ld1sb { z21.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "sub x15, x15, #0x1\n"
+ "ld1sb { z12.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "lsr x19, x17, #0x1\n"
+ "add z11.h, z11.h, z9.h\n"
+ "ld1sb { z20.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "cmp x19, x15\n"
+ "ld1sb { z13.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "csel x25, x19, x15, LT\n"
+ "add z12.h, z12.h, z9.h\n"
+ "ld1sb { z19.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z13.h, z13.h, z9.h\n"
+ "ld1sb { z14.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "ld1sb { z18.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z9.h\n"
+ "ld1sb { z15.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "and x17, x17, #0x1\n"
+ "ld1sb { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add z15.h, z15.h, z9.h\n"
+ "ld1sb { z16.s }, p1/Z, [x20]\n"
+ "mov z16.d, z16.d\n"
+ "add z16.h, z16.h, z9.h\n"
+ "sub x15, x15, x25\n"
+ "cbz x25, 21f\n"
+ "13:" // Unpadded: Main loop
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "addvl x24, SP, #6\n"
+ "addvl x23, SP, #12\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402b02 // ld1h { z2.h, z10.h }, pn10.b/Z, [x24]\n"
+ "add x22, x16, %x[ld_in_row]\n"
+ "addvl x21, SP, #3\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "addvl x20, SP, #9\n"
+ "subs x25, x25, #0x1\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402ae2 // ld1h { z2.h, z10.h }, pn10.b/Z, [x23]\n"
+ ".inst 0xc172156a // sdot za.s[x8, 2], { z11.h-z14.h }, z2.h\n"
+ "ld1sb { z11.s }, p1/Z, [x16]\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "add x19, x16, %x[ld_in_row]\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x24, #2, MUL VL]\n"
+ ".inst 0xc17a158a // sdot za.s[x8, 2], { z12.h-z15.h }, z10.h\n"
+ "ld1sb { z21.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x23, #2, MUL VL]\n"
+ "add z11.h, z11.h, z9.h\n"
+ "ld1sb { z12.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ ".inst 0xc17015aa // sdot za.s[x8, 2], { z13.h-z16.h }, z0.h\n"
+ "ld1sb { z20.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "add z12.h, z12.h, z9.h\n"
+ "ld1sb { z13.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ ".inst 0xc0060c04 // mova { z4.d-z7.d }, za.d[x8, #0]\n"
+ "add x8, x8, #0x1\n"
+ "ld1sb { z19.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z13.h, z13.h, z9.h\n"
+ "ld1sb { z14.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ ".inst 0xc1a3ac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z3.s\n"
+ "ld1sb { z18.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z9.h\n"
+ "ld1sb { z15.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ ".inst 0xc1a1aa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z1.s\n"
+ "ld1sb { z17.s }, p1/Z, [x22]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "add z15.h, z15.h, z9.h\n"
+ ".inst 0xa1402aa2 // ld1h { z2.h, z10.h }, pn10.b/Z, [x21]\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ ".inst 0xc1a8ab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z8.s\n"
+ "ld1sb { z16.s }, p1/Z, [x22]\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402a82 // ld1h { z2.h, z10.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "add z16.h, z16.h, z9.h\n"
+ "ld1h { z0.h }, p2/Z, [x21, #2, MUL VL]\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc1b7cf44 // sclamp { z4.s-z7.s }, z26.s, z23.s\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x20, #2, MUL VL]\n"
+ "st1b { z4.s }, p1, [x14]\n"
+ "add x14, x14, x11\n"
+ "ld1sb { z11.s }, p1/Z, [x16]\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "st1b { z5.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ "ld1sb { z21.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "ld1sb { z12.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "add x9, x9, x27\n"
+ "st1b { z7.s }, p1, [x28]\n"
+ "ld1sb { z20.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "add x28, x28, x26\n"
+ "ld1sb { z13.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ "add z11.h, z11.h, z9.h\n"
+ "ld1sb { z19.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z12.h, z12.h, z9.h\n"
+ "ld1sb { z14.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "add z13.h, z13.h, z9.h\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "ld1sb { z18.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z9.h\n"
+ "ld1sb { z15.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "ld1sb { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add z15.h, z15.h, z9.h\n"
+ "ld1sb { z16.s }, p1/Z, [x19]\n"
+ "mov z16.d, z16.d\n"
+ "add z16.h, z16.h, z9.h\n"
+ ".inst 0xa1402be2 // ld1h { z2.h, z10.h }, pn10.b/Z, [SP]\n"
+ "ld1h { z0.h }, p2/Z, [SP, #2, MUL VL]\n"
+ "bgt 13b\n"
+ "b 21f\n"
+ "14:" // Padded
+ "cbz x21, 19f\n"
+ "cmp x21, #0x1\n"
+ "sub x17, x17, x21\n"
+ "beq 18f\n"
+ "cmp x21, #0x2\n"
+ "beq 17f\n"
+ "cmp x21, #0x3\n"
+ "beq 16f\n"
+ "15:" // Padded: 4 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z11.s }, p0/Z, [x16]\n"
+ "add z11.h, p0/M, z11.h, z9.h\n"
+ "add x20, x16, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z21.s }, p0/Z, [x20]\n"
+ "add z21.h, p0/M, z21.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z12.s }, p0/Z, [x20]\n"
+ "add z12.h, p0/M, z12.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z20.s }, p0/Z, [x20]\n"
+ "add z20.h, p0/M, z20.h, z9.h\n"
+ "mov x12, #0x4\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z13.s }, p0/Z, [x20]\n"
+ "add z13.h, p0/M, z13.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z19.s }, p0/Z, [x20]\n"
+ "add z19.h, p0/M, z19.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z14.s }, p0/Z, [x20]\n"
+ "add z14.h, p0/M, z14.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z18.s }, p0/Z, [x20]\n"
+ "mov x12, #0x8\n"
+ "add z18.h, p0/M, z18.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z15.s }, p0/Z, [x20]\n"
+ "add z15.h, p0/M, z15.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z17.s }, p0/Z, [x20]\n"
+ "add z17.h, p0/M, z17.h, z9.h\n"
+ "addvl x19, SP, #12\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1sb { z16.s }, p0/Z, [x20]\n"
+ "add z16.h, p0/M, z16.h, z9.h\n"
+ "mov z16.d, z16.d\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "16:" // Padded: 3 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z11.s }, p0/Z, [x16]\n"
+ "add z11.h, p0/M, z11.h, z9.h\n"
+ "add x20, x16, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z21.s }, p0/Z, [x20]\n"
+ "add z21.h, p0/M, z21.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z12.s }, p0/Z, [x20]\n"
+ "add z12.h, p0/M, z12.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z20.s }, p0/Z, [x20]\n"
+ "add z20.h, p0/M, z20.h, z9.h\n"
+ "mov x12, #0x4\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z13.s }, p0/Z, [x20]\n"
+ "add z13.h, p0/M, z13.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z19.s }, p0/Z, [x20]\n"
+ "add z19.h, p0/M, z19.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z14.s }, p0/Z, [x20]\n"
+ "add z14.h, p0/M, z14.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z18.s }, p0/Z, [x20]\n"
+ "mov x12, #0x8\n"
+ "add z18.h, p0/M, z18.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z15.s }, p0/Z, [x20]\n"
+ "add z15.h, p0/M, z15.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z17.s }, p0/Z, [x20]\n"
+ "add z17.h, p0/M, z17.h, z9.h\n"
+ "addvl x19, SP, #9\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1sb { z16.s }, p0/Z, [x20]\n"
+ "add z16.h, p0/M, z16.h, z9.h\n"
+ "mov z16.d, z16.d\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "17:" // Padded: 2 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z11.s }, p0/Z, [x16]\n"
+ "add z11.h, p0/M, z11.h, z9.h\n"
+ "add x19, x16, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z21.s }, p0/Z, [x19]\n"
+ "add z21.h, p0/M, z21.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z12.s }, p0/Z, [x19]\n"
+ "add z12.h, p0/M, z12.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z9.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z18.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z18.h, p0/M, z18.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z15.s }, p0/Z, [x19]\n"
+ "add z15.h, p0/M, z15.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z9.h\n"
+ "addvl x20, SP, #6\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ ".inst 0xa1402a82 // ld1h { z2.h, z10.h }, pn10.b/Z, [x20]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "addvl x19, SP, #12\n"
+ "add z16.h, p0/M, z16.h, z9.h\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "mov z16.d, z16.d\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "ld1h { z0.h }, p2/Z, [x20, #2, MUL VL]\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "18:" // Padded: 1 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z11.s }, p0/Z, [x16]\n"
+ "add z11.h, p0/M, z11.h, z9.h\n"
+ "add x19, x16, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z21.s }, p0/Z, [x19]\n"
+ "add z21.h, p0/M, z21.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z12.s }, p0/Z, [x19]\n"
+ "add z12.h, p0/M, z12.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z9.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z18.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z18.h, p0/M, z18.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z15.s }, p0/Z, [x19]\n"
+ "add z15.h, p0/M, z15.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z9.h\n"
+ "addvl x20, SP, #3\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ ".inst 0xa1402a82 // ld1h { z2.h, z10.h }, pn10.b/Z, [x20]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "addvl x19, SP, #9\n"
+ "add z16.h, p0/M, z16.h, z9.h\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "mov z16.d, z16.d\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "ld1h { z0.h }, p2/Z, [x20, #2, MUL VL]\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "19:" // Padded: 0 priming loads
+ "cmp x17, #0x2\n"
+ ".inst 0xa1402be2 // ld1h { z2.h, z10.h }, pn10.b/Z, [SP]\n"
+ "ld1h { z0.h }, p2/Z, [SP, #2, MUL VL]\n"
+ "blt 22f\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z11.s }, p0/Z, [x16]\n"
+ "add z11.h, p0/M, z11.h, z9.h\n"
+ "add x19, x16, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z21.s }, p0/Z, [x19]\n"
+ "add z21.h, p0/M, z21.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z12.s }, p0/Z, [x19]\n"
+ "add z12.h, p0/M, z12.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z9.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z18.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z18.h, p0/M, z18.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z15.s }, p0/Z, [x19]\n"
+ "add z15.h, p0/M, z15.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z9.h\n"
+ "sub x17, x17, #0x2\n"
+ "sub x15, x15, #0x1\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "lsr x19, x17, #0x1\n"
+ "cmp x19, x15\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "mov z16.d, z16.d\n"
+ "csel x24, x19, x15, LT\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "and x17, x17, #0x1\n"
+ "sub x15, x15, x24\n"
+ "cbz x24, 21f\n"
+ "20:" // Padded: Main loop
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "addvl x23, SP, #6\n"
+ "addvl x22, SP, #12\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402ae2 // ld1h { z2.h, z10.h }, pn10.b/Z, [x23]\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "add x19, x16, %x[ld_in_row]\n"
+ "addvl x21, SP, #3\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402ac2 // ld1h { z2.h, z10.h }, pn10.b/Z, [x22]\n"
+ "addvl x20, SP, #9\n"
+ "subs x24, x24, #0x1\n"
+ ".inst 0xc172156a // sdot za.s[x8, 2], { z11.h-z14.h }, z2.h\n"
+ "ld1sb { z11.s }, p0/Z, [x16]\n"
+ "add z11.h, p0/M, z11.h, z9.h\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z21.s }, p0/Z, [x19]\n"
+ "add z21.h, p0/M, z21.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc17a158a // sdot za.s[x8, 2], { z12.h-z15.h }, z10.h\n"
+ "ld1sb { z12.s }, p0/Z, [x19]\n"
+ "add z12.h, p0/M, z12.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x23, #2, MUL VL]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x4\n"
+ "ld1sb { z20.s }, p0/Z, [x19]\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "add z20.h, p0/M, z20.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "ld1h { z0.h }, p2/Z, [x22, #2, MUL VL]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc17015aa // sdot za.s[x8, 2], { z13.h-z16.h }, z0.h\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "ld1sb { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z18.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z18.h, p0/M, z18.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z15.s }, p0/Z, [x19]\n"
+ "add z15.h, p0/M, z15.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z9.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ ".inst 0xa1402aa2 // ld1h { z2.h, z10.h }, pn10.b/Z, [x21]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc0060c04 // mova { z4.d-z7.d }, za.d[x8, #0]\n"
+ "add x8, x8, #0x1\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "mov x12, #0x0\n"
+ "add z16.h, p0/M, z16.h, z9.h\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402a82 // ld1h { z2.h, z10.h }, pn10.b/Z, [x20]\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "ld1sb { z11.s }, p0/Z, [x16]\n"
+ "add z11.h, p0/M, z11.h, z9.h\n"
+ "add x19, x16, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z21.s }, p0/Z, [x19]\n"
+ "add z21.h, p0/M, z21.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ "ld1sb { z12.s }, p0/Z, [x19]\n"
+ "mov z16.d, z16.d\n"
+ "ld1h { z0.h }, p2/Z, [x21, #2, MUL VL]\n"
+ "add z12.h, p0/M, z12.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z20.s }, p0/Z, [x19]\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "mov x12, #0x4\n"
+ "add z20.h, p0/M, z20.h, z9.h\n"
+ "ld1h { z0.h }, p2/Z, [x20, #2, MUL VL]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "ld1sb { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z18.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z18.h, p0/M, z18.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z15.s }, p0/Z, [x19]\n"
+ ".inst 0xc1a3ac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z3.s\n"
+ "add z15.h, p0/M, z15.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z17.s }, p0/Z, [x19]\n"
+ ".inst 0xc1a1aa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z1.s\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ "add z17.h, p0/M, z17.h, z9.h\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z9.h\n"
+ ".inst 0xc1a8ab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z8.s\n"
+ ".inst 0xa1402be2 // ld1h { z2.h, z10.h }, pn10.b/Z, [SP]\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ ".inst 0xc1b7cf44 // sclamp { z4.s-z7.s }, z26.s, z23.s\n"
+ "st1b { z4.s }, p1, [x14]\n"
+ "add x14, x14, x11\n"
+ "ld1h { z0.h }, p2/Z, [SP, #2, MUL VL]\n"
+ "st1b { z5.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "st1b { z7.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "mov z16.d, z16.d\n"
+ "bgt 20b\n"
+ "21:" // Main loop tail
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "addvl x23, SP, #6\n"
+ "addvl x22, SP, #12\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402ae2 // ld1h { z2.h, z10.h }, pn10.b/Z, [x23]\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "add x21, x16, %x[ld_in_row]\n"
+ "addvl x20, SP, #3\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402ac2 // ld1h { z2.h, z10.h }, pn10.b/Z, [x22]\n"
+ "addvl x19, SP, #9\n"
+ ".inst 0xc172156a // sdot za.s[x8, 2], { z11.h-z14.h }, z2.h\n"
+ "ld1sb { z11.s }, p0/Z, [x16]\n"
+ "add z11.h, p0/M, z11.h, z9.h\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z21.s }, p0/Z, [x21]\n"
+ "add z21.h, p0/M, z21.h, z9.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc17a158a // sdot za.s[x8, 2], { z12.h-z15.h }, z10.h\n"
+ "ld1sb { z12.s }, p0/Z, [x21]\n"
+ "add z12.h, p0/M, z12.h, z9.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x23, #2, MUL VL]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x4\n"
+ "ld1sb { z20.s }, p0/Z, [x21]\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "add z20.h, p0/M, z20.h, z9.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "ld1h { z0.h }, p2/Z, [x22, #2, MUL VL]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc17015aa // sdot za.s[x8, 2], { z13.h-z16.h }, z0.h\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "ld1sb { z13.s }, p0/Z, [x21]\n"
+ "add z13.h, p0/M, z13.h, z9.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z19.s }, p0/Z, [x21]\n"
+ "add z19.h, p0/M, z19.h, z9.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z14.s }, p0/Z, [x21]\n"
+ "add z14.h, p0/M, z14.h, z9.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z18.s }, p0/Z, [x21]\n"
+ "mov x12, #0x8\n"
+ "add z18.h, p0/M, z18.h, z9.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z15.s }, p0/Z, [x21]\n"
+ "add z15.h, p0/M, z15.h, z9.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z17.s }, p0/Z, [x21]\n"
+ "add z17.h, p0/M, z17.h, z9.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ ".inst 0xa1402a82 // ld1h { z2.h, z10.h }, pn10.b/Z, [x20]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0xc0060c04 // mova { z4.d-z7.d }, za.d[x8, #0]\n"
+ "add x8, x8, #0x1\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1sb { z16.s }, p0/Z, [x21]\n"
+ ".inst 0xc1a3ac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z3.s\n"
+ "add z16.h, p0/M, z16.h, z9.h\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ ".inst 0xc1a1aa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z1.s\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "mov z16.d, z16.d\n"
+ "ld1h { z0.h }, p2/Z, [x20, #2, MUL VL]\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc1a8ab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z8.s\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc1b7cf44 // sclamp { z4.s-z7.s }, z26.s, z23.s\n"
+ "st1b { z4.s }, p1, [x14]\n"
+ "add x14, x14, x11\n"
+ "st1b { z5.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ ".inst 0xa1402be2 // ld1h { z2.h, z10.h }, pn10.b/Z, [SP]\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [SP, #2, MUL VL]\n"
+ "st1b { z7.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ "22:" // Main loop skip tail
+ "cbz x17, 23f\n" // Skip remainder inputs
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z11.s }, p0/Z, [x16]\n"
+ "add z11.h, p0/M, z11.h, z9.h\n"
+ "add x19, x16, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z21.s }, p0/Z, [x19]\n"
+ "add z21.h, p0/M, z21.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z12.s }, p0/Z, [x19]\n"
+ "add z12.h, p0/M, z12.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z9.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1sb { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1sb { z18.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z18.h, p0/M, z18.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1sb { z15.s }, p0/Z, [x19]\n"
+ "add z15.h, p0/M, z15.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1sb { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "ld1sb { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z9.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "addvl x20, SP, #6\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "mov z16.d, z16.d\n"
+ "addvl x19, SP, #12\n"
+ "sub x15, x15, #0x1\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402a82 // ld1h { z2.h, z10.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x20, #2, MUL VL]\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ ".inst 0xc0060c04 // mova { z4.d-z7.d }, za.d[x8, #0]\n"
+ ".inst 0xc1a3ac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z3.s\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1a1aa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z1.s\n"
+ ".inst 0xc172156a // sdot za.s[x8, 2], { z11.h-z14.h }, z2.h\n"
+ ".inst 0xc1a8ab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z8.s\n"
+ ".inst 0xc17a158a // sdot za.s[x8, 2], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc1b7cf44 // sclamp { z4.s-z7.s }, z26.s, z23.s\n"
+ "st1b { z4.s }, p1, [x14]\n"
+ "add x14, x14, x11\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ "st1b { z5.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ ".inst 0xc17015aa // sdot za.s[x8, 2], { z13.h-z16.h }, z0.h\n"
+ "add x8, x8, #0x1\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "st1b { z7.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ "23:" // Tail input: End
+ "cbz x15, 25f\n"
+ "24:" // Right padding loop
+ ".inst 0xc0060c04 // mova { z4.d-z7.d }, za.d[x8, #0]\n"
+ ".inst 0xc1a3ac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z3.s\n"
+ "add x8, x8, #0x1\n"
+ ".inst 0xc1a1aa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z1.s\n"
+ "subs x15, x15, #0x1\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ ".inst 0xc1a8ab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z8.s\n"
+ ".inst 0xc1b7cf44 // sclamp { z4.s-z7.s }, z26.s, z23.s\n"
+ "st1b { z4.s }, p1, [x14]\n"
+ "add x14, x14, x11\n"
+ "st1b { z5.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "st1b { z7.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ "bgt 24b\n"
+ "25:" // End
+ "ldr x21, [%x[args], %[offsetof_Args_weights]]\n"
+ "incw x21, ALL, MUL #16\n"
+ "incw x21, ALL, MUL #9\n"
+ "str x21, [%x[args], %[offsetof_Args_weights]]\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_in_vl]]\n"
+ "incw x7\n"
+ "whilelt p1.s, x7, x6\n"
+ "ldr x16, [%x[args], %[offsetof_Args_inptr]]\n"
+ "add x16, x16, x19\n"
+ "str x16, [%x[args], %[offsetof_Args_inptr]]\n"
+ "ldr x24, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "ldr x23, [%x[args], %[offsetof_Args_ld_out_vls]]\n"
+ "ldp x22, x21, [x24, #0x0]\n"
+ "ldp x20, x19, [x23, #0x0]\n"
+ "add x22, x22, x20\n"
+ "add x21, x21, x19\n"
+ "stp x22, x21, [x24, #0x0]\n"
+ "ldp x22, x21, [x24, #0x10]\n"
+ "ldp x20, x19, [x23, #0x10]\n"
+ "add x22, x22, x20\n"
+ "add x21, x21, x19\n"
+ "stp x22, x21, [x24, #0x10]\n"
+ "b.any 1b\n"
+ "addvl SP, SP, #15\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [ld_in_col] "r" (ld_in_col), [ld_in_row] "r" (ld_in_row), [offsetof_Args_current_channel] "I" (offsetof(Args, current_channel)), [offsetof_Args_inptr] "I" (offsetof(Args, inptr)), [offsetof_Args_input_cols] "I" (offsetof(Args, input_cols)), [offsetof_Args_ld_in_vl] "I" (offsetof(Args, ld_in_vl)), [offsetof_Args_ld_out_cols] "I" (offsetof(Args, ld_out_cols)), [offsetof_Args_ld_out_vls] "I" (offsetof(Args, ld_out_vls)), [offsetof_Args_n_channels] "I" (offsetof(Args, n_channels)), [offsetof_Args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_Args_output_cols] "I" (offsetof(Args, output_cols)), [offsetof_Args_pad_bottom] "I" (offsetof(Args, pad_bottom)), [offsetof_Args_pad_left] "I" (offsetof(Args, pad_left)), [offsetof_Args_pad_top] "I" (offsetof(Args, pad_top)), [offsetof_Args_weights] "I" (offsetof(Args, weights)), [offsetof_Requantize32_a_offset] "I" (offsetof(arm_gemm::Requantize32, a_offset)), [offsetof_Requantize32_b_offset] "I" (offsetof(arm_gemm::Requantize32, b_offset)), [offsetof_Requantize32_bias] "I" (offsetof(arm_gemm::Requantize32, bias)), [offsetof_Requantize32_c_offset] "I" (offsetof(arm_gemm::Requantize32, c_offset)), [offsetof_Requantize32_maxval] "I" (offsetof(arm_gemm::Requantize32, maxval)), [offsetof_Requantize32_minval] "I" (offsetof(arm_gemm::Requantize32, minval)), [offsetof_Requantize32_per_channel_muls] "I" (offsetof(arm_gemm::Requantize32, per_channel_muls)), [offsetof_Requantize32_per_channel_right_shifts] "I" (offsetof(arm_gemm::Requantize32, per_channel_right_shifts)), [offsetof_Requantize32_per_layer_mul] "I" (offsetof(arm_gemm::Requantize32, per_layer_mul)), [offsetof_Requantize32_per_layer_right_shift] "I" (offsetof(arm_gemm::Requantize32, per_layer_right_shift)), [qp] "r" (&qp)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8q_planar_3x3_s1_4rows_dot_za.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8q_planar_3x3_s1_4rows_dot_za.hpp
new file mode 100644
index 0000000..875a9f8
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8q_planar_3x3_s1_4rows_dot_za.hpp
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_u8q_planar_3x3_s1_4rows_dot_za_impl(
+ const uint8_t *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const uint8_t *weights,
+ uint8_t **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ const arm_gemm::Requantize32 &qp
+);
+
+class sme2_u8q_planar_3x3_s1_4rows_dot_za : public PlanarStrategy<uint8_t, uint8_t>
+{
+ using Parent = PlanarStrategy<uint8_t, uint8_t>;
+
+ public:
+ using return_type = uint8_t;
+ constexpr static auto output_rows = 4u;
+ constexpr static auto kernel_rows = 3u, kernel_cols = 3u;
+ constexpr static auto stride_rows = 1u, stride_cols = 1u;
+ constexpr static auto vl_type = arm_gemm::VLType::SME;
+
+ sme2_u8q_planar_3x3_s1_4rows_dot_za(const CPUInfo *)
+ : Parent(kernel_rows, kernel_cols, stride_rows, stride_cols, output_rows, vl_type)
+ {
+ }
+
+ typename Parent::KernelType get_kernel(void) const override
+ {
+ return sme2_u8q_planar_3x3_s1_4rows_dot_za_impl;
+ }
+};
+
+} // namespace depthwise
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8q_planar_3x3_s1_4rows_dot_za/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8q_planar_3x3_s1_4rows_dot_za/generic.cpp
new file mode 100644
index 0000000..d59879b
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8q_planar_3x3_s1_4rows_dot_za/generic.cpp
@@ -0,0 +1,664 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <algorithm>
+#include <cstddef>
+#include "arm_gemm.hpp"
+
+using arm_gemm::Requantize32;
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_u8q_planar_3x3_s1_4rows_dot_za_impl(
+ const uint8_t *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const uint8_t *weights,
+ uint8_t **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ const arm_gemm::Requantize32 &qp
+)
+{
+ struct Args
+ {
+ const uint8_t *inptr;
+ size_t ld_in_vl;
+ long unsigned int pad_top, pad_bottom, pad_left;
+ const uint8_t *weights;
+ long unsigned int input_cols, output_cols;
+ uint8_t **outptrs;
+ const size_t *ld_out_cols;
+ const size_t *ld_out_vls;
+ long unsigned int current_channel, n_channels;
+ };
+
+ Args args = { inptr, ld_in_vl, pad_top, 6u - std::min(6u, pad_top + valid_input_rows), pad_left, weights, valid_input_cols, output_cols, outptrs, outlds, outvllds, start_channel, valid_channels };
+
+ __asm__ __volatile__(
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "ldr x7, [%x[args], %[offsetof_Args_pad_bottom]]\n"
+ "ptrue p2.b\n"
+ "mov x19, #0x6\n"
+ "ldr x8, [%x[args], %[offsetof_Args_pad_top]]\n"
+ "ld1rh { z24.h }, p2/Z, [%x[qp], %[offsetof_Requantize32_a_offset]]\n"
+ "sub x19, x19, x7\n"
+ ".inst 0x25207812 // ptrue pn10.b\n"
+ "ldr x17, [%x[args], %[offsetof_Args_n_channels]]\n"
+ "whilelt p1.s, XZR, x17\n"
+ "whilelt p9.s, XZR, x19\n"
+ "ld1rw { z12.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_c_offset]]\n"
+ "whilelt p8.s, XZR, x8\n"
+ "addvl SP, SP, #-12\n"
+ "ldr x16, [%x[args], %[offsetof_Args_current_channel]]\n"
+ "neg z24.h, p2/M, z24.h\n"
+ "eor p8.b, p2/Z, p8.b, p9.b\n"
+ "ld1rw { z10.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_per_layer_mul]]\n"
+ "ld1rw { z11.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_per_layer_right_shift]]\n"
+ "ld1rw { z22.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_minval]]\n"
+ "ld1rw { z26.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_maxval]]\n"
+ "1:" // Channel loop
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_bias]]\n"
+ "mov z8.s, #0x0\n"
+ "cbz x19, 2f\n"
+ "ld1w { z8.s }, p1/Z, [x19, x16, LSL #2]\n"
+ "2:" // Load bias: Done
+ "ldr x21, [%x[args], %[offsetof_Args_weights]]\n"
+ "mov x19, x21\n"
+ "ld1b { z27.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "ld1rh { z21.h }, p2/Z, [%x[qp], %[offsetof_Requantize32_b_offset]]\n"
+ "mov z20.h, #0x0\n"
+ "sub z27.h, z27.h, z21.h\n"
+ "incw x21\n"
+ "ld1b { z23.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "sub z23.h, z23.h, z21.h\n"
+ "trn1 z0.h, z20.h, z27.h\n"
+ "ld1b { z16.s }, p2/Z, [x19]\n"
+ "sub z16.h, z16.h, z21.h\n"
+ "mov x19, x21\n"
+ "trn1 z1.h, z27.h, z23.h\n"
+ "ld1b { z27.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "trn1 z2.h, z23.h, z16.h\n"
+ "trn1 z3.h, z16.h, z20.h\n"
+ "ld1b { z23.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "sub z27.h, z27.h, z21.h\n"
+ "sub z23.h, z23.h, z21.h\n"
+ "ld1b { z16.s }, p2/Z, [x19]\n"
+ "sub z16.h, z16.h, z21.h\n"
+ "addvl x20, SP, #12\n"
+ "incw x21\n"
+ "addvl x20, x20, #-4\n"
+ "mov x19, x21\n"
+ "st1h { z0.h }, p2, [x20]\n"
+ "trn1 z0.h, z20.h, z27.h\n"
+ "st1h { z1.h }, p2, [x20, #1, MUL VL]\n"
+ "trn1 z1.h, z27.h, z23.h\n"
+ "ld1b { z27.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "st1h { z2.h }, p2, [x20, #2, MUL VL]\n"
+ "trn1 z2.h, z23.h, z16.h\n"
+ "ld1b { z23.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "st1h { z3.h }, p2, [x20, #3, MUL VL]\n"
+ "trn1 z3.h, z16.h, z20.h\n"
+ "ld1b { z16.s }, p2/Z, [x19]\n"
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_muls]]\n"
+ "sub z27.h, z27.h, z21.h\n"
+ "sub z23.h, z23.h, z21.h\n"
+ "addvl x20, x20, #-4\n"
+ "st1h { z0.h }, p2, [x20]\n"
+ "sub z16.h, z16.h, z21.h\n"
+ "st1h { z1.h }, p2, [x20, #1, MUL VL]\n"
+ "mov z9.d, z8.d\n"
+ "st1h { z2.h }, p2, [x20, #2, MUL VL]\n"
+ "trn1 z0.h, z20.h, z27.h\n"
+ "trn1 z1.h, z27.h, z23.h\n"
+ "st1h { z3.h }, p2, [x20, #3, MUL VL]\n"
+ "addvl x20, x20, #-4\n"
+ "trn1 z2.h, z23.h, z16.h\n"
+ "trn1 z3.h, z16.h, z20.h\n"
+ "st1h { z0.h }, p2, [x20]\n"
+ "st1h { z1.h }, p2, [x20, #1, MUL VL]\n"
+ "st1h { z2.h }, p2, [x20, #2, MUL VL]\n"
+ "st1h { z3.h }, p2, [x20, #3, MUL VL]\n"
+ "cbz x19, 3f\n"
+ "ld1w { z10.s }, p1/Z, [x19, x16, LSL #2]\n"
+ "3:" // Load mul: End
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_right_shifts]]\n"
+ "cbz x19, 4f\n"
+ "ld1w { z11.s }, p1/Z, [x19, x16, LSL #2]\n"
+ "4:" // Load right_shift: End
+ "ldr x15, [%x[args], %[offsetof_Args_input_cols]]\n"
+ "sub x19, x15, #0x1\n"
+ "orr x22, x19, %x[ld_in_col], LSL #16\n"
+ "ldr x14, [%x[args], %[offsetof_Args_inptr]]\n"
+ "orr x22, x17, x22, LSL #22\n"
+ "mov x21, #0x6\n"
+ "add x20, x8, x7\n"
+ "lsl x19, %x[ld_in_row], #0x0\n"
+ "ldr x13, [%x[args], %[offsetof_Args_output_cols]]\n"
+ "mov x11, #0x0\n"
+ "lsl x22, x22, #0x0\n"
+ "sub x21, x21, x20\n"
+ "madd x19, x19, x8, x14\n"
+ "5:" // Issue prefetches
+ "subs x21, x21, #0x1\n"
+ ".inst 0xf8b64a7c // rprfm pldstrm, x22, [x19]\n"
+ "add x19, x19, %x[ld_in_col]\n"
+ "bgt 5b\n"
+ "ldr x24, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "lsl x19, %x[ld_in_row], #0x0\n"
+ "msub x14, x8, x19, x14\n"
+ ".inst 0xc0046900 // mova za.d[x11, #0], { z8.d-z9.d }\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_out_cols]]\n"
+ ".inst 0xc0046901 // mova za.d[x11, #1], { z8.d-z9.d }\n"
+ "mov x21, #0x2\n"
+ "ldp x10, x9, [x24], #0x10\n"
+ ".inst 0xc0046902 // mova za.d[x11, #2], { z8.d-z9.d }\n"
+ "ldp x28, x27, [x19], #0x10\n"
+ ".inst 0xc0046903 // mova za.d[x11, #3], { z8.d-z9.d }\n"
+ "ldr x20, [%x[args], %[offsetof_Args_pad_left]]\n"
+ ".inst 0xc0046904 // mova za.d[x11, #4], { z8.d-z9.d }\n"
+ "ldp x26, x25, [x24], #0x10\n"
+ ".inst 0xc0046905 // mova za.d[x11, #5], { z8.d-z9.d }\n"
+ "ldp x24, x23, [x19], #0x10\n"
+ "cbz x20, 7f\n"
+ "cmp x20, x21\n"
+ "csel x19, x20, x21, LT\n"
+ "sub x20, x20, x19\n"
+ "sub x21, x21, x19\n"
+ "cbz x20, 7f\n"
+ ".inst 0xc0066804 // mova { z4.d-z5.d }, za.d[x11, #0]\n"
+ "sub x13, x13, x20\n"
+ ".inst 0xc0066826 // mova { z6.d-z7.d }, za.d[x11, #1]\n"
+ ".inst 0xc1aaac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z10.s\n"
+ ".inst 0xc1abaa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z11.s\n"
+ ".inst 0xc1acab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z12.s\n"
+ ".inst 0xc1bacec4 // sclamp { z4.s-z7.s }, z22.s, z26.s\n"
+ "6:" // Left padding
+ "subs x20, x20, #0x1\n"
+ "st1b { z4.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "st1b { z5.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ "st1b { z7.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ "bgt 6b\n"
+ "7:" // Left padding: End
+ "adds XZR, x8, x7\n"
+ "bne 12f\n"
+ "cbz x21, 10f\n"
+ "cmp x21, #0x1\n"
+ "sub x15, x15, x21\n"
+ "beq 9f\n"
+ "8:" // Unpadded: 2 priming loads
+ "add x20, x14, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x14]\n"
+ "addvl x19, SP, #8\n"
+ "ld1b { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z13.h, z17.h, z16.h\n"
+ "add z13.h, z13.h, z24.h\n"
+ "ld1b { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "ld1b { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z14.h, z17.h, z16.h\n"
+ "add z14.h, z14.h, z24.h\n"
+ "ld1b { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1b { z16.s }, p1/Z, [x20]\n"
+ "trn1 z15.h, z17.h, z16.h\n"
+ "add z15.h, z15.h, z24.h\n"
+ ".inst 0xa0402a60 // ld1h { z0.h-z1.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc16175a8 // sdot za.s[x11, 0], { z13.h-z14.h }, z1.h\n"
+ ".inst 0xc16075a9 // sdot za.s[x11, 1], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xa0412a62 // ld1h { z2.h-z3.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16375c8 // sdot za.s[x11, 0], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xc16275c9 // sdot za.s[x11, 1], { z14.h-z15.h }, z2.h\n"
+ "9:" // Unpadded: 1 priming loads
+ "add x21, x14, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x14]\n"
+ "addvl x20, SP, #4\n"
+ "ld1b { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z13.h, z17.h, z16.h\n"
+ "add z13.h, z13.h, z24.h\n"
+ "ld1b { z17.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "addvl x19, SP, #8\n"
+ "ld1b { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z14.h, z17.h, z16.h\n"
+ "add z14.h, z14.h, z24.h\n"
+ "ld1b { z17.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "ld1b { z16.s }, p1/Z, [x21]\n"
+ "trn1 z15.h, z17.h, z16.h\n"
+ "add z15.h, z15.h, z24.h\n"
+ ".inst 0xa0402a80 // ld1h { z0.h-z1.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc16175a8 // sdot za.s[x11, 0], { z13.h-z14.h }, z1.h\n"
+ ".inst 0xc16075a9 // sdot za.s[x11, 1], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xa0402a60 // ld1h { z0.h-z1.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xa0412a82 // ld1h { z2.h-z3.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc16175aa // sdot za.s[x11, 2], { z13.h-z14.h }, z1.h\n"
+ ".inst 0xc16075ab // sdot za.s[x11, 3], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xc16375c8 // sdot za.s[x11, 0], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xc16275c9 // sdot za.s[x11, 1], { z14.h-z15.h }, z2.h\n"
+ ".inst 0xa0412a62 // ld1h { z2.h-z3.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16375ca // sdot za.s[x11, 2], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xc16275cb // sdot za.s[x11, 3], { z14.h-z15.h }, z2.h\n"
+ "10:" // Unpadded: 0 priming loads
+ ".inst 0xa0402be0 // ld1h { z0.h-z1.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xa0412be2 // ld1h { z2.h-z3.h }, pn10.b/Z, [SP, #0x2, MUL VL]\n"
+ "cbz x15, 18f\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x14]\n"
+ "sub x15, x15, #0x1\n"
+ "ld1b { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z13.h, z17.h, z16.h\n"
+ "sub x13, x13, #0x1\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "cmp x15, x13\n"
+ "add z13.h, z13.h, z24.h\n"
+ "ld1b { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z14.h, z17.h, z16.h\n"
+ "csel x22, x15, x13, LT\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "add z14.h, z14.h, z24.h\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "ld1b { z16.s }, p1/Z, [x19]\n"
+ "trn1 z15.h, z17.h, z16.h\n"
+ "add z15.h, z15.h, z24.h\n"
+ "sub x13, x13, x22\n"
+ "cbz x22, 17f\n"
+ "11:" // Unpadded: Main loop
+ ".inst 0xc16175a8 // sdot za.s[x11, 0], { z13.h-z14.h }, z1.h\n"
+ "addvl x21, SP, #4\n"
+ "addvl x20, SP, #8\n"
+ "ld1b { z21.s }, p1/Z, [x14]\n"
+ ".inst 0xc16075a9 // sdot za.s[x11, 1], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xa0402aa0 // ld1h { z0.h-z1.h }, pn10.b/Z, [x21]\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ "subs x22, x22, #0x1\n"
+ ".inst 0xc16375c8 // sdot za.s[x11, 0], { z14.h-z15.h }, z3.h\n"
+ "ld1b { z20.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ ".inst 0xc16275c9 // sdot za.s[x11, 1], { z14.h-z15.h }, z2.h\n"
+ ".inst 0xa0412aa2 // ld1h { z2.h-z3.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0xc0066804 // mova { z4.d-z5.d }, za.d[x11, #0]\n"
+ "ld1b { z19.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc0066826 // mova { z6.d-z7.d }, za.d[x11, #1]\n"
+ ".inst 0xc1aaac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z10.s\n"
+ ".inst 0xc16175aa // sdot za.s[x11, 2], { z13.h-z14.h }, z1.h\n"
+ "ld1b { z18.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc16075ab // sdot za.s[x11, 3], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xa0402a80 // ld1h { z0.h-z1.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1abaa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z11.s\n"
+ ".inst 0xc16175ac // sdot za.s[x11, 4], { z13.h-z14.h }, z1.h\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc16075ad // sdot za.s[x11, 5], { z13.h-z14.h }, z0.h\n"
+ "ld1b { z16.s }, p1/Z, [x19]\n"
+ ".inst 0xc1acab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z12.s\n"
+ ".inst 0xc16375ca // sdot za.s[x11, 2], { z14.h-z15.h }, z3.h\n"
+ "trn1 z13.h, z21.h, z20.h\n"
+ ".inst 0xa0402be0 // ld1h { z0.h-z1.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xc16275cb // sdot za.s[x11, 3], { z14.h-z15.h }, z2.h\n"
+ ".inst 0xa0412a82 // ld1h { z2.h-z3.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc1bacec4 // sclamp { z4.s-z7.s }, z22.s, z26.s\n"
+ ".inst 0xc16375cc // sdot za.s[x11, 4], { z14.h-z15.h }, z3.h\n"
+ "st1b { z4.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ "add z13.h, z13.h, z24.h\n"
+ ".inst 0xc16275cd // sdot za.s[x11, 5], { z14.h-z15.h }, z2.h\n"
+ "trn1 z14.h, z19.h, z18.h\n"
+ "trn1 z15.h, z17.h, z16.h\n"
+ "add x11, x11, #0x2\n"
+ ".inst 0xa0412be2 // ld1h { z2.h-z3.h }, pn10.b/Z, [SP, #0x2, MUL VL]\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ ".inst 0xc0046904 // mova za.d[x11, #4], { z8.d-z9.d }\n"
+ "st1b { z5.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ ".inst 0xc0046905 // mova za.d[x11, #5], { z8.d-z9.d }\n"
+ "add z14.h, z14.h, z24.h\n"
+ "st1b { z7.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ "add z15.h, z15.h, z24.h\n"
+ "bgt 11b\n"
+ "b 17f\n"
+ "12:" // Padded
+ "cbz x21, 15f\n"
+ "cmp x21, #0x1\n"
+ "sub x15, x15, x21\n"
+ "beq 14f\n"
+ "13:" // Padded: 2 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z19.s }, p0/Z, [x14]\n"
+ "add z19.h, p0/M, z19.h, z24.h\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z24.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z24.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z24.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z13.h, z19.h, z18.h\n"
+ "trn1 z14.h, z17.h, z16.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z24.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "addvl x19, SP, #8\n"
+ "add z16.h, p0/M, z16.h, z24.h\n"
+ ".inst 0xa0402a60 // ld1h { z0.h-z1.h }, pn10.b/Z, [x19]\n"
+ "trn1 z15.h, z17.h, z16.h\n"
+ ".inst 0xc16175a8 // sdot za.s[x11, 0], { z13.h-z14.h }, z1.h\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ ".inst 0xc16075a9 // sdot za.s[x11, 1], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xa0412a62 // ld1h { z2.h-z3.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16375c8 // sdot za.s[x11, 0], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xc16275c9 // sdot za.s[x11, 1], { z14.h-z15.h }, z2.h\n"
+ "14:" // Padded: 1 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z19.s }, p0/Z, [x14]\n"
+ "add z19.h, p0/M, z19.h, z24.h\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z24.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z24.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z24.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z13.h, z19.h, z18.h\n"
+ "trn1 z14.h, z17.h, z16.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z24.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "addvl x20, SP, #4\n"
+ "add z16.h, p0/M, z16.h, z24.h\n"
+ ".inst 0xa0402a80 // ld1h { z0.h-z1.h }, pn10.b/Z, [x20]\n"
+ "addvl x19, SP, #8\n"
+ "trn1 z15.h, z17.h, z16.h\n"
+ ".inst 0xc16175a8 // sdot za.s[x11, 0], { z13.h-z14.h }, z1.h\n"
+ ".inst 0xc16075a9 // sdot za.s[x11, 1], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xa0402a60 // ld1h { z0.h-z1.h }, pn10.b/Z, [x19]\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ ".inst 0xa0412a82 // ld1h { z2.h-z3.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc16175aa // sdot za.s[x11, 2], { z13.h-z14.h }, z1.h\n"
+ ".inst 0xc16075ab // sdot za.s[x11, 3], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xc16375c8 // sdot za.s[x11, 0], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xc16275c9 // sdot za.s[x11, 1], { z14.h-z15.h }, z2.h\n"
+ ".inst 0xa0412a62 // ld1h { z2.h-z3.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16375ca // sdot za.s[x11, 2], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xc16275cb // sdot za.s[x11, 3], { z14.h-z15.h }, z2.h\n"
+ "15:" // Padded: 0 priming loads
+ ".inst 0xa0402be0 // ld1h { z0.h-z1.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xa0412be2 // ld1h { z2.h-z3.h }, pn10.b/Z, [SP, #0x2, MUL VL]\n"
+ "cbz x15, 18f\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z19.s }, p0/Z, [x14]\n"
+ "add z19.h, p0/M, z19.h, z24.h\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z24.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z24.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z24.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z13.h, z19.h, z18.h\n"
+ "trn1 z14.h, z17.h, z16.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z24.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z24.h\n"
+ "sub x15, x15, #0x1\n"
+ "sub x13, x13, #0x1\n"
+ "cmp x15, x13\n"
+ "trn1 z15.h, z17.h, z16.h\n"
+ "csel x22, x15, x13, LT\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "sub x13, x13, x22\n"
+ "cbz x22, 17f\n"
+ "16:" // Padded: Main loop
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z21.s }, p0/Z, [x14]\n"
+ ".inst 0xc16175a8 // sdot za.s[x11, 0], { z13.h-z14.h }, z1.h\n"
+ ".inst 0xc16075a9 // sdot za.s[x11, 1], { z13.h-z14.h }, z0.h\n"
+ "add z21.h, p0/M, z21.h, z24.h\n"
+ "add x21, x14, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z20.s }, p0/Z, [x21]\n"
+ ".inst 0xc16375c8 // sdot za.s[x11, 0], { z14.h-z15.h }, z3.h\n"
+ "add z20.h, p0/M, z20.h, z24.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0xc16275c9 // sdot za.s[x11, 1], { z14.h-z15.h }, z2.h\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z19.s }, p0/Z, [x21]\n"
+ "add z19.h, p0/M, z19.h, z24.h\n"
+ ".inst 0xc0066804 // mova { z4.d-z5.d }, za.d[x11, #0]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z18.s }, p0/Z, [x21]\n"
+ ".inst 0xc0066826 // mova { z6.d-z7.d }, za.d[x11, #1]\n"
+ "mov x12, #0x4\n"
+ "addvl x20, SP, #4\n"
+ "add z18.h, p0/M, z18.h, z24.h\n"
+ ".inst 0xc1aaac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z10.s\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xa0402a80 // ld1h { z0.h-z1.h }, pn10.b/Z, [x20]\n"
+ "addvl x19, SP, #8\n"
+ ".inst 0xc16175aa // sdot za.s[x11, 2], { z13.h-z14.h }, z1.h\n"
+ "subs x22, x22, #0x1\n"
+ "ld1b { z17.s }, p0/Z, [x21]\n"
+ ".inst 0xc16075ab // sdot za.s[x11, 3], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xc1abaa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z11.s\n"
+ ".inst 0xa0402a60 // ld1h { z0.h-z1.h }, pn10.b/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z24.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ ".inst 0xa0412a82 // ld1h { z2.h-z3.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc16175ac // sdot za.s[x11, 4], { z13.h-z14.h }, z1.h\n"
+ ".inst 0xc1acab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z12.s\n"
+ "ld1b { z16.s }, p0/Z, [x21]\n"
+ ".inst 0xc16075ad // sdot za.s[x11, 5], { z13.h-z14.h }, z0.h\n"
+ "add z16.h, p0/M, z16.h, z24.h\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ ".inst 0xc16375ca // sdot za.s[x11, 2], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xa0402be0 // ld1h { z0.h-z1.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xc1bacec4 // sclamp { z4.s-z7.s }, z22.s, z26.s\n"
+ ".inst 0xc16275cb // sdot za.s[x11, 3], { z14.h-z15.h }, z2.h\n"
+ ".inst 0xa0412a62 // ld1h { z2.h-z3.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ "st1b { z4.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ ".inst 0xc16375cc // sdot za.s[x11, 4], { z14.h-z15.h }, z3.h\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "trn1 z13.h, z21.h, z20.h\n"
+ ".inst 0xc16275cd // sdot za.s[x11, 5], { z14.h-z15.h }, z2.h\n"
+ "add x11, x11, #0x2\n"
+ ".inst 0xa0412be2 // ld1h { z2.h-z3.h }, pn10.b/Z, [SP, #0x2, MUL VL]\n"
+ "st1b { z5.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ "st1b { z7.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ ".inst 0xc0046904 // mova za.d[x11, #4], { z8.d-z9.d }\n"
+ ".inst 0xc0046905 // mova za.d[x11, #5], { z8.d-z9.d }\n"
+ "trn1 z14.h, z19.h, z18.h\n"
+ "trn1 z15.h, z17.h, z16.h\n"
+ "bgt 16b\n"
+ "17:" // Main loop tail
+ ".inst 0xc16175a8 // sdot za.s[x11, 0], { z13.h-z14.h }, z1.h\n"
+ "addvl x20, SP, #4\n"
+ "addvl x19, SP, #8\n"
+ ".inst 0xc16075a9 // sdot za.s[x11, 1], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xa0402a80 // ld1h { z0.h-z1.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc16375c8 // sdot za.s[x11, 0], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xc16275c9 // sdot za.s[x11, 1], { z14.h-z15.h }, z2.h\n"
+ ".inst 0xa0412a82 // ld1h { z2.h-z3.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc0066804 // mova { z4.d-z5.d }, za.d[x11, #0]\n"
+ ".inst 0xc0066826 // mova { z6.d-z7.d }, za.d[x11, #1]\n"
+ ".inst 0xc1aaac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z10.s\n"
+ ".inst 0xc16175aa // sdot za.s[x11, 2], { z13.h-z14.h }, z1.h\n"
+ ".inst 0xc1abaa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z11.s\n"
+ ".inst 0xc16075ab // sdot za.s[x11, 3], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xa0402a60 // ld1h { z0.h-z1.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1acab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z12.s\n"
+ ".inst 0xc16175ac // sdot za.s[x11, 4], { z13.h-z14.h }, z1.h\n"
+ ".inst 0xc1bacec4 // sclamp { z4.s-z7.s }, z22.s, z26.s\n"
+ "st1b { z4.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ ".inst 0xc16075ad // sdot za.s[x11, 5], { z13.h-z14.h }, z0.h\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ ".inst 0xc16375ca // sdot za.s[x11, 2], { z14.h-z15.h }, z3.h\n"
+ "st1b { z5.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ ".inst 0xc16275cb // sdot za.s[x11, 3], { z14.h-z15.h }, z2.h\n"
+ ".inst 0xa0412a62 // ld1h { z2.h-z3.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ "st1b { z7.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ ".inst 0xc16375cc // sdot za.s[x11, 4], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xc16275cd // sdot za.s[x11, 5], { z14.h-z15.h }, z2.h\n"
+ "add x11, x11, #0x2\n"
+ ".inst 0xc0046904 // mova za.d[x11, #4], { z8.d-z9.d }\n"
+ ".inst 0xc0046905 // mova za.d[x11, #5], { z8.d-z9.d }\n"
+ "18:" // Main loop skip tail
+ "cbz x13, 20f\n"
+ "19:" // Right padding loop
+ ".inst 0xc0066804 // mova { z4.d-z5.d }, za.d[x11, #0]\n"
+ "subs x13, x13, #0x1\n"
+ ".inst 0xc0066826 // mova { z6.d-z7.d }, za.d[x11, #1]\n"
+ ".inst 0xc1aaac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z10.s\n"
+ "add x11, x11, #0x2\n"
+ ".inst 0xc1abaa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z11.s\n"
+ ".inst 0xc0046904 // mova za.d[x11, #4], { z8.d-z9.d }\n"
+ ".inst 0xc1acab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z12.s\n"
+ ".inst 0xc0046905 // mova za.d[x11, #5], { z8.d-z9.d }\n"
+ ".inst 0xc1bacec4 // sclamp { z4.s-z7.s }, z22.s, z26.s\n"
+ "st1b { z4.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "st1b { z5.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ "st1b { z7.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ "bgt 19b\n"
+ "20:" // End
+ "ldr x21, [%x[args], %[offsetof_Args_weights]]\n"
+ "incw x21, ALL, MUL #9\n"
+ "str x21, [%x[args], %[offsetof_Args_weights]]\n"
+ "incw x16\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_in_vl]]\n"
+ "whilelt p1.s, x16, x17\n"
+ "ldr x14, [%x[args], %[offsetof_Args_inptr]]\n"
+ "add x14, x14, x19\n"
+ "str x14, [%x[args], %[offsetof_Args_inptr]]\n"
+ "ldr x24, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "ldr x23, [%x[args], %[offsetof_Args_ld_out_vls]]\n"
+ "ldp x22, x21, [x24, #0x0]\n"
+ "ldp x20, x19, [x23, #0x0]\n"
+ "add x22, x22, x20\n"
+ "add x21, x21, x19\n"
+ "stp x22, x21, [x24, #0x0]\n"
+ "ldp x22, x21, [x24, #0x10]\n"
+ "ldp x20, x19, [x23, #0x10]\n"
+ "add x22, x22, x20\n"
+ "add x21, x21, x19\n"
+ "stp x22, x21, [x24, #0x10]\n"
+ "b.any 1b\n"
+ "addvl SP, SP, #12\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [ld_in_col] "r" (ld_in_col), [ld_in_row] "r" (ld_in_row), [offsetof_Args_current_channel] "I" (offsetof(Args, current_channel)), [offsetof_Args_inptr] "I" (offsetof(Args, inptr)), [offsetof_Args_input_cols] "I" (offsetof(Args, input_cols)), [offsetof_Args_ld_in_vl] "I" (offsetof(Args, ld_in_vl)), [offsetof_Args_ld_out_cols] "I" (offsetof(Args, ld_out_cols)), [offsetof_Args_ld_out_vls] "I" (offsetof(Args, ld_out_vls)), [offsetof_Args_n_channels] "I" (offsetof(Args, n_channels)), [offsetof_Args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_Args_output_cols] "I" (offsetof(Args, output_cols)), [offsetof_Args_pad_bottom] "I" (offsetof(Args, pad_bottom)), [offsetof_Args_pad_left] "I" (offsetof(Args, pad_left)), [offsetof_Args_pad_top] "I" (offsetof(Args, pad_top)), [offsetof_Args_weights] "I" (offsetof(Args, weights)), [offsetof_Requantize32_a_offset] "I" (offsetof(arm_gemm::Requantize32, a_offset)), [offsetof_Requantize32_b_offset] "I" (offsetof(arm_gemm::Requantize32, b_offset)), [offsetof_Requantize32_bias] "I" (offsetof(arm_gemm::Requantize32, bias)), [offsetof_Requantize32_c_offset] "I" (offsetof(arm_gemm::Requantize32, c_offset)), [offsetof_Requantize32_maxval] "I" (offsetof(arm_gemm::Requantize32, maxval)), [offsetof_Requantize32_minval] "I" (offsetof(arm_gemm::Requantize32, minval)), [offsetof_Requantize32_per_channel_muls] "I" (offsetof(arm_gemm::Requantize32, per_channel_muls)), [offsetof_Requantize32_per_channel_right_shifts] "I" (offsetof(arm_gemm::Requantize32, per_channel_right_shifts)), [offsetof_Requantize32_per_layer_mul] "I" (offsetof(arm_gemm::Requantize32, per_layer_mul)), [offsetof_Requantize32_per_layer_right_shift] "I" (offsetof(arm_gemm::Requantize32, per_layer_right_shift)), [qp] "r" (&qp)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8q_planar_3x3_s2_2rows_dot_za/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8q_planar_3x3_s2_2rows_dot_za/generic.cpp
new file mode 100644
index 0000000..9a0840c
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8q_planar_3x3_s2_2rows_dot_za/generic.cpp
@@ -0,0 +1,592 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <algorithm>
+#include <cstddef>
+#include "arm_gemm.hpp"
+
+using arm_gemm::Requantize32;
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_u8q_planar_3x3_s2_2rows_dot_za_impl(
+ const uint8_t *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const uint8_t *weights,
+ uint8_t **outptrs,
+ const size_t *outlds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ const arm_gemm::Requantize32 &qp
+)
+{
+ struct Args
+ {
+ const uint8_t *inptr;
+ long unsigned int pad_top, pad_bottom, pad_left;
+ const uint8_t *weights;
+ long unsigned int input_cols, output_cols;
+ uint8_t **outptrs;
+ const size_t *ld_out_cols;
+ long unsigned int n, n_channels;
+ };
+
+ Args args = { inptr, pad_top, 5u - std::min(5u, pad_top + valid_input_rows), pad_left, weights, valid_input_cols, output_cols, outptrs, outlds, start_channel, valid_channels };
+
+ __asm__ __volatile__(
+ "ldr x11, [%x[args], %[offsetof_Args_pad_bottom]]\n"
+ "mov x19, #0x5\n"
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "sub x19, x19, x11\n"
+ "ldr x10, [%x[args], %[offsetof_Args_pad_top]]\n"
+ "ptrue p0.b\n"
+ "mov z12.s, #0x0\n"
+ "ldr x22, [%x[args], %[offsetof_Args_n_channels]]\n"
+ "whilelt p5.s, XZR, x22\n"
+ "whilelt p9.s, XZR, x19\n"
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_bias]]\n"
+ "whilelt p8.s, XZR, x10\n"
+ "eor p8.b, p0/Z, p8.b, p9.b\n"
+ "ldr x21, [%x[args], %[offsetof_Args_n]]\n"
+ "cbz x19, 1f\n"
+ "ld1w { z12.s }, p5/Z, [x19, x21, LSL #2]\n"
+ "1:" // Load bias: Done
+ "ldr x20, [%x[args], %[offsetof_Args_weights]]\n"
+ "ld1b { z27.s }, p0/Z, [x20]\n"
+ "incw x20\n"
+ "mov z0.h, #0x0\n"
+ "ld1b { z16.s }, p0/Z, [x20]\n"
+ "incw x20\n"
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_muls]]\n"
+ "mov z13.d, z12.d\n"
+ "ld1b { z22.s }, p0/Z, [x20]\n"
+ "incw x20\n"
+ "ld1b { z21.s }, p0/Z, [x20]\n"
+ "incw x20\n"
+ "ld1b { z20.s }, p0/Z, [x20]\n"
+ "incw x20\n"
+ "ld1b { z18.s }, p0/Z, [x20]\n"
+ "incw x20\n"
+ "ld1b { z17.s }, p0/Z, [x20]\n"
+ "incw x20\n"
+ "ld1b { z24.s }, p0/Z, [x20]\n"
+ "incw x20\n"
+ "ld1b { z19.s }, p0/Z, [x20]\n"
+ "ld1rh { z28.h }, p0/Z, [%x[qp], %[offsetof_Requantize32_b_offset]]\n"
+ "sub z27.h, z27.h, z28.h\n"
+ "sub z16.h, z16.h, z28.h\n"
+ "sub z22.h, z22.h, z28.h\n"
+ "sub z21.h, z21.h, z28.h\n"
+ "trn1 z8.h, z27.h, z21.h\n"
+ "sub z20.h, z20.h, z28.h\n"
+ "sub z18.h, z18.h, z28.h\n"
+ "trn1 z7.h, z16.h, z20.h\n"
+ "sub z17.h, z17.h, z28.h\n"
+ "sub z24.h, z24.h, z28.h\n"
+ "trn1 z6.h, z17.h, z0.h\n"
+ "sub z19.h, z19.h, z28.h\n"
+ "trn1 z5.h, z24.h, z0.h\n"
+ "trn1 z4.h, z22.h, z18.h\n"
+ "trn1 z3.h, z19.h, z0.h\n"
+ "ld1rh { z21.h }, p0/Z, [%x[qp], %[offsetof_Requantize32_a_offset]]\n"
+ "ld1rw { z2.s }, p0/Z, [%x[qp], %[offsetof_Requantize32_c_offset]]\n"
+ "ld1rw { z1.s }, p0/Z, [%x[qp], %[offsetof_Requantize32_per_layer_mul]]\n"
+ "cbz x19, 2f\n"
+ "ld1w { z1.s }, p5/Z, [x19, x21, LSL #2]\n"
+ "2:" // Load mul: End
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_right_shifts]]\n"
+ "ld1rw { z0.s }, p0/Z, [%x[qp], %[offsetof_Requantize32_per_layer_right_shift]]\n"
+ "cbz x19, 3f\n"
+ "ld1w { z0.s }, p5/Z, [x19, x21, LSL #2]\n"
+ "3:" // Load right_shift: End
+ "ldr x28, [%x[args], %[offsetof_Args_input_cols]]\n"
+ "orr x21, x28, %x[ld_in_col], LSL #16\n"
+ "orr x21, x22, x21, LSL #22\n"
+ "ld1rw { z20.s }, p0/Z, [%x[qp], %[offsetof_Requantize32_minval]]\n"
+ "ldr x27, [%x[args], %[offsetof_Args_inptr]]\n"
+ "mov x20, #0x5\n"
+ "add x19, x10, x11\n"
+ "ld1rw { z19.s }, p0/Z, [%x[qp], %[offsetof_Requantize32_maxval]]\n"
+ "mov x9, #0x0\n"
+ "ldr x26, [%x[args], %[offsetof_Args_output_cols]]\n"
+ "lsl x21, x21, #0x0\n"
+ "sub x20, x20, x19\n"
+ "mov x19, x27\n"
+ "4:" // Issue prefetches
+ "subs x20, x20, #0x1\n"
+ ".inst 0xf8b54a7c // rprfm pldstrm, x21, [x19]\n"
+ "add x19, x19, %x[ld_in_col]\n"
+ "bgt 4b\n"
+ "ldr x21, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "lsl x19, %x[ld_in_row], #0x0\n"
+ "msub x27, x10, x19, x27\n"
+ ".inst 0xc0042980 // mova za.d[x9, #0], { z12.d-z13.d }\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_out_cols]]\n"
+ ".inst 0xc0042981 // mova za.d[x9, #1], { z12.d-z13.d }\n"
+ "mov x25, #0x2\n"
+ "ldr x20, [%x[args], %[offsetof_Args_pad_left]]\n"
+ ".inst 0xc0042982 // mova za.d[x9, #2], { z12.d-z13.d }\n"
+ "ldp x24, x23, [x21], #0x10\n"
+ "ldp x22, x21, [x19], #0x10\n"
+ "cbz x20, 6f\n"
+ "cmp x20, x25\n"
+ "csel x19, x20, x25, LT\n"
+ "sub x20, x20, x19\n"
+ "sub x25, x25, x19\n"
+ "cbz x20, 6f\n"
+ ".inst 0xc0062818 // mova { z24.d-z25.d }, za.d[x9, #0]\n"
+ ".inst 0xc1a1a418 // sqdmulh { z24.s-z25.s }, { z24.s-z25.s }, z1.s\n"
+ "and x25, x20, #0x1\n"
+ ".inst 0xc1a0a238 // srshl { z24.s-z25.s }, { z24.s-z25.s }, z0.s\n"
+ "add x20, x20, #0x1\n"
+ "lsr x20, x20, #0x1\n"
+ ".inst 0xc1a2a318 // add { z24.s-z25.s }, { z24.s-z25.s }, z2.s\n"
+ "sub x26, x26, x20\n"
+ ".inst 0xc1b3c698 // sclamp { z24.s-z25.s }, z20.s, z19.s\n"
+ "5:" // Left padding
+ "subs x20, x20, #0x1\n"
+ "st1b { z24.s }, p5, [x24]\n"
+ "add x24, x24, x22\n"
+ "st1b { z25.s }, p5, [x23]\n"
+ "add x23, x23, x21\n"
+ "bgt 5b\n"
+ "6:" // Left padding: End
+ "adds XZR, x10, x11\n"
+ "bne 11f\n"
+ "cbz x25, 9f\n"
+ "cmp x25, #0x1\n"
+ "sub x28, x28, x25\n"
+ "beq 8f\n"
+ "7:" // Unpadded: 2 priming loads
+ "add x19, x27, %x[ld_in_row]\n"
+ "ld1b { z14.s }, p5/Z, [x27]\n"
+ "sub z14.h, z14.h, z21.h\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ "ld1b { z18.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z18.h, z18.h, z21.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "ld1b { z15.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z15.h, z15.h, z21.h\n"
+ "ld1b { z17.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z17.h, z17.h, z21.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "ld1b { z16.s }, p5/Z, [x19]\n"
+ "sub z16.h, z16.h, z21.h\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc16835c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xc16635e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z6.h\n"
+ "8:" // Unpadded: 1 priming loads
+ "add x19, x27, %x[ld_in_row]\n"
+ "ld1b { z14.s }, p5/Z, [x27]\n"
+ "sub z14.h, z14.h, z21.h\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ "ld1b { z18.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z18.h, z18.h, z21.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "ld1b { z15.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z15.h, z15.h, z21.h\n"
+ "ld1b { z17.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z17.h, z17.h, z21.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "ld1b { z16.s }, p5/Z, [x19]\n"
+ "sub z16.h, z16.h, z21.h\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc16735c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z7.h\n"
+ ".inst 0xc16535e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z5.h\n"
+ "9:" // Unpadded: 0 priming loads
+ "add x20, x27, %x[ld_in_row]\n"
+ "ld1b { z14.s }, p5/Z, [x27]\n"
+ "sub z14.h, z14.h, z21.h\n"
+ "sub x28, x28, #0x2\n"
+ "ld1b { z18.s }, p5/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "sub z18.h, z18.h, z21.h\n"
+ "sub x26, x26, #0x1\n"
+ "ld1b { z15.s }, p5/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "sub z15.h, z15.h, z21.h\n"
+ "lsr x19, x28, #0x1\n"
+ "ld1b { z17.s }, p5/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "sub z17.h, z17.h, z21.h\n"
+ "cmp x19, x26\n"
+ "ld1b { z16.s }, p5/Z, [x20]\n"
+ "sub z16.h, z16.h, z21.h\n"
+ "csel x20, x19, x26, LT\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "mov z16.d, z16.d\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ "and x28, x28, #0x1\n"
+ "sub x26, x26, x20\n"
+ "cbz x20, 16f\n"
+ "10:" // Unpadded: Main loop
+ ".inst 0xc16435c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z4.h\n"
+ "add x19, x27, %x[ld_in_row]\n"
+ "subs x20, x20, #0x1\n"
+ ".inst 0xc16835c9 // sdot za.s[x9, 1], { z14.h-z15.h }, z8.h\n"
+ "ld1b { z14.s }, p5/Z, [x27]\n"
+ "sub z14.h, z14.h, z21.h\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ "ld1b { z18.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc16335e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z3.h\n"
+ "sub z18.h, z18.h, z21.h\n"
+ ".inst 0xc16635e9 // sdot za.s[x9, 1], { z15.h-z16.h }, z6.h\n"
+ "ld1b { z15.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z15.h, z15.h, z21.h\n"
+ "ld1b { z17.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z17.h, z17.h, z21.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "ld1b { z16.s }, p5/Z, [x19]\n"
+ "sub z16.h, z16.h, z21.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add x19, x27, %x[ld_in_row]\n"
+ ".inst 0xc0062818 // mova { z24.d-z25.d }, za.d[x9, #0]\n"
+ "add x9, x9, #0x1\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc16735c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z7.h\n"
+ ".inst 0xc1a1a418 // sqdmulh { z24.s-z25.s }, { z24.s-z25.s }, z1.s\n"
+ "ld1b { z14.s }, p5/Z, [x27]\n"
+ ".inst 0xc16535e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z5.h\n"
+ ".inst 0xc1a0a238 // srshl { z24.s-z25.s }, { z24.s-z25.s }, z0.s\n"
+ "ld1b { z18.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc1a2a318 // add { z24.s-z25.s }, { z24.s-z25.s }, z2.s\n"
+ "ld1b { z15.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z14.h, z14.h, z21.h\n"
+ "sub z18.h, z18.h, z21.h\n"
+ "ld1b { z17.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z15.h, z15.h, z21.h\n"
+ "sub z17.h, z17.h, z21.h\n"
+ "ld1b { z16.s }, p5/Z, [x19]\n"
+ "sub z16.h, z16.h, z21.h\n"
+ ".inst 0xc1b3c698 // sclamp { z24.s-z25.s }, z20.s, z19.s\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ "st1b { z24.s }, p5, [x24]\n"
+ "add x24, x24, x22\n"
+ ".inst 0xc0042982 // mova za.d[x9, #2], { z12.d-z13.d }\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "st1b { z25.s }, p5, [x23]\n"
+ "add x23, x23, x21\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "mov z16.d, z16.d\n"
+ "bgt 10b\n"
+ "b 16f\n"
+ "11:" // Padded
+ "cbz x25, 14f\n"
+ "cmp x25, #0x1\n"
+ "sub x28, x28, x25\n"
+ "beq 13f\n"
+ "12:" // Padded: 2 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25305504 // psel p4.s, p5.s/Z, p8.s[w12]\n"
+ "ld1b { z14.s }, p4/Z, [x27]\n"
+ "sub z14.h, p4/M, z14.h, z21.h\n"
+ "add x19, x27, %x[ld_in_row]\n"
+ ".inst 0x25705503 // psel p3.s, p5.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p3/Z, [x19]\n"
+ "sub z18.h, p3/M, z18.h, z21.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b05502 // psel p2.s, p5.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z15.s }, p2/Z, [x19]\n"
+ "sub z15.h, p2/M, z15.h, z21.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f05501 // psel p1.s, p5.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "sub z17.h, p1/M, z17.h, z21.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0x25305500 // psel p0.s, p5.s/Z, p8.s[w12]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "sub z16.h, p0/M, z16.h, z21.h\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc16835c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z8.h\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ ".inst 0xc16635e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z6.h\n"
+ "13:" // Padded: 1 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25305504 // psel p4.s, p5.s/Z, p8.s[w12]\n"
+ "ld1b { z14.s }, p4/Z, [x27]\n"
+ "sub z14.h, p4/M, z14.h, z21.h\n"
+ "add x19, x27, %x[ld_in_row]\n"
+ ".inst 0x25705503 // psel p3.s, p5.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p3/Z, [x19]\n"
+ "sub z18.h, p3/M, z18.h, z21.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b05502 // psel p2.s, p5.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z15.s }, p2/Z, [x19]\n"
+ "sub z15.h, p2/M, z15.h, z21.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f05501 // psel p1.s, p5.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "sub z17.h, p1/M, z17.h, z21.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0x25305500 // psel p0.s, p5.s/Z, p8.s[w12]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "sub z16.h, p0/M, z16.h, z21.h\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc16735c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z7.h\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ ".inst 0xc16535e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z5.h\n"
+ "14:" // Padded: 0 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25305504 // psel p4.s, p5.s/Z, p8.s[w12]\n"
+ "ld1b { z14.s }, p4/Z, [x27]\n"
+ "sub z14.h, p4/M, z14.h, z21.h\n"
+ "add x19, x27, %x[ld_in_row]\n"
+ ".inst 0x25705503 // psel p3.s, p5.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p3/Z, [x19]\n"
+ "sub z18.h, p3/M, z18.h, z21.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b05502 // psel p2.s, p5.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z15.s }, p2/Z, [x19]\n"
+ "sub z15.h, p2/M, z15.h, z21.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f05501 // psel p1.s, p5.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "sub z17.h, p1/M, z17.h, z21.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0x25305500 // psel p0.s, p5.s/Z, p8.s[w12]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "sub z16.h, p0/M, z16.h, z21.h\n"
+ "sub x28, x28, #0x2\n"
+ "sub x26, x26, #0x1\n"
+ "lsr x19, x28, #0x1\n"
+ "mov z16.d, z16.d\n"
+ "cmp x19, x26\n"
+ "csel x20, x19, x26, LT\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ "and x28, x28, #0x1\n"
+ "sub x26, x26, x20\n"
+ "cbz x20, 16f\n"
+ "15:" // Padded: Main loop
+ ".inst 0xc16435c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z4.h\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25305504 // psel p4.s, p5.s/Z, p8.s[w12]\n"
+ ".inst 0xc16835c9 // sdot za.s[x9, 1], { z14.h-z15.h }, z8.h\n"
+ "add x19, x27, %x[ld_in_row]\n"
+ ".inst 0x25705503 // psel p3.s, p5.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z14.s }, p4/Z, [x27]\n"
+ "ld1b { z18.s }, p3/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b05502 // psel p2.s, p5.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc16335e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z3.h\n"
+ ".inst 0xc16635e9 // sdot za.s[x9, 1], { z15.h-z16.h }, z6.h\n"
+ "ld1b { z15.s }, p2/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f05501 // psel p1.s, p5.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z14.h, p4/M, z14.h, z21.h\n"
+ ".inst 0x25305500 // psel p0.s, p5.s/Z, p8.s[w12]\n"
+ "sub z18.h, p3/M, z18.h, z21.h\n"
+ "sub z15.h, p2/M, z15.h, z21.h\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "sub z17.h, p1/M, z17.h, z21.h\n"
+ "sub z16.h, p0/M, z16.h, z21.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xc0062818 // mova { z24.d-z25.d }, za.d[x9, #0]\n"
+ "add x9, x9, #0x1\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc16735c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z7.h\n"
+ ".inst 0xc1a1a418 // sqdmulh { z24.s-z25.s }, { z24.s-z25.s }, z1.s\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25305504 // psel p4.s, p5.s/Z, p8.s[w12]\n"
+ "add x19, x27, %x[ld_in_row]\n"
+ "ld1b { z14.s }, p4/Z, [x27]\n"
+ ".inst 0xc16535e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z5.h\n"
+ ".inst 0x25705503 // psel p3.s, p5.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p3/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc1a0a238 // srshl { z24.s-z25.s }, { z24.s-z25.s }, z0.s\n"
+ ".inst 0x25b05502 // psel p2.s, p5.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z15.s }, p2/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc1a2a318 // add { z24.s-z25.s }, { z24.s-z25.s }, z2.s\n"
+ ".inst 0x25f05501 // psel p1.s, p5.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x4\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "sub z14.h, p4/M, z14.h, z21.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25305500 // psel p0.s, p5.s/Z, p8.s[w12]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "sub z18.h, p3/M, z18.h, z21.h\n"
+ "sub z15.h, p2/M, z15.h, z21.h\n"
+ "sub z17.h, p1/M, z17.h, z21.h\n"
+ "subs x20, x20, #0x1\n"
+ ".inst 0xc0042982 // mova za.d[x9, #2], { z12.d-z13.d }\n"
+ "sub z16.h, p0/M, z16.h, z21.h\n"
+ ".inst 0xc1b3c698 // sclamp { z24.s-z25.s }, z20.s, z19.s\n"
+ "st1b { z24.s }, p5, [x24]\n"
+ "add x24, x24, x22\n"
+ "st1b { z25.s }, p5, [x23]\n"
+ "add x23, x23, x21\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "mov z16.d, z16.d\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ "bgt 15b\n"
+ "16:" // Main loop tail
+ ".inst 0xc16435c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z4.h\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25305504 // psel p4.s, p5.s/Z, p8.s[w12]\n"
+ ".inst 0xc16335e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z3.h\n"
+ "add x19, x27, %x[ld_in_row]\n"
+ ".inst 0x25705503 // psel p3.s, p5.s/Z, p8.s[w12, #1]\n"
+ ".inst 0xc16835c9 // sdot za.s[x9, 1], { z14.h-z15.h }, z8.h\n"
+ "ld1b { z14.s }, p4/Z, [x27]\n"
+ ".inst 0x25b05502 // psel p2.s, p5.s/Z, p8.s[w12, #2]\n"
+ ".inst 0x25f05501 // psel p1.s, p5.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z18.s }, p3/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc16635e9 // sdot za.s[x9, 1], { z15.h-z16.h }, z6.h\n"
+ "mov x12, #0x4\n"
+ ".inst 0xc0062818 // mova { z24.d-z25.d }, za.d[x9, #0]\n"
+ "ld1b { z15.s }, p2/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc1a1a418 // sqdmulh { z24.s-z25.s }, { z24.s-z25.s }, z1.s\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25305500 // psel p0.s, p5.s/Z, p8.s[w12]\n"
+ "sub z14.h, p4/M, z14.h, z21.h\n"
+ "sub z18.h, p3/M, z18.h, z21.h\n"
+ "sub z15.h, p2/M, z15.h, z21.h\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add x9, x9, #0x1\n"
+ "sub z17.h, p1/M, z17.h, z21.h\n"
+ "sub z16.h, p0/M, z16.h, z21.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ ".inst 0xc1a0a238 // srshl { z24.s-z25.s }, { z24.s-z25.s }, z0.s\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xc1a2a318 // add { z24.s-z25.s }, { z24.s-z25.s }, z2.s\n"
+ ".inst 0xc16735c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z7.h\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc1b3c698 // sclamp { z24.s-z25.s }, z20.s, z19.s\n"
+ "st1b { z24.s }, p5, [x24]\n"
+ "add x24, x24, x22\n"
+ "st1b { z25.s }, p5, [x23]\n"
+ "add x23, x23, x21\n"
+ ".inst 0xc0042982 // mova za.d[x9, #2], { z12.d-z13.d }\n"
+ ".inst 0xc16535e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z5.h\n"
+ "cbz x28, 17f\n" // Skip remainder inputs
+ "mov x12, #0x0\n"
+ ".inst 0x25305504 // psel p4.s, p5.s/Z, p8.s[w12]\n"
+ "ld1b { z14.s }, p4/Z, [x27]\n"
+ "sub z14.h, p4/M, z14.h, z21.h\n"
+ "add x19, x27, %x[ld_in_row]\n"
+ ".inst 0x25705503 // psel p3.s, p5.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p3/Z, [x19]\n"
+ "sub z18.h, p3/M, z18.h, z21.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b05502 // psel p2.s, p5.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z15.s }, p2/Z, [x19]\n"
+ "sub z15.h, p2/M, z15.h, z21.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f05501 // psel p1.s, p5.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "sub z17.h, p1/M, z17.h, z21.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0x25305500 // psel p0.s, p5.s/Z, p8.s[w12]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "sub z16.h, p0/M, z16.h, z21.h\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc16435c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z4.h\n"
+ "sub x26, x26, #0x1\n"
+ ".inst 0xc16335e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z3.h\n"
+ ".inst 0xc0062818 // mova { z24.d-z25.d }, za.d[x9, #0]\n"
+ ".inst 0xc1a1a418 // sqdmulh { z24.s-z25.s }, { z24.s-z25.s }, z1.s\n"
+ ".inst 0xc1a0a238 // srshl { z24.s-z25.s }, { z24.s-z25.s }, z0.s\n"
+ ".inst 0xc16835c9 // sdot za.s[x9, 1], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xc1a2a318 // add { z24.s-z25.s }, { z24.s-z25.s }, z2.s\n"
+ ".inst 0xc16635e9 // sdot za.s[x9, 1], { z15.h-z16.h }, z6.h\n"
+ "add x9, x9, #0x1\n"
+ ".inst 0xc1b3c698 // sclamp { z24.s-z25.s }, z20.s, z19.s\n"
+ "st1b { z24.s }, p5, [x24]\n"
+ "add x24, x24, x22\n"
+ ".inst 0xc0042982 // mova za.d[x9, #2], { z12.d-z13.d }\n"
+ "st1b { z25.s }, p5, [x23]\n"
+ "add x23, x23, x21\n"
+ "17:" // Tail input: End
+ "cbz x26, 19f\n"
+ "18:" // Right padding loop
+ ".inst 0xc0062818 // mova { z24.d-z25.d }, za.d[x9, #0]\n"
+ ".inst 0xc1a1a418 // sqdmulh { z24.s-z25.s }, { z24.s-z25.s }, z1.s\n"
+ "add x9, x9, #0x1\n"
+ ".inst 0xc1a0a238 // srshl { z24.s-z25.s }, { z24.s-z25.s }, z0.s\n"
+ "subs x26, x26, #0x1\n"
+ ".inst 0xc0042982 // mova za.d[x9, #2], { z12.d-z13.d }\n"
+ ".inst 0xc1a2a318 // add { z24.s-z25.s }, { z24.s-z25.s }, z2.s\n"
+ ".inst 0xc1b3c698 // sclamp { z24.s-z25.s }, z20.s, z19.s\n"
+ "st1b { z24.s }, p5, [x24]\n"
+ "add x24, x24, x22\n"
+ "st1b { z25.s }, p5, [x23]\n"
+ "add x23, x23, x21\n"
+ "bgt 18b\n"
+ "19:" // End
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [ld_in_col] "r" (ld_in_col), [ld_in_row] "r" (ld_in_row), [offsetof_Args_inptr] "I" (offsetof(Args, inptr)), [offsetof_Args_input_cols] "I" (offsetof(Args, input_cols)), [offsetof_Args_ld_out_cols] "I" (offsetof(Args, ld_out_cols)), [offsetof_Args_n] "I" (offsetof(Args, n)), [offsetof_Args_n_channels] "I" (offsetof(Args, n_channels)), [offsetof_Args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_Args_output_cols] "I" (offsetof(Args, output_cols)), [offsetof_Args_pad_bottom] "I" (offsetof(Args, pad_bottom)), [offsetof_Args_pad_left] "I" (offsetof(Args, pad_left)), [offsetof_Args_pad_top] "I" (offsetof(Args, pad_top)), [offsetof_Args_weights] "I" (offsetof(Args, weights)), [offsetof_Requantize32_a_offset] "I" (offsetof(arm_gemm::Requantize32, a_offset)), [offsetof_Requantize32_b_offset] "I" (offsetof(arm_gemm::Requantize32, b_offset)), [offsetof_Requantize32_bias] "I" (offsetof(arm_gemm::Requantize32, bias)), [offsetof_Requantize32_c_offset] "I" (offsetof(arm_gemm::Requantize32, c_offset)), [offsetof_Requantize32_maxval] "I" (offsetof(arm_gemm::Requantize32, maxval)), [offsetof_Requantize32_minval] "I" (offsetof(arm_gemm::Requantize32, minval)), [offsetof_Requantize32_per_channel_muls] "I" (offsetof(arm_gemm::Requantize32, per_channel_muls)), [offsetof_Requantize32_per_channel_right_shifts] "I" (offsetof(arm_gemm::Requantize32, per_channel_right_shifts)), [offsetof_Requantize32_per_layer_mul] "I" (offsetof(arm_gemm::Requantize32, per_layer_mul)), [offsetof_Requantize32_per_layer_right_shift] "I" (offsetof(arm_gemm::Requantize32, per_layer_right_shift)), [qp] "r" (&qp)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x10", "x11", "x12", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8q_planar_3x3_s2_4rows_dot_za.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8q_planar_3x3_s2_4rows_dot_za.hpp
new file mode 100644
index 0000000..b878914
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8q_planar_3x3_s2_4rows_dot_za.hpp
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_u8q_planar_3x3_s2_4rows_dot_za_impl(
+ const uint8_t *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const uint8_t *weights,
+ uint8_t **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ const arm_gemm::Requantize32 &qp
+);
+
+class sme2_u8q_planar_3x3_s2_4rows_dot_za : public PlanarStrategy<uint8_t, uint8_t>
+{
+ using Parent = PlanarStrategy<uint8_t, uint8_t>;
+
+ public:
+ using return_type = uint8_t;
+ constexpr static auto output_rows = 4u;
+ constexpr static auto kernel_rows = 3u, kernel_cols = 3u;
+ constexpr static auto stride_rows = 2u, stride_cols = 2u;
+ constexpr static auto vl_type = arm_gemm::VLType::SME;
+
+ sme2_u8q_planar_3x3_s2_4rows_dot_za(const CPUInfo *)
+ : Parent(kernel_rows, kernel_cols, stride_rows, stride_cols, output_rows, vl_type)
+ {
+ }
+
+ typename Parent::KernelType get_kernel(void) const override
+ {
+ return sme2_u8q_planar_3x3_s2_4rows_dot_za_impl;
+ }
+};
+
+} // namespace depthwise
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8q_planar_3x3_s2_4rows_dot_za/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8q_planar_3x3_s2_4rows_dot_za/generic.cpp
new file mode 100644
index 0000000..bdf1ba6
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8q_planar_3x3_s2_4rows_dot_za/generic.cpp
@@ -0,0 +1,881 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <algorithm>
+#include <cstddef>
+#include "arm_gemm.hpp"
+
+using arm_gemm::Requantize32;
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_u8q_planar_3x3_s2_4rows_dot_za_impl(
+ const uint8_t *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const uint8_t *weights,
+ uint8_t **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ const arm_gemm::Requantize32 &qp
+)
+{
+ struct Args
+ {
+ const uint8_t *inptr;
+ size_t ld_in_vl;
+ long unsigned int pad_top, pad_bottom, pad_left;
+ const uint8_t *weights;
+ long unsigned int input_cols, output_cols;
+ uint8_t **outptrs;
+ const size_t *ld_out_cols;
+ const size_t *ld_out_vls;
+ long unsigned int current_channel, n_channels;
+ };
+
+ Args args = { inptr, ld_in_vl, pad_top, 9u - std::min(9u, pad_top + valid_input_rows), pad_left, weights, valid_input_cols, output_cols, outptrs, outlds, outvllds, start_channel, valid_channels };
+
+ __asm__ __volatile__(
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "ldr x7, [%x[args], %[offsetof_Args_pad_bottom]]\n"
+ "ptrue p2.b\n"
+ "mov x19, #0x9\n"
+ "ldr x8, [%x[args], %[offsetof_Args_pad_top]]\n"
+ "ld1rh { z5.h }, p2/Z, [%x[qp], %[offsetof_Requantize32_a_offset]]\n"
+ "sub x19, x19, x7\n"
+ ".inst 0x25207812 // ptrue pn10.b\n"
+ "ldr x17, [%x[args], %[offsetof_Args_n_channels]]\n"
+ "whilelt p1.s, XZR, x17\n"
+ "whilelt p9.s, XZR, x19\n"
+ "ld1rw { z4.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_c_offset]]\n"
+ "whilelt p8.s, XZR, x8\n"
+ "addvl SP, SP, #-6\n"
+ "ldr x16, [%x[args], %[offsetof_Args_current_channel]]\n"
+ "neg z5.h, p2/M, z5.h\n"
+ "eor p8.b, p2/Z, p8.b, p9.b\n"
+ "ld1rw { z8.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_per_layer_mul]]\n"
+ "ld1rw { z7.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_per_layer_right_shift]]\n"
+ "ld1rw { z27.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_minval]]\n"
+ "ld1rw { z23.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_maxval]]\n"
+ "1:" // Channel loop
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_bias]]\n"
+ "mov z0.s, #0x0\n"
+ "cbz x19, 2f\n"
+ "ld1w { z0.s }, p1/Z, [x19, x16, LSL #2]\n"
+ "2:" // Load bias: Done
+ "ldr x21, [%x[args], %[offsetof_Args_weights]]\n"
+ "mov x19, x21\n"
+ "ld1b { z24.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "ld1rh { z13.h }, p2/Z, [%x[qp], %[offsetof_Requantize32_b_offset]]\n"
+ "sub z24.h, z24.h, z13.h\n"
+ "incw x21\n"
+ "mov z17.h, #0x0\n"
+ "ld1b { z25.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "sub z25.h, z25.h, z13.h\n"
+ "trn1 z10.h, z24.h, z25.h\n"
+ "ld1b { z16.s }, p2/Z, [x19]\n"
+ "sub z16.h, z16.h, z13.h\n"
+ "mov x19, x21\n"
+ "trn1 z11.h, z16.h, z17.h\n"
+ "ld1b { z24.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "sub z24.h, z24.h, z13.h\n"
+ "addvl x20, SP, #6\n"
+ "ld1b { z25.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "sub z25.h, z25.h, z13.h\n"
+ "incw x21\n"
+ "ld1b { z16.s }, p2/Z, [x19]\n"
+ "sub z16.h, z16.h, z13.h\n"
+ "addvl x20, x20, #-2\n"
+ "mov x19, x21\n"
+ "st1h { z10.h }, p2, [x20]\n"
+ "trn1 z10.h, z24.h, z25.h\n"
+ "ld1b { z24.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "ld1b { z25.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "st1h { z11.h }, p2, [x20, #1, MUL VL]\n"
+ "trn1 z11.h, z16.h, z17.h\n"
+ "ld1b { z16.s }, p2/Z, [x19]\n"
+ "sub z24.h, z24.h, z13.h\n"
+ "sub z25.h, z25.h, z13.h\n"
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_muls]]\n"
+ "sub z16.h, z16.h, z13.h\n"
+ "addvl x20, x20, #-2\n"
+ "st1h { z10.h }, p2, [x20]\n"
+ "mov z1.d, z0.d\n"
+ "st1h { z11.h }, p2, [x20, #1, MUL VL]\n"
+ "addvl x20, x20, #-2\n"
+ "mov z2.d, z0.d\n"
+ "mov z3.d, z0.d\n"
+ "trn1 z10.h, z24.h, z25.h\n"
+ "st1h { z10.h }, p2, [x20]\n"
+ "trn1 z11.h, z16.h, z17.h\n"
+ "st1h { z11.h }, p2, [x20, #1, MUL VL]\n"
+ "cbz x19, 3f\n"
+ "ld1w { z8.s }, p1/Z, [x19, x16, LSL #2]\n"
+ "3:" // Load mul: End
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_right_shifts]]\n"
+ "cbz x19, 4f\n"
+ "ld1w { z7.s }, p1/Z, [x19, x16, LSL #2]\n"
+ "4:" // Load right_shift: End
+ "ldr x15, [%x[args], %[offsetof_Args_input_cols]]\n"
+ "sub x19, x15, #0x1\n"
+ "orr x22, x19, %x[ld_in_col], LSL #16\n"
+ "ldr x14, [%x[args], %[offsetof_Args_inptr]]\n"
+ "orr x22, x17, x22, LSL #22\n"
+ "mov x21, #0x9\n"
+ "add x20, x8, x7\n"
+ "lsl x19, %x[ld_in_row], #0x0\n"
+ "ldr x13, [%x[args], %[offsetof_Args_output_cols]]\n"
+ "mov x11, #0x0\n"
+ "lsl x22, x22, #0x0\n"
+ "sub x21, x21, x20\n"
+ "madd x19, x19, x8, x14\n"
+ "5:" // Issue prefetches
+ "subs x21, x21, #0x1\n"
+ ".inst 0xf8b64a7c // rprfm pldstrm, x22, [x19]\n"
+ "add x19, x19, %x[ld_in_col]\n"
+ "bgt 5b\n"
+ "ldr x24, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "lsl x19, %x[ld_in_row], #0x0\n"
+ "msub x14, x8, x19, x14\n"
+ ".inst 0xc0046c00 // mova za.d[x11, #0], { z0.d-z3.d }\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_out_cols]]\n"
+ ".inst 0xc0046c01 // mova za.d[x11, #1], { z0.d-z3.d }\n"
+ "mov x21, #0x2\n"
+ "ldp x10, x9, [x24], #0x10\n"
+ ".inst 0xc0046c02 // mova za.d[x11, #2], { z0.d-z3.d }\n"
+ "ldp x28, x27, [x19], #0x10\n"
+ "ldr x20, [%x[args], %[offsetof_Args_pad_left]]\n"
+ "ldp x26, x25, [x24], #0x10\n"
+ "ldp x24, x23, [x19], #0x10\n"
+ "cbz x20, 7f\n"
+ "cmp x20, x21\n"
+ "csel x19, x20, x21, LT\n"
+ "sub x20, x20, x19\n"
+ "sub x21, x21, x19\n"
+ "cbz x20, 7f\n"
+ ".inst 0xc0066c1c // mova { z28.d-z31.d }, za.d[x11, #0]\n"
+ ".inst 0xc1a8ac1c // sqdmulh { z28.s-z31.s }, { z28.s-z31.s }, z8.s\n"
+ "and x21, x20, #0x1\n"
+ ".inst 0xc1a7aa3c // srshl { z28.s-z31.s }, { z28.s-z31.s }, z7.s\n"
+ "add x20, x20, #0x1\n"
+ "lsr x20, x20, #0x1\n"
+ ".inst 0xc1a4ab1c // add { z28.s-z31.s }, { z28.s-z31.s }, z4.s\n"
+ "sub x13, x13, x20\n"
+ ".inst 0xc1b7cf7c // sclamp { z28.s-z31.s }, z27.s, z23.s\n"
+ "6:" // Left padding
+ "subs x20, x20, #0x1\n"
+ "st1b { z28.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ "st1b { z29.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "st1b { z30.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ "st1b { z31.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ "bgt 6b\n"
+ "7:" // Left padding: End
+ "adds XZR, x8, x7\n"
+ "bne 12f\n"
+ "cbz x21, 10f\n"
+ "cmp x21, #0x1\n"
+ "sub x15, x15, x21\n"
+ "beq 9f\n"
+ "8:" // Unpadded: 2 priming loads
+ "add x20, x14, %x[ld_in_row]\n"
+ "ld1b { z12.s }, p1/Z, [x14]\n"
+ "addvl x19, SP, #4\n"
+ "ld1b { z20.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "add z12.h, z12.h, z5.h\n"
+ "ld1b { z13.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "ld1b { z19.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z13.h, z13.h, z5.h\n"
+ "ld1b { z14.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1b { z18.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z5.h\n"
+ "ld1b { z15.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add z15.h, z15.h, z5.h\n"
+ "ld1b { z16.s }, p1/Z, [x20]\n"
+ "mov z16.d, z16.d\n"
+ "add z16.h, z16.h, z5.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ "9:" // Unpadded: 1 priming loads
+ "add x20, x14, %x[ld_in_row]\n"
+ "ld1b { z12.s }, p1/Z, [x14]\n"
+ "addvl x19, SP, #2\n"
+ "ld1b { z20.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "add z12.h, z12.h, z5.h\n"
+ "ld1b { z13.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "ld1b { z19.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z13.h, z13.h, z5.h\n"
+ "ld1b { z14.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1b { z18.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z5.h\n"
+ "ld1b { z15.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add z15.h, z15.h, z5.h\n"
+ "ld1b { z16.s }, p1/Z, [x20]\n"
+ "mov z16.d, z16.d\n"
+ "add z16.h, z16.h, z5.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ "10:" // Unpadded: 0 priming loads
+ "cmp x15, #0x2\n"
+ ".inst 0xa0402bea // ld1h { z10.h-z11.h }, pn10.b/Z, [SP]\n"
+ "blt 18f\n"
+ "add x20, x14, %x[ld_in_row]\n"
+ "ld1b { z12.s }, p1/Z, [x14]\n"
+ "sub x15, x15, #0x2\n"
+ "ld1b { z20.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "sub x13, x13, #0x1\n"
+ "ld1b { z13.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "lsr x19, x15, #0x1\n"
+ "add z12.h, z12.h, z5.h\n"
+ "ld1b { z19.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "cmp x19, x13\n"
+ "ld1b { z14.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "csel x22, x19, x13, LT\n"
+ "add z13.h, z13.h, z5.h\n"
+ "ld1b { z18.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z5.h\n"
+ "ld1b { z15.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "ld1b { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add z15.h, z15.h, z5.h\n"
+ "ld1b { z16.s }, p1/Z, [x20]\n"
+ "mov z16.d, z16.d\n"
+ "add z16.h, z16.h, z5.h\n"
+ "and x15, x15, #0x1\n"
+ "sub x13, x13, x22\n"
+ "cbz x22, 17f\n"
+ "11:" // Unpadded: Main loop
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ "addvl x19, SP, #4\n"
+ "add x21, x14, %x[ld_in_row]\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ "addvl x20, SP, #2\n"
+ "subs x22, x22, #0x1\n"
+ ".inst 0xc17a7589 // sdot za.s[x11, 1], { z12.h-z15.h }, z10.h\n"
+ "ld1b { z12.s }, p1/Z, [x14]\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ "ld1b { z20.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0xc17b75a9 // sdot za.s[x11, 1], { z13.h-z16.h }, z11.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "ld1b { z13.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "add z12.h, z12.h, z5.h\n"
+ ".inst 0xc0066c1c // mova { z28.d-z31.d }, za.d[x11, #0]\n"
+ "ld1b { z19.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z13.h, z13.h, z5.h\n"
+ "ld1b { z14.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "add x11, x11, #0x1\n"
+ ".inst 0xc0046c02 // mova za.d[x11, #2], { z0.d-z3.d }\n"
+ "ld1b { z18.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z5.h\n"
+ "ld1b { z15.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0xc1a8ac1c // sqdmulh { z28.s-z31.s }, { z28.s-z31.s }, z8.s\n"
+ "ld1b { z17.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add z15.h, z15.h, z5.h\n"
+ "ld1b { z16.s }, p1/Z, [x21]\n"
+ "mov z16.d, z16.d\n"
+ "add z16.h, z16.h, z5.h\n"
+ ".inst 0xa0402a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc1a7aa3c // srshl { z28.s-z31.s }, { z28.s-z31.s }, z7.s\n"
+ "ld1b { z12.s }, p1/Z, [x14]\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ ".inst 0xc1a4ab1c // add { z28.s-z31.s }, { z28.s-z31.s }, z4.s\n"
+ "ld1b { z20.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ ".inst 0xc1b7cf7c // sclamp { z28.s-z31.s }, z27.s, z23.s\n"
+ "ld1b { z13.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "st1b { z28.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ "ld1b { z19.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "st1b { z29.s }, p1, [x9]\n"
+ "ld1b { z14.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "add x9, x9, x27\n"
+ "st1b { z30.s }, p1, [x26]\n"
+ "ld1b { z18.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add x26, x26, x24\n"
+ "ld1b { z15.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "st1b { z31.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add z12.h, z12.h, z5.h\n"
+ "ld1b { z16.s }, p1/Z, [x19]\n"
+ "mov z16.d, z16.d\n"
+ "add z13.h, z13.h, z5.h\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ ".inst 0xa0402bea // ld1h { z10.h-z11.h }, pn10.b/Z, [SP]\n"
+ "add z14.h, z14.h, z5.h\n"
+ "add z15.h, z15.h, z5.h\n"
+ "add z16.h, z16.h, z5.h\n"
+ "bgt 11b\n"
+ "b 17f\n"
+ "12:" // Padded
+ "cbz x21, 15f\n"
+ "cmp x21, #0x1\n"
+ "sub x15, x15, x21\n"
+ "beq 14f\n"
+ "13:" // Padded: 2 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z12.s }, p0/Z, [x14]\n"
+ "add z12.h, p0/M, z12.h, z5.h\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z5.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z15.s }, p0/Z, [x19]\n"
+ "add z15.h, p0/M, z15.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z17.h, p0/M, z17.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z5.h\n"
+ "addvl x19, SP, #4\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ "14:" // Padded: 1 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z12.s }, p0/Z, [x14]\n"
+ "add z12.h, p0/M, z12.h, z5.h\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z5.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z15.s }, p0/Z, [x19]\n"
+ "add z15.h, p0/M, z15.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z17.h, p0/M, z17.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z5.h\n"
+ "addvl x19, SP, #2\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ "15:" // Padded: 0 priming loads
+ "cmp x15, #0x2\n"
+ ".inst 0xa0402bea // ld1h { z10.h-z11.h }, pn10.b/Z, [SP]\n"
+ "blt 18f\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z12.s }, p0/Z, [x14]\n"
+ "add z12.h, p0/M, z12.h, z5.h\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z5.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z15.s }, p0/Z, [x19]\n"
+ "add z15.h, p0/M, z15.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z17.h, p0/M, z17.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z5.h\n"
+ "sub x15, x15, #0x2\n"
+ "sub x13, x13, #0x1\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "lsr x19, x15, #0x1\n"
+ "cmp x19, x13\n"
+ "mov z16.d, z16.d\n"
+ "csel x21, x19, x13, LT\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "and x15, x15, #0x1\n"
+ "sub x13, x13, x21\n"
+ "cbz x21, 17f\n"
+ "16:" // Padded: Main loop
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ "addvl x19, SP, #4\n"
+ "mov x12, #0x0\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "add x20, x14, %x[ld_in_row]\n"
+ ".inst 0xc17a7589 // sdot za.s[x11, 1], { z12.h-z15.h }, z10.h\n"
+ "ld1b { z12.s }, p0/Z, [x14]\n"
+ "add z12.h, p0/M, z12.h, z5.h\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z20.s }, p0/Z, [x20]\n"
+ "add z20.h, p0/M, z20.h, z5.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc17b75a9 // sdot za.s[x11, 1], { z13.h-z16.h }, z11.h\n"
+ "ld1b { z13.s }, p0/Z, [x20]\n"
+ "add z13.h, p0/M, z13.h, z5.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z19.s }, p0/Z, [x20]\n"
+ "mov x12, #0x4\n"
+ "add z19.h, p0/M, z19.h, z5.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z14.s }, p0/Z, [x20]\n"
+ "add z14.h, p0/M, z14.h, z5.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x20]\n"
+ "add z18.h, p0/M, z18.h, z5.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z15.s }, p0/Z, [x20]\n"
+ "add z15.h, p0/M, z15.h, z5.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z17.s }, p0/Z, [x20]\n"
+ "add z17.h, p0/M, z17.h, z5.h\n"
+ "mov x12, #0x8\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "addvl x19, SP, #2\n"
+ "ld1b { z16.s }, p0/Z, [x20]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ "mov x12, #0x0\n"
+ ".inst 0xc0066c1c // mova { z28.d-z31.d }, za.d[x11, #0]\n"
+ "add x11, x11, #0x1\n"
+ "add z16.h, p0/M, z16.h, z5.h\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z12.s }, p0/Z, [x14]\n"
+ "add z12.h, p0/M, z12.h, z5.h\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "mov z16.d, z16.d\n"
+ "ld1b { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ "ld1b { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z19.s }, p0/Z, [x19]\n"
+ "mov x12, #0x4\n"
+ "add z19.h, p0/M, z19.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc0046c02 // mova za.d[x11, #2], { z0.d-z3.d }\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z15.s }, p0/Z, [x19]\n"
+ ".inst 0xc1a8ac1c // sqdmulh { z28.s-z31.s }, { z28.s-z31.s }, z8.s\n"
+ "add z15.h, p0/M, z15.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ ".inst 0xc1a7aa3c // srshl { z28.s-z31.s }, { z28.s-z31.s }, z7.s\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "add z17.h, p0/M, z17.h, z5.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z5.h\n"
+ ".inst 0xc1a4ab1c // add { z28.s-z31.s }, { z28.s-z31.s }, z4.s\n"
+ "subs x21, x21, #0x1\n"
+ ".inst 0xa0402bea // ld1h { z10.h-z11.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xc1b7cf7c // sclamp { z28.s-z31.s }, z27.s, z23.s\n"
+ "st1b { z28.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "st1b { z29.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "st1b { z30.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "mov z16.d, z16.d\n"
+ "st1b { z31.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "bgt 16b\n"
+ "17:" // Main loop tail
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ "addvl x19, SP, #4\n"
+ "mov x12, #0x0\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ ".inst 0xc17a7589 // sdot za.s[x11, 1], { z12.h-z15.h }, z10.h\n"
+ "ld1b { z12.s }, p0/Z, [x14]\n"
+ "add z12.h, p0/M, z12.h, z5.h\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc17b75a9 // sdot za.s[x11, 1], { z13.h-z16.h }, z11.h\n"
+ "ld1b { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z19.s }, p0/Z, [x19]\n"
+ "mov x12, #0x4\n"
+ "add z19.h, p0/M, z19.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z15.s }, p0/Z, [x19]\n"
+ ".inst 0xc0066c1c // mova { z28.d-z31.d }, za.d[x11, #0]\n"
+ "add z15.h, p0/M, z15.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ ".inst 0xc1a8ac1c // sqdmulh { z28.s-z31.s }, { z28.s-z31.s }, z8.s\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "add z17.h, p0/M, z17.h, z5.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "addvl x19, SP, #2\n"
+ ".inst 0xc1a7aa3c // srshl { z28.s-z31.s }, { z28.s-z31.s }, z7.s\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "add x11, x11, #0x1\n"
+ "add z16.h, p0/M, z16.h, z5.h\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1a4ab1c // add { z28.s-z31.s }, { z28.s-z31.s }, z4.s\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc1b7cf7c // sclamp { z28.s-z31.s }, z27.s, z23.s\n"
+ "st1b { z28.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ ".inst 0xc0046c02 // mova za.d[x11, #2], { z0.d-z3.d }\n"
+ "st1b { z29.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ ".inst 0xa0402bea // ld1h { z10.h-z11.h }, pn10.b/Z, [SP]\n"
+ "st1b { z30.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ "st1b { z31.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ "18:" // Main loop skip tail
+ "cbz x15, 19f\n" // Skip remainder inputs
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z12.s }, p0/Z, [x14]\n"
+ "add z12.h, p0/M, z12.h, z5.h\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z5.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z15.s }, p0/Z, [x19]\n"
+ "add z15.h, p0/M, z15.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z17.h, p0/M, z17.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z5.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "mov z16.d, z16.d\n"
+ "addvl x19, SP, #4\n"
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ "sub x13, x13, #0x1\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc0066c1c // mova { z28.d-z31.d }, za.d[x11, #0]\n"
+ ".inst 0xc1a8ac1c // sqdmulh { z28.s-z31.s }, { z28.s-z31.s }, z8.s\n"
+ ".inst 0xc1a7aa3c // srshl { z28.s-z31.s }, { z28.s-z31.s }, z7.s\n"
+ ".inst 0xc17a7589 // sdot za.s[x11, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc1a4ab1c // add { z28.s-z31.s }, { z28.s-z31.s }, z4.s\n"
+ ".inst 0xc17b75a9 // sdot za.s[x11, 1], { z13.h-z16.h }, z11.h\n"
+ "add x11, x11, #0x1\n"
+ ".inst 0xc1b7cf7c // sclamp { z28.s-z31.s }, z27.s, z23.s\n"
+ "st1b { z28.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ ".inst 0xc0046c02 // mova za.d[x11, #2], { z0.d-z3.d }\n"
+ "st1b { z29.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "st1b { z30.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ "st1b { z31.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ "19:" // Tail input: End
+ "cbz x13, 21f\n"
+ "20:" // Right padding loop
+ ".inst 0xc0066c1c // mova { z28.d-z31.d }, za.d[x11, #0]\n"
+ ".inst 0xc1a8ac1c // sqdmulh { z28.s-z31.s }, { z28.s-z31.s }, z8.s\n"
+ "add x11, x11, #0x1\n"
+ ".inst 0xc1a7aa3c // srshl { z28.s-z31.s }, { z28.s-z31.s }, z7.s\n"
+ "subs x13, x13, #0x1\n"
+ ".inst 0xc0046c02 // mova za.d[x11, #2], { z0.d-z3.d }\n"
+ ".inst 0xc1a4ab1c // add { z28.s-z31.s }, { z28.s-z31.s }, z4.s\n"
+ ".inst 0xc1b7cf7c // sclamp { z28.s-z31.s }, z27.s, z23.s\n"
+ "st1b { z28.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ "st1b { z29.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "st1b { z30.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ "st1b { z31.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ "bgt 20b\n"
+ "21:" // End
+ "ldr x21, [%x[args], %[offsetof_Args_weights]]\n"
+ "incw x21, ALL, MUL #9\n"
+ "str x21, [%x[args], %[offsetof_Args_weights]]\n"
+ "incw x16\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_in_vl]]\n"
+ "whilelt p1.s, x16, x17\n"
+ "ldr x14, [%x[args], %[offsetof_Args_inptr]]\n"
+ "add x14, x14, x19\n"
+ "str x14, [%x[args], %[offsetof_Args_inptr]]\n"
+ "ldr x24, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "ldr x23, [%x[args], %[offsetof_Args_ld_out_vls]]\n"
+ "ldp x22, x21, [x24, #0x0]\n"
+ "ldp x20, x19, [x23, #0x0]\n"
+ "add x22, x22, x20\n"
+ "add x21, x21, x19\n"
+ "stp x22, x21, [x24, #0x0]\n"
+ "ldp x22, x21, [x24, #0x10]\n"
+ "ldp x20, x19, [x23, #0x10]\n"
+ "add x22, x22, x20\n"
+ "add x21, x21, x19\n"
+ "stp x22, x21, [x24, #0x10]\n"
+ "b.any 1b\n"
+ "addvl SP, SP, #6\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [ld_in_col] "r" (ld_in_col), [ld_in_row] "r" (ld_in_row), [offsetof_Args_current_channel] "I" (offsetof(Args, current_channel)), [offsetof_Args_inptr] "I" (offsetof(Args, inptr)), [offsetof_Args_input_cols] "I" (offsetof(Args, input_cols)), [offsetof_Args_ld_in_vl] "I" (offsetof(Args, ld_in_vl)), [offsetof_Args_ld_out_cols] "I" (offsetof(Args, ld_out_cols)), [offsetof_Args_ld_out_vls] "I" (offsetof(Args, ld_out_vls)), [offsetof_Args_n_channels] "I" (offsetof(Args, n_channels)), [offsetof_Args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_Args_output_cols] "I" (offsetof(Args, output_cols)), [offsetof_Args_pad_bottom] "I" (offsetof(Args, pad_bottom)), [offsetof_Args_pad_left] "I" (offsetof(Args, pad_left)), [offsetof_Args_pad_top] "I" (offsetof(Args, pad_top)), [offsetof_Args_weights] "I" (offsetof(Args, weights)), [offsetof_Requantize32_a_offset] "I" (offsetof(arm_gemm::Requantize32, a_offset)), [offsetof_Requantize32_b_offset] "I" (offsetof(arm_gemm::Requantize32, b_offset)), [offsetof_Requantize32_bias] "I" (offsetof(arm_gemm::Requantize32, bias)), [offsetof_Requantize32_c_offset] "I" (offsetof(arm_gemm::Requantize32, c_offset)), [offsetof_Requantize32_maxval] "I" (offsetof(arm_gemm::Requantize32, maxval)), [offsetof_Requantize32_minval] "I" (offsetof(arm_gemm::Requantize32, minval)), [offsetof_Requantize32_per_channel_muls] "I" (offsetof(arm_gemm::Requantize32, per_channel_muls)), [offsetof_Requantize32_per_channel_right_shifts] "I" (offsetof(arm_gemm::Requantize32, per_channel_right_shifts)), [offsetof_Requantize32_per_layer_mul] "I" (offsetof(arm_gemm::Requantize32, per_layer_mul)), [offsetof_Requantize32_per_layer_right_shift] "I" (offsetof(arm_gemm::Requantize32, per_layer_right_shift)), [qp] "r" (&qp)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8q_planar_5x5_s1_4rows_dot_za.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8q_planar_5x5_s1_4rows_dot_za.hpp
new file mode 100644
index 0000000..db0750e
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8q_planar_5x5_s1_4rows_dot_za.hpp
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_u8q_planar_5x5_s1_4rows_dot_za_impl(
+ const uint8_t *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const uint8_t *weights,
+ uint8_t **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ const arm_gemm::Requantize32 &qp
+);
+
+class sme2_u8q_planar_5x5_s1_4rows_dot_za : public PlanarStrategy<uint8_t, uint8_t>
+{
+ using Parent = PlanarStrategy<uint8_t, uint8_t>;
+
+ public:
+ using return_type = uint8_t;
+ constexpr static auto output_rows = 4u;
+ constexpr static auto kernel_rows = 5u, kernel_cols = 5u;
+ constexpr static auto stride_rows = 1u, stride_cols = 1u;
+ constexpr static auto vl_type = arm_gemm::VLType::SME;
+
+ sme2_u8q_planar_5x5_s1_4rows_dot_za(const CPUInfo *)
+ : Parent(kernel_rows, kernel_cols, stride_rows, stride_cols, output_rows, vl_type)
+ {
+ }
+
+ typename Parent::KernelType get_kernel(void) const override
+ {
+ return sme2_u8q_planar_5x5_s1_4rows_dot_za_impl;
+ }
+};
+
+} // namespace depthwise
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8q_planar_5x5_s1_4rows_dot_za/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8q_planar_5x5_s1_4rows_dot_za/generic.cpp
new file mode 100644
index 0000000..4678e82
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8q_planar_5x5_s1_4rows_dot_za/generic.cpp
@@ -0,0 +1,1204 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <algorithm>
+#include <cstddef>
+#include "arm_gemm.hpp"
+
+using arm_gemm::Requantize32;
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_u8q_planar_5x5_s1_4rows_dot_za_impl(
+ const uint8_t *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const uint8_t *weights,
+ uint8_t **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ const arm_gemm::Requantize32 &qp
+)
+{
+ struct Args
+ {
+ const uint8_t *inptr;
+ size_t ld_in_vl;
+ long unsigned int pad_top, pad_bottom, pad_left;
+ const uint8_t *weights;
+ long unsigned int input_cols, output_cols;
+ uint8_t **outptrs;
+ const size_t *ld_out_cols;
+ const size_t *ld_out_vls;
+ long unsigned int current_channel, n_channels;
+ };
+
+ Args args = { inptr, ld_in_vl, pad_top, 8u - std::min(8u, pad_top + valid_input_rows), pad_left, weights, valid_input_cols, output_cols, outptrs, outlds, outvllds, start_channel, valid_channels };
+
+ __asm__ __volatile__(
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "ldr x5, [%x[args], %[offsetof_Args_pad_bottom]]\n"
+ "ptrue p2.b\n"
+ "mov x19, #0x8\n"
+ "ldr x6, [%x[args], %[offsetof_Args_pad_top]]\n"
+ "ld1rh { z25.h }, p2/Z, [%x[qp], %[offsetof_Requantize32_a_offset]]\n"
+ "sub x19, x19, x5\n"
+ ".inst 0x25207812 // ptrue pn10.b\n"
+ "ldr x7, [%x[args], %[offsetof_Args_n_channels]]\n"
+ "whilelt p1.s, XZR, x7\n"
+ "whilelt p9.s, XZR, x19\n"
+ "ld1rw { z9.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_c_offset]]\n"
+ "whilelt p8.s, XZR, x6\n"
+ "addvl SP, SP, #-30\n"
+ "ldr x17, [%x[args], %[offsetof_Args_current_channel]]\n"
+ "neg z25.h, p2/M, z25.h\n"
+ "eor p8.b, p2/Z, p8.b, p9.b\n"
+ "ld1rw { z3.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_per_layer_mul]]\n"
+ "ld1rw { z1.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_per_layer_right_shift]]\n"
+ "ld1rw { z24.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_minval]]\n"
+ "ld1rw { z31.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_maxval]]\n"
+ "1:" // Channel loop
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_bias]]\n"
+ "mov z6.s, #0x0\n"
+ "cbz x19, 2f\n"
+ "ld1w { z6.s }, p1/Z, [x19, x17, LSL #2]\n"
+ "2:" // Load bias: Done
+ "ldr x23, [%x[args], %[offsetof_Args_weights]]\n"
+ "mov x21, x23\n"
+ "ld1b { z18.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "ld1rh { z12.h }, p2/Z, [%x[qp], %[offsetof_Requantize32_b_offset]]\n"
+ "mov z2.h, #0x0\n"
+ "sub z18.h, z18.h, z12.h\n"
+ "incw x23\n"
+ "ld1b { z17.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "sub z17.h, z17.h, z12.h\n"
+ "trn1 z0.h, z2.h, z18.h\n"
+ "ld1b { z21.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "sub z21.h, z21.h, z12.h\n"
+ "trn1 z8.h, z18.h, z17.h\n"
+ "ld1b { z16.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "sub z16.h, z16.h, z12.h\n"
+ "trn1 z4.h, z17.h, z21.h\n"
+ "ld1b { z15.s }, p2/Z, [x21]\n"
+ "sub z15.h, z15.h, z12.h\n"
+ "mov x21, x23\n"
+ "trn1 z5.h, z21.h, z16.h\n"
+ "ld1b { z18.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "trn1 z10.h, z16.h, z15.h\n"
+ "trn1 z11.h, z15.h, z2.h\n"
+ "ld1b { z17.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "sub z18.h, z18.h, z12.h\n"
+ "sub z17.h, z17.h, z12.h\n"
+ "ld1b { z21.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "sub z21.h, z21.h, z12.h\n"
+ "addvl x20, SP, #30\n"
+ "ld1b { z16.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "incw x23\n"
+ "sub z16.h, z16.h, z12.h\n"
+ "ld1b { z15.s }, p2/Z, [x21]\n"
+ "addvl x20, x20, #-6\n"
+ "sub z15.h, z15.h, z12.h\n"
+ "mov x21, x23\n"
+ "st1h { z0.h }, p2, [x20]\n"
+ "trn1 z0.h, z2.h, z18.h\n"
+ "incw x23\n"
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_muls]]\n"
+ "st1h { z8.h }, p2, [x20, #1, MUL VL]\n"
+ "trn1 z8.h, z18.h, z17.h\n"
+ "ld1b { z18.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z4.h }, p2, [x20, #2, MUL VL]\n"
+ "trn1 z4.h, z17.h, z21.h\n"
+ "ld1b { z17.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z5.h }, p2, [x20, #3, MUL VL]\n"
+ "trn1 z5.h, z21.h, z16.h\n"
+ "ld1b { z21.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z10.h }, p2, [x20, #4, MUL VL]\n"
+ "trn1 z10.h, z16.h, z15.h\n"
+ "ld1b { z16.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z11.h }, p2, [x20, #5, MUL VL]\n"
+ "trn1 z11.h, z15.h, z2.h\n"
+ "sub z18.h, z18.h, z12.h\n"
+ "addvl x20, x20, #-6\n"
+ "sub z17.h, z17.h, z12.h\n"
+ "ld1b { z15.s }, p2/Z, [x21]\n"
+ "sub z21.h, z21.h, z12.h\n"
+ "mov x21, x23\n"
+ "sub z16.h, z16.h, z12.h\n"
+ "sub z15.h, z15.h, z12.h\n"
+ "st1h { z0.h }, p2, [x20]\n"
+ "incw x23\n"
+ "st1h { z8.h }, p2, [x20, #1, MUL VL]\n"
+ "trn1 z0.h, z2.h, z18.h\n"
+ "trn1 z8.h, z18.h, z17.h\n"
+ "ld1b { z18.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z4.h }, p2, [x20, #2, MUL VL]\n"
+ "trn1 z4.h, z17.h, z21.h\n"
+ "ld1b { z17.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z5.h }, p2, [x20, #3, MUL VL]\n"
+ "trn1 z5.h, z21.h, z16.h\n"
+ "ld1b { z21.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z10.h }, p2, [x20, #4, MUL VL]\n"
+ "trn1 z10.h, z16.h, z15.h\n"
+ "ld1b { z16.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z11.h }, p2, [x20, #5, MUL VL]\n"
+ "trn1 z11.h, z15.h, z2.h\n"
+ "sub z18.h, z18.h, z12.h\n"
+ "sub z17.h, z17.h, z12.h\n"
+ "ld1b { z15.s }, p2/Z, [x21]\n"
+ "addvl x20, x20, #-6\n"
+ "sub z21.h, z21.h, z12.h\n"
+ "sub z16.h, z16.h, z12.h\n"
+ "mov x21, x23\n"
+ "st1h { z0.h }, p2, [x20]\n"
+ "sub z15.h, z15.h, z12.h\n"
+ "st1h { z8.h }, p2, [x20, #1, MUL VL]\n"
+ "trn1 z0.h, z2.h, z18.h\n"
+ "trn1 z8.h, z18.h, z17.h\n"
+ "ld1b { z18.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z4.h }, p2, [x20, #2, MUL VL]\n"
+ "trn1 z4.h, z17.h, z21.h\n"
+ "ld1b { z17.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z5.h }, p2, [x20, #3, MUL VL]\n"
+ "trn1 z5.h, z21.h, z16.h\n"
+ "ld1b { z21.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z10.h }, p2, [x20, #4, MUL VL]\n"
+ "trn1 z10.h, z16.h, z15.h\n"
+ "ld1b { z16.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z11.h }, p2, [x20, #5, MUL VL]\n"
+ "trn1 z11.h, z15.h, z2.h\n"
+ "ld1b { z15.s }, p2/Z, [x21]\n"
+ "sub z18.h, z18.h, z12.h\n"
+ "addvl x20, x20, #-6\n"
+ "sub z17.h, z17.h, z12.h\n"
+ "sub z21.h, z21.h, z12.h\n"
+ "st1h { z0.h }, p2, [x20]\n"
+ "sub z16.h, z16.h, z12.h\n"
+ "sub z15.h, z15.h, z12.h\n"
+ "st1h { z8.h }, p2, [x20, #1, MUL VL]\n"
+ "st1h { z4.h }, p2, [x20, #2, MUL VL]\n"
+ "mov z7.d, z6.d\n"
+ "trn1 z0.h, z2.h, z18.h\n"
+ "st1h { z5.h }, p2, [x20, #3, MUL VL]\n"
+ "trn1 z8.h, z18.h, z17.h\n"
+ "trn1 z4.h, z17.h, z21.h\n"
+ "st1h { z10.h }, p2, [x20, #4, MUL VL]\n"
+ "trn1 z5.h, z21.h, z16.h\n"
+ "trn1 z10.h, z16.h, z15.h\n"
+ "st1h { z11.h }, p2, [x20, #5, MUL VL]\n"
+ "addvl x20, x20, #-6\n"
+ "trn1 z11.h, z15.h, z2.h\n"
+ "st1h { z0.h }, p2, [x20]\n"
+ "st1h { z8.h }, p2, [x20, #1, MUL VL]\n"
+ "st1h { z4.h }, p2, [x20, #2, MUL VL]\n"
+ "st1h { z5.h }, p2, [x20, #3, MUL VL]\n"
+ "st1h { z10.h }, p2, [x20, #4, MUL VL]\n"
+ "st1h { z11.h }, p2, [x20, #5, MUL VL]\n"
+ "cbz x19, 3f\n"
+ "ld1w { z3.s }, p1/Z, [x19, x17, LSL #2]\n"
+ "3:" // Load mul: End
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_right_shifts]]\n"
+ "cbz x19, 4f\n"
+ "ld1w { z1.s }, p1/Z, [x19, x17, LSL #2]\n"
+ "4:" // Load right_shift: End
+ "ldr x16, [%x[args], %[offsetof_Args_input_cols]]\n"
+ "sub x19, x16, #0x1\n"
+ "orr x22, x19, %x[ld_in_col], LSL #16\n"
+ "ldr x15, [%x[args], %[offsetof_Args_inptr]]\n"
+ "orr x22, x7, x22, LSL #22\n"
+ "mov x21, #0x8\n"
+ "add x20, x6, x5\n"
+ "lsl x19, %x[ld_in_row], #0x0\n"
+ "ldr x14, [%x[args], %[offsetof_Args_output_cols]]\n"
+ "mov x11, #0x0\n"
+ "mov x8, #0x8\n"
+ "lsl x22, x22, #0x0\n"
+ "sub x21, x21, x20\n"
+ "madd x19, x19, x6, x15\n"
+ "5:" // Issue prefetches
+ "subs x21, x21, #0x1\n"
+ ".inst 0xf8b64a7c // rprfm pldstrm, x22, [x19]\n"
+ "add x19, x19, %x[ld_in_col]\n"
+ "bgt 5b\n"
+ "ldr x24, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "lsl x19, %x[ld_in_row], #0x0\n"
+ "msub x15, x6, x19, x15\n"
+ ".inst 0xc00468c0 // mova za.d[x11, #0], { z6.d-z7.d }\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_out_cols]]\n"
+ ".inst 0xc00468c1 // mova za.d[x11, #1], { z6.d-z7.d }\n"
+ "mov x21, #0x4\n"
+ "ldp x13, x4, [x24], #0x10\n"
+ ".inst 0xc00468c2 // mova za.d[x11, #2], { z6.d-z7.d }\n"
+ "ldp x10, x9, [x19], #0x10\n"
+ ".inst 0xc00468c3 // mova za.d[x11, #3], { z6.d-z7.d }\n"
+ "ldr x20, [%x[args], %[offsetof_Args_pad_left]]\n"
+ ".inst 0xc00468c4 // mova za.d[x11, #4], { z6.d-z7.d }\n"
+ "ldp x28, x27, [x24], #0x10\n"
+ ".inst 0xc00468c5 // mova za.d[x11, #5], { z6.d-z7.d }\n"
+ "ldp x26, x25, [x19], #0x10\n"
+ ".inst 0xc00468c6 // mova za.d[x11, #6], { z6.d-z7.d }\n"
+ ".inst 0xc00468c7 // mova za.d[x11, #7], { z6.d-z7.d }\n"
+ ".inst 0xc00408c0 // mova za.d[x8, #0], { z6.d-z7.d }\n"
+ ".inst 0xc00408c1 // mova za.d[x8, #1], { z6.d-z7.d }\n"
+ "cbz x20, 7f\n"
+ "cmp x20, x21\n"
+ "csel x19, x20, x21, LT\n"
+ "sub x20, x20, x19\n"
+ "sub x21, x21, x19\n"
+ "cbz x20, 7f\n"
+ ".inst 0xc006680c // mova { z12.d-z13.d }, za.d[x11, #0]\n"
+ "sub x14, x14, x20\n"
+ ".inst 0xc006682e // mova { z14.d-z15.d }, za.d[x11, #1]\n"
+ ".inst 0xc1a3ac0c // sqdmulh { z12.s-z15.s }, { z12.s-z15.s }, z3.s\n"
+ ".inst 0xc1a1aa2c // srshl { z12.s-z15.s }, { z12.s-z15.s }, z1.s\n"
+ ".inst 0xc1a9ab0c // add { z12.s-z15.s }, { z12.s-z15.s }, z9.s\n"
+ ".inst 0xc1bfcf0c // sclamp { z12.s-z15.s }, z24.s, z31.s\n"
+ "6:" // Left padding
+ "subs x20, x20, #0x1\n"
+ "st1b { z12.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ "st1b { z14.s }, p1, [x4]\n"
+ "add x4, x4, x9\n"
+ "st1b { z13.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ "st1b { z15.s }, p1, [x27]\n"
+ "add x27, x27, x25\n"
+ "bgt 6b\n"
+ "7:" // Left padding: End
+ "adds XZR, x6, x5\n"
+ "bne 14f\n"
+ "cbz x21, 12f\n"
+ "cmp x21, #0x1\n"
+ "sub x16, x16, x21\n"
+ "beq 11f\n"
+ "cmp x21, #0x2\n"
+ "beq 10f\n"
+ "cmp x21, #0x3\n"
+ "beq 9f\n"
+ "8:" // Unpadded: 4 priming loads
+ "add x20, x15, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x15]\n"
+ "addvl x19, SP, #24\n"
+ "ld1b { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z27.h, z17.h, z16.h\n"
+ "add z27.h, z27.h, z25.h\n"
+ "ld1b { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ "ld1b { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ "add z28.h, z28.h, z25.h\n"
+ "ld1b { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1b { z29.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z29.h, z16.h, z29.h\n"
+ "add z29.h, z29.h, z25.h\n"
+ "ld1b { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ "ld1b { z16.s }, p1/Z, [x20]\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ "add z30.h, z30.h, z25.h\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ "9:" // Unpadded: 3 priming loads
+ "add x21, x15, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x15]\n"
+ "addvl x20, SP, #18\n"
+ "ld1b { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z27.h, z17.h, z16.h\n"
+ "add z27.h, z27.h, z25.h\n"
+ "ld1b { z17.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "addvl x19, SP, #24\n"
+ "ld1b { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ "add z28.h, z28.h, z25.h\n"
+ "ld1b { z17.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ "ld1b { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z29.h, z17.h, z16.h\n"
+ "add z29.h, z29.h, z25.h\n"
+ "ld1b { z17.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0xa1402a80 // ld1h { z0.h, z8.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ "ld1b { z16.s }, p1/Z, [x21]\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc168776a // sdot za.s[x11, 2], { z27.h-z28.h }, z8.h\n"
+ "add z30.h, z30.h, z25.h\n"
+ ".inst 0xa0412a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc160776b // sdot za.s[x11, 3], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xa0422a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc165778a // sdot za.s[x11, 2], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778b // sdot za.s[x11, 3], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc16b77aa // sdot za.s[x11, 2], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ab // sdot za.s[x11, 3], { z29.h-z30.h }, z10.h\n"
+ "10:" // Unpadded: 2 priming loads
+ "add x22, x15, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x15]\n"
+ "addvl x21, SP, #12\n"
+ "ld1b { z16.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "trn1 z27.h, z17.h, z16.h\n"
+ "add z27.h, z27.h, z25.h\n"
+ "ld1b { z17.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "addvl x20, SP, #18\n"
+ "ld1b { z16.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ "add z28.h, z28.h, z25.h\n"
+ "ld1b { z17.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "addvl x19, SP, #24\n"
+ "ld1b { z16.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "trn1 z29.h, z17.h, z16.h\n"
+ "add z29.h, z29.h, z25.h\n"
+ "ld1b { z17.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ ".inst 0xa1402aa0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x21]\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ "ld1b { z16.s }, p1/Z, [x22]\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a80 // ld1h { z0.h, z8.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc168776a // sdot za.s[x11, 2], { z27.h-z28.h }, z8.h\n"
+ "add z30.h, z30.h, z25.h\n"
+ ".inst 0xa0412aa4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0xc160776b // sdot za.s[x11, 3], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xa0422aaa // ld1h { z10.h-z11.h }, pn10.b/Z, [x21, #0x4, MUL VL]\n"
+ ".inst 0xc168776c // sdot za.s[x11, 4], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776d // sdot za.s[x11, 5], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xc165778a // sdot za.s[x11, 2], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778b // sdot za.s[x11, 3], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc165778c // sdot za.s[x11, 4], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778d // sdot za.s[x11, 5], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xc16b77aa // sdot za.s[x11, 2], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ab // sdot za.s[x11, 3], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc16b77ac // sdot za.s[x11, 4], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ad // sdot za.s[x11, 5], { z29.h-z30.h }, z10.h\n"
+ "11:" // Unpadded: 1 priming loads
+ "add x23, x15, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x15]\n"
+ "addvl x22, SP, #6\n"
+ "ld1b { z16.s }, p1/Z, [x23]\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ "trn1 z27.h, z17.h, z16.h\n"
+ "add z27.h, z27.h, z25.h\n"
+ "ld1b { z17.s }, p1/Z, [x23]\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ "addvl x21, SP, #12\n"
+ "ld1b { z16.s }, p1/Z, [x23]\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ "add z28.h, z28.h, z25.h\n"
+ "ld1b { z17.s }, p1/Z, [x23]\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ "addvl x20, SP, #18\n"
+ "ld1b { z16.s }, p1/Z, [x23]\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ "trn1 z29.h, z17.h, z16.h\n"
+ "add z29.h, z29.h, z25.h\n"
+ "ld1b { z17.s }, p1/Z, [x23]\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ "addvl x19, SP, #24\n"
+ ".inst 0xa1402ac0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x22]\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ "ld1b { z16.s }, p1/Z, [x23]\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402aa0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x21]\n"
+ ".inst 0xc168776a // sdot za.s[x11, 2], { z27.h-z28.h }, z8.h\n"
+ "add z30.h, z30.h, z25.h\n"
+ ".inst 0xa0412ac4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x22, #0x2, MUL VL]\n"
+ ".inst 0xc160776b // sdot za.s[x11, 3], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a80 // ld1h { z0.h, z8.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412aa4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0xa0422aca // ld1h { z10.h-z11.h }, pn10.b/Z, [x22, #0x4, MUL VL]\n"
+ ".inst 0xc168776c // sdot za.s[x11, 4], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776d // sdot za.s[x11, 5], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc165778a // sdot za.s[x11, 2], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778b // sdot za.s[x11, 3], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422aaa // ld1h { z10.h-z11.h }, pn10.b/Z, [x21, #0x4, MUL VL]\n"
+ ".inst 0xc168776e // sdot za.s[x11, 6], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776f // sdot za.s[x11, 7], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xc165778c // sdot za.s[x11, 4], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778d // sdot za.s[x11, 5], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16b77aa // sdot za.s[x11, 2], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ab // sdot za.s[x11, 3], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc165778e // sdot za.s[x11, 6], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778f // sdot za.s[x11, 7], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xc16b77ac // sdot za.s[x11, 4], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ad // sdot za.s[x11, 5], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc16b77ae // sdot za.s[x11, 6], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77af // sdot za.s[x11, 7], { z29.h-z30.h }, z10.h\n"
+ "12:" // Unpadded: 0 priming loads
+ ".inst 0xa1402be0 // ld1h { z0.h, z8.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xa0412be4 // ld1h { z4.h-z5.h }, pn10.b/Z, [SP, #0x2, MUL VL]\n"
+ ".inst 0xa0422bea // ld1h { z10.h-z11.h }, pn10.b/Z, [SP, #0x4, MUL VL]\n"
+ "cbz x16, 22f\n"
+ "add x19, x15, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x15]\n"
+ "sub x16, x16, #0x1\n"
+ "ld1b { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z27.h, z17.h, z16.h\n"
+ "sub x14, x14, #0x1\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "cmp x16, x14\n"
+ "add z27.h, z27.h, z25.h\n"
+ "ld1b { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ "csel x24, x16, x14, LT\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "add z28.h, z28.h, z25.h\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ "ld1b { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z29.h, z17.h, z16.h\n"
+ "add z29.h, z29.h, z25.h\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub x14, x14, x24\n"
+ "ld1b { z16.s }, p1/Z, [x19]\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ "add z30.h, z30.h, z25.h\n"
+ "cbz x24, 21f\n"
+ "13:" // Unpadded: Main loop
+ "addvl x23, SP, #6\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ "addvl x22, SP, #12\n"
+ "ld1b { z23.s }, p1/Z, [x15]\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402ae0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x23]\n"
+ "addvl x21, SP, #18\n"
+ "addvl x20, SP, #24\n"
+ ".inst 0xc168776a // sdot za.s[x11, 2], { z27.h-z28.h }, z8.h\n"
+ "add x19, x15, %x[ld_in_row]\n"
+ "ld1b { z22.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc160776b // sdot za.s[x11, 3], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402ac0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x22]\n"
+ "subs x24, x24, #0x1\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ "ld1b { z21.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412ae4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x23, #0x2, MUL VL]\n"
+ ".inst 0xc168776c // sdot za.s[x11, 4], { z27.h-z28.h }, z8.h\n"
+ "ld1b { z20.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc160776d // sdot za.s[x11, 5], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402aa0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x21]\n"
+ ".inst 0xc165778a // sdot za.s[x11, 2], { z28.h-z29.h }, z5.h\n"
+ "ld1b { z19.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc164778b // sdot za.s[x11, 3], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412ac4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x22, #0x2, MUL VL]\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ "ld1b { z18.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422aea // ld1h { z10.h-z11.h }, pn10.b/Z, [x23, #0x4, MUL VL]\n"
+ ".inst 0xc168776e // sdot za.s[x11, 6], { z27.h-z28.h }, z8.h\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc160776f // sdot za.s[x11, 7], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a80 // ld1h { z0.h, z8.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc165778c // sdot za.s[x11, 4], { z28.h-z29.h }, z5.h\n"
+ "ld1b { z16.s }, p1/Z, [x19]\n"
+ ".inst 0xc164778d // sdot za.s[x11, 5], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412aa4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0xc16b77aa // sdot za.s[x11, 2], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ab // sdot za.s[x11, 3], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422aca // ld1h { z10.h-z11.h }, pn10.b/Z, [x22, #0x4, MUL VL]\n"
+ ".inst 0xc165778e // sdot za.s[x11, 6], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778f // sdot za.s[x11, 7], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc16b77ac // sdot za.s[x11, 4], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ad // sdot za.s[x11, 5], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422aaa // ld1h { z10.h-z11.h }, pn10.b/Z, [x21, #0x4, MUL VL]\n"
+ ".inst 0xc16b77ae // sdot za.s[x11, 6], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77af // sdot za.s[x11, 7], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc1681768 // sdot za.s[x8, 0], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc1601769 // sdot za.s[x8, 1], { z27.h-z28.h }, z0.h\n"
+ "trn1 z27.h, z23.h, z22.h\n"
+ ".inst 0xa1402be0 // ld1h { z0.h, z8.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xc1651788 // sdot za.s[x8, 0], { z28.h-z29.h }, z5.h\n"
+ "add z27.h, z27.h, z25.h\n"
+ ".inst 0xc1641789 // sdot za.s[x8, 1], { z28.h-z29.h }, z4.h\n"
+ "trn1 z28.h, z21.h, z20.h\n"
+ ".inst 0xa0412be4 // ld1h { z4.h-z5.h }, pn10.b/Z, [SP, #0x2, MUL VL]\n"
+ ".inst 0xc16b17a8 // sdot za.s[x8, 0], { z29.h-z30.h }, z11.h\n"
+ "add z28.h, z28.h, z25.h\n"
+ ".inst 0xc16a17a9 // sdot za.s[x8, 1], { z29.h-z30.h }, z10.h\n"
+ "trn1 z29.h, z19.h, z18.h\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ "add x8, x8, #0x2\n"
+ ".inst 0xc006680c // mova { z12.d-z13.d }, za.d[x11, #0]\n"
+ ".inst 0xa0422bea // ld1h { z10.h-z11.h }, pn10.b/Z, [SP, #0x4, MUL VL]\n"
+ "add z29.h, z29.h, z25.h\n"
+ ".inst 0xc006682e // mova { z14.d-z15.d }, za.d[x11, #1]\n"
+ ".inst 0xc1a3ac0c // sqdmulh { z12.s-z15.s }, { z12.s-z15.s }, z3.s\n"
+ "add x11, x11, #0x2\n"
+ ".inst 0xc1a1aa2c // srshl { z12.s-z15.s }, { z12.s-z15.s }, z1.s\n"
+ ".inst 0xc00408c0 // mova za.d[x8, #0], { z6.d-z7.d }\n"
+ ".inst 0xc1a9ab0c // add { z12.s-z15.s }, { z12.s-z15.s }, z9.s\n"
+ ".inst 0xc00408c1 // mova za.d[x8, #1], { z6.d-z7.d }\n"
+ ".inst 0xc1bfcf0c // sclamp { z12.s-z15.s }, z24.s, z31.s\n"
+ "st1b { z12.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ "add z30.h, z30.h, z25.h\n"
+ "st1b { z14.s }, p1, [x4]\n"
+ "add x4, x4, x9\n"
+ "st1b { z13.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ "st1b { z15.s }, p1, [x27]\n"
+ "add x27, x27, x25\n"
+ "bgt 13b\n"
+ "b 21f\n"
+ "14:" // Padded
+ "cbz x21, 19f\n"
+ "cmp x21, #0x1\n"
+ "sub x16, x16, x21\n"
+ "beq 18f\n"
+ "cmp x21, #0x2\n"
+ "beq 17f\n"
+ "cmp x21, #0x3\n"
+ "beq 16f\n"
+ "15:" // Padded: 4 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z19.s }, p0/Z, [x15]\n"
+ "add z19.h, p0/M, z19.h, z25.h\n"
+ "add x20, x15, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x20]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z17.s }, p0/Z, [x20]\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z16.s }, p0/Z, [x20]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "mov x12, #0x4\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z27.h, z19.h, z18.h\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z18.s }, p0/Z, [x20]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z16.s }, p0/Z, [x20]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z17.s }, p0/Z, [x20]\n"
+ "addvl x19, SP, #24\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ "trn1 z29.h, z18.h, z16.h\n"
+ "ld1b { z16.s }, p0/Z, [x20]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ "16:" // Padded: 3 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z19.s }, p0/Z, [x15]\n"
+ "add z19.h, p0/M, z19.h, z25.h\n"
+ "add x19, x15, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z27.h, z19.h, z18.h\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "addvl x20, SP, #18\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xa1402a80 // ld1h { z0.h, z8.h }, pn10.b/Z, [x20]\n"
+ "trn1 z29.h, z18.h, z16.h\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "addvl x19, SP, #24\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ ".inst 0xa0412a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc168776a // sdot za.s[x11, 2], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776b // sdot za.s[x11, 3], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa0422a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc165778a // sdot za.s[x11, 2], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778b // sdot za.s[x11, 3], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc16b77aa // sdot za.s[x11, 2], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ab // sdot za.s[x11, 3], { z29.h-z30.h }, z10.h\n"
+ "17:" // Padded: 2 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z19.s }, p0/Z, [x15]\n"
+ "add z19.h, p0/M, z19.h, z25.h\n"
+ "add x19, x15, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z27.h, z19.h, z18.h\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "addvl x21, SP, #12\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xa1402aa0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x21]\n"
+ "trn1 z29.h, z18.h, z16.h\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "addvl x20, SP, #18\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a80 // ld1h { z0.h, z8.h }, pn10.b/Z, [x20]\n"
+ "addvl x19, SP, #24\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ ".inst 0xa0412aa4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0xc168776a // sdot za.s[x11, 2], { z27.h-z28.h }, z8.h\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ ".inst 0xc160776b // sdot za.s[x11, 3], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xa0422aaa // ld1h { z10.h-z11.h }, pn10.b/Z, [x21, #0x4, MUL VL]\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc168776c // sdot za.s[x11, 4], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776d // sdot za.s[x11, 5], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xc165778a // sdot za.s[x11, 2], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778b // sdot za.s[x11, 3], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc165778c // sdot za.s[x11, 4], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778d // sdot za.s[x11, 5], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xc16b77aa // sdot za.s[x11, 2], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ab // sdot za.s[x11, 3], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc16b77ac // sdot za.s[x11, 4], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ad // sdot za.s[x11, 5], { z29.h-z30.h }, z10.h\n"
+ "18:" // Padded: 1 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z19.s }, p0/Z, [x15]\n"
+ "add z19.h, p0/M, z19.h, z25.h\n"
+ "add x19, x15, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z27.h, z19.h, z18.h\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "addvl x22, SP, #6\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xa1402ac0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x22]\n"
+ "trn1 z29.h, z18.h, z16.h\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "addvl x21, SP, #12\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402aa0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x21]\n"
+ "addvl x20, SP, #18\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ ".inst 0xa0412ac4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x22, #0x2, MUL VL]\n"
+ ".inst 0xc168776a // sdot za.s[x11, 2], { z27.h-z28.h }, z8.h\n"
+ "addvl x19, SP, #24\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ ".inst 0xc160776b // sdot za.s[x11, 3], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a80 // ld1h { z0.h, z8.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xa0422aca // ld1h { z10.h-z11.h }, pn10.b/Z, [x22, #0x4, MUL VL]\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412aa4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0xc168776c // sdot za.s[x11, 4], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776d // sdot za.s[x11, 5], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc165778a // sdot za.s[x11, 2], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778b // sdot za.s[x11, 3], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422aaa // ld1h { z10.h-z11.h }, pn10.b/Z, [x21, #0x4, MUL VL]\n"
+ ".inst 0xc168776e // sdot za.s[x11, 6], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776f // sdot za.s[x11, 7], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xc165778c // sdot za.s[x11, 4], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778d // sdot za.s[x11, 5], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16b77aa // sdot za.s[x11, 2], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ab // sdot za.s[x11, 3], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc165778e // sdot za.s[x11, 6], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778f // sdot za.s[x11, 7], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xc16b77ac // sdot za.s[x11, 4], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ad // sdot za.s[x11, 5], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc16b77ae // sdot za.s[x11, 6], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77af // sdot za.s[x11, 7], { z29.h-z30.h }, z10.h\n"
+ "19:" // Padded: 0 priming loads
+ ".inst 0xa1402be0 // ld1h { z0.h, z8.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xa0412be4 // ld1h { z4.h-z5.h }, pn10.b/Z, [SP, #0x2, MUL VL]\n"
+ ".inst 0xa0422bea // ld1h { z10.h-z11.h }, pn10.b/Z, [SP, #0x4, MUL VL]\n"
+ "cbz x16, 22f\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z19.s }, p0/Z, [x15]\n"
+ "add z19.h, p0/M, z19.h, z25.h\n"
+ "add x19, x15, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z27.h, z19.h, z18.h\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "sub x16, x16, #0x1\n"
+ "sub x14, x14, #0x1\n"
+ "cmp x16, x14\n"
+ "trn1 z29.h, z19.h, z18.h\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ "csel x24, x16, x14, LT\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ "sub x14, x14, x24\n"
+ "cbz x24, 21f\n"
+ "20:" // Padded: Main loop
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z23.s }, p0/Z, [x15]\n"
+ "add z23.h, p0/M, z23.h, z25.h\n"
+ "add x23, x15, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z22.s }, p0/Z, [x23]\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ "addvl x22, SP, #6\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402ac0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x22]\n"
+ "addvl x21, SP, #12\n"
+ "add z22.h, p0/M, z22.h, z25.h\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc168776a // sdot za.s[x11, 2], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776b // sdot za.s[x11, 3], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402aa0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x21]\n"
+ "addvl x20, SP, #18\n"
+ "addvl x19, SP, #24\n"
+ "ld1b { z21.s }, p0/Z, [x23]\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ "add z21.h, p0/M, z21.h, z25.h\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412ac4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x22, #0x2, MUL VL]\n"
+ "mov x12, #0x4\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ ".inst 0xc168776c // sdot za.s[x11, 4], { z27.h-z28.h }, z8.h\n"
+ "ld1b { z20.s }, p0/Z, [x23]\n"
+ "add z20.h, p0/M, z20.h, z25.h\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ ".inst 0xc160776d // sdot za.s[x11, 5], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a80 // ld1h { z0.h, z8.h }, pn10.b/Z, [x20]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "subs x24, x24, #0x1\n"
+ ".inst 0xc165778a // sdot za.s[x11, 2], { z28.h-z29.h }, z5.h\n"
+ "ld1b { z19.s }, p0/Z, [x23]\n"
+ "add z19.h, p0/M, z19.h, z25.h\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ ".inst 0xc164778b // sdot za.s[x11, 3], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412aa4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ "ld1b { z18.s }, p0/Z, [x23]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422aca // ld1h { z10.h-z11.h }, pn10.b/Z, [x22, #0x4, MUL VL]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc168776e // sdot za.s[x11, 6], { z27.h-z28.h }, z8.h\n"
+ "ld1b { z17.s }, p0/Z, [x23]\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ ".inst 0xc160776f // sdot za.s[x11, 7], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xc165778c // sdot za.s[x11, 4], { z28.h-z29.h }, z5.h\n"
+ "ld1b { z16.s }, p0/Z, [x23]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ ".inst 0xc164778d // sdot za.s[x11, 5], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc16b77aa // sdot za.s[x11, 2], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ab // sdot za.s[x11, 3], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422aaa // ld1h { z10.h-z11.h }, pn10.b/Z, [x21, #0x4, MUL VL]\n"
+ ".inst 0xc165778e // sdot za.s[x11, 6], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778f // sdot za.s[x11, 7], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16b77ac // sdot za.s[x11, 4], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ad // sdot za.s[x11, 5], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc16b77ae // sdot za.s[x11, 6], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77af // sdot za.s[x11, 7], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc1681768 // sdot za.s[x8, 0], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc1601769 // sdot za.s[x8, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402be0 // ld1h { z0.h, z8.h }, pn10.b/Z, [SP]\n"
+ "trn1 z27.h, z23.h, z22.h\n"
+ ".inst 0xc1651788 // sdot za.s[x8, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc1641789 // sdot za.s[x8, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412be4 // ld1h { z4.h-z5.h }, pn10.b/Z, [SP, #0x2, MUL VL]\n"
+ "trn1 z28.h, z21.h, z20.h\n"
+ ".inst 0xc16b17a8 // sdot za.s[x8, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a17a9 // sdot za.s[x8, 1], { z29.h-z30.h }, z10.h\n"
+ "add x8, x8, #0x2\n"
+ ".inst 0xa0422bea // ld1h { z10.h-z11.h }, pn10.b/Z, [SP, #0x4, MUL VL]\n"
+ "trn1 z29.h, z19.h, z18.h\n"
+ ".inst 0xc006680c // mova { z12.d-z13.d }, za.d[x11, #0]\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ ".inst 0xc006682e // mova { z14.d-z15.d }, za.d[x11, #1]\n"
+ ".inst 0xc1a3ac0c // sqdmulh { z12.s-z15.s }, { z12.s-z15.s }, z3.s\n"
+ "add x11, x11, #0x2\n"
+ ".inst 0xc1a1aa2c // srshl { z12.s-z15.s }, { z12.s-z15.s }, z1.s\n"
+ ".inst 0xc00408c0 // mova za.d[x8, #0], { z6.d-z7.d }\n"
+ ".inst 0xc1a9ab0c // add { z12.s-z15.s }, { z12.s-z15.s }, z9.s\n"
+ ".inst 0xc00408c1 // mova za.d[x8, #1], { z6.d-z7.d }\n"
+ ".inst 0xc1bfcf0c // sclamp { z12.s-z15.s }, z24.s, z31.s\n"
+ "st1b { z12.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ "st1b { z14.s }, p1, [x4]\n"
+ "add x4, x4, x9\n"
+ "st1b { z13.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ "st1b { z15.s }, p1, [x27]\n"
+ "add x27, x27, x25\n"
+ "bgt 20b\n"
+ "21:" // Main loop tail
+ "addvl x22, SP, #6\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ "addvl x21, SP, #12\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402ac0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x22]\n"
+ "addvl x20, SP, #18\n"
+ "addvl x19, SP, #24\n"
+ ".inst 0xc168776a // sdot za.s[x11, 2], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776b // sdot za.s[x11, 3], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402aa0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x21]\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412ac4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x22, #0x2, MUL VL]\n"
+ ".inst 0xc168776c // sdot za.s[x11, 4], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776d // sdot za.s[x11, 5], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a80 // ld1h { z0.h, z8.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc165778a // sdot za.s[x11, 2], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778b // sdot za.s[x11, 3], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412aa4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422aca // ld1h { z10.h-z11.h }, pn10.b/Z, [x22, #0x4, MUL VL]\n"
+ ".inst 0xc168776e // sdot za.s[x11, 6], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776f // sdot za.s[x11, 7], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc165778c // sdot za.s[x11, 4], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778d // sdot za.s[x11, 5], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc16b77aa // sdot za.s[x11, 2], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ab // sdot za.s[x11, 3], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422aaa // ld1h { z10.h-z11.h }, pn10.b/Z, [x21, #0x4, MUL VL]\n"
+ ".inst 0xc165778e // sdot za.s[x11, 6], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778f // sdot za.s[x11, 7], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16b77ac // sdot za.s[x11, 4], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ad // sdot za.s[x11, 5], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc16b77ae // sdot za.s[x11, 6], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77af // sdot za.s[x11, 7], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc1681768 // sdot za.s[x8, 0], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc1601769 // sdot za.s[x8, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xc1651788 // sdot za.s[x8, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc1641789 // sdot za.s[x8, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xc16b17a8 // sdot za.s[x8, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a17a9 // sdot za.s[x8, 1], { z29.h-z30.h }, z10.h\n"
+ "add x8, x8, #0x2\n"
+ ".inst 0xc006680c // mova { z12.d-z13.d }, za.d[x11, #0]\n"
+ ".inst 0xc006682e // mova { z14.d-z15.d }, za.d[x11, #1]\n"
+ ".inst 0xc1a3ac0c // sqdmulh { z12.s-z15.s }, { z12.s-z15.s }, z3.s\n"
+ "add x11, x11, #0x2\n"
+ ".inst 0xc1a1aa2c // srshl { z12.s-z15.s }, { z12.s-z15.s }, z1.s\n"
+ ".inst 0xc00408c0 // mova za.d[x8, #0], { z6.d-z7.d }\n"
+ ".inst 0xc1a9ab0c // add { z12.s-z15.s }, { z12.s-z15.s }, z9.s\n"
+ ".inst 0xc00408c1 // mova za.d[x8, #1], { z6.d-z7.d }\n"
+ ".inst 0xc1bfcf0c // sclamp { z12.s-z15.s }, z24.s, z31.s\n"
+ "st1b { z12.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ "st1b { z14.s }, p1, [x4]\n"
+ "add x4, x4, x9\n"
+ "st1b { z13.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ "st1b { z15.s }, p1, [x27]\n"
+ "add x27, x27, x25\n"
+ "22:" // Main loop skip tail
+ "cbz x14, 24f\n"
+ "23:" // Right padding loop
+ ".inst 0xc006680c // mova { z12.d-z13.d }, za.d[x11, #0]\n"
+ "add x8, x8, #0x2\n"
+ "subs x14, x14, #0x1\n"
+ ".inst 0xc006682e // mova { z14.d-z15.d }, za.d[x11, #1]\n"
+ ".inst 0xc1a3ac0c // sqdmulh { z12.s-z15.s }, { z12.s-z15.s }, z3.s\n"
+ "add x11, x11, #0x2\n"
+ ".inst 0xc1a1aa2c // srshl { z12.s-z15.s }, { z12.s-z15.s }, z1.s\n"
+ ".inst 0xc00408c0 // mova za.d[x8, #0], { z6.d-z7.d }\n"
+ ".inst 0xc1a9ab0c // add { z12.s-z15.s }, { z12.s-z15.s }, z9.s\n"
+ ".inst 0xc00408c1 // mova za.d[x8, #1], { z6.d-z7.d }\n"
+ ".inst 0xc1bfcf0c // sclamp { z12.s-z15.s }, z24.s, z31.s\n"
+ "st1b { z12.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ "st1b { z14.s }, p1, [x4]\n"
+ "add x4, x4, x9\n"
+ "st1b { z13.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ "st1b { z15.s }, p1, [x27]\n"
+ "add x27, x27, x25\n"
+ "bgt 23b\n"
+ "24:" // End
+ "ldr x23, [%x[args], %[offsetof_Args_weights]]\n"
+ "incw x23, ALL, MUL #16\n"
+ "incw x23, ALL, MUL #9\n"
+ "str x23, [%x[args], %[offsetof_Args_weights]]\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_in_vl]]\n"
+ "incw x17\n"
+ "whilelt p1.s, x17, x7\n"
+ "ldr x15, [%x[args], %[offsetof_Args_inptr]]\n"
+ "add x15, x15, x19\n"
+ "str x15, [%x[args], %[offsetof_Args_inptr]]\n"
+ "ldr x24, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "ldr x23, [%x[args], %[offsetof_Args_ld_out_vls]]\n"
+ "ldp x22, x21, [x24, #0x0]\n"
+ "ldp x20, x19, [x23, #0x0]\n"
+ "add x22, x22, x20\n"
+ "add x21, x21, x19\n"
+ "stp x22, x21, [x24, #0x0]\n"
+ "ldp x22, x21, [x24, #0x10]\n"
+ "ldp x20, x19, [x23, #0x10]\n"
+ "add x22, x22, x20\n"
+ "add x21, x21, x19\n"
+ "stp x22, x21, [x24, #0x10]\n"
+ "b.any 1b\n"
+ "addvl SP, SP, #30\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [ld_in_col] "r" (ld_in_col), [ld_in_row] "r" (ld_in_row), [offsetof_Args_current_channel] "I" (offsetof(Args, current_channel)), [offsetof_Args_inptr] "I" (offsetof(Args, inptr)), [offsetof_Args_input_cols] "I" (offsetof(Args, input_cols)), [offsetof_Args_ld_in_vl] "I" (offsetof(Args, ld_in_vl)), [offsetof_Args_ld_out_cols] "I" (offsetof(Args, ld_out_cols)), [offsetof_Args_ld_out_vls] "I" (offsetof(Args, ld_out_vls)), [offsetof_Args_n_channels] "I" (offsetof(Args, n_channels)), [offsetof_Args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_Args_output_cols] "I" (offsetof(Args, output_cols)), [offsetof_Args_pad_bottom] "I" (offsetof(Args, pad_bottom)), [offsetof_Args_pad_left] "I" (offsetof(Args, pad_left)), [offsetof_Args_pad_top] "I" (offsetof(Args, pad_top)), [offsetof_Args_weights] "I" (offsetof(Args, weights)), [offsetof_Requantize32_a_offset] "I" (offsetof(arm_gemm::Requantize32, a_offset)), [offsetof_Requantize32_b_offset] "I" (offsetof(arm_gemm::Requantize32, b_offset)), [offsetof_Requantize32_bias] "I" (offsetof(arm_gemm::Requantize32, bias)), [offsetof_Requantize32_c_offset] "I" (offsetof(arm_gemm::Requantize32, c_offset)), [offsetof_Requantize32_maxval] "I" (offsetof(arm_gemm::Requantize32, maxval)), [offsetof_Requantize32_minval] "I" (offsetof(arm_gemm::Requantize32, minval)), [offsetof_Requantize32_per_channel_muls] "I" (offsetof(arm_gemm::Requantize32, per_channel_muls)), [offsetof_Requantize32_per_channel_right_shifts] "I" (offsetof(arm_gemm::Requantize32, per_channel_right_shifts)), [offsetof_Requantize32_per_layer_mul] "I" (offsetof(arm_gemm::Requantize32, per_layer_mul)), [offsetof_Requantize32_per_layer_right_shift] "I" (offsetof(arm_gemm::Requantize32, per_layer_right_shift)), [qp] "r" (&qp)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8q_planar_5x5_s2_4rows_dot_za.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8q_planar_5x5_s2_4rows_dot_za.hpp
new file mode 100644
index 0000000..9fa295b
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8q_planar_5x5_s2_4rows_dot_za.hpp
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_u8q_planar_5x5_s2_4rows_dot_za_impl(
+ const uint8_t *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const uint8_t *weights,
+ uint8_t **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ const arm_gemm::Requantize32 &qp
+);
+
+class sme2_u8q_planar_5x5_s2_4rows_dot_za : public PlanarStrategy<uint8_t, uint8_t>
+{
+ using Parent = PlanarStrategy<uint8_t, uint8_t>;
+
+ public:
+ using return_type = uint8_t;
+ constexpr static auto output_rows = 4u;
+ constexpr static auto kernel_rows = 5u, kernel_cols = 5u;
+ constexpr static auto stride_rows = 2u, stride_cols = 2u;
+ constexpr static auto vl_type = arm_gemm::VLType::SME;
+
+ sme2_u8q_planar_5x5_s2_4rows_dot_za(const CPUInfo *)
+ : Parent(kernel_rows, kernel_cols, stride_rows, stride_cols, output_rows, vl_type)
+ {
+ }
+
+ typename Parent::KernelType get_kernel(void) const override
+ {
+ return sme2_u8q_planar_5x5_s2_4rows_dot_za_impl;
+ }
+};
+
+} // namespace depthwise
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8q_planar_5x5_s2_4rows_dot_za/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8q_planar_5x5_s2_4rows_dot_za/generic.cpp
new file mode 100644
index 0000000..84e8c8b
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8q_planar_5x5_s2_4rows_dot_za/generic.cpp
@@ -0,0 +1,1354 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <algorithm>
+#include <cstddef>
+#include "arm_gemm.hpp"
+
+using arm_gemm::Requantize32;
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_u8q_planar_5x5_s2_4rows_dot_za_impl(
+ const uint8_t *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const uint8_t *weights,
+ uint8_t **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ const arm_gemm::Requantize32 &qp
+)
+{
+ struct Args
+ {
+ const uint8_t *inptr;
+ size_t ld_in_vl;
+ long unsigned int pad_top, pad_bottom, pad_left;
+ const uint8_t *weights;
+ long unsigned int input_cols, output_cols;
+ uint8_t **outptrs;
+ const size_t *ld_out_cols;
+ const size_t *ld_out_vls;
+ long unsigned int current_channel, n_channels;
+ };
+
+ Args args = { inptr, ld_in_vl, pad_top, 11u - std::min(11u, pad_top + valid_input_rows), pad_left, weights, valid_input_cols, output_cols, outptrs, outlds, outvllds, start_channel, valid_channels };
+
+ __asm__ __volatile__(
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "ldr x4, [%x[args], %[offsetof_Args_pad_bottom]]\n"
+ "ptrue p2.b\n"
+ "mov x19, #0xb\n"
+ "ldr x5, [%x[args], %[offsetof_Args_pad_top]]\n"
+ "ld1rh { z9.h }, p2/Z, [%x[qp], %[offsetof_Requantize32_a_offset]]\n"
+ "sub x19, x19, x4\n"
+ ".inst 0x25207812 // ptrue pn10.b\n"
+ "ldr x6, [%x[args], %[offsetof_Args_n_channels]]\n"
+ "whilelt p1.s, XZR, x6\n"
+ "whilelt p9.s, XZR, x19\n"
+ "ld1rw { z8.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_c_offset]]\n"
+ "whilelt p8.s, XZR, x5\n"
+ "addvl SP, SP, #-15\n"
+ "ldr x7, [%x[args], %[offsetof_Args_current_channel]]\n"
+ "neg z9.h, p2/M, z9.h\n"
+ "eor p8.b, p2/Z, p8.b, p9.b\n"
+ "ld1rw { z3.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_per_layer_mul]]\n"
+ "ld1rw { z1.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_per_layer_right_shift]]\n"
+ "ld1rw { z26.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_minval]]\n"
+ "ld1rw { z23.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_maxval]]\n"
+ "1:" // Channel loop
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_bias]]\n"
+ "mov z28.s, #0x0\n"
+ "cbz x19, 2f\n"
+ "ld1w { z28.s }, p1/Z, [x19, x7, LSL #2]\n"
+ "2:" // Load bias: Done
+ "ldr x21, [%x[args], %[offsetof_Args_weights]]\n"
+ "mov x19, x21\n"
+ "ld1b { z12.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "ld1rh { z18.h }, p2/Z, [%x[qp], %[offsetof_Requantize32_b_offset]]\n"
+ "sub z12.h, z12.h, z18.h\n"
+ "incw x21\n"
+ "mov z14.h, #0x0\n"
+ "ld1b { z25.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z25.h, z25.h, z18.h\n"
+ "trn1 z2.h, z12.h, z25.h\n"
+ "ld1b { z24.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z24.h, z24.h, z18.h\n"
+ "addvl x20, SP, #15\n"
+ "ld1b { z17.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z17.h, z17.h, z18.h\n"
+ "trn1 z10.h, z24.h, z17.h\n"
+ "ld1b { z16.s }, p2/Z, [x19]\n"
+ "mov x19, x21\n"
+ "sub z16.h, z16.h, z18.h\n"
+ "incw x21\n"
+ "ld1b { z12.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z12.h, z12.h, z18.h\n"
+ "addvl x20, x20, #-3\n"
+ "ld1b { z25.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z25.h, z25.h, z18.h\n"
+ "trn1 z0.h, z16.h, z14.h\n"
+ "ld1b { z24.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z24.h, z24.h, z18.h\n"
+ "st1h { z2.h }, p2, [x20]\n"
+ "ld1b { z17.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z17.h, z17.h, z18.h\n"
+ "trn1 z2.h, z12.h, z25.h\n"
+ "ld1b { z16.s }, p2/Z, [x19]\n"
+ "mov x19, x21\n"
+ "st1h { z10.h }, p2, [x20, #1, MUL VL]\n"
+ "sub z16.h, z16.h, z18.h\n"
+ "ld1b { z12.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "trn1 z10.h, z24.h, z17.h\n"
+ "sub z12.h, z12.h, z18.h\n"
+ "ld1b { z25.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z25.h, z25.h, z18.h\n"
+ "st1h { z0.h }, p2, [x20, #2, MUL VL]\n"
+ "ld1b { z24.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "trn1 z0.h, z16.h, z14.h\n"
+ "incw x21\n"
+ "ld1b { z17.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z24.h, z24.h, z18.h\n"
+ "sub z17.h, z17.h, z18.h\n"
+ "ld1b { z16.s }, p2/Z, [x19]\n"
+ "addvl x20, x20, #-3\n"
+ "mov x19, x21\n"
+ "st1h { z2.h }, p2, [x20]\n"
+ "trn1 z2.h, z12.h, z25.h\n"
+ "ld1b { z12.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z16.h, z16.h, z18.h\n"
+ "ld1b { z25.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "st1h { z10.h }, p2, [x20, #1, MUL VL]\n"
+ "trn1 z10.h, z24.h, z17.h\n"
+ "ld1b { z24.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z12.h, z12.h, z18.h\n"
+ "sub z25.h, z25.h, z18.h\n"
+ "ld1b { z17.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "st1h { z0.h }, p2, [x20, #2, MUL VL]\n"
+ "trn1 z0.h, z16.h, z14.h\n"
+ "ld1b { z16.s }, p2/Z, [x19]\n"
+ "incw x21\n"
+ "sub z24.h, z24.h, z18.h\n"
+ "sub z17.h, z17.h, z18.h\n"
+ "addvl x20, x20, #-3\n"
+ "mov x19, x21\n"
+ "st1h { z2.h }, p2, [x20]\n"
+ "sub z16.h, z16.h, z18.h\n"
+ "trn1 z2.h, z12.h, z25.h\n"
+ "ld1b { z12.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "st1h { z10.h }, p2, [x20, #1, MUL VL]\n"
+ "ld1b { z25.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "trn1 z10.h, z24.h, z17.h\n"
+ "st1h { z0.h }, p2, [x20, #2, MUL VL]\n"
+ "ld1b { z24.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "trn1 z0.h, z16.h, z14.h\n"
+ "sub z12.h, z12.h, z18.h\n"
+ "ld1b { z17.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z25.h, z25.h, z18.h\n"
+ "sub z24.h, z24.h, z18.h\n"
+ "ld1b { z16.s }, p2/Z, [x19]\n"
+ "sub z17.h, z17.h, z18.h\n"
+ "sub z16.h, z16.h, z18.h\n"
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_muls]]\n"
+ "addvl x20, x20, #-3\n"
+ "st1h { z2.h }, p2, [x20]\n"
+ "mov z29.d, z28.d\n"
+ "mov z30.d, z28.d\n"
+ "st1h { z10.h }, p2, [x20, #1, MUL VL]\n"
+ "mov z31.d, z28.d\n"
+ "trn1 z2.h, z12.h, z25.h\n"
+ "st1h { z0.h }, p2, [x20, #2, MUL VL]\n"
+ "addvl x20, x20, #-3\n"
+ "trn1 z10.h, z24.h, z17.h\n"
+ "trn1 z0.h, z16.h, z14.h\n"
+ "st1h { z2.h }, p2, [x20]\n"
+ "st1h { z10.h }, p2, [x20, #1, MUL VL]\n"
+ "st1h { z0.h }, p2, [x20, #2, MUL VL]\n"
+ "cbz x19, 3f\n"
+ "ld1w { z3.s }, p1/Z, [x19, x7, LSL #2]\n"
+ "3:" // Load mul: End
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_right_shifts]]\n"
+ "cbz x19, 4f\n"
+ "ld1w { z1.s }, p1/Z, [x19, x7, LSL #2]\n"
+ "4:" // Load right_shift: End
+ "ldr x17, [%x[args], %[offsetof_Args_input_cols]]\n"
+ "sub x19, x17, #0x1\n"
+ "orr x22, x19, %x[ld_in_col], LSL #16\n"
+ "ldr x16, [%x[args], %[offsetof_Args_inptr]]\n"
+ "orr x22, x6, x22, LSL #22\n"
+ "mov x21, #0xb\n"
+ "add x20, x5, x4\n"
+ "lsl x19, %x[ld_in_row], #0x0\n"
+ "ldr x15, [%x[args], %[offsetof_Args_output_cols]]\n"
+ "mov x8, #0x0\n"
+ "lsl x22, x22, #0x0\n"
+ "sub x21, x21, x20\n"
+ "madd x19, x19, x5, x16\n"
+ "5:" // Issue prefetches
+ "subs x21, x21, #0x1\n"
+ ".inst 0xf8b64a7c // rprfm pldstrm, x22, [x19]\n"
+ "add x19, x19, %x[ld_in_col]\n"
+ "bgt 5b\n"
+ "ldr x24, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "lsl x19, %x[ld_in_row], #0x0\n"
+ "msub x16, x5, x19, x16\n"
+ ".inst 0xc0040f80 // mova za.d[x8, #0], { z28.d-z31.d }\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_out_cols]]\n"
+ ".inst 0xc0040f81 // mova za.d[x8, #1], { z28.d-z31.d }\n"
+ "mov x21, #0x4\n"
+ "ldp x14, x13, [x24], #0x10\n"
+ ".inst 0xc0040f82 // mova za.d[x8, #2], { z28.d-z31.d }\n"
+ "ldp x11, x10, [x19], #0x10\n"
+ ".inst 0xc0040f83 // mova za.d[x8, #3], { z28.d-z31.d }\n"
+ "ldr x20, [%x[args], %[offsetof_Args_pad_left]]\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ "ldp x9, x28, [x24], #0x10\n"
+ "ldp x27, x26, [x19], #0x10\n"
+ "cbz x20, 7f\n"
+ "cmp x20, x21\n"
+ "csel x19, x20, x21, LT\n"
+ "sub x20, x20, x19\n"
+ "sub x21, x21, x19\n"
+ "cbz x20, 7f\n"
+ ".inst 0xc0060c04 // mova { z4.d-z7.d }, za.d[x8, #0]\n"
+ ".inst 0xc1a3ac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z3.s\n"
+ "and x21, x20, #0x1\n"
+ ".inst 0xc1a1aa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z1.s\n"
+ "add x20, x20, #0x1\n"
+ "lsr x20, x20, #0x1\n"
+ ".inst 0xc1a8ab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z8.s\n"
+ "sub x15, x15, x20\n"
+ ".inst 0xc1b7cf44 // sclamp { z4.s-z7.s }, z26.s, z23.s\n"
+ "6:" // Left padding
+ "subs x20, x20, #0x1\n"
+ "st1b { z4.s }, p1, [x14]\n"
+ "add x14, x14, x11\n"
+ "st1b { z5.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "st1b { z7.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ "bgt 6b\n"
+ "7:" // Left padding: End
+ "adds XZR, x5, x4\n"
+ "bne 14f\n"
+ "cbz x21, 12f\n"
+ "cmp x21, #0x1\n"
+ "sub x17, x17, x21\n"
+ "beq 11f\n"
+ "cmp x21, #0x2\n"
+ "beq 10f\n"
+ "cmp x21, #0x3\n"
+ "beq 9f\n"
+ "8:" // Unpadded: 4 priming loads
+ "add x20, x16, %x[ld_in_row]\n"
+ "ld1b { z11.s }, p1/Z, [x16]\n"
+ "addvl x19, SP, #12\n"
+ "ld1b { z21.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "add z11.h, z11.h, z9.h\n"
+ "ld1b { z12.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "ld1b { z20.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "add z12.h, z12.h, z9.h\n"
+ "ld1b { z13.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1b { z19.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z13.h, z13.h, z9.h\n"
+ "ld1b { z14.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1b { z18.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z9.h\n"
+ "ld1b { z15.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add z15.h, z15.h, z9.h\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1b { z16.s }, p1/Z, [x20]\n"
+ "mov z16.d, z16.d\n"
+ "add z16.h, z16.h, z9.h\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "9:" // Unpadded: 3 priming loads
+ "add x20, x16, %x[ld_in_row]\n"
+ "ld1b { z11.s }, p1/Z, [x16]\n"
+ "addvl x19, SP, #9\n"
+ "ld1b { z21.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "add z11.h, z11.h, z9.h\n"
+ "ld1b { z12.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "ld1b { z20.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "add z12.h, z12.h, z9.h\n"
+ "ld1b { z13.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1b { z19.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z13.h, z13.h, z9.h\n"
+ "ld1b { z14.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1b { z18.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z9.h\n"
+ "ld1b { z15.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add z15.h, z15.h, z9.h\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1b { z16.s }, p1/Z, [x20]\n"
+ "mov z16.d, z16.d\n"
+ "add z16.h, z16.h, z9.h\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "10:" // Unpadded: 2 priming loads
+ "add x21, x16, %x[ld_in_row]\n"
+ "ld1b { z11.s }, p1/Z, [x16]\n"
+ "addvl x20, SP, #6\n"
+ "ld1b { z21.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "add z11.h, z11.h, z9.h\n"
+ "ld1b { z12.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "addvl x19, SP, #12\n"
+ "ld1b { z20.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "add z12.h, z12.h, z9.h\n"
+ "ld1b { z13.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "ld1b { z19.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z13.h, z13.h, z9.h\n"
+ "ld1b { z14.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "ld1b { z18.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z9.h\n"
+ "ld1b { z15.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x21]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "add z15.h, z15.h, z9.h\n"
+ ".inst 0xa1402a82 // ld1h { z2.h, z10.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1b { z16.s }, p1/Z, [x21]\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "add z16.h, z16.h, z9.h\n"
+ "ld1h { z0.h }, p2/Z, [x20, #2, MUL VL]\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "11:" // Unpadded: 1 priming loads
+ "add x21, x16, %x[ld_in_row]\n"
+ "ld1b { z11.s }, p1/Z, [x16]\n"
+ "addvl x20, SP, #3\n"
+ "ld1b { z21.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "add z11.h, z11.h, z9.h\n"
+ "ld1b { z12.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "addvl x19, SP, #9\n"
+ "ld1b { z20.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "add z12.h, z12.h, z9.h\n"
+ "ld1b { z13.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "ld1b { z19.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z13.h, z13.h, z9.h\n"
+ "ld1b { z14.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "ld1b { z18.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z9.h\n"
+ "ld1b { z15.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x21]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "add z15.h, z15.h, z9.h\n"
+ ".inst 0xa1402a82 // ld1h { z2.h, z10.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1b { z16.s }, p1/Z, [x21]\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "add z16.h, z16.h, z9.h\n"
+ "ld1h { z0.h }, p2/Z, [x20, #2, MUL VL]\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "12:" // Unpadded: 0 priming loads
+ "cmp x17, #0x2\n"
+ ".inst 0xa1402be2 // ld1h { z2.h, z10.h }, pn10.b/Z, [SP]\n"
+ "ld1h { z0.h }, p2/Z, [SP, #2, MUL VL]\n"
+ "blt 22f\n"
+ "add x20, x16, %x[ld_in_row]\n"
+ "ld1b { z11.s }, p1/Z, [x16]\n"
+ "sub x17, x17, #0x2\n"
+ "ld1b { z21.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "sub x15, x15, #0x1\n"
+ "ld1b { z12.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "lsr x19, x17, #0x1\n"
+ "add z11.h, z11.h, z9.h\n"
+ "ld1b { z20.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "cmp x19, x15\n"
+ "ld1b { z13.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "csel x25, x19, x15, LT\n"
+ "add z12.h, z12.h, z9.h\n"
+ "ld1b { z19.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z13.h, z13.h, z9.h\n"
+ "ld1b { z14.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "ld1b { z18.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z9.h\n"
+ "ld1b { z15.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "and x17, x17, #0x1\n"
+ "ld1b { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add z15.h, z15.h, z9.h\n"
+ "ld1b { z16.s }, p1/Z, [x20]\n"
+ "mov z16.d, z16.d\n"
+ "add z16.h, z16.h, z9.h\n"
+ "sub x15, x15, x25\n"
+ "cbz x25, 21f\n"
+ "13:" // Unpadded: Main loop
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "addvl x24, SP, #6\n"
+ "addvl x23, SP, #12\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402b02 // ld1h { z2.h, z10.h }, pn10.b/Z, [x24]\n"
+ "add x22, x16, %x[ld_in_row]\n"
+ "addvl x21, SP, #3\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "addvl x20, SP, #9\n"
+ "subs x25, x25, #0x1\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402ae2 // ld1h { z2.h, z10.h }, pn10.b/Z, [x23]\n"
+ ".inst 0xc172156a // sdot za.s[x8, 2], { z11.h-z14.h }, z2.h\n"
+ "ld1b { z11.s }, p1/Z, [x16]\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "add x19, x16, %x[ld_in_row]\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x24, #2, MUL VL]\n"
+ ".inst 0xc17a158a // sdot za.s[x8, 2], { z12.h-z15.h }, z10.h\n"
+ "ld1b { z21.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x23, #2, MUL VL]\n"
+ "add z11.h, z11.h, z9.h\n"
+ "ld1b { z12.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ ".inst 0xc17015aa // sdot za.s[x8, 2], { z13.h-z16.h }, z0.h\n"
+ "ld1b { z20.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "add z12.h, z12.h, z9.h\n"
+ "ld1b { z13.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ ".inst 0xc0060c04 // mova { z4.d-z7.d }, za.d[x8, #0]\n"
+ "add x8, x8, #0x1\n"
+ "ld1b { z19.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z13.h, z13.h, z9.h\n"
+ "ld1b { z14.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ ".inst 0xc1a3ac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z3.s\n"
+ "ld1b { z18.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z9.h\n"
+ "ld1b { z15.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ ".inst 0xc1a1aa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z1.s\n"
+ "ld1b { z17.s }, p1/Z, [x22]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "add z15.h, z15.h, z9.h\n"
+ ".inst 0xa1402aa2 // ld1h { z2.h, z10.h }, pn10.b/Z, [x21]\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ ".inst 0xc1a8ab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z8.s\n"
+ "ld1b { z16.s }, p1/Z, [x22]\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402a82 // ld1h { z2.h, z10.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "add z16.h, z16.h, z9.h\n"
+ "ld1h { z0.h }, p2/Z, [x21, #2, MUL VL]\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc1b7cf44 // sclamp { z4.s-z7.s }, z26.s, z23.s\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x20, #2, MUL VL]\n"
+ "st1b { z4.s }, p1, [x14]\n"
+ "add x14, x14, x11\n"
+ "ld1b { z11.s }, p1/Z, [x16]\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "st1b { z5.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ "ld1b { z21.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "ld1b { z12.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "add x9, x9, x27\n"
+ "st1b { z7.s }, p1, [x28]\n"
+ "ld1b { z20.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "add x28, x28, x26\n"
+ "ld1b { z13.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ "add z11.h, z11.h, z9.h\n"
+ "ld1b { z19.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z12.h, z12.h, z9.h\n"
+ "ld1b { z14.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "add z13.h, z13.h, z9.h\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "ld1b { z18.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z9.h\n"
+ "ld1b { z15.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add z15.h, z15.h, z9.h\n"
+ "ld1b { z16.s }, p1/Z, [x19]\n"
+ "mov z16.d, z16.d\n"
+ "add z16.h, z16.h, z9.h\n"
+ ".inst 0xa1402be2 // ld1h { z2.h, z10.h }, pn10.b/Z, [SP]\n"
+ "ld1h { z0.h }, p2/Z, [SP, #2, MUL VL]\n"
+ "bgt 13b\n"
+ "b 21f\n"
+ "14:" // Padded
+ "cbz x21, 19f\n"
+ "cmp x21, #0x1\n"
+ "sub x17, x17, x21\n"
+ "beq 18f\n"
+ "cmp x21, #0x2\n"
+ "beq 17f\n"
+ "cmp x21, #0x3\n"
+ "beq 16f\n"
+ "15:" // Padded: 4 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z11.s }, p0/Z, [x16]\n"
+ "add z11.h, p0/M, z11.h, z9.h\n"
+ "add x20, x16, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z21.s }, p0/Z, [x20]\n"
+ "add z21.h, p0/M, z21.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z12.s }, p0/Z, [x20]\n"
+ "add z12.h, p0/M, z12.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z20.s }, p0/Z, [x20]\n"
+ "add z20.h, p0/M, z20.h, z9.h\n"
+ "mov x12, #0x4\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z13.s }, p0/Z, [x20]\n"
+ "add z13.h, p0/M, z13.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z19.s }, p0/Z, [x20]\n"
+ "add z19.h, p0/M, z19.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z14.s }, p0/Z, [x20]\n"
+ "add z14.h, p0/M, z14.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z18.s }, p0/Z, [x20]\n"
+ "mov x12, #0x8\n"
+ "add z18.h, p0/M, z18.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z15.s }, p0/Z, [x20]\n"
+ "add z15.h, p0/M, z15.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z17.s }, p0/Z, [x20]\n"
+ "add z17.h, p0/M, z17.h, z9.h\n"
+ "addvl x19, SP, #12\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1b { z16.s }, p0/Z, [x20]\n"
+ "add z16.h, p0/M, z16.h, z9.h\n"
+ "mov z16.d, z16.d\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "16:" // Padded: 3 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z11.s }, p0/Z, [x16]\n"
+ "add z11.h, p0/M, z11.h, z9.h\n"
+ "add x20, x16, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z21.s }, p0/Z, [x20]\n"
+ "add z21.h, p0/M, z21.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z12.s }, p0/Z, [x20]\n"
+ "add z12.h, p0/M, z12.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z20.s }, p0/Z, [x20]\n"
+ "add z20.h, p0/M, z20.h, z9.h\n"
+ "mov x12, #0x4\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z13.s }, p0/Z, [x20]\n"
+ "add z13.h, p0/M, z13.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z19.s }, p0/Z, [x20]\n"
+ "add z19.h, p0/M, z19.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z14.s }, p0/Z, [x20]\n"
+ "add z14.h, p0/M, z14.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z18.s }, p0/Z, [x20]\n"
+ "mov x12, #0x8\n"
+ "add z18.h, p0/M, z18.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z15.s }, p0/Z, [x20]\n"
+ "add z15.h, p0/M, z15.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z17.s }, p0/Z, [x20]\n"
+ "add z17.h, p0/M, z17.h, z9.h\n"
+ "addvl x19, SP, #9\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1b { z16.s }, p0/Z, [x20]\n"
+ "add z16.h, p0/M, z16.h, z9.h\n"
+ "mov z16.d, z16.d\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "17:" // Padded: 2 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z11.s }, p0/Z, [x16]\n"
+ "add z11.h, p0/M, z11.h, z9.h\n"
+ "add x19, x16, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z21.s }, p0/Z, [x19]\n"
+ "add z21.h, p0/M, z21.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z12.s }, p0/Z, [x19]\n"
+ "add z12.h, p0/M, z12.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z9.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z18.h, p0/M, z18.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z15.s }, p0/Z, [x19]\n"
+ "add z15.h, p0/M, z15.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z9.h\n"
+ "addvl x20, SP, #6\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ ".inst 0xa1402a82 // ld1h { z2.h, z10.h }, pn10.b/Z, [x20]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "addvl x19, SP, #12\n"
+ "add z16.h, p0/M, z16.h, z9.h\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "mov z16.d, z16.d\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "ld1h { z0.h }, p2/Z, [x20, #2, MUL VL]\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "18:" // Padded: 1 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z11.s }, p0/Z, [x16]\n"
+ "add z11.h, p0/M, z11.h, z9.h\n"
+ "add x19, x16, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z21.s }, p0/Z, [x19]\n"
+ "add z21.h, p0/M, z21.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z12.s }, p0/Z, [x19]\n"
+ "add z12.h, p0/M, z12.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z9.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z18.h, p0/M, z18.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z15.s }, p0/Z, [x19]\n"
+ "add z15.h, p0/M, z15.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z9.h\n"
+ "addvl x20, SP, #3\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ ".inst 0xa1402a82 // ld1h { z2.h, z10.h }, pn10.b/Z, [x20]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "addvl x19, SP, #9\n"
+ "add z16.h, p0/M, z16.h, z9.h\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "mov z16.d, z16.d\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "ld1h { z0.h }, p2/Z, [x20, #2, MUL VL]\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "19:" // Padded: 0 priming loads
+ "cmp x17, #0x2\n"
+ ".inst 0xa1402be2 // ld1h { z2.h, z10.h }, pn10.b/Z, [SP]\n"
+ "ld1h { z0.h }, p2/Z, [SP, #2, MUL VL]\n"
+ "blt 22f\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z11.s }, p0/Z, [x16]\n"
+ "add z11.h, p0/M, z11.h, z9.h\n"
+ "add x19, x16, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z21.s }, p0/Z, [x19]\n"
+ "add z21.h, p0/M, z21.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z12.s }, p0/Z, [x19]\n"
+ "add z12.h, p0/M, z12.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z9.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z18.h, p0/M, z18.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z15.s }, p0/Z, [x19]\n"
+ "add z15.h, p0/M, z15.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z9.h\n"
+ "sub x17, x17, #0x2\n"
+ "sub x15, x15, #0x1\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "lsr x19, x17, #0x1\n"
+ "cmp x19, x15\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "mov z16.d, z16.d\n"
+ "csel x24, x19, x15, LT\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "and x17, x17, #0x1\n"
+ "sub x15, x15, x24\n"
+ "cbz x24, 21f\n"
+ "20:" // Padded: Main loop
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "addvl x23, SP, #6\n"
+ "addvl x22, SP, #12\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402ae2 // ld1h { z2.h, z10.h }, pn10.b/Z, [x23]\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "add x19, x16, %x[ld_in_row]\n"
+ "addvl x21, SP, #3\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402ac2 // ld1h { z2.h, z10.h }, pn10.b/Z, [x22]\n"
+ "addvl x20, SP, #9\n"
+ "subs x24, x24, #0x1\n"
+ ".inst 0xc172156a // sdot za.s[x8, 2], { z11.h-z14.h }, z2.h\n"
+ "ld1b { z11.s }, p0/Z, [x16]\n"
+ "add z11.h, p0/M, z11.h, z9.h\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z21.s }, p0/Z, [x19]\n"
+ "add z21.h, p0/M, z21.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc17a158a // sdot za.s[x8, 2], { z12.h-z15.h }, z10.h\n"
+ "ld1b { z12.s }, p0/Z, [x19]\n"
+ "add z12.h, p0/M, z12.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x23, #2, MUL VL]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x4\n"
+ "ld1b { z20.s }, p0/Z, [x19]\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "add z20.h, p0/M, z20.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "ld1h { z0.h }, p2/Z, [x22, #2, MUL VL]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc17015aa // sdot za.s[x8, 2], { z13.h-z16.h }, z0.h\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "ld1b { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z18.h, p0/M, z18.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z15.s }, p0/Z, [x19]\n"
+ "add z15.h, p0/M, z15.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z9.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ ".inst 0xa1402aa2 // ld1h { z2.h, z10.h }, pn10.b/Z, [x21]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc0060c04 // mova { z4.d-z7.d }, za.d[x8, #0]\n"
+ "add x8, x8, #0x1\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "mov x12, #0x0\n"
+ "add z16.h, p0/M, z16.h, z9.h\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402a82 // ld1h { z2.h, z10.h }, pn10.b/Z, [x20]\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "ld1b { z11.s }, p0/Z, [x16]\n"
+ "add z11.h, p0/M, z11.h, z9.h\n"
+ "add x19, x16, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z21.s }, p0/Z, [x19]\n"
+ "add z21.h, p0/M, z21.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ "ld1b { z12.s }, p0/Z, [x19]\n"
+ "mov z16.d, z16.d\n"
+ "ld1h { z0.h }, p2/Z, [x21, #2, MUL VL]\n"
+ "add z12.h, p0/M, z12.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z20.s }, p0/Z, [x19]\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "mov x12, #0x4\n"
+ "add z20.h, p0/M, z20.h, z9.h\n"
+ "ld1h { z0.h }, p2/Z, [x20, #2, MUL VL]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "ld1b { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z18.h, p0/M, z18.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z15.s }, p0/Z, [x19]\n"
+ ".inst 0xc1a3ac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z3.s\n"
+ "add z15.h, p0/M, z15.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ ".inst 0xc1a1aa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z1.s\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ "add z17.h, p0/M, z17.h, z9.h\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z9.h\n"
+ ".inst 0xc1a8ab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z8.s\n"
+ ".inst 0xa1402be2 // ld1h { z2.h, z10.h }, pn10.b/Z, [SP]\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ ".inst 0xc1b7cf44 // sclamp { z4.s-z7.s }, z26.s, z23.s\n"
+ "st1b { z4.s }, p1, [x14]\n"
+ "add x14, x14, x11\n"
+ "ld1h { z0.h }, p2/Z, [SP, #2, MUL VL]\n"
+ "st1b { z5.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "st1b { z7.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "mov z16.d, z16.d\n"
+ "bgt 20b\n"
+ "21:" // Main loop tail
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "addvl x23, SP, #6\n"
+ "addvl x22, SP, #12\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402ae2 // ld1h { z2.h, z10.h }, pn10.b/Z, [x23]\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "add x21, x16, %x[ld_in_row]\n"
+ "addvl x20, SP, #3\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402ac2 // ld1h { z2.h, z10.h }, pn10.b/Z, [x22]\n"
+ "addvl x19, SP, #9\n"
+ ".inst 0xc172156a // sdot za.s[x8, 2], { z11.h-z14.h }, z2.h\n"
+ "ld1b { z11.s }, p0/Z, [x16]\n"
+ "add z11.h, p0/M, z11.h, z9.h\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z21.s }, p0/Z, [x21]\n"
+ "add z21.h, p0/M, z21.h, z9.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc17a158a // sdot za.s[x8, 2], { z12.h-z15.h }, z10.h\n"
+ "ld1b { z12.s }, p0/Z, [x21]\n"
+ "add z12.h, p0/M, z12.h, z9.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x23, #2, MUL VL]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x4\n"
+ "ld1b { z20.s }, p0/Z, [x21]\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "add z20.h, p0/M, z20.h, z9.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "ld1h { z0.h }, p2/Z, [x22, #2, MUL VL]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc17015aa // sdot za.s[x8, 2], { z13.h-z16.h }, z0.h\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "ld1b { z13.s }, p0/Z, [x21]\n"
+ "add z13.h, p0/M, z13.h, z9.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z19.s }, p0/Z, [x21]\n"
+ "add z19.h, p0/M, z19.h, z9.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z14.s }, p0/Z, [x21]\n"
+ "add z14.h, p0/M, z14.h, z9.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z18.s }, p0/Z, [x21]\n"
+ "mov x12, #0x8\n"
+ "add z18.h, p0/M, z18.h, z9.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z15.s }, p0/Z, [x21]\n"
+ "add z15.h, p0/M, z15.h, z9.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z17.s }, p0/Z, [x21]\n"
+ "add z17.h, p0/M, z17.h, z9.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ ".inst 0xa1402a82 // ld1h { z2.h, z10.h }, pn10.b/Z, [x20]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0xc0060c04 // mova { z4.d-z7.d }, za.d[x8, #0]\n"
+ "add x8, x8, #0x1\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1b { z16.s }, p0/Z, [x21]\n"
+ ".inst 0xc1a3ac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z3.s\n"
+ "add z16.h, p0/M, z16.h, z9.h\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ ".inst 0xc1a1aa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z1.s\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "mov z16.d, z16.d\n"
+ "ld1h { z0.h }, p2/Z, [x20, #2, MUL VL]\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc1a8ab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z8.s\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc1b7cf44 // sclamp { z4.s-z7.s }, z26.s, z23.s\n"
+ "st1b { z4.s }, p1, [x14]\n"
+ "add x14, x14, x11\n"
+ "st1b { z5.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ ".inst 0xa1402be2 // ld1h { z2.h, z10.h }, pn10.b/Z, [SP]\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [SP, #2, MUL VL]\n"
+ "st1b { z7.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ "22:" // Main loop skip tail
+ "cbz x17, 23f\n" // Skip remainder inputs
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z11.s }, p0/Z, [x16]\n"
+ "add z11.h, p0/M, z11.h, z9.h\n"
+ "add x19, x16, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z21.s }, p0/Z, [x19]\n"
+ "add z21.h, p0/M, z21.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z12.s }, p0/Z, [x19]\n"
+ "add z12.h, p0/M, z12.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z9.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z18.h, p0/M, z18.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z15.s }, p0/Z, [x19]\n"
+ "add z15.h, p0/M, z15.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z9.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "addvl x20, SP, #6\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "mov z16.d, z16.d\n"
+ "addvl x19, SP, #12\n"
+ "sub x15, x15, #0x1\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402a82 // ld1h { z2.h, z10.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x20, #2, MUL VL]\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ ".inst 0xc0060c04 // mova { z4.d-z7.d }, za.d[x8, #0]\n"
+ ".inst 0xc1a3ac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z3.s\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1a1aa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z1.s\n"
+ ".inst 0xc172156a // sdot za.s[x8, 2], { z11.h-z14.h }, z2.h\n"
+ ".inst 0xc1a8ab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z8.s\n"
+ ".inst 0xc17a158a // sdot za.s[x8, 2], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc1b7cf44 // sclamp { z4.s-z7.s }, z26.s, z23.s\n"
+ "st1b { z4.s }, p1, [x14]\n"
+ "add x14, x14, x11\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ "st1b { z5.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ ".inst 0xc17015aa // sdot za.s[x8, 2], { z13.h-z16.h }, z0.h\n"
+ "add x8, x8, #0x1\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "st1b { z7.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ "23:" // Tail input: End
+ "cbz x15, 25f\n"
+ "24:" // Right padding loop
+ ".inst 0xc0060c04 // mova { z4.d-z7.d }, za.d[x8, #0]\n"
+ ".inst 0xc1a3ac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z3.s\n"
+ "add x8, x8, #0x1\n"
+ ".inst 0xc1a1aa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z1.s\n"
+ "subs x15, x15, #0x1\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ ".inst 0xc1a8ab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z8.s\n"
+ ".inst 0xc1b7cf44 // sclamp { z4.s-z7.s }, z26.s, z23.s\n"
+ "st1b { z4.s }, p1, [x14]\n"
+ "add x14, x14, x11\n"
+ "st1b { z5.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "st1b { z7.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ "bgt 24b\n"
+ "25:" // End
+ "ldr x21, [%x[args], %[offsetof_Args_weights]]\n"
+ "incw x21, ALL, MUL #16\n"
+ "incw x21, ALL, MUL #9\n"
+ "str x21, [%x[args], %[offsetof_Args_weights]]\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_in_vl]]\n"
+ "incw x7\n"
+ "whilelt p1.s, x7, x6\n"
+ "ldr x16, [%x[args], %[offsetof_Args_inptr]]\n"
+ "add x16, x16, x19\n"
+ "str x16, [%x[args], %[offsetof_Args_inptr]]\n"
+ "ldr x24, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "ldr x23, [%x[args], %[offsetof_Args_ld_out_vls]]\n"
+ "ldp x22, x21, [x24, #0x0]\n"
+ "ldp x20, x19, [x23, #0x0]\n"
+ "add x22, x22, x20\n"
+ "add x21, x21, x19\n"
+ "stp x22, x21, [x24, #0x0]\n"
+ "ldp x22, x21, [x24, #0x10]\n"
+ "ldp x20, x19, [x23, #0x10]\n"
+ "add x22, x22, x20\n"
+ "add x21, x21, x19\n"
+ "stp x22, x21, [x24, #0x10]\n"
+ "b.any 1b\n"
+ "addvl SP, SP, #15\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [ld_in_col] "r" (ld_in_col), [ld_in_row] "r" (ld_in_row), [offsetof_Args_current_channel] "I" (offsetof(Args, current_channel)), [offsetof_Args_inptr] "I" (offsetof(Args, inptr)), [offsetof_Args_input_cols] "I" (offsetof(Args, input_cols)), [offsetof_Args_ld_in_vl] "I" (offsetof(Args, ld_in_vl)), [offsetof_Args_ld_out_cols] "I" (offsetof(Args, ld_out_cols)), [offsetof_Args_ld_out_vls] "I" (offsetof(Args, ld_out_vls)), [offsetof_Args_n_channels] "I" (offsetof(Args, n_channels)), [offsetof_Args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_Args_output_cols] "I" (offsetof(Args, output_cols)), [offsetof_Args_pad_bottom] "I" (offsetof(Args, pad_bottom)), [offsetof_Args_pad_left] "I" (offsetof(Args, pad_left)), [offsetof_Args_pad_top] "I" (offsetof(Args, pad_top)), [offsetof_Args_weights] "I" (offsetof(Args, weights)), [offsetof_Requantize32_a_offset] "I" (offsetof(arm_gemm::Requantize32, a_offset)), [offsetof_Requantize32_b_offset] "I" (offsetof(arm_gemm::Requantize32, b_offset)), [offsetof_Requantize32_bias] "I" (offsetof(arm_gemm::Requantize32, bias)), [offsetof_Requantize32_c_offset] "I" (offsetof(arm_gemm::Requantize32, c_offset)), [offsetof_Requantize32_maxval] "I" (offsetof(arm_gemm::Requantize32, maxval)), [offsetof_Requantize32_minval] "I" (offsetof(arm_gemm::Requantize32, minval)), [offsetof_Requantize32_per_channel_muls] "I" (offsetof(arm_gemm::Requantize32, per_channel_muls)), [offsetof_Requantize32_per_channel_right_shifts] "I" (offsetof(arm_gemm::Requantize32, per_channel_right_shifts)), [offsetof_Requantize32_per_layer_mul] "I" (offsetof(arm_gemm::Requantize32, per_layer_mul)), [offsetof_Requantize32_per_layer_right_shift] "I" (offsetof(arm_gemm::Requantize32, per_layer_right_shift)), [qp] "r" (&qp)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8s8u8q_planar_3x3_s1_4rows_dot_za.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8s8u8q_planar_3x3_s1_4rows_dot_za.hpp
new file mode 100644
index 0000000..de574ff
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8s8u8q_planar_3x3_s1_4rows_dot_za.hpp
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_u8s8u8q_planar_3x3_s1_4rows_dot_za_impl(
+ const uint8_t *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const int8_t *weights,
+ uint8_t **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ const arm_gemm::Requantize32 &qp
+);
+
+class sme2_u8s8u8q_planar_3x3_s1_4rows_dot_za : public PlanarStrategy<uint8_t, int8_t>
+{
+ using Parent = PlanarStrategy<uint8_t, int8_t>;
+
+ public:
+ using return_type = uint8_t;
+ constexpr static auto output_rows = 4u;
+ constexpr static auto kernel_rows = 3u, kernel_cols = 3u;
+ constexpr static auto stride_rows = 1u, stride_cols = 1u;
+ constexpr static auto vl_type = arm_gemm::VLType::SME;
+
+ sme2_u8s8u8q_planar_3x3_s1_4rows_dot_za(const CPUInfo *)
+ : Parent(kernel_rows, kernel_cols, stride_rows, stride_cols, output_rows, vl_type)
+ {
+ }
+
+ typename Parent::KernelType get_kernel(void) const override
+ {
+ return sme2_u8s8u8q_planar_3x3_s1_4rows_dot_za_impl;
+ }
+};
+
+} // namespace depthwise
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8s8u8q_planar_3x3_s1_4rows_dot_za/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8s8u8q_planar_3x3_s1_4rows_dot_za/generic.cpp
new file mode 100644
index 0000000..ad765ba
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8s8u8q_planar_3x3_s1_4rows_dot_za/generic.cpp
@@ -0,0 +1,664 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <algorithm>
+#include <cstddef>
+#include "arm_gemm.hpp"
+
+using arm_gemm::Requantize32;
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_u8s8u8q_planar_3x3_s1_4rows_dot_za_impl(
+ const uint8_t *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const int8_t *weights,
+ uint8_t **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ const arm_gemm::Requantize32 &qp
+)
+{
+ struct Args
+ {
+ const uint8_t *inptr;
+ size_t ld_in_vl;
+ long unsigned int pad_top, pad_bottom, pad_left;
+ const int8_t *weights;
+ long unsigned int input_cols, output_cols;
+ uint8_t **outptrs;
+ const size_t *ld_out_cols;
+ const size_t *ld_out_vls;
+ long unsigned int current_channel, n_channels;
+ };
+
+ Args args = { inptr, ld_in_vl, pad_top, 6u - std::min(6u, pad_top + valid_input_rows), pad_left, weights, valid_input_cols, output_cols, outptrs, outlds, outvllds, start_channel, valid_channels };
+
+ __asm__ __volatile__(
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "ldr x7, [%x[args], %[offsetof_Args_pad_bottom]]\n"
+ "ptrue p2.b\n"
+ "mov x19, #0x6\n"
+ "ldr x8, [%x[args], %[offsetof_Args_pad_top]]\n"
+ "ld1rh { z24.h }, p2/Z, [%x[qp], %[offsetof_Requantize32_a_offset]]\n"
+ "sub x19, x19, x7\n"
+ ".inst 0x25207812 // ptrue pn10.b\n"
+ "ldr x17, [%x[args], %[offsetof_Args_n_channels]]\n"
+ "whilelt p1.s, XZR, x17\n"
+ "whilelt p9.s, XZR, x19\n"
+ "ld1rw { z12.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_c_offset]]\n"
+ "whilelt p8.s, XZR, x8\n"
+ "addvl SP, SP, #-12\n"
+ "ldr x16, [%x[args], %[offsetof_Args_current_channel]]\n"
+ "neg z24.h, p2/M, z24.h\n"
+ "eor p8.b, p2/Z, p8.b, p9.b\n"
+ "ld1rw { z10.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_per_layer_mul]]\n"
+ "ld1rw { z11.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_per_layer_right_shift]]\n"
+ "ld1rw { z22.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_minval]]\n"
+ "ld1rw { z26.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_maxval]]\n"
+ "1:" // Channel loop
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_bias]]\n"
+ "mov z8.s, #0x0\n"
+ "cbz x19, 2f\n"
+ "ld1w { z8.s }, p1/Z, [x19, x16, LSL #2]\n"
+ "2:" // Load bias: Done
+ "ldr x21, [%x[args], %[offsetof_Args_weights]]\n"
+ "mov x19, x21\n"
+ "ld1sb { z27.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "ld1rh { z21.h }, p2/Z, [%x[qp], %[offsetof_Requantize32_b_offset]]\n"
+ "mov z20.h, #0x0\n"
+ "sub z27.h, z27.h, z21.h\n"
+ "incw x21\n"
+ "ld1sb { z23.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "sub z23.h, z23.h, z21.h\n"
+ "trn1 z0.h, z20.h, z27.h\n"
+ "ld1sb { z16.s }, p2/Z, [x19]\n"
+ "sub z16.h, z16.h, z21.h\n"
+ "mov x19, x21\n"
+ "trn1 z1.h, z27.h, z23.h\n"
+ "ld1sb { z27.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "trn1 z2.h, z23.h, z16.h\n"
+ "trn1 z3.h, z16.h, z20.h\n"
+ "ld1sb { z23.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "sub z27.h, z27.h, z21.h\n"
+ "sub z23.h, z23.h, z21.h\n"
+ "ld1sb { z16.s }, p2/Z, [x19]\n"
+ "sub z16.h, z16.h, z21.h\n"
+ "addvl x20, SP, #12\n"
+ "incw x21\n"
+ "addvl x20, x20, #-4\n"
+ "mov x19, x21\n"
+ "st1h { z0.h }, p2, [x20]\n"
+ "trn1 z0.h, z20.h, z27.h\n"
+ "st1h { z1.h }, p2, [x20, #1, MUL VL]\n"
+ "trn1 z1.h, z27.h, z23.h\n"
+ "ld1sb { z27.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "st1h { z2.h }, p2, [x20, #2, MUL VL]\n"
+ "trn1 z2.h, z23.h, z16.h\n"
+ "ld1sb { z23.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "st1h { z3.h }, p2, [x20, #3, MUL VL]\n"
+ "trn1 z3.h, z16.h, z20.h\n"
+ "ld1sb { z16.s }, p2/Z, [x19]\n"
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_muls]]\n"
+ "sub z27.h, z27.h, z21.h\n"
+ "sub z23.h, z23.h, z21.h\n"
+ "addvl x20, x20, #-4\n"
+ "st1h { z0.h }, p2, [x20]\n"
+ "sub z16.h, z16.h, z21.h\n"
+ "st1h { z1.h }, p2, [x20, #1, MUL VL]\n"
+ "mov z9.d, z8.d\n"
+ "st1h { z2.h }, p2, [x20, #2, MUL VL]\n"
+ "trn1 z0.h, z20.h, z27.h\n"
+ "trn1 z1.h, z27.h, z23.h\n"
+ "st1h { z3.h }, p2, [x20, #3, MUL VL]\n"
+ "addvl x20, x20, #-4\n"
+ "trn1 z2.h, z23.h, z16.h\n"
+ "trn1 z3.h, z16.h, z20.h\n"
+ "st1h { z0.h }, p2, [x20]\n"
+ "st1h { z1.h }, p2, [x20, #1, MUL VL]\n"
+ "st1h { z2.h }, p2, [x20, #2, MUL VL]\n"
+ "st1h { z3.h }, p2, [x20, #3, MUL VL]\n"
+ "cbz x19, 3f\n"
+ "ld1w { z10.s }, p1/Z, [x19, x16, LSL #2]\n"
+ "3:" // Load mul: End
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_right_shifts]]\n"
+ "cbz x19, 4f\n"
+ "ld1w { z11.s }, p1/Z, [x19, x16, LSL #2]\n"
+ "4:" // Load right_shift: End
+ "ldr x15, [%x[args], %[offsetof_Args_input_cols]]\n"
+ "sub x19, x15, #0x1\n"
+ "orr x22, x19, %x[ld_in_col], LSL #16\n"
+ "ldr x14, [%x[args], %[offsetof_Args_inptr]]\n"
+ "orr x22, x17, x22, LSL #22\n"
+ "mov x21, #0x6\n"
+ "add x20, x8, x7\n"
+ "lsl x19, %x[ld_in_row], #0x0\n"
+ "ldr x13, [%x[args], %[offsetof_Args_output_cols]]\n"
+ "mov x11, #0x0\n"
+ "lsl x22, x22, #0x0\n"
+ "sub x21, x21, x20\n"
+ "madd x19, x19, x8, x14\n"
+ "5:" // Issue prefetches
+ "subs x21, x21, #0x1\n"
+ ".inst 0xf8b64a7c // rprfm pldstrm, x22, [x19]\n"
+ "add x19, x19, %x[ld_in_col]\n"
+ "bgt 5b\n"
+ "ldr x24, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "lsl x19, %x[ld_in_row], #0x0\n"
+ "msub x14, x8, x19, x14\n"
+ ".inst 0xc0046900 // mova za.d[x11, #0], { z8.d-z9.d }\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_out_cols]]\n"
+ ".inst 0xc0046901 // mova za.d[x11, #1], { z8.d-z9.d }\n"
+ "mov x21, #0x2\n"
+ "ldp x10, x9, [x24], #0x10\n"
+ ".inst 0xc0046902 // mova za.d[x11, #2], { z8.d-z9.d }\n"
+ "ldp x28, x27, [x19], #0x10\n"
+ ".inst 0xc0046903 // mova za.d[x11, #3], { z8.d-z9.d }\n"
+ "ldr x20, [%x[args], %[offsetof_Args_pad_left]]\n"
+ ".inst 0xc0046904 // mova za.d[x11, #4], { z8.d-z9.d }\n"
+ "ldp x26, x25, [x24], #0x10\n"
+ ".inst 0xc0046905 // mova za.d[x11, #5], { z8.d-z9.d }\n"
+ "ldp x24, x23, [x19], #0x10\n"
+ "cbz x20, 7f\n"
+ "cmp x20, x21\n"
+ "csel x19, x20, x21, LT\n"
+ "sub x20, x20, x19\n"
+ "sub x21, x21, x19\n"
+ "cbz x20, 7f\n"
+ ".inst 0xc0066804 // mova { z4.d-z5.d }, za.d[x11, #0]\n"
+ "sub x13, x13, x20\n"
+ ".inst 0xc0066826 // mova { z6.d-z7.d }, za.d[x11, #1]\n"
+ ".inst 0xc1aaac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z10.s\n"
+ ".inst 0xc1abaa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z11.s\n"
+ ".inst 0xc1acab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z12.s\n"
+ ".inst 0xc1bacec4 // sclamp { z4.s-z7.s }, z22.s, z26.s\n"
+ "6:" // Left padding
+ "subs x20, x20, #0x1\n"
+ "st1b { z4.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "st1b { z5.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ "st1b { z7.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ "bgt 6b\n"
+ "7:" // Left padding: End
+ "adds XZR, x8, x7\n"
+ "bne 12f\n"
+ "cbz x21, 10f\n"
+ "cmp x21, #0x1\n"
+ "sub x15, x15, x21\n"
+ "beq 9f\n"
+ "8:" // Unpadded: 2 priming loads
+ "add x20, x14, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x14]\n"
+ "addvl x19, SP, #8\n"
+ "ld1b { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z13.h, z17.h, z16.h\n"
+ "add z13.h, z13.h, z24.h\n"
+ "ld1b { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "ld1b { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z14.h, z17.h, z16.h\n"
+ "add z14.h, z14.h, z24.h\n"
+ "ld1b { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1b { z16.s }, p1/Z, [x20]\n"
+ "trn1 z15.h, z17.h, z16.h\n"
+ "add z15.h, z15.h, z24.h\n"
+ ".inst 0xa0402a60 // ld1h { z0.h-z1.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc16175a8 // sdot za.s[x11, 0], { z13.h-z14.h }, z1.h\n"
+ ".inst 0xc16075a9 // sdot za.s[x11, 1], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xa0412a62 // ld1h { z2.h-z3.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16375c8 // sdot za.s[x11, 0], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xc16275c9 // sdot za.s[x11, 1], { z14.h-z15.h }, z2.h\n"
+ "9:" // Unpadded: 1 priming loads
+ "add x21, x14, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x14]\n"
+ "addvl x20, SP, #4\n"
+ "ld1b { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z13.h, z17.h, z16.h\n"
+ "add z13.h, z13.h, z24.h\n"
+ "ld1b { z17.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "addvl x19, SP, #8\n"
+ "ld1b { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z14.h, z17.h, z16.h\n"
+ "add z14.h, z14.h, z24.h\n"
+ "ld1b { z17.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "ld1b { z16.s }, p1/Z, [x21]\n"
+ "trn1 z15.h, z17.h, z16.h\n"
+ "add z15.h, z15.h, z24.h\n"
+ ".inst 0xa0402a80 // ld1h { z0.h-z1.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc16175a8 // sdot za.s[x11, 0], { z13.h-z14.h }, z1.h\n"
+ ".inst 0xc16075a9 // sdot za.s[x11, 1], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xa0402a60 // ld1h { z0.h-z1.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xa0412a82 // ld1h { z2.h-z3.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc16175aa // sdot za.s[x11, 2], { z13.h-z14.h }, z1.h\n"
+ ".inst 0xc16075ab // sdot za.s[x11, 3], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xc16375c8 // sdot za.s[x11, 0], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xc16275c9 // sdot za.s[x11, 1], { z14.h-z15.h }, z2.h\n"
+ ".inst 0xa0412a62 // ld1h { z2.h-z3.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16375ca // sdot za.s[x11, 2], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xc16275cb // sdot za.s[x11, 3], { z14.h-z15.h }, z2.h\n"
+ "10:" // Unpadded: 0 priming loads
+ ".inst 0xa0402be0 // ld1h { z0.h-z1.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xa0412be2 // ld1h { z2.h-z3.h }, pn10.b/Z, [SP, #0x2, MUL VL]\n"
+ "cbz x15, 18f\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x14]\n"
+ "sub x15, x15, #0x1\n"
+ "ld1b { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z13.h, z17.h, z16.h\n"
+ "sub x13, x13, #0x1\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "cmp x15, x13\n"
+ "add z13.h, z13.h, z24.h\n"
+ "ld1b { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z14.h, z17.h, z16.h\n"
+ "csel x22, x15, x13, LT\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "add z14.h, z14.h, z24.h\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "ld1b { z16.s }, p1/Z, [x19]\n"
+ "trn1 z15.h, z17.h, z16.h\n"
+ "add z15.h, z15.h, z24.h\n"
+ "sub x13, x13, x22\n"
+ "cbz x22, 17f\n"
+ "11:" // Unpadded: Main loop
+ ".inst 0xc16175a8 // sdot za.s[x11, 0], { z13.h-z14.h }, z1.h\n"
+ "addvl x21, SP, #4\n"
+ "addvl x20, SP, #8\n"
+ "ld1b { z21.s }, p1/Z, [x14]\n"
+ ".inst 0xc16075a9 // sdot za.s[x11, 1], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xa0402aa0 // ld1h { z0.h-z1.h }, pn10.b/Z, [x21]\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ "subs x22, x22, #0x1\n"
+ ".inst 0xc16375c8 // sdot za.s[x11, 0], { z14.h-z15.h }, z3.h\n"
+ "ld1b { z20.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ ".inst 0xc16275c9 // sdot za.s[x11, 1], { z14.h-z15.h }, z2.h\n"
+ ".inst 0xa0412aa2 // ld1h { z2.h-z3.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0xc0066804 // mova { z4.d-z5.d }, za.d[x11, #0]\n"
+ "ld1b { z19.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc0066826 // mova { z6.d-z7.d }, za.d[x11, #1]\n"
+ ".inst 0xc1aaac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z10.s\n"
+ ".inst 0xc16175aa // sdot za.s[x11, 2], { z13.h-z14.h }, z1.h\n"
+ "ld1b { z18.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc16075ab // sdot za.s[x11, 3], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xa0402a80 // ld1h { z0.h-z1.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1abaa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z11.s\n"
+ ".inst 0xc16175ac // sdot za.s[x11, 4], { z13.h-z14.h }, z1.h\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc16075ad // sdot za.s[x11, 5], { z13.h-z14.h }, z0.h\n"
+ "ld1b { z16.s }, p1/Z, [x19]\n"
+ ".inst 0xc1acab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z12.s\n"
+ ".inst 0xc16375ca // sdot za.s[x11, 2], { z14.h-z15.h }, z3.h\n"
+ "trn1 z13.h, z21.h, z20.h\n"
+ ".inst 0xa0402be0 // ld1h { z0.h-z1.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xc16275cb // sdot za.s[x11, 3], { z14.h-z15.h }, z2.h\n"
+ ".inst 0xa0412a82 // ld1h { z2.h-z3.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc1bacec4 // sclamp { z4.s-z7.s }, z22.s, z26.s\n"
+ ".inst 0xc16375cc // sdot za.s[x11, 4], { z14.h-z15.h }, z3.h\n"
+ "st1b { z4.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ "add z13.h, z13.h, z24.h\n"
+ ".inst 0xc16275cd // sdot za.s[x11, 5], { z14.h-z15.h }, z2.h\n"
+ "trn1 z14.h, z19.h, z18.h\n"
+ "trn1 z15.h, z17.h, z16.h\n"
+ "add x11, x11, #0x2\n"
+ ".inst 0xa0412be2 // ld1h { z2.h-z3.h }, pn10.b/Z, [SP, #0x2, MUL VL]\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ ".inst 0xc0046904 // mova za.d[x11, #4], { z8.d-z9.d }\n"
+ "st1b { z5.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ ".inst 0xc0046905 // mova za.d[x11, #5], { z8.d-z9.d }\n"
+ "add z14.h, z14.h, z24.h\n"
+ "st1b { z7.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ "add z15.h, z15.h, z24.h\n"
+ "bgt 11b\n"
+ "b 17f\n"
+ "12:" // Padded
+ "cbz x21, 15f\n"
+ "cmp x21, #0x1\n"
+ "sub x15, x15, x21\n"
+ "beq 14f\n"
+ "13:" // Padded: 2 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z19.s }, p0/Z, [x14]\n"
+ "add z19.h, p0/M, z19.h, z24.h\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z24.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z24.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z24.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z13.h, z19.h, z18.h\n"
+ "trn1 z14.h, z17.h, z16.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z24.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "addvl x19, SP, #8\n"
+ "add z16.h, p0/M, z16.h, z24.h\n"
+ ".inst 0xa0402a60 // ld1h { z0.h-z1.h }, pn10.b/Z, [x19]\n"
+ "trn1 z15.h, z17.h, z16.h\n"
+ ".inst 0xc16175a8 // sdot za.s[x11, 0], { z13.h-z14.h }, z1.h\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ ".inst 0xc16075a9 // sdot za.s[x11, 1], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xa0412a62 // ld1h { z2.h-z3.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16375c8 // sdot za.s[x11, 0], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xc16275c9 // sdot za.s[x11, 1], { z14.h-z15.h }, z2.h\n"
+ "14:" // Padded: 1 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z19.s }, p0/Z, [x14]\n"
+ "add z19.h, p0/M, z19.h, z24.h\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z24.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z24.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z24.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z13.h, z19.h, z18.h\n"
+ "trn1 z14.h, z17.h, z16.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z24.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "addvl x20, SP, #4\n"
+ "add z16.h, p0/M, z16.h, z24.h\n"
+ ".inst 0xa0402a80 // ld1h { z0.h-z1.h }, pn10.b/Z, [x20]\n"
+ "addvl x19, SP, #8\n"
+ "trn1 z15.h, z17.h, z16.h\n"
+ ".inst 0xc16175a8 // sdot za.s[x11, 0], { z13.h-z14.h }, z1.h\n"
+ ".inst 0xc16075a9 // sdot za.s[x11, 1], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xa0402a60 // ld1h { z0.h-z1.h }, pn10.b/Z, [x19]\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ ".inst 0xa0412a82 // ld1h { z2.h-z3.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc16175aa // sdot za.s[x11, 2], { z13.h-z14.h }, z1.h\n"
+ ".inst 0xc16075ab // sdot za.s[x11, 3], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xc16375c8 // sdot za.s[x11, 0], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xc16275c9 // sdot za.s[x11, 1], { z14.h-z15.h }, z2.h\n"
+ ".inst 0xa0412a62 // ld1h { z2.h-z3.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16375ca // sdot za.s[x11, 2], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xc16275cb // sdot za.s[x11, 3], { z14.h-z15.h }, z2.h\n"
+ "15:" // Padded: 0 priming loads
+ ".inst 0xa0402be0 // ld1h { z0.h-z1.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xa0412be2 // ld1h { z2.h-z3.h }, pn10.b/Z, [SP, #0x2, MUL VL]\n"
+ "cbz x15, 18f\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z19.s }, p0/Z, [x14]\n"
+ "add z19.h, p0/M, z19.h, z24.h\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z24.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z24.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z24.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z13.h, z19.h, z18.h\n"
+ "trn1 z14.h, z17.h, z16.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z24.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z24.h\n"
+ "sub x15, x15, #0x1\n"
+ "sub x13, x13, #0x1\n"
+ "cmp x15, x13\n"
+ "trn1 z15.h, z17.h, z16.h\n"
+ "csel x22, x15, x13, LT\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "sub x13, x13, x22\n"
+ "cbz x22, 17f\n"
+ "16:" // Padded: Main loop
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z21.s }, p0/Z, [x14]\n"
+ ".inst 0xc16175a8 // sdot za.s[x11, 0], { z13.h-z14.h }, z1.h\n"
+ ".inst 0xc16075a9 // sdot za.s[x11, 1], { z13.h-z14.h }, z0.h\n"
+ "add z21.h, p0/M, z21.h, z24.h\n"
+ "add x21, x14, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z20.s }, p0/Z, [x21]\n"
+ ".inst 0xc16375c8 // sdot za.s[x11, 0], { z14.h-z15.h }, z3.h\n"
+ "add z20.h, p0/M, z20.h, z24.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0xc16275c9 // sdot za.s[x11, 1], { z14.h-z15.h }, z2.h\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z19.s }, p0/Z, [x21]\n"
+ "add z19.h, p0/M, z19.h, z24.h\n"
+ ".inst 0xc0066804 // mova { z4.d-z5.d }, za.d[x11, #0]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z18.s }, p0/Z, [x21]\n"
+ ".inst 0xc0066826 // mova { z6.d-z7.d }, za.d[x11, #1]\n"
+ "mov x12, #0x4\n"
+ "addvl x20, SP, #4\n"
+ "add z18.h, p0/M, z18.h, z24.h\n"
+ ".inst 0xc1aaac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z10.s\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xa0402a80 // ld1h { z0.h-z1.h }, pn10.b/Z, [x20]\n"
+ "addvl x19, SP, #8\n"
+ ".inst 0xc16175aa // sdot za.s[x11, 2], { z13.h-z14.h }, z1.h\n"
+ "subs x22, x22, #0x1\n"
+ "ld1b { z17.s }, p0/Z, [x21]\n"
+ ".inst 0xc16075ab // sdot za.s[x11, 3], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xc1abaa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z11.s\n"
+ ".inst 0xa0402a60 // ld1h { z0.h-z1.h }, pn10.b/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z24.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ ".inst 0xa0412a82 // ld1h { z2.h-z3.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc16175ac // sdot za.s[x11, 4], { z13.h-z14.h }, z1.h\n"
+ ".inst 0xc1acab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z12.s\n"
+ "ld1b { z16.s }, p0/Z, [x21]\n"
+ ".inst 0xc16075ad // sdot za.s[x11, 5], { z13.h-z14.h }, z0.h\n"
+ "add z16.h, p0/M, z16.h, z24.h\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ ".inst 0xc16375ca // sdot za.s[x11, 2], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xa0402be0 // ld1h { z0.h-z1.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xc1bacec4 // sclamp { z4.s-z7.s }, z22.s, z26.s\n"
+ ".inst 0xc16275cb // sdot za.s[x11, 3], { z14.h-z15.h }, z2.h\n"
+ ".inst 0xa0412a62 // ld1h { z2.h-z3.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ "st1b { z4.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ ".inst 0xc16375cc // sdot za.s[x11, 4], { z14.h-z15.h }, z3.h\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "trn1 z13.h, z21.h, z20.h\n"
+ ".inst 0xc16275cd // sdot za.s[x11, 5], { z14.h-z15.h }, z2.h\n"
+ "add x11, x11, #0x2\n"
+ ".inst 0xa0412be2 // ld1h { z2.h-z3.h }, pn10.b/Z, [SP, #0x2, MUL VL]\n"
+ "st1b { z5.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ "st1b { z7.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ ".inst 0xc0046904 // mova za.d[x11, #4], { z8.d-z9.d }\n"
+ ".inst 0xc0046905 // mova za.d[x11, #5], { z8.d-z9.d }\n"
+ "trn1 z14.h, z19.h, z18.h\n"
+ "trn1 z15.h, z17.h, z16.h\n"
+ "bgt 16b\n"
+ "17:" // Main loop tail
+ ".inst 0xc16175a8 // sdot za.s[x11, 0], { z13.h-z14.h }, z1.h\n"
+ "addvl x20, SP, #4\n"
+ "addvl x19, SP, #8\n"
+ ".inst 0xc16075a9 // sdot za.s[x11, 1], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xa0402a80 // ld1h { z0.h-z1.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc16375c8 // sdot za.s[x11, 0], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xc16275c9 // sdot za.s[x11, 1], { z14.h-z15.h }, z2.h\n"
+ ".inst 0xa0412a82 // ld1h { z2.h-z3.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc0066804 // mova { z4.d-z5.d }, za.d[x11, #0]\n"
+ ".inst 0xc0066826 // mova { z6.d-z7.d }, za.d[x11, #1]\n"
+ ".inst 0xc1aaac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z10.s\n"
+ ".inst 0xc16175aa // sdot za.s[x11, 2], { z13.h-z14.h }, z1.h\n"
+ ".inst 0xc1abaa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z11.s\n"
+ ".inst 0xc16075ab // sdot za.s[x11, 3], { z13.h-z14.h }, z0.h\n"
+ ".inst 0xa0402a60 // ld1h { z0.h-z1.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1acab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z12.s\n"
+ ".inst 0xc16175ac // sdot za.s[x11, 4], { z13.h-z14.h }, z1.h\n"
+ ".inst 0xc1bacec4 // sclamp { z4.s-z7.s }, z22.s, z26.s\n"
+ "st1b { z4.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ ".inst 0xc16075ad // sdot za.s[x11, 5], { z13.h-z14.h }, z0.h\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ ".inst 0xc16375ca // sdot za.s[x11, 2], { z14.h-z15.h }, z3.h\n"
+ "st1b { z5.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ ".inst 0xc16275cb // sdot za.s[x11, 3], { z14.h-z15.h }, z2.h\n"
+ ".inst 0xa0412a62 // ld1h { z2.h-z3.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ "st1b { z7.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ ".inst 0xc16375cc // sdot za.s[x11, 4], { z14.h-z15.h }, z3.h\n"
+ ".inst 0xc16275cd // sdot za.s[x11, 5], { z14.h-z15.h }, z2.h\n"
+ "add x11, x11, #0x2\n"
+ ".inst 0xc0046904 // mova za.d[x11, #4], { z8.d-z9.d }\n"
+ ".inst 0xc0046905 // mova za.d[x11, #5], { z8.d-z9.d }\n"
+ "18:" // Main loop skip tail
+ "cbz x13, 20f\n"
+ "19:" // Right padding loop
+ ".inst 0xc0066804 // mova { z4.d-z5.d }, za.d[x11, #0]\n"
+ "subs x13, x13, #0x1\n"
+ ".inst 0xc0066826 // mova { z6.d-z7.d }, za.d[x11, #1]\n"
+ ".inst 0xc1aaac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z10.s\n"
+ "add x11, x11, #0x2\n"
+ ".inst 0xc1abaa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z11.s\n"
+ ".inst 0xc0046904 // mova za.d[x11, #4], { z8.d-z9.d }\n"
+ ".inst 0xc1acab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z12.s\n"
+ ".inst 0xc0046905 // mova za.d[x11, #5], { z8.d-z9.d }\n"
+ ".inst 0xc1bacec4 // sclamp { z4.s-z7.s }, z22.s, z26.s\n"
+ "st1b { z4.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "st1b { z5.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ "st1b { z7.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ "bgt 19b\n"
+ "20:" // End
+ "ldr x21, [%x[args], %[offsetof_Args_weights]]\n"
+ "incw x21, ALL, MUL #9\n"
+ "str x21, [%x[args], %[offsetof_Args_weights]]\n"
+ "incw x16\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_in_vl]]\n"
+ "whilelt p1.s, x16, x17\n"
+ "ldr x14, [%x[args], %[offsetof_Args_inptr]]\n"
+ "add x14, x14, x19\n"
+ "str x14, [%x[args], %[offsetof_Args_inptr]]\n"
+ "ldr x24, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "ldr x23, [%x[args], %[offsetof_Args_ld_out_vls]]\n"
+ "ldp x22, x21, [x24, #0x0]\n"
+ "ldp x20, x19, [x23, #0x0]\n"
+ "add x22, x22, x20\n"
+ "add x21, x21, x19\n"
+ "stp x22, x21, [x24, #0x0]\n"
+ "ldp x22, x21, [x24, #0x10]\n"
+ "ldp x20, x19, [x23, #0x10]\n"
+ "add x22, x22, x20\n"
+ "add x21, x21, x19\n"
+ "stp x22, x21, [x24, #0x10]\n"
+ "b.any 1b\n"
+ "addvl SP, SP, #12\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [ld_in_col] "r" (ld_in_col), [ld_in_row] "r" (ld_in_row), [offsetof_Args_current_channel] "I" (offsetof(Args, current_channel)), [offsetof_Args_inptr] "I" (offsetof(Args, inptr)), [offsetof_Args_input_cols] "I" (offsetof(Args, input_cols)), [offsetof_Args_ld_in_vl] "I" (offsetof(Args, ld_in_vl)), [offsetof_Args_ld_out_cols] "I" (offsetof(Args, ld_out_cols)), [offsetof_Args_ld_out_vls] "I" (offsetof(Args, ld_out_vls)), [offsetof_Args_n_channels] "I" (offsetof(Args, n_channels)), [offsetof_Args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_Args_output_cols] "I" (offsetof(Args, output_cols)), [offsetof_Args_pad_bottom] "I" (offsetof(Args, pad_bottom)), [offsetof_Args_pad_left] "I" (offsetof(Args, pad_left)), [offsetof_Args_pad_top] "I" (offsetof(Args, pad_top)), [offsetof_Args_weights] "I" (offsetof(Args, weights)), [offsetof_Requantize32_a_offset] "I" (offsetof(arm_gemm::Requantize32, a_offset)), [offsetof_Requantize32_b_offset] "I" (offsetof(arm_gemm::Requantize32, b_offset)), [offsetof_Requantize32_bias] "I" (offsetof(arm_gemm::Requantize32, bias)), [offsetof_Requantize32_c_offset] "I" (offsetof(arm_gemm::Requantize32, c_offset)), [offsetof_Requantize32_maxval] "I" (offsetof(arm_gemm::Requantize32, maxval)), [offsetof_Requantize32_minval] "I" (offsetof(arm_gemm::Requantize32, minval)), [offsetof_Requantize32_per_channel_muls] "I" (offsetof(arm_gemm::Requantize32, per_channel_muls)), [offsetof_Requantize32_per_channel_right_shifts] "I" (offsetof(arm_gemm::Requantize32, per_channel_right_shifts)), [offsetof_Requantize32_per_layer_mul] "I" (offsetof(arm_gemm::Requantize32, per_layer_mul)), [offsetof_Requantize32_per_layer_right_shift] "I" (offsetof(arm_gemm::Requantize32, per_layer_right_shift)), [qp] "r" (&qp)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8s8u8q_planar_3x3_s2_2rows_dot_za/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8s8u8q_planar_3x3_s2_2rows_dot_za/generic.cpp
new file mode 100644
index 0000000..328227f
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8s8u8q_planar_3x3_s2_2rows_dot_za/generic.cpp
@@ -0,0 +1,592 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <algorithm>
+#include <cstddef>
+#include "arm_gemm.hpp"
+
+using arm_gemm::Requantize32;
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_u8s8u8q_planar_3x3_s2_2rows_dot_za_impl(
+ const uint8_t *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const int8_t *weights,
+ uint8_t **outptrs,
+ const size_t *outlds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ const arm_gemm::Requantize32 &qp
+)
+{
+ struct Args
+ {
+ const uint8_t *inptr;
+ long unsigned int pad_top, pad_bottom, pad_left;
+ const int8_t *weights;
+ long unsigned int input_cols, output_cols;
+ uint8_t **outptrs;
+ const size_t *ld_out_cols;
+ long unsigned int n, n_channels;
+ };
+
+ Args args = { inptr, pad_top, 5u - std::min(5u, pad_top + valid_input_rows), pad_left, weights, valid_input_cols, output_cols, outptrs, outlds, start_channel, valid_channels };
+
+ __asm__ __volatile__(
+ "ldr x11, [%x[args], %[offsetof_Args_pad_bottom]]\n"
+ "mov x19, #0x5\n"
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "sub x19, x19, x11\n"
+ "ldr x10, [%x[args], %[offsetof_Args_pad_top]]\n"
+ "ptrue p0.b\n"
+ "mov z12.s, #0x0\n"
+ "ldr x22, [%x[args], %[offsetof_Args_n_channels]]\n"
+ "whilelt p5.s, XZR, x22\n"
+ "whilelt p9.s, XZR, x19\n"
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_bias]]\n"
+ "whilelt p8.s, XZR, x10\n"
+ "eor p8.b, p0/Z, p8.b, p9.b\n"
+ "ldr x21, [%x[args], %[offsetof_Args_n]]\n"
+ "cbz x19, 1f\n"
+ "ld1w { z12.s }, p5/Z, [x19, x21, LSL #2]\n"
+ "1:" // Load bias: Done
+ "ldr x20, [%x[args], %[offsetof_Args_weights]]\n"
+ "ld1sb { z27.s }, p0/Z, [x20]\n"
+ "incw x20\n"
+ "mov z0.h, #0x0\n"
+ "ld1sb { z16.s }, p0/Z, [x20]\n"
+ "incw x20\n"
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_muls]]\n"
+ "mov z13.d, z12.d\n"
+ "ld1sb { z22.s }, p0/Z, [x20]\n"
+ "incw x20\n"
+ "ld1sb { z21.s }, p0/Z, [x20]\n"
+ "incw x20\n"
+ "ld1sb { z20.s }, p0/Z, [x20]\n"
+ "incw x20\n"
+ "ld1sb { z18.s }, p0/Z, [x20]\n"
+ "incw x20\n"
+ "ld1sb { z17.s }, p0/Z, [x20]\n"
+ "incw x20\n"
+ "ld1sb { z24.s }, p0/Z, [x20]\n"
+ "incw x20\n"
+ "ld1sb { z19.s }, p0/Z, [x20]\n"
+ "ld1rh { z28.h }, p0/Z, [%x[qp], %[offsetof_Requantize32_b_offset]]\n"
+ "sub z27.h, z27.h, z28.h\n"
+ "sub z16.h, z16.h, z28.h\n"
+ "sub z22.h, z22.h, z28.h\n"
+ "sub z21.h, z21.h, z28.h\n"
+ "trn1 z8.h, z27.h, z21.h\n"
+ "sub z20.h, z20.h, z28.h\n"
+ "sub z18.h, z18.h, z28.h\n"
+ "trn1 z7.h, z16.h, z20.h\n"
+ "sub z17.h, z17.h, z28.h\n"
+ "sub z24.h, z24.h, z28.h\n"
+ "trn1 z6.h, z17.h, z0.h\n"
+ "sub z19.h, z19.h, z28.h\n"
+ "trn1 z5.h, z24.h, z0.h\n"
+ "trn1 z4.h, z22.h, z18.h\n"
+ "trn1 z3.h, z19.h, z0.h\n"
+ "ld1rh { z21.h }, p0/Z, [%x[qp], %[offsetof_Requantize32_a_offset]]\n"
+ "ld1rw { z2.s }, p0/Z, [%x[qp], %[offsetof_Requantize32_c_offset]]\n"
+ "ld1rw { z1.s }, p0/Z, [%x[qp], %[offsetof_Requantize32_per_layer_mul]]\n"
+ "cbz x19, 2f\n"
+ "ld1w { z1.s }, p5/Z, [x19, x21, LSL #2]\n"
+ "2:" // Load mul: End
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_right_shifts]]\n"
+ "ld1rw { z0.s }, p0/Z, [%x[qp], %[offsetof_Requantize32_per_layer_right_shift]]\n"
+ "cbz x19, 3f\n"
+ "ld1w { z0.s }, p5/Z, [x19, x21, LSL #2]\n"
+ "3:" // Load right_shift: End
+ "ldr x28, [%x[args], %[offsetof_Args_input_cols]]\n"
+ "orr x21, x28, %x[ld_in_col], LSL #16\n"
+ "orr x21, x22, x21, LSL #22\n"
+ "ld1rw { z20.s }, p0/Z, [%x[qp], %[offsetof_Requantize32_minval]]\n"
+ "ldr x27, [%x[args], %[offsetof_Args_inptr]]\n"
+ "mov x20, #0x5\n"
+ "add x19, x10, x11\n"
+ "ld1rw { z19.s }, p0/Z, [%x[qp], %[offsetof_Requantize32_maxval]]\n"
+ "mov x9, #0x0\n"
+ "ldr x26, [%x[args], %[offsetof_Args_output_cols]]\n"
+ "lsl x21, x21, #0x0\n"
+ "sub x20, x20, x19\n"
+ "mov x19, x27\n"
+ "4:" // Issue prefetches
+ "subs x20, x20, #0x1\n"
+ ".inst 0xf8b54a7c // rprfm pldstrm, x21, [x19]\n"
+ "add x19, x19, %x[ld_in_col]\n"
+ "bgt 4b\n"
+ "ldr x21, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "lsl x19, %x[ld_in_row], #0x0\n"
+ "msub x27, x10, x19, x27\n"
+ ".inst 0xc0042980 // mova za.d[x9, #0], { z12.d-z13.d }\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_out_cols]]\n"
+ ".inst 0xc0042981 // mova za.d[x9, #1], { z12.d-z13.d }\n"
+ "mov x25, #0x2\n"
+ "ldr x20, [%x[args], %[offsetof_Args_pad_left]]\n"
+ ".inst 0xc0042982 // mova za.d[x9, #2], { z12.d-z13.d }\n"
+ "ldp x24, x23, [x21], #0x10\n"
+ "ldp x22, x21, [x19], #0x10\n"
+ "cbz x20, 6f\n"
+ "cmp x20, x25\n"
+ "csel x19, x20, x25, LT\n"
+ "sub x20, x20, x19\n"
+ "sub x25, x25, x19\n"
+ "cbz x20, 6f\n"
+ ".inst 0xc0062818 // mova { z24.d-z25.d }, za.d[x9, #0]\n"
+ ".inst 0xc1a1a418 // sqdmulh { z24.s-z25.s }, { z24.s-z25.s }, z1.s\n"
+ "and x25, x20, #0x1\n"
+ ".inst 0xc1a0a238 // srshl { z24.s-z25.s }, { z24.s-z25.s }, z0.s\n"
+ "add x20, x20, #0x1\n"
+ "lsr x20, x20, #0x1\n"
+ ".inst 0xc1a2a318 // add { z24.s-z25.s }, { z24.s-z25.s }, z2.s\n"
+ "sub x26, x26, x20\n"
+ ".inst 0xc1b3c698 // sclamp { z24.s-z25.s }, z20.s, z19.s\n"
+ "5:" // Left padding
+ "subs x20, x20, #0x1\n"
+ "st1b { z24.s }, p5, [x24]\n"
+ "add x24, x24, x22\n"
+ "st1b { z25.s }, p5, [x23]\n"
+ "add x23, x23, x21\n"
+ "bgt 5b\n"
+ "6:" // Left padding: End
+ "adds XZR, x10, x11\n"
+ "bne 11f\n"
+ "cbz x25, 9f\n"
+ "cmp x25, #0x1\n"
+ "sub x28, x28, x25\n"
+ "beq 8f\n"
+ "7:" // Unpadded: 2 priming loads
+ "add x19, x27, %x[ld_in_row]\n"
+ "ld1b { z14.s }, p5/Z, [x27]\n"
+ "sub z14.h, z14.h, z21.h\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ "ld1b { z18.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z18.h, z18.h, z21.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "ld1b { z15.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z15.h, z15.h, z21.h\n"
+ "ld1b { z17.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z17.h, z17.h, z21.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "ld1b { z16.s }, p5/Z, [x19]\n"
+ "sub z16.h, z16.h, z21.h\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc16835c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xc16635e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z6.h\n"
+ "8:" // Unpadded: 1 priming loads
+ "add x19, x27, %x[ld_in_row]\n"
+ "ld1b { z14.s }, p5/Z, [x27]\n"
+ "sub z14.h, z14.h, z21.h\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ "ld1b { z18.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z18.h, z18.h, z21.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "ld1b { z15.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z15.h, z15.h, z21.h\n"
+ "ld1b { z17.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z17.h, z17.h, z21.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "ld1b { z16.s }, p5/Z, [x19]\n"
+ "sub z16.h, z16.h, z21.h\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc16735c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z7.h\n"
+ ".inst 0xc16535e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z5.h\n"
+ "9:" // Unpadded: 0 priming loads
+ "add x20, x27, %x[ld_in_row]\n"
+ "ld1b { z14.s }, p5/Z, [x27]\n"
+ "sub z14.h, z14.h, z21.h\n"
+ "sub x28, x28, #0x2\n"
+ "ld1b { z18.s }, p5/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "sub z18.h, z18.h, z21.h\n"
+ "sub x26, x26, #0x1\n"
+ "ld1b { z15.s }, p5/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "sub z15.h, z15.h, z21.h\n"
+ "lsr x19, x28, #0x1\n"
+ "ld1b { z17.s }, p5/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "sub z17.h, z17.h, z21.h\n"
+ "cmp x19, x26\n"
+ "ld1b { z16.s }, p5/Z, [x20]\n"
+ "sub z16.h, z16.h, z21.h\n"
+ "csel x20, x19, x26, LT\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "mov z16.d, z16.d\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ "and x28, x28, #0x1\n"
+ "sub x26, x26, x20\n"
+ "cbz x20, 16f\n"
+ "10:" // Unpadded: Main loop
+ ".inst 0xc16435c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z4.h\n"
+ "add x19, x27, %x[ld_in_row]\n"
+ "subs x20, x20, #0x1\n"
+ ".inst 0xc16835c9 // sdot za.s[x9, 1], { z14.h-z15.h }, z8.h\n"
+ "ld1b { z14.s }, p5/Z, [x27]\n"
+ "sub z14.h, z14.h, z21.h\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ "ld1b { z18.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc16335e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z3.h\n"
+ "sub z18.h, z18.h, z21.h\n"
+ ".inst 0xc16635e9 // sdot za.s[x9, 1], { z15.h-z16.h }, z6.h\n"
+ "ld1b { z15.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z15.h, z15.h, z21.h\n"
+ "ld1b { z17.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z17.h, z17.h, z21.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "ld1b { z16.s }, p5/Z, [x19]\n"
+ "sub z16.h, z16.h, z21.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add x19, x27, %x[ld_in_row]\n"
+ ".inst 0xc0062818 // mova { z24.d-z25.d }, za.d[x9, #0]\n"
+ "add x9, x9, #0x1\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc16735c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z7.h\n"
+ ".inst 0xc1a1a418 // sqdmulh { z24.s-z25.s }, { z24.s-z25.s }, z1.s\n"
+ "ld1b { z14.s }, p5/Z, [x27]\n"
+ ".inst 0xc16535e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z5.h\n"
+ ".inst 0xc1a0a238 // srshl { z24.s-z25.s }, { z24.s-z25.s }, z0.s\n"
+ "ld1b { z18.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc1a2a318 // add { z24.s-z25.s }, { z24.s-z25.s }, z2.s\n"
+ "ld1b { z15.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z14.h, z14.h, z21.h\n"
+ "sub z18.h, z18.h, z21.h\n"
+ "ld1b { z17.s }, p5/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z15.h, z15.h, z21.h\n"
+ "sub z17.h, z17.h, z21.h\n"
+ "ld1b { z16.s }, p5/Z, [x19]\n"
+ "sub z16.h, z16.h, z21.h\n"
+ ".inst 0xc1b3c698 // sclamp { z24.s-z25.s }, z20.s, z19.s\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ "st1b { z24.s }, p5, [x24]\n"
+ "add x24, x24, x22\n"
+ ".inst 0xc0042982 // mova za.d[x9, #2], { z12.d-z13.d }\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "st1b { z25.s }, p5, [x23]\n"
+ "add x23, x23, x21\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "mov z16.d, z16.d\n"
+ "bgt 10b\n"
+ "b 16f\n"
+ "11:" // Padded
+ "cbz x25, 14f\n"
+ "cmp x25, #0x1\n"
+ "sub x28, x28, x25\n"
+ "beq 13f\n"
+ "12:" // Padded: 2 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25305504 // psel p4.s, p5.s/Z, p8.s[w12]\n"
+ "ld1b { z14.s }, p4/Z, [x27]\n"
+ "sub z14.h, p4/M, z14.h, z21.h\n"
+ "add x19, x27, %x[ld_in_row]\n"
+ ".inst 0x25705503 // psel p3.s, p5.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p3/Z, [x19]\n"
+ "sub z18.h, p3/M, z18.h, z21.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b05502 // psel p2.s, p5.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z15.s }, p2/Z, [x19]\n"
+ "sub z15.h, p2/M, z15.h, z21.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f05501 // psel p1.s, p5.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "sub z17.h, p1/M, z17.h, z21.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0x25305500 // psel p0.s, p5.s/Z, p8.s[w12]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "sub z16.h, p0/M, z16.h, z21.h\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc16835c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z8.h\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ ".inst 0xc16635e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z6.h\n"
+ "13:" // Padded: 1 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25305504 // psel p4.s, p5.s/Z, p8.s[w12]\n"
+ "ld1b { z14.s }, p4/Z, [x27]\n"
+ "sub z14.h, p4/M, z14.h, z21.h\n"
+ "add x19, x27, %x[ld_in_row]\n"
+ ".inst 0x25705503 // psel p3.s, p5.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p3/Z, [x19]\n"
+ "sub z18.h, p3/M, z18.h, z21.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b05502 // psel p2.s, p5.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z15.s }, p2/Z, [x19]\n"
+ "sub z15.h, p2/M, z15.h, z21.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f05501 // psel p1.s, p5.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "sub z17.h, p1/M, z17.h, z21.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0x25305500 // psel p0.s, p5.s/Z, p8.s[w12]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "sub z16.h, p0/M, z16.h, z21.h\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc16735c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z7.h\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ ".inst 0xc16535e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z5.h\n"
+ "14:" // Padded: 0 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25305504 // psel p4.s, p5.s/Z, p8.s[w12]\n"
+ "ld1b { z14.s }, p4/Z, [x27]\n"
+ "sub z14.h, p4/M, z14.h, z21.h\n"
+ "add x19, x27, %x[ld_in_row]\n"
+ ".inst 0x25705503 // psel p3.s, p5.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p3/Z, [x19]\n"
+ "sub z18.h, p3/M, z18.h, z21.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b05502 // psel p2.s, p5.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z15.s }, p2/Z, [x19]\n"
+ "sub z15.h, p2/M, z15.h, z21.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f05501 // psel p1.s, p5.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "sub z17.h, p1/M, z17.h, z21.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0x25305500 // psel p0.s, p5.s/Z, p8.s[w12]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "sub z16.h, p0/M, z16.h, z21.h\n"
+ "sub x28, x28, #0x2\n"
+ "sub x26, x26, #0x1\n"
+ "lsr x19, x28, #0x1\n"
+ "mov z16.d, z16.d\n"
+ "cmp x19, x26\n"
+ "csel x20, x19, x26, LT\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ "and x28, x28, #0x1\n"
+ "sub x26, x26, x20\n"
+ "cbz x20, 16f\n"
+ "15:" // Padded: Main loop
+ ".inst 0xc16435c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z4.h\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25305504 // psel p4.s, p5.s/Z, p8.s[w12]\n"
+ ".inst 0xc16835c9 // sdot za.s[x9, 1], { z14.h-z15.h }, z8.h\n"
+ "add x19, x27, %x[ld_in_row]\n"
+ ".inst 0x25705503 // psel p3.s, p5.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z14.s }, p4/Z, [x27]\n"
+ "ld1b { z18.s }, p3/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b05502 // psel p2.s, p5.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc16335e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z3.h\n"
+ ".inst 0xc16635e9 // sdot za.s[x9, 1], { z15.h-z16.h }, z6.h\n"
+ "ld1b { z15.s }, p2/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f05501 // psel p1.s, p5.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub z14.h, p4/M, z14.h, z21.h\n"
+ ".inst 0x25305500 // psel p0.s, p5.s/Z, p8.s[w12]\n"
+ "sub z18.h, p3/M, z18.h, z21.h\n"
+ "sub z15.h, p2/M, z15.h, z21.h\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "sub z17.h, p1/M, z17.h, z21.h\n"
+ "sub z16.h, p0/M, z16.h, z21.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xc0062818 // mova { z24.d-z25.d }, za.d[x9, #0]\n"
+ "add x9, x9, #0x1\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc16735c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z7.h\n"
+ ".inst 0xc1a1a418 // sqdmulh { z24.s-z25.s }, { z24.s-z25.s }, z1.s\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25305504 // psel p4.s, p5.s/Z, p8.s[w12]\n"
+ "add x19, x27, %x[ld_in_row]\n"
+ "ld1b { z14.s }, p4/Z, [x27]\n"
+ ".inst 0xc16535e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z5.h\n"
+ ".inst 0x25705503 // psel p3.s, p5.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p3/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc1a0a238 // srshl { z24.s-z25.s }, { z24.s-z25.s }, z0.s\n"
+ ".inst 0x25b05502 // psel p2.s, p5.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z15.s }, p2/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc1a2a318 // add { z24.s-z25.s }, { z24.s-z25.s }, z2.s\n"
+ ".inst 0x25f05501 // psel p1.s, p5.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x4\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "sub z14.h, p4/M, z14.h, z21.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25305500 // psel p0.s, p5.s/Z, p8.s[w12]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "sub z18.h, p3/M, z18.h, z21.h\n"
+ "sub z15.h, p2/M, z15.h, z21.h\n"
+ "sub z17.h, p1/M, z17.h, z21.h\n"
+ "subs x20, x20, #0x1\n"
+ ".inst 0xc0042982 // mova za.d[x9, #2], { z12.d-z13.d }\n"
+ "sub z16.h, p0/M, z16.h, z21.h\n"
+ ".inst 0xc1b3c698 // sclamp { z24.s-z25.s }, z20.s, z19.s\n"
+ "st1b { z24.s }, p5, [x24]\n"
+ "add x24, x24, x22\n"
+ "st1b { z25.s }, p5, [x23]\n"
+ "add x23, x23, x21\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "mov z16.d, z16.d\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ "bgt 15b\n"
+ "16:" // Main loop tail
+ ".inst 0xc16435c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z4.h\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25305504 // psel p4.s, p5.s/Z, p8.s[w12]\n"
+ ".inst 0xc16335e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z3.h\n"
+ "add x19, x27, %x[ld_in_row]\n"
+ ".inst 0x25705503 // psel p3.s, p5.s/Z, p8.s[w12, #1]\n"
+ ".inst 0xc16835c9 // sdot za.s[x9, 1], { z14.h-z15.h }, z8.h\n"
+ "ld1b { z14.s }, p4/Z, [x27]\n"
+ ".inst 0x25b05502 // psel p2.s, p5.s/Z, p8.s[w12, #2]\n"
+ ".inst 0x25f05501 // psel p1.s, p5.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z18.s }, p3/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc16635e9 // sdot za.s[x9, 1], { z15.h-z16.h }, z6.h\n"
+ "mov x12, #0x4\n"
+ ".inst 0xc0062818 // mova { z24.d-z25.d }, za.d[x9, #0]\n"
+ "ld1b { z15.s }, p2/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc1a1a418 // sqdmulh { z24.s-z25.s }, { z24.s-z25.s }, z1.s\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25305500 // psel p0.s, p5.s/Z, p8.s[w12]\n"
+ "sub z14.h, p4/M, z14.h, z21.h\n"
+ "sub z18.h, p3/M, z18.h, z21.h\n"
+ "sub z15.h, p2/M, z15.h, z21.h\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add x9, x9, #0x1\n"
+ "sub z17.h, p1/M, z17.h, z21.h\n"
+ "sub z16.h, p0/M, z16.h, z21.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add x27, x27, %x[ld_in_col]\n"
+ ".inst 0xc1a0a238 // srshl { z24.s-z25.s }, { z24.s-z25.s }, z0.s\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xc1a2a318 // add { z24.s-z25.s }, { z24.s-z25.s }, z2.s\n"
+ ".inst 0xc16735c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z7.h\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc1b3c698 // sclamp { z24.s-z25.s }, z20.s, z19.s\n"
+ "st1b { z24.s }, p5, [x24]\n"
+ "add x24, x24, x22\n"
+ "st1b { z25.s }, p5, [x23]\n"
+ "add x23, x23, x21\n"
+ ".inst 0xc0042982 // mova za.d[x9, #2], { z12.d-z13.d }\n"
+ ".inst 0xc16535e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z5.h\n"
+ "cbz x28, 17f\n" // Skip remainder inputs
+ "mov x12, #0x0\n"
+ ".inst 0x25305504 // psel p4.s, p5.s/Z, p8.s[w12]\n"
+ "ld1b { z14.s }, p4/Z, [x27]\n"
+ "sub z14.h, p4/M, z14.h, z21.h\n"
+ "add x19, x27, %x[ld_in_row]\n"
+ ".inst 0x25705503 // psel p3.s, p5.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p3/Z, [x19]\n"
+ "sub z18.h, p3/M, z18.h, z21.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b05502 // psel p2.s, p5.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z15.s }, p2/Z, [x19]\n"
+ "sub z15.h, p2/M, z15.h, z21.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f05501 // psel p1.s, p5.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "sub z17.h, p1/M, z17.h, z21.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0x25305500 // psel p0.s, p5.s/Z, p8.s[w12]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "sub z16.h, p0/M, z16.h, z21.h\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc16435c8 // sdot za.s[x9, 0], { z14.h-z15.h }, z4.h\n"
+ "sub x26, x26, #0x1\n"
+ ".inst 0xc16335e8 // sdot za.s[x9, 0], { z15.h-z16.h }, z3.h\n"
+ ".inst 0xc0062818 // mova { z24.d-z25.d }, za.d[x9, #0]\n"
+ ".inst 0xc1a1a418 // sqdmulh { z24.s-z25.s }, { z24.s-z25.s }, z1.s\n"
+ ".inst 0xc1a0a238 // srshl { z24.s-z25.s }, { z24.s-z25.s }, z0.s\n"
+ ".inst 0xc16835c9 // sdot za.s[x9, 1], { z14.h-z15.h }, z8.h\n"
+ ".inst 0xc1a2a318 // add { z24.s-z25.s }, { z24.s-z25.s }, z2.s\n"
+ ".inst 0xc16635e9 // sdot za.s[x9, 1], { z15.h-z16.h }, z6.h\n"
+ "add x9, x9, #0x1\n"
+ ".inst 0xc1b3c698 // sclamp { z24.s-z25.s }, z20.s, z19.s\n"
+ "st1b { z24.s }, p5, [x24]\n"
+ "add x24, x24, x22\n"
+ ".inst 0xc0042982 // mova za.d[x9, #2], { z12.d-z13.d }\n"
+ "st1b { z25.s }, p5, [x23]\n"
+ "add x23, x23, x21\n"
+ "17:" // Tail input: End
+ "cbz x26, 19f\n"
+ "18:" // Right padding loop
+ ".inst 0xc0062818 // mova { z24.d-z25.d }, za.d[x9, #0]\n"
+ ".inst 0xc1a1a418 // sqdmulh { z24.s-z25.s }, { z24.s-z25.s }, z1.s\n"
+ "add x9, x9, #0x1\n"
+ ".inst 0xc1a0a238 // srshl { z24.s-z25.s }, { z24.s-z25.s }, z0.s\n"
+ "subs x26, x26, #0x1\n"
+ ".inst 0xc0042982 // mova za.d[x9, #2], { z12.d-z13.d }\n"
+ ".inst 0xc1a2a318 // add { z24.s-z25.s }, { z24.s-z25.s }, z2.s\n"
+ ".inst 0xc1b3c698 // sclamp { z24.s-z25.s }, z20.s, z19.s\n"
+ "st1b { z24.s }, p5, [x24]\n"
+ "add x24, x24, x22\n"
+ "st1b { z25.s }, p5, [x23]\n"
+ "add x23, x23, x21\n"
+ "bgt 18b\n"
+ "19:" // End
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [ld_in_col] "r" (ld_in_col), [ld_in_row] "r" (ld_in_row), [offsetof_Args_inptr] "I" (offsetof(Args, inptr)), [offsetof_Args_input_cols] "I" (offsetof(Args, input_cols)), [offsetof_Args_ld_out_cols] "I" (offsetof(Args, ld_out_cols)), [offsetof_Args_n] "I" (offsetof(Args, n)), [offsetof_Args_n_channels] "I" (offsetof(Args, n_channels)), [offsetof_Args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_Args_output_cols] "I" (offsetof(Args, output_cols)), [offsetof_Args_pad_bottom] "I" (offsetof(Args, pad_bottom)), [offsetof_Args_pad_left] "I" (offsetof(Args, pad_left)), [offsetof_Args_pad_top] "I" (offsetof(Args, pad_top)), [offsetof_Args_weights] "I" (offsetof(Args, weights)), [offsetof_Requantize32_a_offset] "I" (offsetof(arm_gemm::Requantize32, a_offset)), [offsetof_Requantize32_b_offset] "I" (offsetof(arm_gemm::Requantize32, b_offset)), [offsetof_Requantize32_bias] "I" (offsetof(arm_gemm::Requantize32, bias)), [offsetof_Requantize32_c_offset] "I" (offsetof(arm_gemm::Requantize32, c_offset)), [offsetof_Requantize32_maxval] "I" (offsetof(arm_gemm::Requantize32, maxval)), [offsetof_Requantize32_minval] "I" (offsetof(arm_gemm::Requantize32, minval)), [offsetof_Requantize32_per_channel_muls] "I" (offsetof(arm_gemm::Requantize32, per_channel_muls)), [offsetof_Requantize32_per_channel_right_shifts] "I" (offsetof(arm_gemm::Requantize32, per_channel_right_shifts)), [offsetof_Requantize32_per_layer_mul] "I" (offsetof(arm_gemm::Requantize32, per_layer_mul)), [offsetof_Requantize32_per_layer_right_shift] "I" (offsetof(arm_gemm::Requantize32, per_layer_right_shift)), [qp] "r" (&qp)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x10", "x11", "x12", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8s8u8q_planar_3x3_s2_4rows_dot_za.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8s8u8q_planar_3x3_s2_4rows_dot_za.hpp
new file mode 100644
index 0000000..e412216
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8s8u8q_planar_3x3_s2_4rows_dot_za.hpp
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_u8s8u8q_planar_3x3_s2_4rows_dot_za_impl(
+ const uint8_t *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const int8_t *weights,
+ uint8_t **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ const arm_gemm::Requantize32 &qp
+);
+
+class sme2_u8s8u8q_planar_3x3_s2_4rows_dot_za : public PlanarStrategy<uint8_t, int8_t>
+{
+ using Parent = PlanarStrategy<uint8_t, int8_t>;
+
+ public:
+ using return_type = uint8_t;
+ constexpr static auto output_rows = 4u;
+ constexpr static auto kernel_rows = 3u, kernel_cols = 3u;
+ constexpr static auto stride_rows = 2u, stride_cols = 2u;
+ constexpr static auto vl_type = arm_gemm::VLType::SME;
+
+ sme2_u8s8u8q_planar_3x3_s2_4rows_dot_za(const CPUInfo *)
+ : Parent(kernel_rows, kernel_cols, stride_rows, stride_cols, output_rows, vl_type)
+ {
+ }
+
+ typename Parent::KernelType get_kernel(void) const override
+ {
+ return sme2_u8s8u8q_planar_3x3_s2_4rows_dot_za_impl;
+ }
+};
+
+} // namespace depthwise
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8s8u8q_planar_3x3_s2_4rows_dot_za/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8s8u8q_planar_3x3_s2_4rows_dot_za/generic.cpp
new file mode 100644
index 0000000..7a9724c
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8s8u8q_planar_3x3_s2_4rows_dot_za/generic.cpp
@@ -0,0 +1,881 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <algorithm>
+#include <cstddef>
+#include "arm_gemm.hpp"
+
+using arm_gemm::Requantize32;
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_u8s8u8q_planar_3x3_s2_4rows_dot_za_impl(
+ const uint8_t *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const int8_t *weights,
+ uint8_t **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ const arm_gemm::Requantize32 &qp
+)
+{
+ struct Args
+ {
+ const uint8_t *inptr;
+ size_t ld_in_vl;
+ long unsigned int pad_top, pad_bottom, pad_left;
+ const int8_t *weights;
+ long unsigned int input_cols, output_cols;
+ uint8_t **outptrs;
+ const size_t *ld_out_cols;
+ const size_t *ld_out_vls;
+ long unsigned int current_channel, n_channels;
+ };
+
+ Args args = { inptr, ld_in_vl, pad_top, 9u - std::min(9u, pad_top + valid_input_rows), pad_left, weights, valid_input_cols, output_cols, outptrs, outlds, outvllds, start_channel, valid_channels };
+
+ __asm__ __volatile__(
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "ldr x7, [%x[args], %[offsetof_Args_pad_bottom]]\n"
+ "ptrue p2.b\n"
+ "mov x19, #0x9\n"
+ "ldr x8, [%x[args], %[offsetof_Args_pad_top]]\n"
+ "ld1rh { z5.h }, p2/Z, [%x[qp], %[offsetof_Requantize32_a_offset]]\n"
+ "sub x19, x19, x7\n"
+ ".inst 0x25207812 // ptrue pn10.b\n"
+ "ldr x17, [%x[args], %[offsetof_Args_n_channels]]\n"
+ "whilelt p1.s, XZR, x17\n"
+ "whilelt p9.s, XZR, x19\n"
+ "ld1rw { z4.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_c_offset]]\n"
+ "whilelt p8.s, XZR, x8\n"
+ "addvl SP, SP, #-6\n"
+ "ldr x16, [%x[args], %[offsetof_Args_current_channel]]\n"
+ "neg z5.h, p2/M, z5.h\n"
+ "eor p8.b, p2/Z, p8.b, p9.b\n"
+ "ld1rw { z8.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_per_layer_mul]]\n"
+ "ld1rw { z7.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_per_layer_right_shift]]\n"
+ "ld1rw { z27.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_minval]]\n"
+ "ld1rw { z23.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_maxval]]\n"
+ "1:" // Channel loop
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_bias]]\n"
+ "mov z0.s, #0x0\n"
+ "cbz x19, 2f\n"
+ "ld1w { z0.s }, p1/Z, [x19, x16, LSL #2]\n"
+ "2:" // Load bias: Done
+ "ldr x21, [%x[args], %[offsetof_Args_weights]]\n"
+ "mov x19, x21\n"
+ "ld1sb { z24.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "ld1rh { z13.h }, p2/Z, [%x[qp], %[offsetof_Requantize32_b_offset]]\n"
+ "sub z24.h, z24.h, z13.h\n"
+ "incw x21\n"
+ "mov z17.h, #0x0\n"
+ "ld1sb { z25.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "sub z25.h, z25.h, z13.h\n"
+ "trn1 z10.h, z24.h, z25.h\n"
+ "ld1sb { z16.s }, p2/Z, [x19]\n"
+ "sub z16.h, z16.h, z13.h\n"
+ "mov x19, x21\n"
+ "trn1 z11.h, z16.h, z17.h\n"
+ "ld1sb { z24.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "sub z24.h, z24.h, z13.h\n"
+ "addvl x20, SP, #6\n"
+ "ld1sb { z25.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "sub z25.h, z25.h, z13.h\n"
+ "incw x21\n"
+ "ld1sb { z16.s }, p2/Z, [x19]\n"
+ "sub z16.h, z16.h, z13.h\n"
+ "addvl x20, x20, #-2\n"
+ "mov x19, x21\n"
+ "st1h { z10.h }, p2, [x20]\n"
+ "trn1 z10.h, z24.h, z25.h\n"
+ "ld1sb { z24.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "ld1sb { z25.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #3\n"
+ "st1h { z11.h }, p2, [x20, #1, MUL VL]\n"
+ "trn1 z11.h, z16.h, z17.h\n"
+ "ld1sb { z16.s }, p2/Z, [x19]\n"
+ "sub z24.h, z24.h, z13.h\n"
+ "sub z25.h, z25.h, z13.h\n"
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_muls]]\n"
+ "sub z16.h, z16.h, z13.h\n"
+ "addvl x20, x20, #-2\n"
+ "st1h { z10.h }, p2, [x20]\n"
+ "mov z1.d, z0.d\n"
+ "st1h { z11.h }, p2, [x20, #1, MUL VL]\n"
+ "addvl x20, x20, #-2\n"
+ "mov z2.d, z0.d\n"
+ "mov z3.d, z0.d\n"
+ "trn1 z10.h, z24.h, z25.h\n"
+ "st1h { z10.h }, p2, [x20]\n"
+ "trn1 z11.h, z16.h, z17.h\n"
+ "st1h { z11.h }, p2, [x20, #1, MUL VL]\n"
+ "cbz x19, 3f\n"
+ "ld1w { z8.s }, p1/Z, [x19, x16, LSL #2]\n"
+ "3:" // Load mul: End
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_right_shifts]]\n"
+ "cbz x19, 4f\n"
+ "ld1w { z7.s }, p1/Z, [x19, x16, LSL #2]\n"
+ "4:" // Load right_shift: End
+ "ldr x15, [%x[args], %[offsetof_Args_input_cols]]\n"
+ "sub x19, x15, #0x1\n"
+ "orr x22, x19, %x[ld_in_col], LSL #16\n"
+ "ldr x14, [%x[args], %[offsetof_Args_inptr]]\n"
+ "orr x22, x17, x22, LSL #22\n"
+ "mov x21, #0x9\n"
+ "add x20, x8, x7\n"
+ "lsl x19, %x[ld_in_row], #0x0\n"
+ "ldr x13, [%x[args], %[offsetof_Args_output_cols]]\n"
+ "mov x11, #0x0\n"
+ "lsl x22, x22, #0x0\n"
+ "sub x21, x21, x20\n"
+ "madd x19, x19, x8, x14\n"
+ "5:" // Issue prefetches
+ "subs x21, x21, #0x1\n"
+ ".inst 0xf8b64a7c // rprfm pldstrm, x22, [x19]\n"
+ "add x19, x19, %x[ld_in_col]\n"
+ "bgt 5b\n"
+ "ldr x24, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "lsl x19, %x[ld_in_row], #0x0\n"
+ "msub x14, x8, x19, x14\n"
+ ".inst 0xc0046c00 // mova za.d[x11, #0], { z0.d-z3.d }\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_out_cols]]\n"
+ ".inst 0xc0046c01 // mova za.d[x11, #1], { z0.d-z3.d }\n"
+ "mov x21, #0x2\n"
+ "ldp x10, x9, [x24], #0x10\n"
+ ".inst 0xc0046c02 // mova za.d[x11, #2], { z0.d-z3.d }\n"
+ "ldp x28, x27, [x19], #0x10\n"
+ "ldr x20, [%x[args], %[offsetof_Args_pad_left]]\n"
+ "ldp x26, x25, [x24], #0x10\n"
+ "ldp x24, x23, [x19], #0x10\n"
+ "cbz x20, 7f\n"
+ "cmp x20, x21\n"
+ "csel x19, x20, x21, LT\n"
+ "sub x20, x20, x19\n"
+ "sub x21, x21, x19\n"
+ "cbz x20, 7f\n"
+ ".inst 0xc0066c1c // mova { z28.d-z31.d }, za.d[x11, #0]\n"
+ ".inst 0xc1a8ac1c // sqdmulh { z28.s-z31.s }, { z28.s-z31.s }, z8.s\n"
+ "and x21, x20, #0x1\n"
+ ".inst 0xc1a7aa3c // srshl { z28.s-z31.s }, { z28.s-z31.s }, z7.s\n"
+ "add x20, x20, #0x1\n"
+ "lsr x20, x20, #0x1\n"
+ ".inst 0xc1a4ab1c // add { z28.s-z31.s }, { z28.s-z31.s }, z4.s\n"
+ "sub x13, x13, x20\n"
+ ".inst 0xc1b7cf7c // sclamp { z28.s-z31.s }, z27.s, z23.s\n"
+ "6:" // Left padding
+ "subs x20, x20, #0x1\n"
+ "st1b { z28.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ "st1b { z29.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "st1b { z30.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ "st1b { z31.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ "bgt 6b\n"
+ "7:" // Left padding: End
+ "adds XZR, x8, x7\n"
+ "bne 12f\n"
+ "cbz x21, 10f\n"
+ "cmp x21, #0x1\n"
+ "sub x15, x15, x21\n"
+ "beq 9f\n"
+ "8:" // Unpadded: 2 priming loads
+ "add x20, x14, %x[ld_in_row]\n"
+ "ld1b { z12.s }, p1/Z, [x14]\n"
+ "addvl x19, SP, #4\n"
+ "ld1b { z20.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "add z12.h, z12.h, z5.h\n"
+ "ld1b { z13.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "ld1b { z19.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z13.h, z13.h, z5.h\n"
+ "ld1b { z14.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1b { z18.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z5.h\n"
+ "ld1b { z15.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add z15.h, z15.h, z5.h\n"
+ "ld1b { z16.s }, p1/Z, [x20]\n"
+ "mov z16.d, z16.d\n"
+ "add z16.h, z16.h, z5.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ "9:" // Unpadded: 1 priming loads
+ "add x20, x14, %x[ld_in_row]\n"
+ "ld1b { z12.s }, p1/Z, [x14]\n"
+ "addvl x19, SP, #2\n"
+ "ld1b { z20.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "add z12.h, z12.h, z5.h\n"
+ "ld1b { z13.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "ld1b { z19.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z13.h, z13.h, z5.h\n"
+ "ld1b { z14.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1b { z18.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z5.h\n"
+ "ld1b { z15.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add z15.h, z15.h, z5.h\n"
+ "ld1b { z16.s }, p1/Z, [x20]\n"
+ "mov z16.d, z16.d\n"
+ "add z16.h, z16.h, z5.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ "10:" // Unpadded: 0 priming loads
+ "cmp x15, #0x2\n"
+ ".inst 0xa0402bea // ld1h { z10.h-z11.h }, pn10.b/Z, [SP]\n"
+ "blt 18f\n"
+ "add x20, x14, %x[ld_in_row]\n"
+ "ld1b { z12.s }, p1/Z, [x14]\n"
+ "sub x15, x15, #0x2\n"
+ "ld1b { z20.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "sub x13, x13, #0x1\n"
+ "ld1b { z13.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "lsr x19, x15, #0x1\n"
+ "add z12.h, z12.h, z5.h\n"
+ "ld1b { z19.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "cmp x19, x13\n"
+ "ld1b { z14.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "csel x22, x19, x13, LT\n"
+ "add z13.h, z13.h, z5.h\n"
+ "ld1b { z18.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z5.h\n"
+ "ld1b { z15.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "ld1b { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add z15.h, z15.h, z5.h\n"
+ "ld1b { z16.s }, p1/Z, [x20]\n"
+ "mov z16.d, z16.d\n"
+ "add z16.h, z16.h, z5.h\n"
+ "and x15, x15, #0x1\n"
+ "sub x13, x13, x22\n"
+ "cbz x22, 17f\n"
+ "11:" // Unpadded: Main loop
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ "addvl x19, SP, #4\n"
+ "add x21, x14, %x[ld_in_row]\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ "addvl x20, SP, #2\n"
+ "subs x22, x22, #0x1\n"
+ ".inst 0xc17a7589 // sdot za.s[x11, 1], { z12.h-z15.h }, z10.h\n"
+ "ld1b { z12.s }, p1/Z, [x14]\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ "ld1b { z20.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0xc17b75a9 // sdot za.s[x11, 1], { z13.h-z16.h }, z11.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "ld1b { z13.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "add z12.h, z12.h, z5.h\n"
+ ".inst 0xc0066c1c // mova { z28.d-z31.d }, za.d[x11, #0]\n"
+ "ld1b { z19.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z13.h, z13.h, z5.h\n"
+ "ld1b { z14.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "add x11, x11, #0x1\n"
+ ".inst 0xc0046c02 // mova za.d[x11, #2], { z0.d-z3.d }\n"
+ "ld1b { z18.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z5.h\n"
+ "ld1b { z15.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0xc1a8ac1c // sqdmulh { z28.s-z31.s }, { z28.s-z31.s }, z8.s\n"
+ "ld1b { z17.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add z15.h, z15.h, z5.h\n"
+ "ld1b { z16.s }, p1/Z, [x21]\n"
+ "mov z16.d, z16.d\n"
+ "add z16.h, z16.h, z5.h\n"
+ ".inst 0xa0402a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc1a7aa3c // srshl { z28.s-z31.s }, { z28.s-z31.s }, z7.s\n"
+ "ld1b { z12.s }, p1/Z, [x14]\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ ".inst 0xc1a4ab1c // add { z28.s-z31.s }, { z28.s-z31.s }, z4.s\n"
+ "ld1b { z20.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ ".inst 0xc1b7cf7c // sclamp { z28.s-z31.s }, z27.s, z23.s\n"
+ "ld1b { z13.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "st1b { z28.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ "ld1b { z19.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "st1b { z29.s }, p1, [x9]\n"
+ "ld1b { z14.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "add x9, x9, x27\n"
+ "st1b { z30.s }, p1, [x26]\n"
+ "ld1b { z18.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add x26, x26, x24\n"
+ "ld1b { z15.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "st1b { z31.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add z12.h, z12.h, z5.h\n"
+ "ld1b { z16.s }, p1/Z, [x19]\n"
+ "mov z16.d, z16.d\n"
+ "add z13.h, z13.h, z5.h\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ ".inst 0xa0402bea // ld1h { z10.h-z11.h }, pn10.b/Z, [SP]\n"
+ "add z14.h, z14.h, z5.h\n"
+ "add z15.h, z15.h, z5.h\n"
+ "add z16.h, z16.h, z5.h\n"
+ "bgt 11b\n"
+ "b 17f\n"
+ "12:" // Padded
+ "cbz x21, 15f\n"
+ "cmp x21, #0x1\n"
+ "sub x15, x15, x21\n"
+ "beq 14f\n"
+ "13:" // Padded: 2 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z12.s }, p0/Z, [x14]\n"
+ "add z12.h, p0/M, z12.h, z5.h\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z5.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z15.s }, p0/Z, [x19]\n"
+ "add z15.h, p0/M, z15.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z17.h, p0/M, z17.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z5.h\n"
+ "addvl x19, SP, #4\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ "14:" // Padded: 1 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z12.s }, p0/Z, [x14]\n"
+ "add z12.h, p0/M, z12.h, z5.h\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z5.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z15.s }, p0/Z, [x19]\n"
+ "add z15.h, p0/M, z15.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z17.h, p0/M, z17.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z5.h\n"
+ "addvl x19, SP, #2\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ "15:" // Padded: 0 priming loads
+ "cmp x15, #0x2\n"
+ ".inst 0xa0402bea // ld1h { z10.h-z11.h }, pn10.b/Z, [SP]\n"
+ "blt 18f\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z12.s }, p0/Z, [x14]\n"
+ "add z12.h, p0/M, z12.h, z5.h\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z5.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z15.s }, p0/Z, [x19]\n"
+ "add z15.h, p0/M, z15.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z17.h, p0/M, z17.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z5.h\n"
+ "sub x15, x15, #0x2\n"
+ "sub x13, x13, #0x1\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "lsr x19, x15, #0x1\n"
+ "cmp x19, x13\n"
+ "mov z16.d, z16.d\n"
+ "csel x21, x19, x13, LT\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "and x15, x15, #0x1\n"
+ "sub x13, x13, x21\n"
+ "cbz x21, 17f\n"
+ "16:" // Padded: Main loop
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ "addvl x19, SP, #4\n"
+ "mov x12, #0x0\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "add x20, x14, %x[ld_in_row]\n"
+ ".inst 0xc17a7589 // sdot za.s[x11, 1], { z12.h-z15.h }, z10.h\n"
+ "ld1b { z12.s }, p0/Z, [x14]\n"
+ "add z12.h, p0/M, z12.h, z5.h\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z20.s }, p0/Z, [x20]\n"
+ "add z20.h, p0/M, z20.h, z5.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc17b75a9 // sdot za.s[x11, 1], { z13.h-z16.h }, z11.h\n"
+ "ld1b { z13.s }, p0/Z, [x20]\n"
+ "add z13.h, p0/M, z13.h, z5.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z19.s }, p0/Z, [x20]\n"
+ "mov x12, #0x4\n"
+ "add z19.h, p0/M, z19.h, z5.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z14.s }, p0/Z, [x20]\n"
+ "add z14.h, p0/M, z14.h, z5.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x20]\n"
+ "add z18.h, p0/M, z18.h, z5.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z15.s }, p0/Z, [x20]\n"
+ "add z15.h, p0/M, z15.h, z5.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z17.s }, p0/Z, [x20]\n"
+ "add z17.h, p0/M, z17.h, z5.h\n"
+ "mov x12, #0x8\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "addvl x19, SP, #2\n"
+ "ld1b { z16.s }, p0/Z, [x20]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ "mov x12, #0x0\n"
+ ".inst 0xc0066c1c // mova { z28.d-z31.d }, za.d[x11, #0]\n"
+ "add x11, x11, #0x1\n"
+ "add z16.h, p0/M, z16.h, z5.h\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z12.s }, p0/Z, [x14]\n"
+ "add z12.h, p0/M, z12.h, z5.h\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "mov z16.d, z16.d\n"
+ "ld1b { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ "ld1b { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z19.s }, p0/Z, [x19]\n"
+ "mov x12, #0x4\n"
+ "add z19.h, p0/M, z19.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc0046c02 // mova za.d[x11, #2], { z0.d-z3.d }\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z15.s }, p0/Z, [x19]\n"
+ ".inst 0xc1a8ac1c // sqdmulh { z28.s-z31.s }, { z28.s-z31.s }, z8.s\n"
+ "add z15.h, p0/M, z15.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ ".inst 0xc1a7aa3c // srshl { z28.s-z31.s }, { z28.s-z31.s }, z7.s\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "add z17.h, p0/M, z17.h, z5.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z5.h\n"
+ ".inst 0xc1a4ab1c // add { z28.s-z31.s }, { z28.s-z31.s }, z4.s\n"
+ "subs x21, x21, #0x1\n"
+ ".inst 0xa0402bea // ld1h { z10.h-z11.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xc1b7cf7c // sclamp { z28.s-z31.s }, z27.s, z23.s\n"
+ "st1b { z28.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "st1b { z29.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "st1b { z30.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "mov z16.d, z16.d\n"
+ "st1b { z31.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "bgt 16b\n"
+ "17:" // Main loop tail
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ "addvl x19, SP, #4\n"
+ "mov x12, #0x0\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ ".inst 0xc17a7589 // sdot za.s[x11, 1], { z12.h-z15.h }, z10.h\n"
+ "ld1b { z12.s }, p0/Z, [x14]\n"
+ "add z12.h, p0/M, z12.h, z5.h\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc17b75a9 // sdot za.s[x11, 1], { z13.h-z16.h }, z11.h\n"
+ "ld1b { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z19.s }, p0/Z, [x19]\n"
+ "mov x12, #0x4\n"
+ "add z19.h, p0/M, z19.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z15.s }, p0/Z, [x19]\n"
+ ".inst 0xc0066c1c // mova { z28.d-z31.d }, za.d[x11, #0]\n"
+ "add z15.h, p0/M, z15.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ ".inst 0xc1a8ac1c // sqdmulh { z28.s-z31.s }, { z28.s-z31.s }, z8.s\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "add z17.h, p0/M, z17.h, z5.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "addvl x19, SP, #2\n"
+ ".inst 0xc1a7aa3c // srshl { z28.s-z31.s }, { z28.s-z31.s }, z7.s\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "add x11, x11, #0x1\n"
+ "add z16.h, p0/M, z16.h, z5.h\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add x14, x14, %x[ld_in_col]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1a4ab1c // add { z28.s-z31.s }, { z28.s-z31.s }, z4.s\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc1b7cf7c // sclamp { z28.s-z31.s }, z27.s, z23.s\n"
+ "st1b { z28.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ ".inst 0xc0046c02 // mova za.d[x11, #2], { z0.d-z3.d }\n"
+ "st1b { z29.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ ".inst 0xa0402bea // ld1h { z10.h-z11.h }, pn10.b/Z, [SP]\n"
+ "st1b { z30.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ "st1b { z31.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ "18:" // Main loop skip tail
+ "cbz x15, 19f\n" // Skip remainder inputs
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z12.s }, p0/Z, [x14]\n"
+ "add z12.h, p0/M, z12.h, z5.h\n"
+ "add x19, x14, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z5.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z15.s }, p0/Z, [x19]\n"
+ "add z15.h, p0/M, z15.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z17.h, p0/M, z17.h, z5.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z5.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "mov z16.d, z16.d\n"
+ "addvl x19, SP, #4\n"
+ ".inst 0xc17a7588 // sdot za.s[x11, 0], { z12.h-z15.h }, z10.h\n"
+ "sub x13, x13, #0x1\n"
+ ".inst 0xc17b75a8 // sdot za.s[x11, 0], { z13.h-z16.h }, z11.h\n"
+ ".inst 0xa0402a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc0066c1c // mova { z28.d-z31.d }, za.d[x11, #0]\n"
+ ".inst 0xc1a8ac1c // sqdmulh { z28.s-z31.s }, { z28.s-z31.s }, z8.s\n"
+ ".inst 0xc1a7aa3c // srshl { z28.s-z31.s }, { z28.s-z31.s }, z7.s\n"
+ ".inst 0xc17a7589 // sdot za.s[x11, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc1a4ab1c // add { z28.s-z31.s }, { z28.s-z31.s }, z4.s\n"
+ ".inst 0xc17b75a9 // sdot za.s[x11, 1], { z13.h-z16.h }, z11.h\n"
+ "add x11, x11, #0x1\n"
+ ".inst 0xc1b7cf7c // sclamp { z28.s-z31.s }, z27.s, z23.s\n"
+ "st1b { z28.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ ".inst 0xc0046c02 // mova za.d[x11, #2], { z0.d-z3.d }\n"
+ "st1b { z29.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "st1b { z30.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ "st1b { z31.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ "19:" // Tail input: End
+ "cbz x13, 21f\n"
+ "20:" // Right padding loop
+ ".inst 0xc0066c1c // mova { z28.d-z31.d }, za.d[x11, #0]\n"
+ ".inst 0xc1a8ac1c // sqdmulh { z28.s-z31.s }, { z28.s-z31.s }, z8.s\n"
+ "add x11, x11, #0x1\n"
+ ".inst 0xc1a7aa3c // srshl { z28.s-z31.s }, { z28.s-z31.s }, z7.s\n"
+ "subs x13, x13, #0x1\n"
+ ".inst 0xc0046c02 // mova za.d[x11, #2], { z0.d-z3.d }\n"
+ ".inst 0xc1a4ab1c // add { z28.s-z31.s }, { z28.s-z31.s }, z4.s\n"
+ ".inst 0xc1b7cf7c // sclamp { z28.s-z31.s }, z27.s, z23.s\n"
+ "st1b { z28.s }, p1, [x10]\n"
+ "add x10, x10, x28\n"
+ "st1b { z29.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "st1b { z30.s }, p1, [x26]\n"
+ "add x26, x26, x24\n"
+ "st1b { z31.s }, p1, [x25]\n"
+ "add x25, x25, x23\n"
+ "bgt 20b\n"
+ "21:" // End
+ "ldr x21, [%x[args], %[offsetof_Args_weights]]\n"
+ "incw x21, ALL, MUL #9\n"
+ "str x21, [%x[args], %[offsetof_Args_weights]]\n"
+ "incw x16\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_in_vl]]\n"
+ "whilelt p1.s, x16, x17\n"
+ "ldr x14, [%x[args], %[offsetof_Args_inptr]]\n"
+ "add x14, x14, x19\n"
+ "str x14, [%x[args], %[offsetof_Args_inptr]]\n"
+ "ldr x24, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "ldr x23, [%x[args], %[offsetof_Args_ld_out_vls]]\n"
+ "ldp x22, x21, [x24, #0x0]\n"
+ "ldp x20, x19, [x23, #0x0]\n"
+ "add x22, x22, x20\n"
+ "add x21, x21, x19\n"
+ "stp x22, x21, [x24, #0x0]\n"
+ "ldp x22, x21, [x24, #0x10]\n"
+ "ldp x20, x19, [x23, #0x10]\n"
+ "add x22, x22, x20\n"
+ "add x21, x21, x19\n"
+ "stp x22, x21, [x24, #0x10]\n"
+ "b.any 1b\n"
+ "addvl SP, SP, #6\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [ld_in_col] "r" (ld_in_col), [ld_in_row] "r" (ld_in_row), [offsetof_Args_current_channel] "I" (offsetof(Args, current_channel)), [offsetof_Args_inptr] "I" (offsetof(Args, inptr)), [offsetof_Args_input_cols] "I" (offsetof(Args, input_cols)), [offsetof_Args_ld_in_vl] "I" (offsetof(Args, ld_in_vl)), [offsetof_Args_ld_out_cols] "I" (offsetof(Args, ld_out_cols)), [offsetof_Args_ld_out_vls] "I" (offsetof(Args, ld_out_vls)), [offsetof_Args_n_channels] "I" (offsetof(Args, n_channels)), [offsetof_Args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_Args_output_cols] "I" (offsetof(Args, output_cols)), [offsetof_Args_pad_bottom] "I" (offsetof(Args, pad_bottom)), [offsetof_Args_pad_left] "I" (offsetof(Args, pad_left)), [offsetof_Args_pad_top] "I" (offsetof(Args, pad_top)), [offsetof_Args_weights] "I" (offsetof(Args, weights)), [offsetof_Requantize32_a_offset] "I" (offsetof(arm_gemm::Requantize32, a_offset)), [offsetof_Requantize32_b_offset] "I" (offsetof(arm_gemm::Requantize32, b_offset)), [offsetof_Requantize32_bias] "I" (offsetof(arm_gemm::Requantize32, bias)), [offsetof_Requantize32_c_offset] "I" (offsetof(arm_gemm::Requantize32, c_offset)), [offsetof_Requantize32_maxval] "I" (offsetof(arm_gemm::Requantize32, maxval)), [offsetof_Requantize32_minval] "I" (offsetof(arm_gemm::Requantize32, minval)), [offsetof_Requantize32_per_channel_muls] "I" (offsetof(arm_gemm::Requantize32, per_channel_muls)), [offsetof_Requantize32_per_channel_right_shifts] "I" (offsetof(arm_gemm::Requantize32, per_channel_right_shifts)), [offsetof_Requantize32_per_layer_mul] "I" (offsetof(arm_gemm::Requantize32, per_layer_mul)), [offsetof_Requantize32_per_layer_right_shift] "I" (offsetof(arm_gemm::Requantize32, per_layer_right_shift)), [qp] "r" (&qp)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8s8u8q_planar_5x5_s1_4rows_dot_za.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8s8u8q_planar_5x5_s1_4rows_dot_za.hpp
new file mode 100644
index 0000000..6071197
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8s8u8q_planar_5x5_s1_4rows_dot_za.hpp
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_u8s8u8q_planar_5x5_s1_4rows_dot_za_impl(
+ const uint8_t *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const int8_t *weights,
+ uint8_t **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ const arm_gemm::Requantize32 &qp
+);
+
+class sme2_u8s8u8q_planar_5x5_s1_4rows_dot_za : public PlanarStrategy<uint8_t, int8_t>
+{
+ using Parent = PlanarStrategy<uint8_t, int8_t>;
+
+ public:
+ using return_type = uint8_t;
+ constexpr static auto output_rows = 4u;
+ constexpr static auto kernel_rows = 5u, kernel_cols = 5u;
+ constexpr static auto stride_rows = 1u, stride_cols = 1u;
+ constexpr static auto vl_type = arm_gemm::VLType::SME;
+
+ sme2_u8s8u8q_planar_5x5_s1_4rows_dot_za(const CPUInfo *)
+ : Parent(kernel_rows, kernel_cols, stride_rows, stride_cols, output_rows, vl_type)
+ {
+ }
+
+ typename Parent::KernelType get_kernel(void) const override
+ {
+ return sme2_u8s8u8q_planar_5x5_s1_4rows_dot_za_impl;
+ }
+};
+
+} // namespace depthwise
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8s8u8q_planar_5x5_s1_4rows_dot_za/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8s8u8q_planar_5x5_s1_4rows_dot_za/generic.cpp
new file mode 100644
index 0000000..d697064
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8s8u8q_planar_5x5_s1_4rows_dot_za/generic.cpp
@@ -0,0 +1,1204 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <algorithm>
+#include <cstddef>
+#include "arm_gemm.hpp"
+
+using arm_gemm::Requantize32;
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_u8s8u8q_planar_5x5_s1_4rows_dot_za_impl(
+ const uint8_t *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const int8_t *weights,
+ uint8_t **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ const arm_gemm::Requantize32 &qp
+)
+{
+ struct Args
+ {
+ const uint8_t *inptr;
+ size_t ld_in_vl;
+ long unsigned int pad_top, pad_bottom, pad_left;
+ const int8_t *weights;
+ long unsigned int input_cols, output_cols;
+ uint8_t **outptrs;
+ const size_t *ld_out_cols;
+ const size_t *ld_out_vls;
+ long unsigned int current_channel, n_channels;
+ };
+
+ Args args = { inptr, ld_in_vl, pad_top, 8u - std::min(8u, pad_top + valid_input_rows), pad_left, weights, valid_input_cols, output_cols, outptrs, outlds, outvllds, start_channel, valid_channels };
+
+ __asm__ __volatile__(
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "ldr x5, [%x[args], %[offsetof_Args_pad_bottom]]\n"
+ "ptrue p2.b\n"
+ "mov x19, #0x8\n"
+ "ldr x6, [%x[args], %[offsetof_Args_pad_top]]\n"
+ "ld1rh { z25.h }, p2/Z, [%x[qp], %[offsetof_Requantize32_a_offset]]\n"
+ "sub x19, x19, x5\n"
+ ".inst 0x25207812 // ptrue pn10.b\n"
+ "ldr x7, [%x[args], %[offsetof_Args_n_channels]]\n"
+ "whilelt p1.s, XZR, x7\n"
+ "whilelt p9.s, XZR, x19\n"
+ "ld1rw { z9.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_c_offset]]\n"
+ "whilelt p8.s, XZR, x6\n"
+ "addvl SP, SP, #-30\n"
+ "ldr x17, [%x[args], %[offsetof_Args_current_channel]]\n"
+ "neg z25.h, p2/M, z25.h\n"
+ "eor p8.b, p2/Z, p8.b, p9.b\n"
+ "ld1rw { z3.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_per_layer_mul]]\n"
+ "ld1rw { z1.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_per_layer_right_shift]]\n"
+ "ld1rw { z24.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_minval]]\n"
+ "ld1rw { z31.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_maxval]]\n"
+ "1:" // Channel loop
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_bias]]\n"
+ "mov z6.s, #0x0\n"
+ "cbz x19, 2f\n"
+ "ld1w { z6.s }, p1/Z, [x19, x17, LSL #2]\n"
+ "2:" // Load bias: Done
+ "ldr x23, [%x[args], %[offsetof_Args_weights]]\n"
+ "mov x21, x23\n"
+ "ld1sb { z18.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "ld1rh { z12.h }, p2/Z, [%x[qp], %[offsetof_Requantize32_b_offset]]\n"
+ "mov z2.h, #0x0\n"
+ "sub z18.h, z18.h, z12.h\n"
+ "incw x23\n"
+ "ld1sb { z17.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "sub z17.h, z17.h, z12.h\n"
+ "trn1 z0.h, z2.h, z18.h\n"
+ "ld1sb { z21.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "sub z21.h, z21.h, z12.h\n"
+ "trn1 z8.h, z18.h, z17.h\n"
+ "ld1sb { z16.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "sub z16.h, z16.h, z12.h\n"
+ "trn1 z4.h, z17.h, z21.h\n"
+ "ld1sb { z15.s }, p2/Z, [x21]\n"
+ "sub z15.h, z15.h, z12.h\n"
+ "mov x21, x23\n"
+ "trn1 z5.h, z21.h, z16.h\n"
+ "ld1sb { z18.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "trn1 z10.h, z16.h, z15.h\n"
+ "trn1 z11.h, z15.h, z2.h\n"
+ "ld1sb { z17.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "sub z18.h, z18.h, z12.h\n"
+ "sub z17.h, z17.h, z12.h\n"
+ "ld1sb { z21.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "sub z21.h, z21.h, z12.h\n"
+ "addvl x20, SP, #30\n"
+ "ld1sb { z16.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "incw x23\n"
+ "sub z16.h, z16.h, z12.h\n"
+ "ld1sb { z15.s }, p2/Z, [x21]\n"
+ "addvl x20, x20, #-6\n"
+ "sub z15.h, z15.h, z12.h\n"
+ "mov x21, x23\n"
+ "st1h { z0.h }, p2, [x20]\n"
+ "trn1 z0.h, z2.h, z18.h\n"
+ "incw x23\n"
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_muls]]\n"
+ "st1h { z8.h }, p2, [x20, #1, MUL VL]\n"
+ "trn1 z8.h, z18.h, z17.h\n"
+ "ld1sb { z18.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z4.h }, p2, [x20, #2, MUL VL]\n"
+ "trn1 z4.h, z17.h, z21.h\n"
+ "ld1sb { z17.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z5.h }, p2, [x20, #3, MUL VL]\n"
+ "trn1 z5.h, z21.h, z16.h\n"
+ "ld1sb { z21.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z10.h }, p2, [x20, #4, MUL VL]\n"
+ "trn1 z10.h, z16.h, z15.h\n"
+ "ld1sb { z16.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z11.h }, p2, [x20, #5, MUL VL]\n"
+ "trn1 z11.h, z15.h, z2.h\n"
+ "sub z18.h, z18.h, z12.h\n"
+ "addvl x20, x20, #-6\n"
+ "sub z17.h, z17.h, z12.h\n"
+ "ld1sb { z15.s }, p2/Z, [x21]\n"
+ "sub z21.h, z21.h, z12.h\n"
+ "mov x21, x23\n"
+ "sub z16.h, z16.h, z12.h\n"
+ "sub z15.h, z15.h, z12.h\n"
+ "st1h { z0.h }, p2, [x20]\n"
+ "incw x23\n"
+ "st1h { z8.h }, p2, [x20, #1, MUL VL]\n"
+ "trn1 z0.h, z2.h, z18.h\n"
+ "trn1 z8.h, z18.h, z17.h\n"
+ "ld1sb { z18.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z4.h }, p2, [x20, #2, MUL VL]\n"
+ "trn1 z4.h, z17.h, z21.h\n"
+ "ld1sb { z17.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z5.h }, p2, [x20, #3, MUL VL]\n"
+ "trn1 z5.h, z21.h, z16.h\n"
+ "ld1sb { z21.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z10.h }, p2, [x20, #4, MUL VL]\n"
+ "trn1 z10.h, z16.h, z15.h\n"
+ "ld1sb { z16.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z11.h }, p2, [x20, #5, MUL VL]\n"
+ "trn1 z11.h, z15.h, z2.h\n"
+ "sub z18.h, z18.h, z12.h\n"
+ "sub z17.h, z17.h, z12.h\n"
+ "ld1sb { z15.s }, p2/Z, [x21]\n"
+ "addvl x20, x20, #-6\n"
+ "sub z21.h, z21.h, z12.h\n"
+ "sub z16.h, z16.h, z12.h\n"
+ "mov x21, x23\n"
+ "st1h { z0.h }, p2, [x20]\n"
+ "sub z15.h, z15.h, z12.h\n"
+ "st1h { z8.h }, p2, [x20, #1, MUL VL]\n"
+ "trn1 z0.h, z2.h, z18.h\n"
+ "trn1 z8.h, z18.h, z17.h\n"
+ "ld1sb { z18.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z4.h }, p2, [x20, #2, MUL VL]\n"
+ "trn1 z4.h, z17.h, z21.h\n"
+ "ld1sb { z17.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z5.h }, p2, [x20, #3, MUL VL]\n"
+ "trn1 z5.h, z21.h, z16.h\n"
+ "ld1sb { z21.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z10.h }, p2, [x20, #4, MUL VL]\n"
+ "trn1 z10.h, z16.h, z15.h\n"
+ "ld1sb { z16.s }, p2/Z, [x21]\n"
+ "incw x21, ALL, MUL #5\n"
+ "st1h { z11.h }, p2, [x20, #5, MUL VL]\n"
+ "trn1 z11.h, z15.h, z2.h\n"
+ "ld1sb { z15.s }, p2/Z, [x21]\n"
+ "sub z18.h, z18.h, z12.h\n"
+ "addvl x20, x20, #-6\n"
+ "sub z17.h, z17.h, z12.h\n"
+ "sub z21.h, z21.h, z12.h\n"
+ "st1h { z0.h }, p2, [x20]\n"
+ "sub z16.h, z16.h, z12.h\n"
+ "sub z15.h, z15.h, z12.h\n"
+ "st1h { z8.h }, p2, [x20, #1, MUL VL]\n"
+ "st1h { z4.h }, p2, [x20, #2, MUL VL]\n"
+ "mov z7.d, z6.d\n"
+ "trn1 z0.h, z2.h, z18.h\n"
+ "st1h { z5.h }, p2, [x20, #3, MUL VL]\n"
+ "trn1 z8.h, z18.h, z17.h\n"
+ "trn1 z4.h, z17.h, z21.h\n"
+ "st1h { z10.h }, p2, [x20, #4, MUL VL]\n"
+ "trn1 z5.h, z21.h, z16.h\n"
+ "trn1 z10.h, z16.h, z15.h\n"
+ "st1h { z11.h }, p2, [x20, #5, MUL VL]\n"
+ "addvl x20, x20, #-6\n"
+ "trn1 z11.h, z15.h, z2.h\n"
+ "st1h { z0.h }, p2, [x20]\n"
+ "st1h { z8.h }, p2, [x20, #1, MUL VL]\n"
+ "st1h { z4.h }, p2, [x20, #2, MUL VL]\n"
+ "st1h { z5.h }, p2, [x20, #3, MUL VL]\n"
+ "st1h { z10.h }, p2, [x20, #4, MUL VL]\n"
+ "st1h { z11.h }, p2, [x20, #5, MUL VL]\n"
+ "cbz x19, 3f\n"
+ "ld1w { z3.s }, p1/Z, [x19, x17, LSL #2]\n"
+ "3:" // Load mul: End
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_right_shifts]]\n"
+ "cbz x19, 4f\n"
+ "ld1w { z1.s }, p1/Z, [x19, x17, LSL #2]\n"
+ "4:" // Load right_shift: End
+ "ldr x16, [%x[args], %[offsetof_Args_input_cols]]\n"
+ "sub x19, x16, #0x1\n"
+ "orr x22, x19, %x[ld_in_col], LSL #16\n"
+ "ldr x15, [%x[args], %[offsetof_Args_inptr]]\n"
+ "orr x22, x7, x22, LSL #22\n"
+ "mov x21, #0x8\n"
+ "add x20, x6, x5\n"
+ "lsl x19, %x[ld_in_row], #0x0\n"
+ "ldr x14, [%x[args], %[offsetof_Args_output_cols]]\n"
+ "mov x11, #0x0\n"
+ "mov x8, #0x8\n"
+ "lsl x22, x22, #0x0\n"
+ "sub x21, x21, x20\n"
+ "madd x19, x19, x6, x15\n"
+ "5:" // Issue prefetches
+ "subs x21, x21, #0x1\n"
+ ".inst 0xf8b64a7c // rprfm pldstrm, x22, [x19]\n"
+ "add x19, x19, %x[ld_in_col]\n"
+ "bgt 5b\n"
+ "ldr x24, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "lsl x19, %x[ld_in_row], #0x0\n"
+ "msub x15, x6, x19, x15\n"
+ ".inst 0xc00468c0 // mova za.d[x11, #0], { z6.d-z7.d }\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_out_cols]]\n"
+ ".inst 0xc00468c1 // mova za.d[x11, #1], { z6.d-z7.d }\n"
+ "mov x21, #0x4\n"
+ "ldp x13, x4, [x24], #0x10\n"
+ ".inst 0xc00468c2 // mova za.d[x11, #2], { z6.d-z7.d }\n"
+ "ldp x10, x9, [x19], #0x10\n"
+ ".inst 0xc00468c3 // mova za.d[x11, #3], { z6.d-z7.d }\n"
+ "ldr x20, [%x[args], %[offsetof_Args_pad_left]]\n"
+ ".inst 0xc00468c4 // mova za.d[x11, #4], { z6.d-z7.d }\n"
+ "ldp x28, x27, [x24], #0x10\n"
+ ".inst 0xc00468c5 // mova za.d[x11, #5], { z6.d-z7.d }\n"
+ "ldp x26, x25, [x19], #0x10\n"
+ ".inst 0xc00468c6 // mova za.d[x11, #6], { z6.d-z7.d }\n"
+ ".inst 0xc00468c7 // mova za.d[x11, #7], { z6.d-z7.d }\n"
+ ".inst 0xc00408c0 // mova za.d[x8, #0], { z6.d-z7.d }\n"
+ ".inst 0xc00408c1 // mova za.d[x8, #1], { z6.d-z7.d }\n"
+ "cbz x20, 7f\n"
+ "cmp x20, x21\n"
+ "csel x19, x20, x21, LT\n"
+ "sub x20, x20, x19\n"
+ "sub x21, x21, x19\n"
+ "cbz x20, 7f\n"
+ ".inst 0xc006680c // mova { z12.d-z13.d }, za.d[x11, #0]\n"
+ "sub x14, x14, x20\n"
+ ".inst 0xc006682e // mova { z14.d-z15.d }, za.d[x11, #1]\n"
+ ".inst 0xc1a3ac0c // sqdmulh { z12.s-z15.s }, { z12.s-z15.s }, z3.s\n"
+ ".inst 0xc1a1aa2c // srshl { z12.s-z15.s }, { z12.s-z15.s }, z1.s\n"
+ ".inst 0xc1a9ab0c // add { z12.s-z15.s }, { z12.s-z15.s }, z9.s\n"
+ ".inst 0xc1bfcf0c // sclamp { z12.s-z15.s }, z24.s, z31.s\n"
+ "6:" // Left padding
+ "subs x20, x20, #0x1\n"
+ "st1b { z12.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ "st1b { z14.s }, p1, [x4]\n"
+ "add x4, x4, x9\n"
+ "st1b { z13.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ "st1b { z15.s }, p1, [x27]\n"
+ "add x27, x27, x25\n"
+ "bgt 6b\n"
+ "7:" // Left padding: End
+ "adds XZR, x6, x5\n"
+ "bne 14f\n"
+ "cbz x21, 12f\n"
+ "cmp x21, #0x1\n"
+ "sub x16, x16, x21\n"
+ "beq 11f\n"
+ "cmp x21, #0x2\n"
+ "beq 10f\n"
+ "cmp x21, #0x3\n"
+ "beq 9f\n"
+ "8:" // Unpadded: 4 priming loads
+ "add x20, x15, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x15]\n"
+ "addvl x19, SP, #24\n"
+ "ld1b { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z27.h, z17.h, z16.h\n"
+ "add z27.h, z27.h, z25.h\n"
+ "ld1b { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ "ld1b { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ "add z28.h, z28.h, z25.h\n"
+ "ld1b { z16.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1b { z29.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z29.h, z16.h, z29.h\n"
+ "add z29.h, z29.h, z25.h\n"
+ "ld1b { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ "ld1b { z16.s }, p1/Z, [x20]\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ "add z30.h, z30.h, z25.h\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ "9:" // Unpadded: 3 priming loads
+ "add x21, x15, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x15]\n"
+ "addvl x20, SP, #18\n"
+ "ld1b { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z27.h, z17.h, z16.h\n"
+ "add z27.h, z27.h, z25.h\n"
+ "ld1b { z17.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "addvl x19, SP, #24\n"
+ "ld1b { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ "add z28.h, z28.h, z25.h\n"
+ "ld1b { z17.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ "ld1b { z16.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z29.h, z17.h, z16.h\n"
+ "add z29.h, z29.h, z25.h\n"
+ "ld1b { z17.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0xa1402a80 // ld1h { z0.h, z8.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ "ld1b { z16.s }, p1/Z, [x21]\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc168776a // sdot za.s[x11, 2], { z27.h-z28.h }, z8.h\n"
+ "add z30.h, z30.h, z25.h\n"
+ ".inst 0xa0412a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc160776b // sdot za.s[x11, 3], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xa0422a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc165778a // sdot za.s[x11, 2], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778b // sdot za.s[x11, 3], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc16b77aa // sdot za.s[x11, 2], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ab // sdot za.s[x11, 3], { z29.h-z30.h }, z10.h\n"
+ "10:" // Unpadded: 2 priming loads
+ "add x22, x15, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x15]\n"
+ "addvl x21, SP, #12\n"
+ "ld1b { z16.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "trn1 z27.h, z17.h, z16.h\n"
+ "add z27.h, z27.h, z25.h\n"
+ "ld1b { z17.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "addvl x20, SP, #18\n"
+ "ld1b { z16.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ "add z28.h, z28.h, z25.h\n"
+ "ld1b { z17.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "addvl x19, SP, #24\n"
+ "ld1b { z16.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "trn1 z29.h, z17.h, z16.h\n"
+ "add z29.h, z29.h, z25.h\n"
+ "ld1b { z17.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ ".inst 0xa1402aa0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x21]\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ "ld1b { z16.s }, p1/Z, [x22]\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a80 // ld1h { z0.h, z8.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc168776a // sdot za.s[x11, 2], { z27.h-z28.h }, z8.h\n"
+ "add z30.h, z30.h, z25.h\n"
+ ".inst 0xa0412aa4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0xc160776b // sdot za.s[x11, 3], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xa0422aaa // ld1h { z10.h-z11.h }, pn10.b/Z, [x21, #0x4, MUL VL]\n"
+ ".inst 0xc168776c // sdot za.s[x11, 4], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776d // sdot za.s[x11, 5], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xc165778a // sdot za.s[x11, 2], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778b // sdot za.s[x11, 3], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc165778c // sdot za.s[x11, 4], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778d // sdot za.s[x11, 5], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xc16b77aa // sdot za.s[x11, 2], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ab // sdot za.s[x11, 3], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc16b77ac // sdot za.s[x11, 4], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ad // sdot za.s[x11, 5], { z29.h-z30.h }, z10.h\n"
+ "11:" // Unpadded: 1 priming loads
+ "add x23, x15, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x15]\n"
+ "addvl x22, SP, #6\n"
+ "ld1b { z16.s }, p1/Z, [x23]\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ "trn1 z27.h, z17.h, z16.h\n"
+ "add z27.h, z27.h, z25.h\n"
+ "ld1b { z17.s }, p1/Z, [x23]\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ "addvl x21, SP, #12\n"
+ "ld1b { z16.s }, p1/Z, [x23]\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ "add z28.h, z28.h, z25.h\n"
+ "ld1b { z17.s }, p1/Z, [x23]\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ "addvl x20, SP, #18\n"
+ "ld1b { z16.s }, p1/Z, [x23]\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ "trn1 z29.h, z17.h, z16.h\n"
+ "add z29.h, z29.h, z25.h\n"
+ "ld1b { z17.s }, p1/Z, [x23]\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ "addvl x19, SP, #24\n"
+ ".inst 0xa1402ac0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x22]\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ "ld1b { z16.s }, p1/Z, [x23]\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402aa0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x21]\n"
+ ".inst 0xc168776a // sdot za.s[x11, 2], { z27.h-z28.h }, z8.h\n"
+ "add z30.h, z30.h, z25.h\n"
+ ".inst 0xa0412ac4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x22, #0x2, MUL VL]\n"
+ ".inst 0xc160776b // sdot za.s[x11, 3], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a80 // ld1h { z0.h, z8.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412aa4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0xa0422aca // ld1h { z10.h-z11.h }, pn10.b/Z, [x22, #0x4, MUL VL]\n"
+ ".inst 0xc168776c // sdot za.s[x11, 4], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776d // sdot za.s[x11, 5], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc165778a // sdot za.s[x11, 2], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778b // sdot za.s[x11, 3], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422aaa // ld1h { z10.h-z11.h }, pn10.b/Z, [x21, #0x4, MUL VL]\n"
+ ".inst 0xc168776e // sdot za.s[x11, 6], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776f // sdot za.s[x11, 7], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xc165778c // sdot za.s[x11, 4], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778d // sdot za.s[x11, 5], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16b77aa // sdot za.s[x11, 2], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ab // sdot za.s[x11, 3], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc165778e // sdot za.s[x11, 6], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778f // sdot za.s[x11, 7], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xc16b77ac // sdot za.s[x11, 4], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ad // sdot za.s[x11, 5], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc16b77ae // sdot za.s[x11, 6], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77af // sdot za.s[x11, 7], { z29.h-z30.h }, z10.h\n"
+ "12:" // Unpadded: 0 priming loads
+ ".inst 0xa1402be0 // ld1h { z0.h, z8.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xa0412be4 // ld1h { z4.h-z5.h }, pn10.b/Z, [SP, #0x2, MUL VL]\n"
+ ".inst 0xa0422bea // ld1h { z10.h-z11.h }, pn10.b/Z, [SP, #0x4, MUL VL]\n"
+ "cbz x16, 22f\n"
+ "add x19, x15, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x15]\n"
+ "sub x16, x16, #0x1\n"
+ "ld1b { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z27.h, z17.h, z16.h\n"
+ "sub x14, x14, #0x1\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "cmp x16, x14\n"
+ "add z27.h, z27.h, z25.h\n"
+ "ld1b { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ "csel x24, x16, x14, LT\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "add z28.h, z28.h, z25.h\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ "ld1b { z16.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z29.h, z17.h, z16.h\n"
+ "add z29.h, z29.h, z25.h\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "sub x14, x14, x24\n"
+ "ld1b { z16.s }, p1/Z, [x19]\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ "add z30.h, z30.h, z25.h\n"
+ "cbz x24, 21f\n"
+ "13:" // Unpadded: Main loop
+ "addvl x23, SP, #6\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ "addvl x22, SP, #12\n"
+ "ld1b { z23.s }, p1/Z, [x15]\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402ae0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x23]\n"
+ "addvl x21, SP, #18\n"
+ "addvl x20, SP, #24\n"
+ ".inst 0xc168776a // sdot za.s[x11, 2], { z27.h-z28.h }, z8.h\n"
+ "add x19, x15, %x[ld_in_row]\n"
+ "ld1b { z22.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc160776b // sdot za.s[x11, 3], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402ac0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x22]\n"
+ "subs x24, x24, #0x1\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ "ld1b { z21.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412ae4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x23, #0x2, MUL VL]\n"
+ ".inst 0xc168776c // sdot za.s[x11, 4], { z27.h-z28.h }, z8.h\n"
+ "ld1b { z20.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc160776d // sdot za.s[x11, 5], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402aa0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x21]\n"
+ ".inst 0xc165778a // sdot za.s[x11, 2], { z28.h-z29.h }, z5.h\n"
+ "ld1b { z19.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc164778b // sdot za.s[x11, 3], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412ac4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x22, #0x2, MUL VL]\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ "ld1b { z18.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422aea // ld1h { z10.h-z11.h }, pn10.b/Z, [x23, #0x4, MUL VL]\n"
+ ".inst 0xc168776e // sdot za.s[x11, 6], { z27.h-z28.h }, z8.h\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc160776f // sdot za.s[x11, 7], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a80 // ld1h { z0.h, z8.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc165778c // sdot za.s[x11, 4], { z28.h-z29.h }, z5.h\n"
+ "ld1b { z16.s }, p1/Z, [x19]\n"
+ ".inst 0xc164778d // sdot za.s[x11, 5], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412aa4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0xc16b77aa // sdot za.s[x11, 2], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ab // sdot za.s[x11, 3], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422aca // ld1h { z10.h-z11.h }, pn10.b/Z, [x22, #0x4, MUL VL]\n"
+ ".inst 0xc165778e // sdot za.s[x11, 6], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778f // sdot za.s[x11, 7], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc16b77ac // sdot za.s[x11, 4], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ad // sdot za.s[x11, 5], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422aaa // ld1h { z10.h-z11.h }, pn10.b/Z, [x21, #0x4, MUL VL]\n"
+ ".inst 0xc16b77ae // sdot za.s[x11, 6], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77af // sdot za.s[x11, 7], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc1681768 // sdot za.s[x8, 0], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc1601769 // sdot za.s[x8, 1], { z27.h-z28.h }, z0.h\n"
+ "trn1 z27.h, z23.h, z22.h\n"
+ ".inst 0xa1402be0 // ld1h { z0.h, z8.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xc1651788 // sdot za.s[x8, 0], { z28.h-z29.h }, z5.h\n"
+ "add z27.h, z27.h, z25.h\n"
+ ".inst 0xc1641789 // sdot za.s[x8, 1], { z28.h-z29.h }, z4.h\n"
+ "trn1 z28.h, z21.h, z20.h\n"
+ ".inst 0xa0412be4 // ld1h { z4.h-z5.h }, pn10.b/Z, [SP, #0x2, MUL VL]\n"
+ ".inst 0xc16b17a8 // sdot za.s[x8, 0], { z29.h-z30.h }, z11.h\n"
+ "add z28.h, z28.h, z25.h\n"
+ ".inst 0xc16a17a9 // sdot za.s[x8, 1], { z29.h-z30.h }, z10.h\n"
+ "trn1 z29.h, z19.h, z18.h\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ "add x8, x8, #0x2\n"
+ ".inst 0xc006680c // mova { z12.d-z13.d }, za.d[x11, #0]\n"
+ ".inst 0xa0422bea // ld1h { z10.h-z11.h }, pn10.b/Z, [SP, #0x4, MUL VL]\n"
+ "add z29.h, z29.h, z25.h\n"
+ ".inst 0xc006682e // mova { z14.d-z15.d }, za.d[x11, #1]\n"
+ ".inst 0xc1a3ac0c // sqdmulh { z12.s-z15.s }, { z12.s-z15.s }, z3.s\n"
+ "add x11, x11, #0x2\n"
+ ".inst 0xc1a1aa2c // srshl { z12.s-z15.s }, { z12.s-z15.s }, z1.s\n"
+ ".inst 0xc00408c0 // mova za.d[x8, #0], { z6.d-z7.d }\n"
+ ".inst 0xc1a9ab0c // add { z12.s-z15.s }, { z12.s-z15.s }, z9.s\n"
+ ".inst 0xc00408c1 // mova za.d[x8, #1], { z6.d-z7.d }\n"
+ ".inst 0xc1bfcf0c // sclamp { z12.s-z15.s }, z24.s, z31.s\n"
+ "st1b { z12.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ "add z30.h, z30.h, z25.h\n"
+ "st1b { z14.s }, p1, [x4]\n"
+ "add x4, x4, x9\n"
+ "st1b { z13.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ "st1b { z15.s }, p1, [x27]\n"
+ "add x27, x27, x25\n"
+ "bgt 13b\n"
+ "b 21f\n"
+ "14:" // Padded
+ "cbz x21, 19f\n"
+ "cmp x21, #0x1\n"
+ "sub x16, x16, x21\n"
+ "beq 18f\n"
+ "cmp x21, #0x2\n"
+ "beq 17f\n"
+ "cmp x21, #0x3\n"
+ "beq 16f\n"
+ "15:" // Padded: 4 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z19.s }, p0/Z, [x15]\n"
+ "add z19.h, p0/M, z19.h, z25.h\n"
+ "add x20, x15, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x20]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z17.s }, p0/Z, [x20]\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z16.s }, p0/Z, [x20]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "mov x12, #0x4\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z27.h, z19.h, z18.h\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z18.s }, p0/Z, [x20]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z16.s }, p0/Z, [x20]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z17.s }, p0/Z, [x20]\n"
+ "addvl x19, SP, #24\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ "trn1 z29.h, z18.h, z16.h\n"
+ "ld1b { z16.s }, p0/Z, [x20]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ "16:" // Padded: 3 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z19.s }, p0/Z, [x15]\n"
+ "add z19.h, p0/M, z19.h, z25.h\n"
+ "add x19, x15, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z27.h, z19.h, z18.h\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "addvl x20, SP, #18\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xa1402a80 // ld1h { z0.h, z8.h }, pn10.b/Z, [x20]\n"
+ "trn1 z29.h, z18.h, z16.h\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "addvl x19, SP, #24\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ ".inst 0xa0412a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc168776a // sdot za.s[x11, 2], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776b // sdot za.s[x11, 3], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa0422a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc165778a // sdot za.s[x11, 2], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778b // sdot za.s[x11, 3], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc16b77aa // sdot za.s[x11, 2], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ab // sdot za.s[x11, 3], { z29.h-z30.h }, z10.h\n"
+ "17:" // Padded: 2 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z19.s }, p0/Z, [x15]\n"
+ "add z19.h, p0/M, z19.h, z25.h\n"
+ "add x19, x15, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z27.h, z19.h, z18.h\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "addvl x21, SP, #12\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xa1402aa0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x21]\n"
+ "trn1 z29.h, z18.h, z16.h\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "addvl x20, SP, #18\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a80 // ld1h { z0.h, z8.h }, pn10.b/Z, [x20]\n"
+ "addvl x19, SP, #24\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ ".inst 0xa0412aa4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0xc168776a // sdot za.s[x11, 2], { z27.h-z28.h }, z8.h\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ ".inst 0xc160776b // sdot za.s[x11, 3], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xa0422aaa // ld1h { z10.h-z11.h }, pn10.b/Z, [x21, #0x4, MUL VL]\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc168776c // sdot za.s[x11, 4], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776d // sdot za.s[x11, 5], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xc165778a // sdot za.s[x11, 2], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778b // sdot za.s[x11, 3], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc165778c // sdot za.s[x11, 4], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778d // sdot za.s[x11, 5], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xc16b77aa // sdot za.s[x11, 2], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ab // sdot za.s[x11, 3], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc16b77ac // sdot za.s[x11, 4], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ad // sdot za.s[x11, 5], { z29.h-z30.h }, z10.h\n"
+ "18:" // Padded: 1 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z19.s }, p0/Z, [x15]\n"
+ "add z19.h, p0/M, z19.h, z25.h\n"
+ "add x19, x15, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z27.h, z19.h, z18.h\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "addvl x22, SP, #6\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xa1402ac0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x22]\n"
+ "trn1 z29.h, z18.h, z16.h\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "addvl x21, SP, #12\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402aa0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x21]\n"
+ "addvl x20, SP, #18\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ ".inst 0xa0412ac4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x22, #0x2, MUL VL]\n"
+ ".inst 0xc168776a // sdot za.s[x11, 2], { z27.h-z28.h }, z8.h\n"
+ "addvl x19, SP, #24\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ ".inst 0xc160776b // sdot za.s[x11, 3], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a80 // ld1h { z0.h, z8.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xa0422aca // ld1h { z10.h-z11.h }, pn10.b/Z, [x22, #0x4, MUL VL]\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412aa4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0xc168776c // sdot za.s[x11, 4], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776d // sdot za.s[x11, 5], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc165778a // sdot za.s[x11, 2], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778b // sdot za.s[x11, 3], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422aaa // ld1h { z10.h-z11.h }, pn10.b/Z, [x21, #0x4, MUL VL]\n"
+ ".inst 0xc168776e // sdot za.s[x11, 6], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776f // sdot za.s[x11, 7], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xc165778c // sdot za.s[x11, 4], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778d // sdot za.s[x11, 5], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16b77aa // sdot za.s[x11, 2], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ab // sdot za.s[x11, 3], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc165778e // sdot za.s[x11, 6], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778f // sdot za.s[x11, 7], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xc16b77ac // sdot za.s[x11, 4], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ad // sdot za.s[x11, 5], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc16b77ae // sdot za.s[x11, 6], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77af // sdot za.s[x11, 7], { z29.h-z30.h }, z10.h\n"
+ "19:" // Padded: 0 priming loads
+ ".inst 0xa1402be0 // ld1h { z0.h, z8.h }, pn10.b/Z, [SP]\n"
+ ".inst 0xa0412be4 // ld1h { z4.h-z5.h }, pn10.b/Z, [SP, #0x2, MUL VL]\n"
+ ".inst 0xa0422bea // ld1h { z10.h-z11.h }, pn10.b/Z, [SP, #0x4, MUL VL]\n"
+ "cbz x16, 22f\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z19.s }, p0/Z, [x15]\n"
+ "add z19.h, p0/M, z19.h, z25.h\n"
+ "add x19, x15, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z27.h, z19.h, z18.h\n"
+ "trn1 z28.h, z17.h, z16.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ "sub x16, x16, #0x1\n"
+ "sub x14, x14, #0x1\n"
+ "cmp x16, x14\n"
+ "trn1 z29.h, z19.h, z18.h\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ "csel x24, x16, x14, LT\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ "sub x14, x14, x24\n"
+ "cbz x24, 21f\n"
+ "20:" // Padded: Main loop
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z23.s }, p0/Z, [x15]\n"
+ "add z23.h, p0/M, z23.h, z25.h\n"
+ "add x23, x15, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z22.s }, p0/Z, [x23]\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ "addvl x22, SP, #6\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402ac0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x22]\n"
+ "addvl x21, SP, #12\n"
+ "add z22.h, p0/M, z22.h, z25.h\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc168776a // sdot za.s[x11, 2], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776b // sdot za.s[x11, 3], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402aa0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x21]\n"
+ "addvl x20, SP, #18\n"
+ "addvl x19, SP, #24\n"
+ "ld1b { z21.s }, p0/Z, [x23]\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ "add z21.h, p0/M, z21.h, z25.h\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412ac4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x22, #0x2, MUL VL]\n"
+ "mov x12, #0x4\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ ".inst 0xc168776c // sdot za.s[x11, 4], { z27.h-z28.h }, z8.h\n"
+ "ld1b { z20.s }, p0/Z, [x23]\n"
+ "add z20.h, p0/M, z20.h, z25.h\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ ".inst 0xc160776d // sdot za.s[x11, 5], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a80 // ld1h { z0.h, z8.h }, pn10.b/Z, [x20]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "subs x24, x24, #0x1\n"
+ ".inst 0xc165778a // sdot za.s[x11, 2], { z28.h-z29.h }, z5.h\n"
+ "ld1b { z19.s }, p0/Z, [x23]\n"
+ "add z19.h, p0/M, z19.h, z25.h\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ ".inst 0xc164778b // sdot za.s[x11, 3], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412aa4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "add x15, x15, %x[ld_in_col]\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ "ld1b { z18.s }, p0/Z, [x23]\n"
+ "add z18.h, p0/M, z18.h, z25.h\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422aca // ld1h { z10.h-z11.h }, pn10.b/Z, [x22, #0x4, MUL VL]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc168776e // sdot za.s[x11, 6], { z27.h-z28.h }, z8.h\n"
+ "ld1b { z17.s }, p0/Z, [x23]\n"
+ "add z17.h, p0/M, z17.h, z25.h\n"
+ "add x23, x23, %x[ld_in_row]\n"
+ ".inst 0xc160776f // sdot za.s[x11, 7], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ ".inst 0xc165778c // sdot za.s[x11, 4], { z28.h-z29.h }, z5.h\n"
+ "ld1b { z16.s }, p0/Z, [x23]\n"
+ "add z16.h, p0/M, z16.h, z25.h\n"
+ ".inst 0xc164778d // sdot za.s[x11, 5], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc16b77aa // sdot za.s[x11, 2], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ab // sdot za.s[x11, 3], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422aaa // ld1h { z10.h-z11.h }, pn10.b/Z, [x21, #0x4, MUL VL]\n"
+ ".inst 0xc165778e // sdot za.s[x11, 6], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778f // sdot za.s[x11, 7], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16b77ac // sdot za.s[x11, 4], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ad // sdot za.s[x11, 5], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc16b77ae // sdot za.s[x11, 6], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77af // sdot za.s[x11, 7], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc1681768 // sdot za.s[x8, 0], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc1601769 // sdot za.s[x8, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402be0 // ld1h { z0.h, z8.h }, pn10.b/Z, [SP]\n"
+ "trn1 z27.h, z23.h, z22.h\n"
+ ".inst 0xc1651788 // sdot za.s[x8, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc1641789 // sdot za.s[x8, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412be4 // ld1h { z4.h-z5.h }, pn10.b/Z, [SP, #0x2, MUL VL]\n"
+ "trn1 z28.h, z21.h, z20.h\n"
+ ".inst 0xc16b17a8 // sdot za.s[x8, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a17a9 // sdot za.s[x8, 1], { z29.h-z30.h }, z10.h\n"
+ "add x8, x8, #0x2\n"
+ ".inst 0xa0422bea // ld1h { z10.h-z11.h }, pn10.b/Z, [SP, #0x4, MUL VL]\n"
+ "trn1 z29.h, z19.h, z18.h\n"
+ ".inst 0xc006680c // mova { z12.d-z13.d }, za.d[x11, #0]\n"
+ "trn1 z30.h, z17.h, z16.h\n"
+ ".inst 0xc006682e // mova { z14.d-z15.d }, za.d[x11, #1]\n"
+ ".inst 0xc1a3ac0c // sqdmulh { z12.s-z15.s }, { z12.s-z15.s }, z3.s\n"
+ "add x11, x11, #0x2\n"
+ ".inst 0xc1a1aa2c // srshl { z12.s-z15.s }, { z12.s-z15.s }, z1.s\n"
+ ".inst 0xc00408c0 // mova za.d[x8, #0], { z6.d-z7.d }\n"
+ ".inst 0xc1a9ab0c // add { z12.s-z15.s }, { z12.s-z15.s }, z9.s\n"
+ ".inst 0xc00408c1 // mova za.d[x8, #1], { z6.d-z7.d }\n"
+ ".inst 0xc1bfcf0c // sclamp { z12.s-z15.s }, z24.s, z31.s\n"
+ "st1b { z12.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ "st1b { z14.s }, p1, [x4]\n"
+ "add x4, x4, x9\n"
+ "st1b { z13.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ "st1b { z15.s }, p1, [x27]\n"
+ "add x27, x27, x25\n"
+ "bgt 20b\n"
+ "21:" // Main loop tail
+ "addvl x22, SP, #6\n"
+ ".inst 0xc1687768 // sdot za.s[x11, 0], { z27.h-z28.h }, z8.h\n"
+ "addvl x21, SP, #12\n"
+ ".inst 0xc1607769 // sdot za.s[x11, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402ac0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x22]\n"
+ "addvl x20, SP, #18\n"
+ "addvl x19, SP, #24\n"
+ ".inst 0xc168776a // sdot za.s[x11, 2], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776b // sdot za.s[x11, 3], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402aa0 // ld1h { z0.h, z8.h }, pn10.b/Z, [x21]\n"
+ ".inst 0xc1657788 // sdot za.s[x11, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc1647789 // sdot za.s[x11, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412ac4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x22, #0x2, MUL VL]\n"
+ ".inst 0xc168776c // sdot za.s[x11, 4], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776d // sdot za.s[x11, 5], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a80 // ld1h { z0.h, z8.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc165778a // sdot za.s[x11, 2], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778b // sdot za.s[x11, 3], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412aa4 // ld1h { z4.h-z5.h }, pn10.b/Z, [x21, #0x2, MUL VL]\n"
+ ".inst 0xc16b77a8 // sdot za.s[x11, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77a9 // sdot za.s[x11, 1], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422aca // ld1h { z10.h-z11.h }, pn10.b/Z, [x22, #0x4, MUL VL]\n"
+ ".inst 0xc168776e // sdot za.s[x11, 6], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc160776f // sdot za.s[x11, 7], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xa1402a60 // ld1h { z0.h, z8.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc165778c // sdot za.s[x11, 4], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778d // sdot za.s[x11, 5], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a84 // ld1h { z4.h-z5.h }, pn10.b/Z, [x20, #0x2, MUL VL]\n"
+ ".inst 0xc16b77aa // sdot za.s[x11, 2], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ab // sdot za.s[x11, 3], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422aaa // ld1h { z10.h-z11.h }, pn10.b/Z, [x21, #0x4, MUL VL]\n"
+ ".inst 0xc165778e // sdot za.s[x11, 6], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc164778f // sdot za.s[x11, 7], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xa0412a64 // ld1h { z4.h-z5.h }, pn10.b/Z, [x19, #0x2, MUL VL]\n"
+ ".inst 0xc16b77ac // sdot za.s[x11, 4], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77ad // sdot za.s[x11, 5], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a8a // ld1h { z10.h-z11.h }, pn10.b/Z, [x20, #0x4, MUL VL]\n"
+ ".inst 0xc16b77ae // sdot za.s[x11, 6], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a77af // sdot za.s[x11, 7], { z29.h-z30.h }, z10.h\n"
+ ".inst 0xa0422a6a // ld1h { z10.h-z11.h }, pn10.b/Z, [x19, #0x4, MUL VL]\n"
+ ".inst 0xc1681768 // sdot za.s[x8, 0], { z27.h-z28.h }, z8.h\n"
+ ".inst 0xc1601769 // sdot za.s[x8, 1], { z27.h-z28.h }, z0.h\n"
+ ".inst 0xc1651788 // sdot za.s[x8, 0], { z28.h-z29.h }, z5.h\n"
+ ".inst 0xc1641789 // sdot za.s[x8, 1], { z28.h-z29.h }, z4.h\n"
+ ".inst 0xc16b17a8 // sdot za.s[x8, 0], { z29.h-z30.h }, z11.h\n"
+ ".inst 0xc16a17a9 // sdot za.s[x8, 1], { z29.h-z30.h }, z10.h\n"
+ "add x8, x8, #0x2\n"
+ ".inst 0xc006680c // mova { z12.d-z13.d }, za.d[x11, #0]\n"
+ ".inst 0xc006682e // mova { z14.d-z15.d }, za.d[x11, #1]\n"
+ ".inst 0xc1a3ac0c // sqdmulh { z12.s-z15.s }, { z12.s-z15.s }, z3.s\n"
+ "add x11, x11, #0x2\n"
+ ".inst 0xc1a1aa2c // srshl { z12.s-z15.s }, { z12.s-z15.s }, z1.s\n"
+ ".inst 0xc00408c0 // mova za.d[x8, #0], { z6.d-z7.d }\n"
+ ".inst 0xc1a9ab0c // add { z12.s-z15.s }, { z12.s-z15.s }, z9.s\n"
+ ".inst 0xc00408c1 // mova za.d[x8, #1], { z6.d-z7.d }\n"
+ ".inst 0xc1bfcf0c // sclamp { z12.s-z15.s }, z24.s, z31.s\n"
+ "st1b { z12.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ "st1b { z14.s }, p1, [x4]\n"
+ "add x4, x4, x9\n"
+ "st1b { z13.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ "st1b { z15.s }, p1, [x27]\n"
+ "add x27, x27, x25\n"
+ "22:" // Main loop skip tail
+ "cbz x14, 24f\n"
+ "23:" // Right padding loop
+ ".inst 0xc006680c // mova { z12.d-z13.d }, za.d[x11, #0]\n"
+ "add x8, x8, #0x2\n"
+ "subs x14, x14, #0x1\n"
+ ".inst 0xc006682e // mova { z14.d-z15.d }, za.d[x11, #1]\n"
+ ".inst 0xc1a3ac0c // sqdmulh { z12.s-z15.s }, { z12.s-z15.s }, z3.s\n"
+ "add x11, x11, #0x2\n"
+ ".inst 0xc1a1aa2c // srshl { z12.s-z15.s }, { z12.s-z15.s }, z1.s\n"
+ ".inst 0xc00408c0 // mova za.d[x8, #0], { z6.d-z7.d }\n"
+ ".inst 0xc1a9ab0c // add { z12.s-z15.s }, { z12.s-z15.s }, z9.s\n"
+ ".inst 0xc00408c1 // mova za.d[x8, #1], { z6.d-z7.d }\n"
+ ".inst 0xc1bfcf0c // sclamp { z12.s-z15.s }, z24.s, z31.s\n"
+ "st1b { z12.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ "st1b { z14.s }, p1, [x4]\n"
+ "add x4, x4, x9\n"
+ "st1b { z13.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ "st1b { z15.s }, p1, [x27]\n"
+ "add x27, x27, x25\n"
+ "bgt 23b\n"
+ "24:" // End
+ "ldr x23, [%x[args], %[offsetof_Args_weights]]\n"
+ "incw x23, ALL, MUL #16\n"
+ "incw x23, ALL, MUL #9\n"
+ "str x23, [%x[args], %[offsetof_Args_weights]]\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_in_vl]]\n"
+ "incw x17\n"
+ "whilelt p1.s, x17, x7\n"
+ "ldr x15, [%x[args], %[offsetof_Args_inptr]]\n"
+ "add x15, x15, x19\n"
+ "str x15, [%x[args], %[offsetof_Args_inptr]]\n"
+ "ldr x24, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "ldr x23, [%x[args], %[offsetof_Args_ld_out_vls]]\n"
+ "ldp x22, x21, [x24, #0x0]\n"
+ "ldp x20, x19, [x23, #0x0]\n"
+ "add x22, x22, x20\n"
+ "add x21, x21, x19\n"
+ "stp x22, x21, [x24, #0x0]\n"
+ "ldp x22, x21, [x24, #0x10]\n"
+ "ldp x20, x19, [x23, #0x10]\n"
+ "add x22, x22, x20\n"
+ "add x21, x21, x19\n"
+ "stp x22, x21, [x24, #0x10]\n"
+ "b.any 1b\n"
+ "addvl SP, SP, #30\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [ld_in_col] "r" (ld_in_col), [ld_in_row] "r" (ld_in_row), [offsetof_Args_current_channel] "I" (offsetof(Args, current_channel)), [offsetof_Args_inptr] "I" (offsetof(Args, inptr)), [offsetof_Args_input_cols] "I" (offsetof(Args, input_cols)), [offsetof_Args_ld_in_vl] "I" (offsetof(Args, ld_in_vl)), [offsetof_Args_ld_out_cols] "I" (offsetof(Args, ld_out_cols)), [offsetof_Args_ld_out_vls] "I" (offsetof(Args, ld_out_vls)), [offsetof_Args_n_channels] "I" (offsetof(Args, n_channels)), [offsetof_Args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_Args_output_cols] "I" (offsetof(Args, output_cols)), [offsetof_Args_pad_bottom] "I" (offsetof(Args, pad_bottom)), [offsetof_Args_pad_left] "I" (offsetof(Args, pad_left)), [offsetof_Args_pad_top] "I" (offsetof(Args, pad_top)), [offsetof_Args_weights] "I" (offsetof(Args, weights)), [offsetof_Requantize32_a_offset] "I" (offsetof(arm_gemm::Requantize32, a_offset)), [offsetof_Requantize32_b_offset] "I" (offsetof(arm_gemm::Requantize32, b_offset)), [offsetof_Requantize32_bias] "I" (offsetof(arm_gemm::Requantize32, bias)), [offsetof_Requantize32_c_offset] "I" (offsetof(arm_gemm::Requantize32, c_offset)), [offsetof_Requantize32_maxval] "I" (offsetof(arm_gemm::Requantize32, maxval)), [offsetof_Requantize32_minval] "I" (offsetof(arm_gemm::Requantize32, minval)), [offsetof_Requantize32_per_channel_muls] "I" (offsetof(arm_gemm::Requantize32, per_channel_muls)), [offsetof_Requantize32_per_channel_right_shifts] "I" (offsetof(arm_gemm::Requantize32, per_channel_right_shifts)), [offsetof_Requantize32_per_layer_mul] "I" (offsetof(arm_gemm::Requantize32, per_layer_mul)), [offsetof_Requantize32_per_layer_right_shift] "I" (offsetof(arm_gemm::Requantize32, per_layer_right_shift)), [qp] "r" (&qp)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8s8u8q_planar_5x5_s2_4rows_dot_za.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8s8u8q_planar_5x5_s2_4rows_dot_za.hpp
new file mode 100644
index 0000000..6949e69
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8s8u8q_planar_5x5_s2_4rows_dot_za.hpp
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_u8s8u8q_planar_5x5_s2_4rows_dot_za_impl(
+ const uint8_t *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const int8_t *weights,
+ uint8_t **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ const arm_gemm::Requantize32 &qp
+);
+
+class sme2_u8s8u8q_planar_5x5_s2_4rows_dot_za : public PlanarStrategy<uint8_t, int8_t>
+{
+ using Parent = PlanarStrategy<uint8_t, int8_t>;
+
+ public:
+ using return_type = uint8_t;
+ constexpr static auto output_rows = 4u;
+ constexpr static auto kernel_rows = 5u, kernel_cols = 5u;
+ constexpr static auto stride_rows = 2u, stride_cols = 2u;
+ constexpr static auto vl_type = arm_gemm::VLType::SME;
+
+ sme2_u8s8u8q_planar_5x5_s2_4rows_dot_za(const CPUInfo *)
+ : Parent(kernel_rows, kernel_cols, stride_rows, stride_cols, output_rows, vl_type)
+ {
+ }
+
+ typename Parent::KernelType get_kernel(void) const override
+ {
+ return sme2_u8s8u8q_planar_5x5_s2_4rows_dot_za_impl;
+ }
+};
+
+} // namespace depthwise
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8s8u8q_planar_5x5_s2_4rows_dot_za/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8s8u8q_planar_5x5_s2_4rows_dot_za/generic.cpp
new file mode 100644
index 0000000..8cdc94d
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_u8s8u8q_planar_5x5_s2_4rows_dot_za/generic.cpp
@@ -0,0 +1,1354 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
+#include <algorithm>
+#include <cstddef>
+#include "arm_gemm.hpp"
+
+using arm_gemm::Requantize32;
+
+namespace arm_conv {
+namespace depthwise {
+
+void sme2_u8s8u8q_planar_5x5_s2_4rows_dot_za_impl(
+ const uint8_t *inptr,
+ size_t ld_in_row,
+ size_t ld_in_col,
+ size_t ld_in_vl,
+ unsigned int pad_top,
+ unsigned int valid_input_rows,
+ unsigned int pad_left,
+ unsigned int valid_input_cols,
+ const int8_t *weights,
+ uint8_t **outptrs,
+ const size_t *outlds,
+ const size_t *outvllds,
+ unsigned int output_cols,
+ unsigned int start_channel,
+ unsigned int valid_channels,
+ const arm_gemm::Requantize32 &qp
+)
+{
+ struct Args
+ {
+ const uint8_t *inptr;
+ size_t ld_in_vl;
+ long unsigned int pad_top, pad_bottom, pad_left;
+ const int8_t *weights;
+ long unsigned int input_cols, output_cols;
+ uint8_t **outptrs;
+ const size_t *ld_out_cols;
+ const size_t *ld_out_vls;
+ long unsigned int current_channel, n_channels;
+ };
+
+ Args args = { inptr, ld_in_vl, pad_top, 11u - std::min(11u, pad_top + valid_input_rows), pad_left, weights, valid_input_cols, output_cols, outptrs, outlds, outvllds, start_channel, valid_channels };
+
+ __asm__ __volatile__(
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "ldr x4, [%x[args], %[offsetof_Args_pad_bottom]]\n"
+ "ptrue p2.b\n"
+ "mov x19, #0xb\n"
+ "ldr x5, [%x[args], %[offsetof_Args_pad_top]]\n"
+ "ld1rh { z9.h }, p2/Z, [%x[qp], %[offsetof_Requantize32_a_offset]]\n"
+ "sub x19, x19, x4\n"
+ ".inst 0x25207812 // ptrue pn10.b\n"
+ "ldr x6, [%x[args], %[offsetof_Args_n_channels]]\n"
+ "whilelt p1.s, XZR, x6\n"
+ "whilelt p9.s, XZR, x19\n"
+ "ld1rw { z8.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_c_offset]]\n"
+ "whilelt p8.s, XZR, x5\n"
+ "addvl SP, SP, #-15\n"
+ "ldr x7, [%x[args], %[offsetof_Args_current_channel]]\n"
+ "neg z9.h, p2/M, z9.h\n"
+ "eor p8.b, p2/Z, p8.b, p9.b\n"
+ "ld1rw { z3.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_per_layer_mul]]\n"
+ "ld1rw { z1.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_per_layer_right_shift]]\n"
+ "ld1rw { z26.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_minval]]\n"
+ "ld1rw { z23.s }, p2/Z, [%x[qp], %[offsetof_Requantize32_maxval]]\n"
+ "1:" // Channel loop
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_bias]]\n"
+ "mov z28.s, #0x0\n"
+ "cbz x19, 2f\n"
+ "ld1w { z28.s }, p1/Z, [x19, x7, LSL #2]\n"
+ "2:" // Load bias: Done
+ "ldr x21, [%x[args], %[offsetof_Args_weights]]\n"
+ "mov x19, x21\n"
+ "ld1sb { z12.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "ld1rh { z18.h }, p2/Z, [%x[qp], %[offsetof_Requantize32_b_offset]]\n"
+ "sub z12.h, z12.h, z18.h\n"
+ "incw x21\n"
+ "mov z14.h, #0x0\n"
+ "ld1sb { z25.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z25.h, z25.h, z18.h\n"
+ "trn1 z2.h, z12.h, z25.h\n"
+ "ld1sb { z24.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z24.h, z24.h, z18.h\n"
+ "addvl x20, SP, #15\n"
+ "ld1sb { z17.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z17.h, z17.h, z18.h\n"
+ "trn1 z10.h, z24.h, z17.h\n"
+ "ld1sb { z16.s }, p2/Z, [x19]\n"
+ "mov x19, x21\n"
+ "sub z16.h, z16.h, z18.h\n"
+ "incw x21\n"
+ "ld1sb { z12.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z12.h, z12.h, z18.h\n"
+ "addvl x20, x20, #-3\n"
+ "ld1sb { z25.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z25.h, z25.h, z18.h\n"
+ "trn1 z0.h, z16.h, z14.h\n"
+ "ld1sb { z24.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z24.h, z24.h, z18.h\n"
+ "st1h { z2.h }, p2, [x20]\n"
+ "ld1sb { z17.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z17.h, z17.h, z18.h\n"
+ "trn1 z2.h, z12.h, z25.h\n"
+ "ld1sb { z16.s }, p2/Z, [x19]\n"
+ "mov x19, x21\n"
+ "st1h { z10.h }, p2, [x20, #1, MUL VL]\n"
+ "sub z16.h, z16.h, z18.h\n"
+ "ld1sb { z12.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "trn1 z10.h, z24.h, z17.h\n"
+ "sub z12.h, z12.h, z18.h\n"
+ "ld1sb { z25.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z25.h, z25.h, z18.h\n"
+ "st1h { z0.h }, p2, [x20, #2, MUL VL]\n"
+ "ld1sb { z24.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "trn1 z0.h, z16.h, z14.h\n"
+ "incw x21\n"
+ "ld1sb { z17.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z24.h, z24.h, z18.h\n"
+ "sub z17.h, z17.h, z18.h\n"
+ "ld1sb { z16.s }, p2/Z, [x19]\n"
+ "addvl x20, x20, #-3\n"
+ "mov x19, x21\n"
+ "st1h { z2.h }, p2, [x20]\n"
+ "trn1 z2.h, z12.h, z25.h\n"
+ "ld1sb { z12.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z16.h, z16.h, z18.h\n"
+ "ld1sb { z25.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "st1h { z10.h }, p2, [x20, #1, MUL VL]\n"
+ "trn1 z10.h, z24.h, z17.h\n"
+ "ld1sb { z24.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z12.h, z12.h, z18.h\n"
+ "sub z25.h, z25.h, z18.h\n"
+ "ld1sb { z17.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "st1h { z0.h }, p2, [x20, #2, MUL VL]\n"
+ "trn1 z0.h, z16.h, z14.h\n"
+ "ld1sb { z16.s }, p2/Z, [x19]\n"
+ "incw x21\n"
+ "sub z24.h, z24.h, z18.h\n"
+ "sub z17.h, z17.h, z18.h\n"
+ "addvl x20, x20, #-3\n"
+ "mov x19, x21\n"
+ "st1h { z2.h }, p2, [x20]\n"
+ "sub z16.h, z16.h, z18.h\n"
+ "trn1 z2.h, z12.h, z25.h\n"
+ "ld1sb { z12.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "st1h { z10.h }, p2, [x20, #1, MUL VL]\n"
+ "ld1sb { z25.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "trn1 z10.h, z24.h, z17.h\n"
+ "st1h { z0.h }, p2, [x20, #2, MUL VL]\n"
+ "ld1sb { z24.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "trn1 z0.h, z16.h, z14.h\n"
+ "sub z12.h, z12.h, z18.h\n"
+ "ld1sb { z17.s }, p2/Z, [x19]\n"
+ "incw x19, ALL, MUL #5\n"
+ "sub z25.h, z25.h, z18.h\n"
+ "sub z24.h, z24.h, z18.h\n"
+ "ld1sb { z16.s }, p2/Z, [x19]\n"
+ "sub z17.h, z17.h, z18.h\n"
+ "sub z16.h, z16.h, z18.h\n"
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_muls]]\n"
+ "addvl x20, x20, #-3\n"
+ "st1h { z2.h }, p2, [x20]\n"
+ "mov z29.d, z28.d\n"
+ "mov z30.d, z28.d\n"
+ "st1h { z10.h }, p2, [x20, #1, MUL VL]\n"
+ "mov z31.d, z28.d\n"
+ "trn1 z2.h, z12.h, z25.h\n"
+ "st1h { z0.h }, p2, [x20, #2, MUL VL]\n"
+ "addvl x20, x20, #-3\n"
+ "trn1 z10.h, z24.h, z17.h\n"
+ "trn1 z0.h, z16.h, z14.h\n"
+ "st1h { z2.h }, p2, [x20]\n"
+ "st1h { z10.h }, p2, [x20, #1, MUL VL]\n"
+ "st1h { z0.h }, p2, [x20, #2, MUL VL]\n"
+ "cbz x19, 3f\n"
+ "ld1w { z3.s }, p1/Z, [x19, x7, LSL #2]\n"
+ "3:" // Load mul: End
+ "ldr x19, [%x[qp], %[offsetof_Requantize32_per_channel_right_shifts]]\n"
+ "cbz x19, 4f\n"
+ "ld1w { z1.s }, p1/Z, [x19, x7, LSL #2]\n"
+ "4:" // Load right_shift: End
+ "ldr x17, [%x[args], %[offsetof_Args_input_cols]]\n"
+ "sub x19, x17, #0x1\n"
+ "orr x22, x19, %x[ld_in_col], LSL #16\n"
+ "ldr x16, [%x[args], %[offsetof_Args_inptr]]\n"
+ "orr x22, x6, x22, LSL #22\n"
+ "mov x21, #0xb\n"
+ "add x20, x5, x4\n"
+ "lsl x19, %x[ld_in_row], #0x0\n"
+ "ldr x15, [%x[args], %[offsetof_Args_output_cols]]\n"
+ "mov x8, #0x0\n"
+ "lsl x22, x22, #0x0\n"
+ "sub x21, x21, x20\n"
+ "madd x19, x19, x5, x16\n"
+ "5:" // Issue prefetches
+ "subs x21, x21, #0x1\n"
+ ".inst 0xf8b64a7c // rprfm pldstrm, x22, [x19]\n"
+ "add x19, x19, %x[ld_in_col]\n"
+ "bgt 5b\n"
+ "ldr x24, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "lsl x19, %x[ld_in_row], #0x0\n"
+ "msub x16, x5, x19, x16\n"
+ ".inst 0xc0040f80 // mova za.d[x8, #0], { z28.d-z31.d }\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_out_cols]]\n"
+ ".inst 0xc0040f81 // mova za.d[x8, #1], { z28.d-z31.d }\n"
+ "mov x21, #0x4\n"
+ "ldp x14, x13, [x24], #0x10\n"
+ ".inst 0xc0040f82 // mova za.d[x8, #2], { z28.d-z31.d }\n"
+ "ldp x11, x10, [x19], #0x10\n"
+ ".inst 0xc0040f83 // mova za.d[x8, #3], { z28.d-z31.d }\n"
+ "ldr x20, [%x[args], %[offsetof_Args_pad_left]]\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ "ldp x9, x28, [x24], #0x10\n"
+ "ldp x27, x26, [x19], #0x10\n"
+ "cbz x20, 7f\n"
+ "cmp x20, x21\n"
+ "csel x19, x20, x21, LT\n"
+ "sub x20, x20, x19\n"
+ "sub x21, x21, x19\n"
+ "cbz x20, 7f\n"
+ ".inst 0xc0060c04 // mova { z4.d-z7.d }, za.d[x8, #0]\n"
+ ".inst 0xc1a3ac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z3.s\n"
+ "and x21, x20, #0x1\n"
+ ".inst 0xc1a1aa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z1.s\n"
+ "add x20, x20, #0x1\n"
+ "lsr x20, x20, #0x1\n"
+ ".inst 0xc1a8ab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z8.s\n"
+ "sub x15, x15, x20\n"
+ ".inst 0xc1b7cf44 // sclamp { z4.s-z7.s }, z26.s, z23.s\n"
+ "6:" // Left padding
+ "subs x20, x20, #0x1\n"
+ "st1b { z4.s }, p1, [x14]\n"
+ "add x14, x14, x11\n"
+ "st1b { z5.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "st1b { z7.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ "bgt 6b\n"
+ "7:" // Left padding: End
+ "adds XZR, x5, x4\n"
+ "bne 14f\n"
+ "cbz x21, 12f\n"
+ "cmp x21, #0x1\n"
+ "sub x17, x17, x21\n"
+ "beq 11f\n"
+ "cmp x21, #0x2\n"
+ "beq 10f\n"
+ "cmp x21, #0x3\n"
+ "beq 9f\n"
+ "8:" // Unpadded: 4 priming loads
+ "add x20, x16, %x[ld_in_row]\n"
+ "ld1b { z11.s }, p1/Z, [x16]\n"
+ "addvl x19, SP, #12\n"
+ "ld1b { z21.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "add z11.h, z11.h, z9.h\n"
+ "ld1b { z12.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "ld1b { z20.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "add z12.h, z12.h, z9.h\n"
+ "ld1b { z13.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1b { z19.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z13.h, z13.h, z9.h\n"
+ "ld1b { z14.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1b { z18.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z9.h\n"
+ "ld1b { z15.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add z15.h, z15.h, z9.h\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1b { z16.s }, p1/Z, [x20]\n"
+ "mov z16.d, z16.d\n"
+ "add z16.h, z16.h, z9.h\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "9:" // Unpadded: 3 priming loads
+ "add x20, x16, %x[ld_in_row]\n"
+ "ld1b { z11.s }, p1/Z, [x16]\n"
+ "addvl x19, SP, #9\n"
+ "ld1b { z21.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "add z11.h, z11.h, z9.h\n"
+ "ld1b { z12.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "ld1b { z20.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "add z12.h, z12.h, z9.h\n"
+ "ld1b { z13.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1b { z19.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z13.h, z13.h, z9.h\n"
+ "ld1b { z14.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1b { z18.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z9.h\n"
+ "ld1b { z15.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add z15.h, z15.h, z9.h\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1b { z16.s }, p1/Z, [x20]\n"
+ "mov z16.d, z16.d\n"
+ "add z16.h, z16.h, z9.h\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "10:" // Unpadded: 2 priming loads
+ "add x21, x16, %x[ld_in_row]\n"
+ "ld1b { z11.s }, p1/Z, [x16]\n"
+ "addvl x20, SP, #6\n"
+ "ld1b { z21.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "add z11.h, z11.h, z9.h\n"
+ "ld1b { z12.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "addvl x19, SP, #12\n"
+ "ld1b { z20.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "add z12.h, z12.h, z9.h\n"
+ "ld1b { z13.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "ld1b { z19.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z13.h, z13.h, z9.h\n"
+ "ld1b { z14.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "ld1b { z18.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z9.h\n"
+ "ld1b { z15.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x21]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "add z15.h, z15.h, z9.h\n"
+ ".inst 0xa1402a82 // ld1h { z2.h, z10.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1b { z16.s }, p1/Z, [x21]\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "add z16.h, z16.h, z9.h\n"
+ "ld1h { z0.h }, p2/Z, [x20, #2, MUL VL]\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "11:" // Unpadded: 1 priming loads
+ "add x21, x16, %x[ld_in_row]\n"
+ "ld1b { z11.s }, p1/Z, [x16]\n"
+ "addvl x20, SP, #3\n"
+ "ld1b { z21.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "add z11.h, z11.h, z9.h\n"
+ "ld1b { z12.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "addvl x19, SP, #12\n"
+ "ld1b { z20.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "add z12.h, z12.h, z9.h\n"
+ "ld1b { z13.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "ld1b { z19.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z13.h, z13.h, z9.h\n"
+ "ld1b { z14.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "ld1b { z18.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z9.h\n"
+ "ld1b { z15.s }, p1/Z, [x21]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x21]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "add z15.h, z15.h, z9.h\n"
+ ".inst 0xa1402a82 // ld1h { z2.h, z10.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1b { z16.s }, p1/Z, [x21]\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "add z16.h, z16.h, z9.h\n"
+ "ld1h { z0.h }, p2/Z, [x20, #2, MUL VL]\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "12:" // Unpadded: 0 priming loads
+ "cmp x17, #0x2\n"
+ ".inst 0xa1402be2 // ld1h { z2.h, z10.h }, pn10.b/Z, [SP]\n"
+ "ld1h { z0.h }, p2/Z, [SP, #2, MUL VL]\n"
+ "blt 22f\n"
+ "add x20, x16, %x[ld_in_row]\n"
+ "ld1b { z11.s }, p1/Z, [x16]\n"
+ "sub x17, x17, #0x2\n"
+ "ld1b { z21.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "sub x15, x15, #0x1\n"
+ "ld1b { z12.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "lsr x19, x17, #0x1\n"
+ "add z11.h, z11.h, z9.h\n"
+ "ld1b { z20.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "cmp x19, x15\n"
+ "ld1b { z13.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "csel x25, x19, x15, LT\n"
+ "add z12.h, z12.h, z9.h\n"
+ "ld1b { z19.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z13.h, z13.h, z9.h\n"
+ "ld1b { z14.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "ld1b { z18.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z9.h\n"
+ "ld1b { z15.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "and x17, x17, #0x1\n"
+ "ld1b { z17.s }, p1/Z, [x20]\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add z15.h, z15.h, z9.h\n"
+ "ld1b { z16.s }, p1/Z, [x20]\n"
+ "mov z16.d, z16.d\n"
+ "add z16.h, z16.h, z9.h\n"
+ "sub x15, x15, x25\n"
+ "cbz x25, 21f\n"
+ "13:" // Unpadded: Main loop
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "addvl x24, SP, #6\n"
+ "addvl x23, SP, #12\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402b02 // ld1h { z2.h, z10.h }, pn10.b/Z, [x24]\n"
+ "add x22, x16, %x[ld_in_row]\n"
+ "addvl x21, SP, #3\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "addvl x20, SP, #9\n"
+ "subs x25, x25, #0x1\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402ae2 // ld1h { z2.h, z10.h }, pn10.b/Z, [x23]\n"
+ ".inst 0xc172156a // sdot za.s[x8, 2], { z11.h-z14.h }, z2.h\n"
+ "ld1b { z11.s }, p1/Z, [x16]\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "add x19, x16, %x[ld_in_row]\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x24, #2, MUL VL]\n"
+ ".inst 0xc17a158a // sdot za.s[x8, 2], { z12.h-z15.h }, z10.h\n"
+ "ld1b { z21.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x23, #2, MUL VL]\n"
+ "add z11.h, z11.h, z9.h\n"
+ "ld1b { z12.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ ".inst 0xc17015aa // sdot za.s[x8, 2], { z13.h-z16.h }, z0.h\n"
+ "ld1b { z20.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "add z12.h, z12.h, z9.h\n"
+ "ld1b { z13.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ ".inst 0xc0060c04 // mova { z4.d-z7.d }, za.d[x8, #0]\n"
+ "add x8, x8, #0x1\n"
+ "ld1b { z19.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z13.h, z13.h, z9.h\n"
+ "ld1b { z14.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ ".inst 0xc1a3ac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z3.s\n"
+ "ld1b { z18.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z9.h\n"
+ "ld1b { z15.s }, p1/Z, [x22]\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ ".inst 0xc1a1aa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z1.s\n"
+ "ld1b { z17.s }, p1/Z, [x22]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add x22, x22, %x[ld_in_row]\n"
+ "add z15.h, z15.h, z9.h\n"
+ ".inst 0xa1402aa2 // ld1h { z2.h, z10.h }, pn10.b/Z, [x21]\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ ".inst 0xc1a8ab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z8.s\n"
+ "ld1b { z16.s }, p1/Z, [x22]\n"
+ "mov z16.d, z16.d\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402a82 // ld1h { z2.h, z10.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "add z16.h, z16.h, z9.h\n"
+ "ld1h { z0.h }, p2/Z, [x21, #2, MUL VL]\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc1b7cf44 // sclamp { z4.s-z7.s }, z26.s, z23.s\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x20, #2, MUL VL]\n"
+ "st1b { z4.s }, p1, [x14]\n"
+ "add x14, x14, x11\n"
+ "ld1b { z11.s }, p1/Z, [x16]\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "st1b { z5.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ "ld1b { z21.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "ld1b { z12.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "add x9, x9, x27\n"
+ "st1b { z7.s }, p1, [x28]\n"
+ "ld1b { z20.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "add x28, x28, x26\n"
+ "ld1b { z13.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ "add z11.h, z11.h, z9.h\n"
+ "ld1b { z19.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "add z12.h, z12.h, z9.h\n"
+ "ld1b { z14.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "add z13.h, z13.h, z9.h\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "ld1b { z18.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "add z14.h, z14.h, z9.h\n"
+ "ld1b { z15.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "ld1b { z17.s }, p1/Z, [x19]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "add z15.h, z15.h, z9.h\n"
+ "ld1b { z16.s }, p1/Z, [x19]\n"
+ "mov z16.d, z16.d\n"
+ "add z16.h, z16.h, z9.h\n"
+ ".inst 0xa1402be2 // ld1h { z2.h, z10.h }, pn10.b/Z, [SP]\n"
+ "ld1h { z0.h }, p2/Z, [SP, #2, MUL VL]\n"
+ "bgt 13b\n"
+ "b 21f\n"
+ "14:" // Padded
+ "cbz x21, 19f\n"
+ "cmp x21, #0x1\n"
+ "sub x17, x17, x21\n"
+ "beq 18f\n"
+ "cmp x21, #0x2\n"
+ "beq 17f\n"
+ "cmp x21, #0x3\n"
+ "beq 16f\n"
+ "15:" // Padded: 4 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z11.s }, p0/Z, [x16]\n"
+ "add z11.h, p0/M, z11.h, z9.h\n"
+ "add x20, x16, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z21.s }, p0/Z, [x20]\n"
+ "add z21.h, p0/M, z21.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z12.s }, p0/Z, [x20]\n"
+ "add z12.h, p0/M, z12.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z20.s }, p0/Z, [x20]\n"
+ "add z20.h, p0/M, z20.h, z9.h\n"
+ "mov x12, #0x4\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z13.s }, p0/Z, [x20]\n"
+ "add z13.h, p0/M, z13.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z19.s }, p0/Z, [x20]\n"
+ "add z19.h, p0/M, z19.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z14.s }, p0/Z, [x20]\n"
+ "add z14.h, p0/M, z14.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z18.s }, p0/Z, [x20]\n"
+ "mov x12, #0x8\n"
+ "add z18.h, p0/M, z18.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z15.s }, p0/Z, [x20]\n"
+ "add z15.h, p0/M, z15.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z17.s }, p0/Z, [x20]\n"
+ "add z17.h, p0/M, z17.h, z9.h\n"
+ "addvl x19, SP, #12\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1b { z16.s }, p0/Z, [x20]\n"
+ "add z16.h, p0/M, z16.h, z9.h\n"
+ "mov z16.d, z16.d\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "16:" // Padded: 3 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z11.s }, p0/Z, [x16]\n"
+ "add z11.h, p0/M, z11.h, z9.h\n"
+ "add x20, x16, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z21.s }, p0/Z, [x20]\n"
+ "add z21.h, p0/M, z21.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z12.s }, p0/Z, [x20]\n"
+ "add z12.h, p0/M, z12.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z20.s }, p0/Z, [x20]\n"
+ "add z20.h, p0/M, z20.h, z9.h\n"
+ "mov x12, #0x4\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z13.s }, p0/Z, [x20]\n"
+ "add z13.h, p0/M, z13.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z19.s }, p0/Z, [x20]\n"
+ "add z19.h, p0/M, z19.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z14.s }, p0/Z, [x20]\n"
+ "add z14.h, p0/M, z14.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z18.s }, p0/Z, [x20]\n"
+ "mov x12, #0x8\n"
+ "add z18.h, p0/M, z18.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z15.s }, p0/Z, [x20]\n"
+ "add z15.h, p0/M, z15.h, z9.h\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z17.s }, p0/Z, [x20]\n"
+ "add z17.h, p0/M, z17.h, z9.h\n"
+ "addvl x19, SP, #9\n"
+ "add x20, x20, %x[ld_in_row]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1b { z16.s }, p0/Z, [x20]\n"
+ "add z16.h, p0/M, z16.h, z9.h\n"
+ "mov z16.d, z16.d\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "17:" // Padded: 2 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z11.s }, p0/Z, [x16]\n"
+ "add z11.h, p0/M, z11.h, z9.h\n"
+ "add x19, x16, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z21.s }, p0/Z, [x19]\n"
+ "add z21.h, p0/M, z21.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z12.s }, p0/Z, [x19]\n"
+ "add z12.h, p0/M, z12.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z9.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z18.h, p0/M, z18.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z15.s }, p0/Z, [x19]\n"
+ "add z15.h, p0/M, z15.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z9.h\n"
+ "addvl x20, SP, #6\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ ".inst 0xa1402a82 // ld1h { z2.h, z10.h }, pn10.b/Z, [x20]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "addvl x19, SP, #12\n"
+ "add z16.h, p0/M, z16.h, z9.h\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "mov z16.d, z16.d\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "ld1h { z0.h }, p2/Z, [x20, #2, MUL VL]\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "18:" // Padded: 1 priming loads
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z11.s }, p0/Z, [x16]\n"
+ "add z11.h, p0/M, z11.h, z9.h\n"
+ "add x19, x16, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z21.s }, p0/Z, [x19]\n"
+ "add z21.h, p0/M, z21.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z12.s }, p0/Z, [x19]\n"
+ "add z12.h, p0/M, z12.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z9.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z18.h, p0/M, z18.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z15.s }, p0/Z, [x19]\n"
+ "add z15.h, p0/M, z15.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z9.h\n"
+ "addvl x20, SP, #3\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ ".inst 0xa1402a82 // ld1h { z2.h, z10.h }, pn10.b/Z, [x20]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "addvl x19, SP, #12\n"
+ "add z16.h, p0/M, z16.h, z9.h\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "mov z16.d, z16.d\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "ld1h { z0.h }, p2/Z, [x20, #2, MUL VL]\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "19:" // Padded: 0 priming loads
+ "cmp x17, #0x2\n"
+ ".inst 0xa1402be2 // ld1h { z2.h, z10.h }, pn10.b/Z, [SP]\n"
+ "ld1h { z0.h }, p2/Z, [SP, #2, MUL VL]\n"
+ "blt 22f\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z11.s }, p0/Z, [x16]\n"
+ "add z11.h, p0/M, z11.h, z9.h\n"
+ "add x19, x16, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z21.s }, p0/Z, [x19]\n"
+ "add z21.h, p0/M, z21.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z12.s }, p0/Z, [x19]\n"
+ "add z12.h, p0/M, z12.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z9.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z18.h, p0/M, z18.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z15.s }, p0/Z, [x19]\n"
+ "add z15.h, p0/M, z15.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z9.h\n"
+ "sub x17, x17, #0x2\n"
+ "sub x15, x15, #0x1\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "lsr x19, x17, #0x1\n"
+ "cmp x19, x15\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "mov z16.d, z16.d\n"
+ "csel x24, x19, x15, LT\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ "and x17, x17, #0x1\n"
+ "sub x15, x15, x24\n"
+ "cbz x24, 21f\n"
+ "20:" // Padded: Main loop
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "addvl x23, SP, #6\n"
+ "addvl x22, SP, #12\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402ae2 // ld1h { z2.h, z10.h }, pn10.b/Z, [x23]\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "add x19, x16, %x[ld_in_row]\n"
+ "addvl x21, SP, #3\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402ac2 // ld1h { z2.h, z10.h }, pn10.b/Z, [x22]\n"
+ "addvl x20, SP, #9\n"
+ "subs x24, x24, #0x1\n"
+ ".inst 0xc172156a // sdot za.s[x8, 2], { z11.h-z14.h }, z2.h\n"
+ "ld1b { z11.s }, p0/Z, [x16]\n"
+ "add z11.h, p0/M, z11.h, z9.h\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z21.s }, p0/Z, [x19]\n"
+ "add z21.h, p0/M, z21.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc17a158a // sdot za.s[x8, 2], { z12.h-z15.h }, z10.h\n"
+ "ld1b { z12.s }, p0/Z, [x19]\n"
+ "add z12.h, p0/M, z12.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x23, #2, MUL VL]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x4\n"
+ "ld1b { z20.s }, p0/Z, [x19]\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "add z20.h, p0/M, z20.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "ld1h { z0.h }, p2/Z, [x22, #2, MUL VL]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc17015aa // sdot za.s[x8, 2], { z13.h-z16.h }, z0.h\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "ld1b { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z18.h, p0/M, z18.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z15.s }, p0/Z, [x19]\n"
+ "add z15.h, p0/M, z15.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z9.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ ".inst 0xa1402aa2 // ld1h { z2.h, z10.h }, pn10.b/Z, [x21]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc0060c04 // mova { z4.d-z7.d }, za.d[x8, #0]\n"
+ "add x8, x8, #0x1\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "mov x12, #0x0\n"
+ "add z16.h, p0/M, z16.h, z9.h\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402a82 // ld1h { z2.h, z10.h }, pn10.b/Z, [x20]\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "ld1b { z11.s }, p0/Z, [x16]\n"
+ "add z11.h, p0/M, z11.h, z9.h\n"
+ "add x19, x16, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z21.s }, p0/Z, [x19]\n"
+ "add z21.h, p0/M, z21.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ "ld1b { z12.s }, p0/Z, [x19]\n"
+ "mov z16.d, z16.d\n"
+ "ld1h { z0.h }, p2/Z, [x21, #2, MUL VL]\n"
+ "add z12.h, p0/M, z12.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z20.s }, p0/Z, [x19]\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "mov x12, #0x4\n"
+ "add z20.h, p0/M, z20.h, z9.h\n"
+ "ld1h { z0.h }, p2/Z, [x20, #2, MUL VL]\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "ld1b { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z18.h, p0/M, z18.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z15.s }, p0/Z, [x19]\n"
+ ".inst 0xc1a3ac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z3.s\n"
+ "add z15.h, p0/M, z15.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ ".inst 0xc1a1aa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z1.s\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ "add z17.h, p0/M, z17.h, z9.h\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z9.h\n"
+ ".inst 0xc1a8ab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z8.s\n"
+ ".inst 0xa1402be2 // ld1h { z2.h, z10.h }, pn10.b/Z, [SP]\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ ".inst 0xc1b7cf44 // sclamp { z4.s-z7.s }, z26.s, z23.s\n"
+ "st1b { z4.s }, p1, [x14]\n"
+ "add x14, x14, x11\n"
+ "ld1h { z0.h }, p2/Z, [SP, #2, MUL VL]\n"
+ "st1b { z5.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "st1b { z7.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "mov z16.d, z16.d\n"
+ "bgt 20b\n"
+ "21:" // Main loop tail
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "addvl x23, SP, #6\n"
+ "addvl x22, SP, #12\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402ae2 // ld1h { z2.h, z10.h }, pn10.b/Z, [x23]\n"
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "add x21, x16, %x[ld_in_row]\n"
+ "addvl x20, SP, #3\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402ac2 // ld1h { z2.h, z10.h }, pn10.b/Z, [x22]\n"
+ "addvl x19, SP, #9\n"
+ ".inst 0xc172156a // sdot za.s[x8, 2], { z11.h-z14.h }, z2.h\n"
+ "ld1b { z11.s }, p0/Z, [x16]\n"
+ "add z11.h, p0/M, z11.h, z9.h\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z21.s }, p0/Z, [x21]\n"
+ "add z21.h, p0/M, z21.h, z9.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ ".inst 0xc17a158a // sdot za.s[x8, 2], { z12.h-z15.h }, z10.h\n"
+ "ld1b { z12.s }, p0/Z, [x21]\n"
+ "add z12.h, p0/M, z12.h, z9.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x23, #2, MUL VL]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "mov x12, #0x4\n"
+ "ld1b { z20.s }, p0/Z, [x21]\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "add z20.h, p0/M, z20.h, z9.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ "ld1h { z0.h }, p2/Z, [x22, #2, MUL VL]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ ".inst 0xc17015aa // sdot za.s[x8, 2], { z13.h-z16.h }, z0.h\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "ld1b { z13.s }, p0/Z, [x21]\n"
+ "add z13.h, p0/M, z13.h, z9.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z19.s }, p0/Z, [x21]\n"
+ "add z19.h, p0/M, z19.h, z9.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z14.s }, p0/Z, [x21]\n"
+ "add z14.h, p0/M, z14.h, z9.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z18.s }, p0/Z, [x21]\n"
+ "mov x12, #0x8\n"
+ "add z18.h, p0/M, z18.h, z9.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z15.s }, p0/Z, [x21]\n"
+ "add z15.h, p0/M, z15.h, z9.h\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z17.s }, p0/Z, [x21]\n"
+ "add z17.h, p0/M, z17.h, z9.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ ".inst 0xa1402a82 // ld1h { z2.h, z10.h }, pn10.b/Z, [x20]\n"
+ "add x21, x21, %x[ld_in_row]\n"
+ ".inst 0xc0060c04 // mova { z4.d-z7.d }, za.d[x8, #0]\n"
+ "add x8, x8, #0x1\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "ld1b { z16.s }, p0/Z, [x21]\n"
+ ".inst 0xc1a3ac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z3.s\n"
+ "add z16.h, p0/M, z16.h, z9.h\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ "add x16, x16, %x[ld_in_col]\n"
+ ".inst 0xc1a1aa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z1.s\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ "mov z16.d, z16.d\n"
+ "ld1h { z0.h }, p2/Z, [x20, #2, MUL VL]\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc1a8ab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z8.s\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ ".inst 0xc1b7cf44 // sclamp { z4.s-z7.s }, z26.s, z23.s\n"
+ "st1b { z4.s }, p1, [x14]\n"
+ "add x14, x14, x11\n"
+ "st1b { z5.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ ".inst 0xa1402be2 // ld1h { z2.h, z10.h }, pn10.b/Z, [SP]\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [SP, #2, MUL VL]\n"
+ "st1b { z7.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ "22:" // Main loop skip tail
+ "cbz x17, 23f\n" // Skip remainder inputs
+ "mov x12, #0x0\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z11.s }, p0/Z, [x16]\n"
+ "add z11.h, p0/M, z11.h, z9.h\n"
+ "add x19, x16, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z21.s }, p0/Z, [x19]\n"
+ "add z21.h, p0/M, z21.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z12.s }, p0/Z, [x19]\n"
+ "add z12.h, p0/M, z12.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z20.s }, p0/Z, [x19]\n"
+ "add z20.h, p0/M, z20.h, z9.h\n"
+ "mov x12, #0x4\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ "trn1 z11.h, z11.h, z21.h\n"
+ "trn1 z12.h, z12.h, z20.h\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z13.s }, p0/Z, [x19]\n"
+ "add z13.h, p0/M, z13.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z19.s }, p0/Z, [x19]\n"
+ "add z19.h, p0/M, z19.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "ld1b { z14.s }, p0/Z, [x19]\n"
+ "add z14.h, p0/M, z14.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25f04500 // psel p0.s, p1.s/Z, p8.s[w12, #3]\n"
+ "ld1b { z18.s }, p0/Z, [x19]\n"
+ "mov x12, #0x8\n"
+ "add z18.h, p0/M, z18.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25304500 // psel p0.s, p1.s/Z, p8.s[w12]\n"
+ "ld1b { z15.s }, p0/Z, [x19]\n"
+ "add z15.h, p0/M, z15.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25704500 // psel p0.s, p1.s/Z, p8.s[w12, #1]\n"
+ "ld1b { z17.s }, p0/Z, [x19]\n"
+ "add z17.h, p0/M, z17.h, z9.h\n"
+ "add x19, x19, %x[ld_in_row]\n"
+ ".inst 0x25b04500 // psel p0.s, p1.s/Z, p8.s[w12, #2]\n"
+ "trn1 z13.h, z13.h, z19.h\n"
+ "trn1 z14.h, z14.h, z18.h\n"
+ "ld1b { z16.s }, p0/Z, [x19]\n"
+ "add z16.h, p0/M, z16.h, z9.h\n"
+ "trn1 z15.h, z15.h, z17.h\n"
+ "addvl x20, SP, #6\n"
+ ".inst 0xc1721568 // sdot za.s[x8, 0], { z11.h-z14.h }, z2.h\n"
+ "mov z16.d, z16.d\n"
+ "addvl x19, SP, #12\n"
+ "sub x15, x15, #0x1\n"
+ ".inst 0xc17a1588 // sdot za.s[x8, 0], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402a82 // ld1h { z2.h, z10.h }, pn10.b/Z, [x20]\n"
+ ".inst 0xc17015a8 // sdot za.s[x8, 0], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x20, #2, MUL VL]\n"
+ ".inst 0xc1721569 // sdot za.s[x8, 1], { z11.h-z14.h }, z2.h\n"
+ ".inst 0xc0060c04 // mova { z4.d-z7.d }, za.d[x8, #0]\n"
+ ".inst 0xc1a3ac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z3.s\n"
+ ".inst 0xc17a1589 // sdot za.s[x8, 1], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xa1402a62 // ld1h { z2.h, z10.h }, pn10.b/Z, [x19]\n"
+ ".inst 0xc1a1aa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z1.s\n"
+ ".inst 0xc172156a // sdot za.s[x8, 2], { z11.h-z14.h }, z2.h\n"
+ ".inst 0xc1a8ab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z8.s\n"
+ ".inst 0xc17a158a // sdot za.s[x8, 2], { z12.h-z15.h }, z10.h\n"
+ ".inst 0xc1b7cf44 // sclamp { z4.s-z7.s }, z26.s, z23.s\n"
+ "st1b { z4.s }, p1, [x14]\n"
+ "add x14, x14, x11\n"
+ ".inst 0xc17015a9 // sdot za.s[x8, 1], { z13.h-z16.h }, z0.h\n"
+ "ld1h { z0.h }, p2/Z, [x19, #2, MUL VL]\n"
+ "st1b { z5.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ ".inst 0xc17015aa // sdot za.s[x8, 2], { z13.h-z16.h }, z0.h\n"
+ "add x8, x8, #0x1\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "st1b { z7.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ "23:" // Tail input: End
+ "cbz x15, 25f\n"
+ "24:" // Right padding loop
+ ".inst 0xc0060c04 // mova { z4.d-z7.d }, za.d[x8, #0]\n"
+ ".inst 0xc1a3ac04 // sqdmulh { z4.s-z7.s }, { z4.s-z7.s }, z3.s\n"
+ "add x8, x8, #0x1\n"
+ ".inst 0xc1a1aa24 // srshl { z4.s-z7.s }, { z4.s-z7.s }, z1.s\n"
+ "subs x15, x15, #0x1\n"
+ ".inst 0xc0040f84 // mova za.d[x8, #4], { z28.d-z31.d }\n"
+ ".inst 0xc1a8ab04 // add { z4.s-z7.s }, { z4.s-z7.s }, z8.s\n"
+ ".inst 0xc1b7cf44 // sclamp { z4.s-z7.s }, z26.s, z23.s\n"
+ "st1b { z4.s }, p1, [x14]\n"
+ "add x14, x14, x11\n"
+ "st1b { z5.s }, p1, [x13]\n"
+ "add x13, x13, x10\n"
+ "st1b { z6.s }, p1, [x9]\n"
+ "add x9, x9, x27\n"
+ "st1b { z7.s }, p1, [x28]\n"
+ "add x28, x28, x26\n"
+ "bgt 24b\n"
+ "25:" // End
+ "ldr x21, [%x[args], %[offsetof_Args_weights]]\n"
+ "incw x21, ALL, MUL #16\n"
+ "incw x21, ALL, MUL #9\n"
+ "str x21, [%x[args], %[offsetof_Args_weights]]\n"
+ "ldr x19, [%x[args], %[offsetof_Args_ld_in_vl]]\n"
+ "incw x7\n"
+ "whilelt p1.s, x7, x6\n"
+ "ldr x16, [%x[args], %[offsetof_Args_inptr]]\n"
+ "add x16, x16, x19\n"
+ "str x16, [%x[args], %[offsetof_Args_inptr]]\n"
+ "ldr x24, [%x[args], %[offsetof_Args_outptrs]]\n"
+ "ldr x23, [%x[args], %[offsetof_Args_ld_out_vls]]\n"
+ "ldp x22, x21, [x24, #0x0]\n"
+ "ldp x20, x19, [x23, #0x0]\n"
+ "add x22, x22, x20\n"
+ "add x21, x21, x19\n"
+ "stp x22, x21, [x24, #0x0]\n"
+ "ldp x22, x21, [x24, #0x10]\n"
+ "ldp x20, x19, [x23, #0x10]\n"
+ "add x22, x22, x20\n"
+ "add x21, x21, x19\n"
+ "stp x22, x21, [x24, #0x10]\n"
+ "b.any 1b\n"
+ "addvl SP, SP, #15\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [ld_in_col] "r" (ld_in_col), [ld_in_row] "r" (ld_in_row), [offsetof_Args_current_channel] "I" (offsetof(Args, current_channel)), [offsetof_Args_inptr] "I" (offsetof(Args, inptr)), [offsetof_Args_input_cols] "I" (offsetof(Args, input_cols)), [offsetof_Args_ld_in_vl] "I" (offsetof(Args, ld_in_vl)), [offsetof_Args_ld_out_cols] "I" (offsetof(Args, ld_out_cols)), [offsetof_Args_ld_out_vls] "I" (offsetof(Args, ld_out_vls)), [offsetof_Args_n_channels] "I" (offsetof(Args, n_channels)), [offsetof_Args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_Args_output_cols] "I" (offsetof(Args, output_cols)), [offsetof_Args_pad_bottom] "I" (offsetof(Args, pad_bottom)), [offsetof_Args_pad_left] "I" (offsetof(Args, pad_left)), [offsetof_Args_pad_top] "I" (offsetof(Args, pad_top)), [offsetof_Args_weights] "I" (offsetof(Args, weights)), [offsetof_Requantize32_a_offset] "I" (offsetof(arm_gemm::Requantize32, a_offset)), [offsetof_Requantize32_b_offset] "I" (offsetof(arm_gemm::Requantize32, b_offset)), [offsetof_Requantize32_bias] "I" (offsetof(arm_gemm::Requantize32, bias)), [offsetof_Requantize32_c_offset] "I" (offsetof(arm_gemm::Requantize32, c_offset)), [offsetof_Requantize32_maxval] "I" (offsetof(arm_gemm::Requantize32, maxval)), [offsetof_Requantize32_minval] "I" (offsetof(arm_gemm::Requantize32, minval)), [offsetof_Requantize32_per_channel_muls] "I" (offsetof(arm_gemm::Requantize32, per_channel_muls)), [offsetof_Requantize32_per_channel_right_shifts] "I" (offsetof(arm_gemm::Requantize32, per_channel_right_shifts)), [offsetof_Requantize32_per_layer_mul] "I" (offsetof(arm_gemm::Requantize32, per_layer_mul)), [offsetof_Requantize32_per_layer_right_shift] "I" (offsetof(arm_gemm::Requantize32, per_layer_right_shift)), [qp] "r" (&qp)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace depthwise
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME2)
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp
new file mode 100644
index 0000000..250d92c
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#pragma once
+
+namespace arm_conv {
+namespace pooling {
+
+void sme_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst_impl(unsigned int, const __fp16 *const *const, __fp16 *const *const, bool, unsigned int, unsigned int, unsigned int, unsigned int);
+
+struct sme_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst : public DepthfirstStrategy<__fp16, __fp16>
+{
+ using Parent = DepthfirstStrategy<__fp16, __fp16>;
+
+ const static auto pooling_type = PoolingType::AVERAGE;
+ const static auto pool_rows = 3u, pool_cols = 3u;
+ const static auto stride_rows = 1u, stride_cols = 1u;
+
+ sme_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst(const CPUInfo *)
+ : Parent(pool_rows, pool_cols, stride_rows, stride_cols, 2, 2) {}
+
+ Parent::KernelType get_kernel(void) const { return sme_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst_impl; }
+};
+
+} // namespace pooling
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp
new file mode 100644
index 0000000..a8b6f18
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp
@@ -0,0 +1,209 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <algorithm>
+#include <cstddef>
+#include <cstdint>
+
+#if defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) && defined(ARM_COMPUTE_ENABLE_SME)
+
+namespace arm_conv {
+namespace pooling {
+
+void sme_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst_impl(
+ const unsigned int n_channels,
+ const __fp16 *const *const inptrs,
+ __fp16 *const *const outptrs,
+ const bool exclude_padding,
+ const unsigned int pad_left,
+ const unsigned int pad_top,
+ const unsigned int pad_right,
+ const unsigned int pad_bottom
+)
+{
+ struct KernelArgs
+ {
+ const uint64_t n_channels;
+ const __fp16 *const *const inptrs;
+ __fp16 *const *const outptrs;
+ __fp16 rescale_vals[4];
+
+ KernelArgs(
+ unsigned int channels,
+ const __fp16 *const *input_ptrs,
+ __fp16 *const * output_ptrs,
+ bool exclude_padding, unsigned int pad_left, unsigned int pad_top, unsigned int pad_right, unsigned int pad_bottom
+ ) : n_channels(channels),
+ inptrs(input_ptrs),
+ outptrs(output_ptrs)
+ {
+ for (unsigned int i = 0; i < 2; i++)
+ {
+ const int start_i = 1*i - static_cast<int>(pad_top);
+ const int end_i = std::min<int>(start_i + 3, 4 - pad_top - pad_bottom);
+ const int valid_rows = end_i - std::max<int>(0, start_i);
+
+ for (unsigned int j = 0; j < 2; j++)
+ {
+ const int start_j = 1*j - static_cast<int>(pad_left);
+ const int end_j = std::min<int>(start_j + 3, 4 - pad_left - pad_right);
+ const int valid_cols = end_j - std::max<int>(0, start_j);
+
+ rescale_vals[i*2 + j] = static_cast<__fp16>(1.0f / static_cast<float>(
+ exclude_padding ? valid_rows * valid_cols : 9
+ ));
+ }
+ }
+ }
+ };
+
+ const KernelArgs args(n_channels, inptrs, outptrs, exclude_padding,
+ pad_left, pad_top, pad_right, pad_bottom);
+
+ __asm__ __volatile__(
+ "ldr x20, [%x[args], %[offsetof_outptrs]]\n"
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "mov x4, #0x0\n"
+ "mov x19, #0x4\n"
+ "ldr x5, [%x[args], %[offsetof_inptrs]]\n"
+ "whilelt p0.h, XZR, x19\n"
+ "add x19, %x[args], %[offsetof_rescale]\n"
+ "ld1rqh { z4.h }, p0/Z, [x19]\n"
+ "ldr x6, [%x[args], %[offsetof_n_channels]]\n"
+ "whilelt p1.h, x4, x6\n"
+ "mov x7, #0x0\n"
+ "ldp x8, x17, [x20, #0x0]\n"
+ "ldp x16, x15, [x20, #0x10]\n"
+ "ldp x14, x13, [x5, #0x0]\n"
+ "ld1h { z3.h }, p1/Z, [x13, x4, LSL #1]\n"
+ "ldp x12, x11, [x5, #0x10]\n"
+ "ld1h { z2.h }, p1/Z, [x12, x4, LSL #1]\n"
+ "ldp x10, x9, [x5, #0x20]\n"
+ "ld1h { z1.h }, p1/Z, [x9, x4, LSL #1]\n"
+ "ldp x28, x27, [x5, #0x30]\n"
+ "ld1h { z0.h }, p1/Z, [x28, x4, LSL #1]\n"
+ "ldp x26, x25, [x5, #0x40]\n"
+ "ld1h { z31.h }, p1/Z, [x25, x4, LSL #1]\n"
+ "ldp x24, x23, [x5, #0x50]\n"
+ "ld1h { z30.h }, p1/Z, [x24, x4, LSL #1]\n"
+ "ldp x22, x21, [x5, #0x60]\n"
+ "ld1h { z29.h }, p1/Z, [x10, x4, LSL #1]\n"
+ "ldp x20, x19, [x5, #0x70]\n"
+ "ld1h { z28.h }, p1/Z, [x26, x4, LSL #1]\n"
+ "ld1h { z27.h }, p1/Z, [x27, x4, LSL #1]\n"
+ "ld1h { z22.h }, p1/Z, [x23, x4, LSL #1]\n"
+ "ld1h { z21.h }, p1/Z, [x21, x4, LSL #1]\n"
+ "ld1h { z20.h }, p1/Z, [x20, x4, LSL #1]\n"
+ "ld1h { z26.h }, p1/Z, [x14, x4, LSL #1]\n"
+ "ld1h { z25.h }, p1/Z, [x11, x4, LSL #1]\n"
+ "ld1h { z24.h }, p1/Z, [x22, x4, LSL #1]\n"
+ "ld1h { z23.h }, p1/Z, [x19, x4, LSL #1]\n"
+ "incw x4\n"
+ "whilelt p1.h, x4, x6\n"
+ "b.none 2f\n"
+ "1:" // Vector: Loop
+ "fadd z17.h, z1.h, z0.h\n"
+ "fadd z16.h, z31.h, z30.h\n"
+ "ld1h { z1.h }, p1/Z, [x9, x4, LSL #1]\n"
+ "whilelt p0.h, x7, x6\n"
+ "fadd z19.h, z17.h, z16.h\n"
+ "fadd z18.h, z3.h, z2.h\n"
+ "ld1h { z0.h }, p1/Z, [x28, x4, LSL #1]\n"
+ "fadd z17.h, z29.h, z28.h\n"
+ "fadd z22.h, z27.h, z22.h\n"
+ "ld1h { z31.h }, p1/Z, [x25, x4, LSL #1]\n"
+ "fadd z16.h, z21.h, z20.h\n"
+ "fadd z21.h, z18.h, z19.h\n"
+ "ld1h { z30.h }, p1/Z, [x24, x4, LSL #1]\n"
+ "fadd z20.h, z16.h, z19.h\n"
+ "fadd z19.h, z26.h, z17.h\n"
+ "ld1h { z3.h }, p1/Z, [x13, x4, LSL #1]\n"
+ "fadd z18.h, z25.h, z22.h\n"
+ "fadd z17.h, z24.h, z17.h\n"
+ "ld1h { z2.h }, p1/Z, [x12, x4, LSL #1]\n"
+ "fadd z16.h, z23.h, z22.h\n"
+ "fadd z19.h, z19.h, z21.h\n"
+ "ld1h { z29.h }, p1/Z, [x10, x4, LSL #1]\n"
+ "fadd z18.h, z18.h, z21.h\n"
+ "fadd z17.h, z17.h, z20.h\n"
+ "ld1h { z28.h }, p1/Z, [x26, x4, LSL #1]\n"
+ "fadd z16.h, z16.h, z20.h\n"
+ "ld1h { z27.h }, p1/Z, [x27, x4, LSL #1]\n"
+ "fmul z19.h, z19.h, z4.h[0]\n"
+ "ld1h { z22.h }, p1/Z, [x23, x4, LSL #1]\n"
+ "fmul z18.h, z18.h, z4.h[1]\n"
+ "fmul z17.h, z17.h, z4.h[2]\n"
+ "ld1h { z21.h }, p1/Z, [x21, x4, LSL #1]\n"
+ "fmul z16.h, z16.h, z4.h[3]\n"
+ "st1h { z19.h }, p0, [x8, x7, LSL #1]\n"
+ "ld1h { z20.h }, p1/Z, [x20, x4, LSL #1]\n"
+ "st1h { z18.h }, p0, [x17, x7, LSL #1]\n"
+ "ld1h { z26.h }, p1/Z, [x14, x4, LSL #1]\n"
+ "st1h { z17.h }, p0, [x16, x7, LSL #1]\n"
+ "ld1h { z25.h }, p1/Z, [x11, x4, LSL #1]\n"
+ "st1h { z16.h }, p0, [x15, x7, LSL #1]\n"
+ "incw x7\n"
+ "ld1h { z24.h }, p1/Z, [x22, x4, LSL #1]\n"
+ "ld1h { z23.h }, p1/Z, [x19, x4, LSL #1]\n"
+ "incw x4\n"
+ "whilelt p1.h, x4, x6\n"
+ "b.any 1b\n"
+ "2:" // Vector: Tail
+ "fadd z17.h, z1.h, z0.h\n"
+ "fadd z16.h, z31.h, z30.h\n"
+ "whilelt p0.h, x7, x6\n"
+ "fadd z19.h, z17.h, z16.h\n"
+ "fadd z18.h, z3.h, z2.h\n"
+ "fadd z17.h, z29.h, z28.h\n"
+ "fadd z22.h, z27.h, z22.h\n"
+ "fadd z16.h, z21.h, z20.h\n"
+ "fadd z21.h, z18.h, z19.h\n"
+ "fadd z20.h, z16.h, z19.h\n"
+ "fadd z19.h, z26.h, z17.h\n"
+ "fadd z18.h, z25.h, z22.h\n"
+ "fadd z17.h, z24.h, z17.h\n"
+ "fadd z16.h, z23.h, z22.h\n"
+ "fadd z19.h, z19.h, z21.h\n"
+ "fadd z18.h, z18.h, z21.h\n"
+ "fadd z17.h, z17.h, z20.h\n"
+ "fadd z16.h, z16.h, z20.h\n"
+ "fmul z19.h, z19.h, z4.h[0]\n"
+ "st1h { z19.h }, p0, [x8, x7, LSL #1]\n"
+ "fmul z18.h, z18.h, z4.h[1]\n"
+ "fmul z17.h, z17.h, z4.h[2]\n"
+ "st1h { z18.h }, p0, [x17, x7, LSL #1]\n"
+ "fmul z16.h, z16.h, z4.h[3]\n"
+ "st1h { z17.h }, p0, [x16, x7, LSL #1]\n"
+ "st1h { z16.h }, p0, [x15, x7, LSL #1]\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [offsetof_inptrs] "I" (offsetof(KernelArgs, inptrs)), [offsetof_n_channels] "I" (offsetof(KernelArgs, n_channels)), [offsetof_outptrs] "I" (offsetof(KernelArgs, outptrs)), [offsetof_rescale] "I" (offsetof(KernelArgs, rescale_vals))
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace pooling
+} // namespace arm_conv
+
+#endif // defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) && defined(ARM_COMPUTE_ENABLE_SME)
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_avg_generic_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_avg_generic_depthfirst.hpp
new file mode 100644
index 0000000..117eb36
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_avg_generic_depthfirst.hpp
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <cstdint>
+
+#pragma once
+
+namespace arm_conv {
+namespace pooling {
+
+void sme_fp16_nhwc_avg_generic_depthfirst_impl(const uint64_t window_cells, const uint64_t n_valid_cells, uint64_t n_channels, const __fp16 *const *const inptrs, __fp16 *outptr);
+
+struct sme_fp16_nhwc_avg_generic_depthfirst : IGenericDepthfirstStrategy<__fp16, __fp16>
+{
+ using Parent = IGenericDepthfirstStrategy<__fp16, __fp16>;
+ sme_fp16_nhwc_avg_generic_depthfirst(const CPUInfo *) {}
+ typename Parent::KernelType get_kernel(void) const override { return sme_fp16_nhwc_avg_generic_depthfirst_impl; }
+};
+
+} // namespace pooling
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_avg_generic_depthfirst/generic.cpp
new file mode 100644
index 0000000..2c1e698
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_avg_generic_depthfirst/generic.cpp
@@ -0,0 +1,232 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME)
+
+#include <cstdint>
+
+namespace arm_conv {
+namespace pooling {
+
+
+void sme_fp16_nhwc_avg_generic_depthfirst_impl(
+ const uint64_t window_cells,
+ const uint64_t n_valid_cells,
+ uint64_t n_channels,
+ const __fp16 *const *const inptrs,
+ __fp16 *outptr
+)
+{
+ const auto rescale_value = static_cast<__fp16>(1.0f / static_cast<float>(window_cells));
+
+ __asm__ __volatile__(
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "mov x28, #0x0\n"
+ "cnth x27\n"
+ "cnth x26, ALL, MUL #2\n"
+ "cnth x25, ALL, MUL #3\n"
+ "ptrue p0.b\n"
+ "whilelt p3.h, x28, %x[n_channels]\n"
+ "ld1rh { z6.h }, p0/Z, [%x[rescale_ptr]]\n"
+ "whilelt p2.h, x27, %x[n_channels]\n"
+ "whilelt p1.h, x26, %x[n_channels]\n"
+ "whilelt p0.h, x25, %x[n_channels]\n"
+ "b.none 7f\n"
+ "1:" // 4-vectors of channels
+ "lsr x24, %x[n_valid_cells], #0x2\n"
+ "mov z5.b, #0x0\n"
+ "mov z4.b, #0x0\n"
+ "mov x19, %x[inptrs]\n"
+ "mov z3.b, #0x0\n"
+ "mov z2.b, #0x0\n"
+ "cbz x24, 4f\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "ld1h { z1.h }, p3/Z, [x23, x28, LSL #1]\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "add x19, x19, #0x20\n"
+ "ld1h { z0.h }, p3/Z, [x22, x28, LSL #1]\n"
+ "ld1h { z31.h }, p3/Z, [x21, x28, LSL #1]\n"
+ "ld1h { z30.h }, p3/Z, [x20, x28, LSL #1]\n"
+ "ld1h { z29.h }, p2/Z, [x23, x27, LSL #1]\n"
+ "ld1h { z22.h }, p2/Z, [x22, x27, LSL #1]\n"
+ "ld1h { z28.h }, p2/Z, [x21, x27, LSL #1]\n"
+ "ld1h { z18.h }, p2/Z, [x20, x27, LSL #1]\n"
+ "ld1h { z27.h }, p1/Z, [x23, x26, LSL #1]\n"
+ "ld1h { z21.h }, p1/Z, [x22, x26, LSL #1]\n"
+ "ld1h { z26.h }, p1/Z, [x21, x26, LSL #1]\n"
+ "ld1h { z17.h }, p1/Z, [x20, x26, LSL #1]\n"
+ "ld1h { z25.h }, p0/Z, [x23, x25, LSL #1]\n"
+ "ld1h { z20.h }, p0/Z, [x22, x25, LSL #1]\n"
+ "ld1h { z24.h }, p0/Z, [x21, x25, LSL #1]\n"
+ "ld1h { z16.h }, p0/Z, [x20, x25, LSL #1]\n"
+ "beq 3f\n"
+ "2:" // 4-vectors of channels: 4 inputs loop
+ "fadd z23.h, z1.h, z0.h\n"
+ "fadd z19.h, z31.h, z30.h\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "fadd z22.h, z29.h, z22.h\n"
+ "fadd z18.h, z28.h, z18.h\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "add x19, x19, #0x20\n"
+ "fadd z21.h, z27.h, z21.h\n"
+ "fadd z17.h, z26.h, z17.h\n"
+ "ld1h { z1.h }, p3/Z, [x23, x28, LSL #1]\n"
+ "fadd z20.h, z25.h, z20.h\n"
+ "fadd z16.h, z24.h, z16.h\n"
+ "ld1h { z0.h }, p3/Z, [x22, x28, LSL #1]\n"
+ "fadd z19.h, z23.h, z19.h\n"
+ "fadd z18.h, z22.h, z18.h\n"
+ "ld1h { z31.h }, p3/Z, [x21, x28, LSL #1]\n"
+ "fadd z17.h, z21.h, z17.h\n"
+ "fadd z16.h, z20.h, z16.h\n"
+ "ld1h { z30.h }, p3/Z, [x20, x28, LSL #1]\n"
+ "fadd z5.h, z5.h, z19.h\n"
+ "fadd z4.h, z4.h, z18.h\n"
+ "ld1h { z29.h }, p2/Z, [x23, x27, LSL #1]\n"
+ "fadd z3.h, z3.h, z17.h\n"
+ "fadd z2.h, z2.h, z16.h\n"
+ "ld1h { z22.h }, p2/Z, [x22, x27, LSL #1]\n"
+ "ld1h { z28.h }, p2/Z, [x21, x27, LSL #1]\n"
+ "ld1h { z18.h }, p2/Z, [x20, x27, LSL #1]\n"
+ "ld1h { z27.h }, p1/Z, [x23, x26, LSL #1]\n"
+ "ld1h { z21.h }, p1/Z, [x22, x26, LSL #1]\n"
+ "ld1h { z26.h }, p1/Z, [x21, x26, LSL #1]\n"
+ "ld1h { z17.h }, p1/Z, [x20, x26, LSL #1]\n"
+ "ld1h { z25.h }, p0/Z, [x23, x25, LSL #1]\n"
+ "ld1h { z20.h }, p0/Z, [x22, x25, LSL #1]\n"
+ "ld1h { z24.h }, p0/Z, [x21, x25, LSL #1]\n"
+ "ld1h { z16.h }, p0/Z, [x20, x25, LSL #1]\n"
+ "bgt 2b\n"
+ "3:" // 4-vectors of channels: 4 inputs tail
+ "fadd z23.h, z1.h, z0.h\n"
+ "fadd z19.h, z31.h, z30.h\n"
+ "fadd z22.h, z29.h, z22.h\n"
+ "fadd z18.h, z28.h, z18.h\n"
+ "fadd z21.h, z27.h, z21.h\n"
+ "fadd z17.h, z26.h, z17.h\n"
+ "fadd z20.h, z25.h, z20.h\n"
+ "fadd z16.h, z24.h, z16.h\n"
+ "fadd z19.h, z23.h, z19.h\n"
+ "fadd z18.h, z22.h, z18.h\n"
+ "fadd z17.h, z21.h, z17.h\n"
+ "fadd z16.h, z20.h, z16.h\n"
+ "fadd z5.h, z5.h, z19.h\n"
+ "fadd z4.h, z4.h, z18.h\n"
+ "fadd z3.h, z3.h, z17.h\n"
+ "fadd z2.h, z2.h, z16.h\n"
+ "4:" // 4-vectors of channels: After loop
+ "ands x20, %x[n_valid_cells], #0x3\n"
+ "beq 6f\n"
+ "5:" // 4-vectors of channels: Single input loop
+ "ldr x23, [x19], #0x8\n"
+ "ld1h { z1.h }, p3/Z, [x23, x28, LSL #1]\n"
+ "subs x20, x20, #0x1\n"
+ "fadd z5.h, z5.h, z1.h\n"
+ "ld1h { z29.h }, p2/Z, [x23, x27, LSL #1]\n"
+ "fadd z4.h, z4.h, z29.h\n"
+ "ld1h { z27.h }, p1/Z, [x23, x26, LSL #1]\n"
+ "fadd z3.h, z3.h, z27.h\n"
+ "ld1h { z25.h }, p0/Z, [x23, x25, LSL #1]\n"
+ "fadd z2.h, z2.h, z25.h\n"
+ "bgt 5b\n"
+ "6:" // 4-vectors of channels: Single input loop: End
+ "fmul z5.h, z5.h, z6.h\n"
+ "fmul z4.h, z4.h, z6.h\n"
+ "st1h { z5.h }, p3, [%x[outptr], x28, LSL #1]\n"
+ "inch x28, ALL, MUL #4\n"
+ "fmul z3.h, z3.h, z6.h\n"
+ "fmul z2.h, z2.h, z6.h\n"
+ "st1h { z4.h }, p2, [%x[outptr], x27, LSL #1]\n"
+ "inch x27, ALL, MUL #4\n"
+ "st1h { z3.h }, p1, [%x[outptr], x26, LSL #1]\n"
+ "inch x26, ALL, MUL #4\n"
+ "st1h { z2.h }, p0, [%x[outptr], x25, LSL #1]\n"
+ "inch x25, ALL, MUL #4\n"
+ "whilelt p0.h, x25, %x[n_channels]\n"
+ "b.any 1b\n"
+ "7:" // Single vector of channels
+ "whilelt p3.h, x28, %x[n_channels]\n"
+ "b.none 14f\n"
+ "8:" // Single vector of channels: Loop
+ "lsr x24, %x[n_valid_cells], #0x2\n"
+ "mov z5.b, #0x0\n"
+ "mov x19, %x[inptrs]\n"
+ "cbz x24, 11f\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "ld1h { z1.h }, p3/Z, [x23, x28, LSL #1]\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "add x19, x19, #0x20\n"
+ "ld1h { z0.h }, p3/Z, [x22, x28, LSL #1]\n"
+ "ld1h { z31.h }, p3/Z, [x21, x28, LSL #1]\n"
+ "ld1h { z30.h }, p3/Z, [x20, x28, LSL #1]\n"
+ "beq 10f\n"
+ "9:" // Single vector of channels: Loop: 4 inputs loop
+ "fadd z23.h, z1.h, z0.h\n"
+ "fadd z19.h, z31.h, z30.h\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "fadd z19.h, z23.h, z19.h\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "fadd z5.h, z5.h, z19.h\n"
+ "add x19, x19, #0x20\n"
+ "ld1h { z1.h }, p3/Z, [x23, x28, LSL #1]\n"
+ "ld1h { z0.h }, p3/Z, [x22, x28, LSL #1]\n"
+ "ld1h { z31.h }, p3/Z, [x21, x28, LSL #1]\n"
+ "ld1h { z30.h }, p3/Z, [x20, x28, LSL #1]\n"
+ "bgt 9b\n"
+ "10:" // Single vector of channels: Loop: 4 inputs tail
+ "fadd z23.h, z1.h, z0.h\n"
+ "fadd z19.h, z31.h, z30.h\n"
+ "fadd z19.h, z23.h, z19.h\n"
+ "fadd z5.h, z5.h, z19.h\n"
+ "11:" // Single vector of channels: Loop: After loop
+ "ands x20, %x[n_valid_cells], #0x3\n"
+ "beq 13f\n"
+ "12:" // Single vector of channels: Loop: Single input loop
+ "ldr x23, [x19], #0x8\n"
+ "ld1h { z1.h }, p3/Z, [x23, x28, LSL #1]\n"
+ "subs x20, x20, #0x1\n"
+ "fadd z5.h, z5.h, z1.h\n"
+ "bgt 12b\n"
+ "13:" // Single vector of channels: Loop: Single input loop: End
+ "fmul z5.h, z5.h, z6.h\n"
+ "st1h { z5.h }, p3, [%x[outptr], x28, LSL #1]\n"
+ "inch x28\n"
+ "whilelt p3.h, x28, %x[n_channels]\n"
+ "b.any 8b\n"
+ "14:" // End
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [outptr] "r" (outptr), [rescale_ptr] "r" (&rescale_value)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace pooling
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME)
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_max_2x2_s1_output2x2_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_max_2x2_s1_output2x2_depthfirst.hpp
new file mode 100644
index 0000000..9489c1f
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_max_2x2_s1_output2x2_depthfirst.hpp
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#pragma once
+
+namespace arm_conv {
+namespace pooling {
+
+void sme_fp16_nhwc_max_2x2_s1_output2x2_depthfirst_impl(unsigned int, const __fp16 *const *const, __fp16 *const *const, bool, unsigned int, unsigned int, unsigned int, unsigned int);
+
+struct sme_fp16_nhwc_max_2x2_s1_output2x2_depthfirst : public DepthfirstStrategy<__fp16, __fp16>
+{
+ using Parent = DepthfirstStrategy<__fp16, __fp16>;
+
+ const static auto pooling_type = PoolingType::MAX;
+ const static auto pool_rows = 2u, pool_cols = 2u;
+ const static auto stride_rows = 1u, stride_cols = 1u;
+
+ sme_fp16_nhwc_max_2x2_s1_output2x2_depthfirst(const CPUInfo *)
+ : Parent(pool_rows, pool_cols, stride_rows, stride_cols, 2, 2) {}
+
+ Parent::KernelType get_kernel(void) const { return sme_fp16_nhwc_max_2x2_s1_output2x2_depthfirst_impl; }
+};
+
+} // namespace pooling
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
new file mode 100644
index 0000000..fe2e7c8
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
@@ -0,0 +1,148 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+
+#include <cstddef>
+#include <cstdint>
+
+#if defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) && defined(ARM_COMPUTE_ENABLE_SME)
+
+namespace arm_conv {
+namespace pooling {
+
+void sme_fp16_nhwc_max_2x2_s1_output2x2_depthfirst_impl(
+ const unsigned int n_channels,
+ const __fp16 *const *const inptrs,
+ __fp16 *const *const outptrs,
+ const bool exclude_padding,
+ const unsigned int pad_left,
+ const unsigned int pad_top,
+ const unsigned int pad_right,
+ const unsigned int pad_bottom
+)
+{
+ struct KernelArgs
+ {
+ const uint64_t n_channels;
+ const __fp16 *const *const inptrs;
+ __fp16 *const *const outptrs;
+ KernelArgs(
+ unsigned int channels,
+ const __fp16 *const *input_ptrs,
+ __fp16 *const * output_ptrs,
+ bool, unsigned int, unsigned int, unsigned int, unsigned int
+ ) : n_channels(channels),
+ inptrs(input_ptrs),
+ outptrs(output_ptrs)
+ {
+ }
+ };
+
+ const KernelArgs args(n_channels, inptrs, outptrs, exclude_padding,
+ pad_left, pad_top, pad_right, pad_bottom);
+
+ __asm__ __volatile__(
+ "ldr x20, [%x[args], %[offsetof_outptrs]]\n"
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "mov x14, #0x0\n"
+ "ptrue p2.b\n"
+ "ldr x19, [%x[args], %[offsetof_inptrs]]\n"
+ "mov x13, #0x0\n"
+ "ldr x12, [%x[args], %[offsetof_n_channels]]\n"
+ "whilelt p1.h, x14, x12\n"
+ "ldp x11, x10, [x20, #0x0]\n"
+ "ldp x9, x28, [x20, #0x10]\n"
+ "ldp x27, x26, [x19, #0x0]\n"
+ "ld1h { z29.h }, p1/Z, [x26, x14, LSL #1]\n"
+ "ldp x25, x24, [x19, #0x10]\n"
+ "ld1h { z28.h }, p1/Z, [x24, x14, LSL #1]\n"
+ "ldp x23, x22, [x19, #0x20]\n"
+ "ld1h { z27.h }, p1/Z, [x23, x14, LSL #1]\n"
+ "ldp x21, x20, [x19, #0x30]\n"
+ "ld1h { z26.h }, p1/Z, [x20, x14, LSL #1]\n"
+ "ldr x19, [x19, #0x40]\n"
+ "ld1h { z20.h }, p1/Z, [x27, x14, LSL #1]\n"
+ "ld1h { z25.h }, p1/Z, [x22, x14, LSL #1]\n"
+ "ld1h { z24.h }, p1/Z, [x25, x14, LSL #1]\n"
+ "ld1h { z23.h }, p1/Z, [x21, x14, LSL #1]\n"
+ "ld1h { z19.h }, p1/Z, [x19, x14, LSL #1]\n"
+ "incw x14\n"
+ "whilelt p1.h, x14, x12\n"
+ "b.none 2f\n"
+ "1:" // Vector: Loop
+ "movprfx z22, z29\n fmax z22.h, p2/M, z22.h, z27.h\n"
+ "movprfx z21, z27\n fmax z21.h, p2/M, z21.h, z26.h\n"
+ "ld1h { z29.h }, p1/Z, [x26, x14, LSL #1]\n"
+ "whilelt p0.h, x13, x12\n"
+ "movprfx z18, z28\n fmax z18.h, p2/M, z18.h, z20.h\n"
+ "movprfx z20, z25\n fmax z20.h, p2/M, z20.h, z24.h\n"
+ "ld1h { z27.h }, p1/Z, [x23, x14, LSL #1]\n"
+ "movprfx z17, z23\n fmax z17.h, p2/M, z17.h, z28.h\n"
+ "movprfx z16, z25\n fmax z16.h, p2/M, z16.h, z19.h\n"
+ "ld1h { z26.h }, p1/Z, [x20, x14, LSL #1]\n"
+ "ld1h { z28.h }, p1/Z, [x24, x14, LSL #1]\n"
+ "movprfx z19, z18\n fmax z19.h, p2/M, z19.h, z22.h\n"
+ "movprfx z18, z22\n fmax z18.h, p2/M, z18.h, z20.h\n"
+ "ld1h { z20.h }, p1/Z, [x27, x14, LSL #1]\n"
+ "fmax z17.h, p2/M, z17.h, z21.h\n"
+ "fmax z16.h, p2/M, z16.h, z21.h\n"
+ "ld1h { z25.h }, p1/Z, [x22, x14, LSL #1]\n"
+ "st1h { z19.h }, p0, [x11, x13, LSL #1]\n"
+ "ld1h { z24.h }, p1/Z, [x25, x14, LSL #1]\n"
+ "st1h { z18.h }, p0, [x10, x13, LSL #1]\n"
+ "ld1h { z23.h }, p1/Z, [x21, x14, LSL #1]\n"
+ "st1h { z17.h }, p0, [x9, x13, LSL #1]\n"
+ "ld1h { z19.h }, p1/Z, [x19, x14, LSL #1]\n"
+ "incw x14\n"
+ "whilelt p1.h, x14, x12\n"
+ "st1h { z16.h }, p0, [x28, x13, LSL #1]\n"
+ "incw x13\n"
+ "b.any 1b\n"
+ "2:" // Vector: Tail
+ "movprfx z22, z29\n fmax z22.h, p2/M, z22.h, z27.h\n"
+ "movprfx z21, z27\n fmax z21.h, p2/M, z21.h, z26.h\n"
+ "whilelt p0.h, x13, x12\n"
+ "movprfx z18, z28\n fmax z18.h, p2/M, z18.h, z20.h\n"
+ "movprfx z20, z25\n fmax z20.h, p2/M, z20.h, z24.h\n"
+ "movprfx z17, z23\n fmax z17.h, p2/M, z17.h, z28.h\n"
+ "movprfx z16, z25\n fmax z16.h, p2/M, z16.h, z19.h\n"
+ "movprfx z19, z18\n fmax z19.h, p2/M, z19.h, z22.h\n"
+ "movprfx z18, z22\n fmax z18.h, p2/M, z18.h, z20.h\n"
+ "st1h { z19.h }, p0, [x11, x13, LSL #1]\n"
+ "fmax z17.h, p2/M, z17.h, z21.h\n"
+ "fmax z16.h, p2/M, z16.h, z21.h\n"
+ "st1h { z18.h }, p0, [x10, x13, LSL #1]\n"
+ "st1h { z17.h }, p0, [x9, x13, LSL #1]\n"
+ "st1h { z16.h }, p0, [x28, x13, LSL #1]\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [offsetof_inptrs] "I" (offsetof(KernelArgs, inptrs)), [offsetof_n_channels] "I" (offsetof(KernelArgs, n_channels)), [offsetof_outptrs] "I" (offsetof(KernelArgs, outptrs))
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x10", "x11", "x12", "x13", "x14", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace pooling
+} // namespace arm_conv
+
+#endif // defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) && defined(ARM_COMPUTE_ENABLE_SME)
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_max_generic_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_max_generic_depthfirst.hpp
new file mode 100644
index 0000000..33ff1f2
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_max_generic_depthfirst.hpp
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <cstdint>
+
+#pragma once
+
+namespace arm_conv {
+namespace pooling {
+
+void sme_fp16_nhwc_max_generic_depthfirst_impl(const uint64_t, const uint64_t n_valid_cells, uint64_t n_channels, const __fp16 *const *const inptrs, __fp16 *outptr);
+
+struct sme_fp16_nhwc_max_generic_depthfirst : IGenericDepthfirstStrategy<__fp16, __fp16>
+{
+ using Parent = IGenericDepthfirstStrategy<__fp16, __fp16>;
+ sme_fp16_nhwc_max_generic_depthfirst(const CPUInfo *) {}
+ typename Parent::KernelType get_kernel(void) const override { return sme_fp16_nhwc_max_generic_depthfirst_impl; }
+};
+
+} // namespace pooling
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_max_generic_depthfirst/generic.cpp
new file mode 100644
index 0000000..1bb27e3
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_max_generic_depthfirst/generic.cpp
@@ -0,0 +1,224 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME)
+
+#include <cstdint>
+
+namespace arm_conv {
+namespace pooling {
+
+
+void sme_fp16_nhwc_max_generic_depthfirst_impl(
+ const uint64_t,
+ const uint64_t n_valid_cells,
+ uint64_t n_channels,
+ const __fp16 *const *const inptrs,
+ __fp16 *outptr
+)
+{
+ __asm__ __volatile__(
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "mov x28, #0x0\n"
+ "cnth x27\n"
+ "cnth x26, ALL, MUL #2\n"
+ "cnth x25, ALL, MUL #3\n"
+ "whilelt p4.h, x28, %x[n_channels]\n"
+ "whilelt p3.h, x27, %x[n_channels]\n"
+ "whilelt p2.h, x26, %x[n_channels]\n"
+ "whilelt p1.h, x25, %x[n_channels]\n"
+ "ptrue p0.b\n"
+ "b.none 7f\n"
+ "1:" // 4-vectors of channels
+ "lsr x24, %x[n_valid_cells], #0x2\n"
+ "mov z4.h, #0xfc00\n"
+ "mov z3.h, #0xfc00\n"
+ "mov x19, %x[inptrs]\n"
+ "mov z2.h, #0xfc00\n"
+ "mov z1.h, #0xfc00\n"
+ "cbz x24, 4f\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "ld1h { z0.h }, p4/Z, [x23, x28, LSL #1]\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "add x19, x19, #0x20\n"
+ "ld1h { z31.h }, p4/Z, [x22, x28, LSL #1]\n"
+ "ld1h { z23.h }, p4/Z, [x21, x28, LSL #1]\n"
+ "ld1h { z30.h }, p4/Z, [x20, x28, LSL #1]\n"
+ "ld1h { z18.h }, p3/Z, [x23, x27, LSL #1]\n"
+ "ld1h { z29.h }, p3/Z, [x22, x27, LSL #1]\n"
+ "ld1h { z22.h }, p3/Z, [x21, x27, LSL #1]\n"
+ "ld1h { z28.h }, p3/Z, [x20, x27, LSL #1]\n"
+ "ld1h { z17.h }, p2/Z, [x23, x26, LSL #1]\n"
+ "ld1h { z27.h }, p2/Z, [x22, x26, LSL #1]\n"
+ "ld1h { z21.h }, p2/Z, [x21, x26, LSL #1]\n"
+ "ld1h { z26.h }, p2/Z, [x20, x26, LSL #1]\n"
+ "ld1h { z16.h }, p1/Z, [x23, x25, LSL #1]\n"
+ "ld1h { z25.h }, p1/Z, [x22, x25, LSL #1]\n"
+ "ld1h { z20.h }, p1/Z, [x21, x25, LSL #1]\n"
+ "ld1h { z24.h }, p1/Z, [x20, x25, LSL #1]\n"
+ "beq 3f\n"
+ "2:" // 4-vectors of channels: 4 inputs loop
+ "movprfx z19, z0\n fmax z19.h, p0/M, z19.h, z31.h\n"
+ "fmax z23.h, p0/M, z23.h, z30.h\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "fmax z18.h, p0/M, z18.h, z29.h\n"
+ "fmax z22.h, p0/M, z22.h, z28.h\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "add x19, x19, #0x20\n"
+ "fmax z17.h, p0/M, z17.h, z27.h\n"
+ "fmax z21.h, p0/M, z21.h, z26.h\n"
+ "ld1h { z0.h }, p4/Z, [x23, x28, LSL #1]\n"
+ "fmax z16.h, p0/M, z16.h, z25.h\n"
+ "fmax z20.h, p0/M, z20.h, z24.h\n"
+ "ld1h { z31.h }, p4/Z, [x22, x28, LSL #1]\n"
+ "fmax z19.h, p0/M, z19.h, z23.h\n"
+ "fmax z18.h, p0/M, z18.h, z22.h\n"
+ "ld1h { z23.h }, p4/Z, [x21, x28, LSL #1]\n"
+ "fmax z17.h, p0/M, z17.h, z21.h\n"
+ "fmax z16.h, p0/M, z16.h, z20.h\n"
+ "ld1h { z30.h }, p4/Z, [x20, x28, LSL #1]\n"
+ "fmax z4.h, p0/M, z4.h, z19.h\n"
+ "fmax z3.h, p0/M, z3.h, z18.h\n"
+ "ld1h { z18.h }, p3/Z, [x23, x27, LSL #1]\n"
+ "fmax z2.h, p0/M, z2.h, z17.h\n"
+ "fmax z1.h, p0/M, z1.h, z16.h\n"
+ "ld1h { z29.h }, p3/Z, [x22, x27, LSL #1]\n"
+ "ld1h { z22.h }, p3/Z, [x21, x27, LSL #1]\n"
+ "ld1h { z28.h }, p3/Z, [x20, x27, LSL #1]\n"
+ "ld1h { z17.h }, p2/Z, [x23, x26, LSL #1]\n"
+ "ld1h { z27.h }, p2/Z, [x22, x26, LSL #1]\n"
+ "ld1h { z21.h }, p2/Z, [x21, x26, LSL #1]\n"
+ "ld1h { z26.h }, p2/Z, [x20, x26, LSL #1]\n"
+ "ld1h { z16.h }, p1/Z, [x23, x25, LSL #1]\n"
+ "ld1h { z25.h }, p1/Z, [x22, x25, LSL #1]\n"
+ "ld1h { z20.h }, p1/Z, [x21, x25, LSL #1]\n"
+ "ld1h { z24.h }, p1/Z, [x20, x25, LSL #1]\n"
+ "bgt 2b\n"
+ "3:" // 4-vectors of channels: 4 inputs tail
+ "movprfx z19, z0\n fmax z19.h, p0/M, z19.h, z31.h\n"
+ "fmax z23.h, p0/M, z23.h, z30.h\n"
+ "fmax z18.h, p0/M, z18.h, z29.h\n"
+ "fmax z22.h, p0/M, z22.h, z28.h\n"
+ "fmax z17.h, p0/M, z17.h, z27.h\n"
+ "fmax z21.h, p0/M, z21.h, z26.h\n"
+ "fmax z16.h, p0/M, z16.h, z25.h\n"
+ "fmax z20.h, p0/M, z20.h, z24.h\n"
+ "fmax z19.h, p0/M, z19.h, z23.h\n"
+ "fmax z18.h, p0/M, z18.h, z22.h\n"
+ "fmax z17.h, p0/M, z17.h, z21.h\n"
+ "fmax z16.h, p0/M, z16.h, z20.h\n"
+ "fmax z4.h, p0/M, z4.h, z19.h\n"
+ "fmax z3.h, p0/M, z3.h, z18.h\n"
+ "fmax z2.h, p0/M, z2.h, z17.h\n"
+ "fmax z1.h, p0/M, z1.h, z16.h\n"
+ "4:" // 4-vectors of channels: After loop
+ "ands x20, %x[n_valid_cells], #0x3\n"
+ "beq 6f\n"
+ "5:" // 4-vectors of channels: Single input loop
+ "ldr x23, [x19], #0x8\n"
+ "ld1h { z0.h }, p4/Z, [x23, x28, LSL #1]\n"
+ "subs x20, x20, #0x1\n"
+ "fmax z4.h, p0/M, z4.h, z0.h\n"
+ "ld1h { z18.h }, p3/Z, [x23, x27, LSL #1]\n"
+ "fmax z3.h, p0/M, z3.h, z18.h\n"
+ "ld1h { z17.h }, p2/Z, [x23, x26, LSL #1]\n"
+ "fmax z2.h, p0/M, z2.h, z17.h\n"
+ "ld1h { z16.h }, p1/Z, [x23, x25, LSL #1]\n"
+ "fmax z1.h, p0/M, z1.h, z16.h\n"
+ "bgt 5b\n"
+ "6:" // 4-vectors of channels: Single input loop: End
+ "st1h { z4.h }, p4, [%x[outptr], x28, LSL #1]\n"
+ "inch x28, ALL, MUL #4\n"
+ "st1h { z3.h }, p3, [%x[outptr], x27, LSL #1]\n"
+ "inch x27, ALL, MUL #4\n"
+ "st1h { z2.h }, p2, [%x[outptr], x26, LSL #1]\n"
+ "inch x26, ALL, MUL #4\n"
+ "st1h { z1.h }, p1, [%x[outptr], x25, LSL #1]\n"
+ "inch x25, ALL, MUL #4\n"
+ "whilelt p1.h, x25, %x[n_channels]\n"
+ "b.any 1b\n"
+ "7:" // Single vector of channels
+ "whilelt p4.h, x28, %x[n_channels]\n"
+ "b.none 14f\n"
+ "8:" // Single vector of channels: Loop
+ "lsr x24, %x[n_valid_cells], #0x2\n"
+ "mov z4.h, #0xfc00\n"
+ "mov x19, %x[inptrs]\n"
+ "cbz x24, 11f\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "ld1h { z0.h }, p4/Z, [x23, x28, LSL #1]\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "add x19, x19, #0x20\n"
+ "ld1h { z31.h }, p4/Z, [x22, x28, LSL #1]\n"
+ "ld1h { z23.h }, p4/Z, [x21, x28, LSL #1]\n"
+ "ld1h { z30.h }, p4/Z, [x20, x28, LSL #1]\n"
+ "beq 10f\n"
+ "9:" // Single vector of channels: Loop: 4 inputs loop
+ "movprfx z19, z0\n fmax z19.h, p0/M, z19.h, z31.h\n"
+ "fmax z23.h, p0/M, z23.h, z30.h\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "fmax z19.h, p0/M, z19.h, z23.h\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "fmax z4.h, p0/M, z4.h, z19.h\n"
+ "add x19, x19, #0x20\n"
+ "ld1h { z0.h }, p4/Z, [x23, x28, LSL #1]\n"
+ "ld1h { z31.h }, p4/Z, [x22, x28, LSL #1]\n"
+ "ld1h { z23.h }, p4/Z, [x21, x28, LSL #1]\n"
+ "ld1h { z30.h }, p4/Z, [x20, x28, LSL #1]\n"
+ "bgt 9b\n"
+ "10:" // Single vector of channels: Loop: 4 inputs tail
+ "movprfx z19, z0\n fmax z19.h, p0/M, z19.h, z31.h\n"
+ "fmax z23.h, p0/M, z23.h, z30.h\n"
+ "fmax z19.h, p0/M, z19.h, z23.h\n"
+ "fmax z4.h, p0/M, z4.h, z19.h\n"
+ "11:" // Single vector of channels: Loop: After loop
+ "ands x20, %x[n_valid_cells], #0x3\n"
+ "beq 13f\n"
+ "12:" // Single vector of channels: Loop: Single input loop
+ "ldr x23, [x19], #0x8\n"
+ "ld1h { z0.h }, p4/Z, [x23, x28, LSL #1]\n"
+ "subs x20, x20, #0x1\n"
+ "fmax z4.h, p0/M, z4.h, z0.h\n"
+ "bgt 12b\n"
+ "13:" // Single vector of channels: Loop: Single input loop: End
+ "st1h { z4.h }, p4, [%x[outptr], x28, LSL #1]\n"
+ "inch x28\n"
+ "whilelt p4.h, x28, %x[n_channels]\n"
+ "b.any 8b\n"
+ "14:" // End
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [outptr] "r" (outptr)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace pooling
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME)
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp
new file mode 100644
index 0000000..fa1b441
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#pragma once
+
+namespace arm_conv {
+namespace pooling {
+
+void sme_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst_impl(unsigned int, const float *const *const, float *const *const, bool, unsigned int, unsigned int, unsigned int, unsigned int);
+
+struct sme_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst : public DepthfirstStrategy<float, float>
+{
+ using Parent = DepthfirstStrategy<float, float>;
+
+ const static auto pooling_type = PoolingType::AVERAGE;
+ const static auto pool_rows = 3u, pool_cols = 3u;
+ const static auto stride_rows = 1u, stride_cols = 1u;
+
+ sme_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst(const CPUInfo *)
+ : Parent(pool_rows, pool_cols, stride_rows, stride_cols, 2, 2) {}
+
+ Parent::KernelType get_kernel(void) const { return sme_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst_impl; }
+};
+
+} // namespace pooling
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp
new file mode 100644
index 0000000..602ef59
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp
@@ -0,0 +1,209 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <algorithm>
+#include <cstddef>
+#include <cstdint>
+
+#if defined(__ARM_FEATURE_SVE) && defined(ARM_COMPUTE_ENABLE_SME)
+
+namespace arm_conv {
+namespace pooling {
+
+void sme_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst_impl(
+ const unsigned int n_channels,
+ const float *const *const inptrs,
+ float *const *const outptrs,
+ const bool exclude_padding,
+ const unsigned int pad_left,
+ const unsigned int pad_top,
+ const unsigned int pad_right,
+ const unsigned int pad_bottom
+)
+{
+ struct KernelArgs
+ {
+ const uint64_t n_channels;
+ const float *const *const inptrs;
+ float *const *const outptrs;
+ float rescale_vals[4];
+
+ KernelArgs(
+ unsigned int channels,
+ const float *const *input_ptrs,
+ float *const * output_ptrs,
+ bool exclude_padding, unsigned int pad_left, unsigned int pad_top, unsigned int pad_right, unsigned int pad_bottom
+ ) : n_channels(channels),
+ inptrs(input_ptrs),
+ outptrs(output_ptrs)
+ {
+ for (unsigned int i = 0; i < 2; i++)
+ {
+ const int start_i = 1*i - static_cast<int>(pad_top);
+ const int end_i = std::min<int>(start_i + 3, 4 - pad_top - pad_bottom);
+ const int valid_rows = end_i - std::max<int>(0, start_i);
+
+ for (unsigned int j = 0; j < 2; j++)
+ {
+ const int start_j = 1*j - static_cast<int>(pad_left);
+ const int end_j = std::min<int>(start_j + 3, 4 - pad_left - pad_right);
+ const int valid_cols = end_j - std::max<int>(0, start_j);
+
+ rescale_vals[i*2 + j] = static_cast<float>(1.0f / static_cast<float>(
+ exclude_padding ? valid_rows * valid_cols : 9
+ ));
+ }
+ }
+ }
+ };
+
+ const KernelArgs args(n_channels, inptrs, outptrs, exclude_padding,
+ pad_left, pad_top, pad_right, pad_bottom);
+
+ __asm__ __volatile__(
+ "ldr x20, [%x[args], %[offsetof_outptrs]]\n"
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "mov x4, #0x0\n"
+ "mov x19, #0x4\n"
+ "ldr x5, [%x[args], %[offsetof_inptrs]]\n"
+ "whilelt p0.s, XZR, x19\n"
+ "add x19, %x[args], %[offsetof_rescale]\n"
+ "ld1rqw { z4.s }, p0/Z, [x19]\n"
+ "ldr x6, [%x[args], %[offsetof_n_channels]]\n"
+ "whilelt p1.s, x4, x6\n"
+ "mov x7, #0x0\n"
+ "ldp x8, x17, [x20, #0x0]\n"
+ "ldp x16, x15, [x20, #0x10]\n"
+ "ldp x14, x13, [x5, #0x0]\n"
+ "ld1w { z3.s }, p1/Z, [x13, x4, LSL #2]\n"
+ "ldp x12, x11, [x5, #0x10]\n"
+ "ld1w { z2.s }, p1/Z, [x12, x4, LSL #2]\n"
+ "ldp x10, x9, [x5, #0x20]\n"
+ "ld1w { z1.s }, p1/Z, [x9, x4, LSL #2]\n"
+ "ldp x28, x27, [x5, #0x30]\n"
+ "ld1w { z0.s }, p1/Z, [x28, x4, LSL #2]\n"
+ "ldp x26, x25, [x5, #0x40]\n"
+ "ld1w { z31.s }, p1/Z, [x25, x4, LSL #2]\n"
+ "ldp x24, x23, [x5, #0x50]\n"
+ "ld1w { z30.s }, p1/Z, [x24, x4, LSL #2]\n"
+ "ldp x22, x21, [x5, #0x60]\n"
+ "ld1w { z29.s }, p1/Z, [x10, x4, LSL #2]\n"
+ "ldp x20, x19, [x5, #0x70]\n"
+ "ld1w { z28.s }, p1/Z, [x26, x4, LSL #2]\n"
+ "ld1w { z27.s }, p1/Z, [x27, x4, LSL #2]\n"
+ "ld1w { z22.s }, p1/Z, [x23, x4, LSL #2]\n"
+ "ld1w { z21.s }, p1/Z, [x21, x4, LSL #2]\n"
+ "ld1w { z20.s }, p1/Z, [x20, x4, LSL #2]\n"
+ "ld1w { z26.s }, p1/Z, [x14, x4, LSL #2]\n"
+ "ld1w { z25.s }, p1/Z, [x11, x4, LSL #2]\n"
+ "ld1w { z24.s }, p1/Z, [x22, x4, LSL #2]\n"
+ "ld1w { z23.s }, p1/Z, [x19, x4, LSL #2]\n"
+ "incw x4\n"
+ "whilelt p1.s, x4, x6\n"
+ "b.none 2f\n"
+ "1:" // Vector: Loop
+ "fadd z17.s, z1.s, z0.s\n"
+ "fadd z16.s, z31.s, z30.s\n"
+ "ld1w { z1.s }, p1/Z, [x9, x4, LSL #2]\n"
+ "whilelt p0.s, x7, x6\n"
+ "fadd z19.s, z17.s, z16.s\n"
+ "fadd z18.s, z3.s, z2.s\n"
+ "ld1w { z0.s }, p1/Z, [x28, x4, LSL #2]\n"
+ "fadd z17.s, z29.s, z28.s\n"
+ "fadd z22.s, z27.s, z22.s\n"
+ "ld1w { z31.s }, p1/Z, [x25, x4, LSL #2]\n"
+ "fadd z16.s, z21.s, z20.s\n"
+ "fadd z21.s, z18.s, z19.s\n"
+ "ld1w { z30.s }, p1/Z, [x24, x4, LSL #2]\n"
+ "fadd z20.s, z16.s, z19.s\n"
+ "fadd z19.s, z26.s, z17.s\n"
+ "ld1w { z3.s }, p1/Z, [x13, x4, LSL #2]\n"
+ "fadd z18.s, z25.s, z22.s\n"
+ "fadd z17.s, z24.s, z17.s\n"
+ "ld1w { z2.s }, p1/Z, [x12, x4, LSL #2]\n"
+ "fadd z16.s, z23.s, z22.s\n"
+ "fadd z19.s, z19.s, z21.s\n"
+ "ld1w { z29.s }, p1/Z, [x10, x4, LSL #2]\n"
+ "fadd z18.s, z18.s, z21.s\n"
+ "fadd z17.s, z17.s, z20.s\n"
+ "ld1w { z28.s }, p1/Z, [x26, x4, LSL #2]\n"
+ "fadd z16.s, z16.s, z20.s\n"
+ "ld1w { z27.s }, p1/Z, [x27, x4, LSL #2]\n"
+ "fmul z19.s, z19.s, z4.s[0]\n"
+ "ld1w { z22.s }, p1/Z, [x23, x4, LSL #2]\n"
+ "fmul z18.s, z18.s, z4.s[1]\n"
+ "fmul z17.s, z17.s, z4.s[2]\n"
+ "ld1w { z21.s }, p1/Z, [x21, x4, LSL #2]\n"
+ "fmul z16.s, z16.s, z4.s[3]\n"
+ "st1w { z19.s }, p0, [x8, x7, LSL #2]\n"
+ "ld1w { z20.s }, p1/Z, [x20, x4, LSL #2]\n"
+ "st1w { z18.s }, p0, [x17, x7, LSL #2]\n"
+ "ld1w { z26.s }, p1/Z, [x14, x4, LSL #2]\n"
+ "st1w { z17.s }, p0, [x16, x7, LSL #2]\n"
+ "ld1w { z25.s }, p1/Z, [x11, x4, LSL #2]\n"
+ "st1w { z16.s }, p0, [x15, x7, LSL #2]\n"
+ "incw x7\n"
+ "ld1w { z24.s }, p1/Z, [x22, x4, LSL #2]\n"
+ "ld1w { z23.s }, p1/Z, [x19, x4, LSL #2]\n"
+ "incw x4\n"
+ "whilelt p1.s, x4, x6\n"
+ "b.any 1b\n"
+ "2:" // Vector: Tail
+ "fadd z17.s, z1.s, z0.s\n"
+ "fadd z16.s, z31.s, z30.s\n"
+ "whilelt p0.s, x7, x6\n"
+ "fadd z19.s, z17.s, z16.s\n"
+ "fadd z18.s, z3.s, z2.s\n"
+ "fadd z17.s, z29.s, z28.s\n"
+ "fadd z22.s, z27.s, z22.s\n"
+ "fadd z16.s, z21.s, z20.s\n"
+ "fadd z21.s, z18.s, z19.s\n"
+ "fadd z20.s, z16.s, z19.s\n"
+ "fadd z19.s, z26.s, z17.s\n"
+ "fadd z18.s, z25.s, z22.s\n"
+ "fadd z17.s, z24.s, z17.s\n"
+ "fadd z16.s, z23.s, z22.s\n"
+ "fadd z19.s, z19.s, z21.s\n"
+ "fadd z18.s, z18.s, z21.s\n"
+ "fadd z17.s, z17.s, z20.s\n"
+ "fadd z16.s, z16.s, z20.s\n"
+ "fmul z19.s, z19.s, z4.s[0]\n"
+ "st1w { z19.s }, p0, [x8, x7, LSL #2]\n"
+ "fmul z18.s, z18.s, z4.s[1]\n"
+ "fmul z17.s, z17.s, z4.s[2]\n"
+ "st1w { z18.s }, p0, [x17, x7, LSL #2]\n"
+ "fmul z16.s, z16.s, z4.s[3]\n"
+ "st1w { z17.s }, p0, [x16, x7, LSL #2]\n"
+ "st1w { z16.s }, p0, [x15, x7, LSL #2]\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [offsetof_inptrs] "I" (offsetof(KernelArgs, inptrs)), [offsetof_n_channels] "I" (offsetof(KernelArgs, n_channels)), [offsetof_outptrs] "I" (offsetof(KernelArgs, outptrs)), [offsetof_rescale] "I" (offsetof(KernelArgs, rescale_vals))
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace pooling
+} // namespace arm_conv
+
+#endif // defined(__ARM_FEATURE_SVE) && defined(ARM_COMPUTE_ENABLE_SME)
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_generic_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_generic_depthfirst.hpp
new file mode 100644
index 0000000..814c89c
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_generic_depthfirst.hpp
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <cstdint>
+
+#pragma once
+
+namespace arm_conv {
+namespace pooling {
+
+void sme_fp32_nhwc_avg_generic_depthfirst_impl(const uint64_t window_cells, const uint64_t n_valid_cells, uint64_t n_channels, const float *const *const inptrs, float *outptr);
+
+struct sme_fp32_nhwc_avg_generic_depthfirst : IGenericDepthfirstStrategy<float, float>
+{
+ using Parent = IGenericDepthfirstStrategy<float, float>;
+ sme_fp32_nhwc_avg_generic_depthfirst(const CPUInfo *) {}
+ typename Parent::KernelType get_kernel(void) const override { return sme_fp32_nhwc_avg_generic_depthfirst_impl; }
+};
+
+} // namespace pooling
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_generic_depthfirst/generic.cpp
new file mode 100644
index 0000000..08630db
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_generic_depthfirst/generic.cpp
@@ -0,0 +1,232 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME)
+
+#include <cstdint>
+
+namespace arm_conv {
+namespace pooling {
+
+
+void sme_fp32_nhwc_avg_generic_depthfirst_impl(
+ const uint64_t window_cells,
+ const uint64_t n_valid_cells,
+ uint64_t n_channels,
+ const float *const *const inptrs,
+ float *outptr
+)
+{
+ const auto rescale_value = static_cast<float>(1.0f / static_cast<float>(window_cells));
+
+ __asm__ __volatile__(
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "mov x28, #0x0\n"
+ "cntw x27\n"
+ "cntw x26, ALL, MUL #2\n"
+ "cntw x25, ALL, MUL #3\n"
+ "ptrue p0.b\n"
+ "whilelt p3.s, x28, %x[n_channels]\n"
+ "ld1rw { z6.s }, p0/Z, [%x[rescale_ptr]]\n"
+ "whilelt p2.s, x27, %x[n_channels]\n"
+ "whilelt p1.s, x26, %x[n_channels]\n"
+ "whilelt p0.s, x25, %x[n_channels]\n"
+ "b.none 7f\n"
+ "1:" // 4-vectors of channels
+ "lsr x24, %x[n_valid_cells], #0x2\n"
+ "mov z5.b, #0x0\n"
+ "mov z4.b, #0x0\n"
+ "mov x19, %x[inptrs]\n"
+ "mov z3.b, #0x0\n"
+ "mov z2.b, #0x0\n"
+ "cbz x24, 4f\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "ld1w { z1.s }, p3/Z, [x23, x28, LSL #2]\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "add x19, x19, #0x20\n"
+ "ld1w { z0.s }, p3/Z, [x22, x28, LSL #2]\n"
+ "ld1w { z31.s }, p3/Z, [x21, x28, LSL #2]\n"
+ "ld1w { z30.s }, p3/Z, [x20, x28, LSL #2]\n"
+ "ld1w { z29.s }, p2/Z, [x23, x27, LSL #2]\n"
+ "ld1w { z22.s }, p2/Z, [x22, x27, LSL #2]\n"
+ "ld1w { z28.s }, p2/Z, [x21, x27, LSL #2]\n"
+ "ld1w { z18.s }, p2/Z, [x20, x27, LSL #2]\n"
+ "ld1w { z27.s }, p1/Z, [x23, x26, LSL #2]\n"
+ "ld1w { z21.s }, p1/Z, [x22, x26, LSL #2]\n"
+ "ld1w { z26.s }, p1/Z, [x21, x26, LSL #2]\n"
+ "ld1w { z17.s }, p1/Z, [x20, x26, LSL #2]\n"
+ "ld1w { z25.s }, p0/Z, [x23, x25, LSL #2]\n"
+ "ld1w { z20.s }, p0/Z, [x22, x25, LSL #2]\n"
+ "ld1w { z24.s }, p0/Z, [x21, x25, LSL #2]\n"
+ "ld1w { z16.s }, p0/Z, [x20, x25, LSL #2]\n"
+ "beq 3f\n"
+ "2:" // 4-vectors of channels: 4 inputs loop
+ "fadd z23.s, z1.s, z0.s\n"
+ "fadd z19.s, z31.s, z30.s\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "fadd z22.s, z29.s, z22.s\n"
+ "fadd z18.s, z28.s, z18.s\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "add x19, x19, #0x20\n"
+ "fadd z21.s, z27.s, z21.s\n"
+ "fadd z17.s, z26.s, z17.s\n"
+ "ld1w { z1.s }, p3/Z, [x23, x28, LSL #2]\n"
+ "fadd z20.s, z25.s, z20.s\n"
+ "fadd z16.s, z24.s, z16.s\n"
+ "ld1w { z0.s }, p3/Z, [x22, x28, LSL #2]\n"
+ "fadd z19.s, z23.s, z19.s\n"
+ "fadd z18.s, z22.s, z18.s\n"
+ "ld1w { z31.s }, p3/Z, [x21, x28, LSL #2]\n"
+ "fadd z17.s, z21.s, z17.s\n"
+ "fadd z16.s, z20.s, z16.s\n"
+ "ld1w { z30.s }, p3/Z, [x20, x28, LSL #2]\n"
+ "fadd z5.s, z5.s, z19.s\n"
+ "fadd z4.s, z4.s, z18.s\n"
+ "ld1w { z29.s }, p2/Z, [x23, x27, LSL #2]\n"
+ "fadd z3.s, z3.s, z17.s\n"
+ "fadd z2.s, z2.s, z16.s\n"
+ "ld1w { z22.s }, p2/Z, [x22, x27, LSL #2]\n"
+ "ld1w { z28.s }, p2/Z, [x21, x27, LSL #2]\n"
+ "ld1w { z18.s }, p2/Z, [x20, x27, LSL #2]\n"
+ "ld1w { z27.s }, p1/Z, [x23, x26, LSL #2]\n"
+ "ld1w { z21.s }, p1/Z, [x22, x26, LSL #2]\n"
+ "ld1w { z26.s }, p1/Z, [x21, x26, LSL #2]\n"
+ "ld1w { z17.s }, p1/Z, [x20, x26, LSL #2]\n"
+ "ld1w { z25.s }, p0/Z, [x23, x25, LSL #2]\n"
+ "ld1w { z20.s }, p0/Z, [x22, x25, LSL #2]\n"
+ "ld1w { z24.s }, p0/Z, [x21, x25, LSL #2]\n"
+ "ld1w { z16.s }, p0/Z, [x20, x25, LSL #2]\n"
+ "bgt 2b\n"
+ "3:" // 4-vectors of channels: 4 inputs tail
+ "fadd z23.s, z1.s, z0.s\n"
+ "fadd z19.s, z31.s, z30.s\n"
+ "fadd z22.s, z29.s, z22.s\n"
+ "fadd z18.s, z28.s, z18.s\n"
+ "fadd z21.s, z27.s, z21.s\n"
+ "fadd z17.s, z26.s, z17.s\n"
+ "fadd z20.s, z25.s, z20.s\n"
+ "fadd z16.s, z24.s, z16.s\n"
+ "fadd z19.s, z23.s, z19.s\n"
+ "fadd z18.s, z22.s, z18.s\n"
+ "fadd z17.s, z21.s, z17.s\n"
+ "fadd z16.s, z20.s, z16.s\n"
+ "fadd z5.s, z5.s, z19.s\n"
+ "fadd z4.s, z4.s, z18.s\n"
+ "fadd z3.s, z3.s, z17.s\n"
+ "fadd z2.s, z2.s, z16.s\n"
+ "4:" // 4-vectors of channels: After loop
+ "ands x20, %x[n_valid_cells], #0x3\n"
+ "beq 6f\n"
+ "5:" // 4-vectors of channels: Single input loop
+ "ldr x23, [x19], #0x8\n"
+ "ld1w { z1.s }, p3/Z, [x23, x28, LSL #2]\n"
+ "subs x20, x20, #0x1\n"
+ "fadd z5.s, z5.s, z1.s\n"
+ "ld1w { z29.s }, p2/Z, [x23, x27, LSL #2]\n"
+ "fadd z4.s, z4.s, z29.s\n"
+ "ld1w { z27.s }, p1/Z, [x23, x26, LSL #2]\n"
+ "fadd z3.s, z3.s, z27.s\n"
+ "ld1w { z25.s }, p0/Z, [x23, x25, LSL #2]\n"
+ "fadd z2.s, z2.s, z25.s\n"
+ "bgt 5b\n"
+ "6:" // 4-vectors of channels: Single input loop: End
+ "fmul z5.s, z5.s, z6.s\n"
+ "fmul z4.s, z4.s, z6.s\n"
+ "st1w { z5.s }, p3, [%x[outptr], x28, LSL #2]\n"
+ "incw x28, ALL, MUL #4\n"
+ "fmul z3.s, z3.s, z6.s\n"
+ "fmul z2.s, z2.s, z6.s\n"
+ "st1w { z4.s }, p2, [%x[outptr], x27, LSL #2]\n"
+ "incw x27, ALL, MUL #4\n"
+ "st1w { z3.s }, p1, [%x[outptr], x26, LSL #2]\n"
+ "incw x26, ALL, MUL #4\n"
+ "st1w { z2.s }, p0, [%x[outptr], x25, LSL #2]\n"
+ "incw x25, ALL, MUL #4\n"
+ "whilelt p0.s, x25, %x[n_channels]\n"
+ "b.any 1b\n"
+ "7:" // Single vector of channels
+ "whilelt p3.s, x28, %x[n_channels]\n"
+ "b.none 14f\n"
+ "8:" // Single vector of channels: Loop
+ "lsr x24, %x[n_valid_cells], #0x2\n"
+ "mov z5.b, #0x0\n"
+ "mov x19, %x[inptrs]\n"
+ "cbz x24, 11f\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "ld1w { z1.s }, p3/Z, [x23, x28, LSL #2]\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "add x19, x19, #0x20\n"
+ "ld1w { z0.s }, p3/Z, [x22, x28, LSL #2]\n"
+ "ld1w { z31.s }, p3/Z, [x21, x28, LSL #2]\n"
+ "ld1w { z30.s }, p3/Z, [x20, x28, LSL #2]\n"
+ "beq 10f\n"
+ "9:" // Single vector of channels: Loop: 4 inputs loop
+ "fadd z23.s, z1.s, z0.s\n"
+ "fadd z19.s, z31.s, z30.s\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "fadd z19.s, z23.s, z19.s\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "fadd z5.s, z5.s, z19.s\n"
+ "add x19, x19, #0x20\n"
+ "ld1w { z1.s }, p3/Z, [x23, x28, LSL #2]\n"
+ "ld1w { z0.s }, p3/Z, [x22, x28, LSL #2]\n"
+ "ld1w { z31.s }, p3/Z, [x21, x28, LSL #2]\n"
+ "ld1w { z30.s }, p3/Z, [x20, x28, LSL #2]\n"
+ "bgt 9b\n"
+ "10:" // Single vector of channels: Loop: 4 inputs tail
+ "fadd z23.s, z1.s, z0.s\n"
+ "fadd z19.s, z31.s, z30.s\n"
+ "fadd z19.s, z23.s, z19.s\n"
+ "fadd z5.s, z5.s, z19.s\n"
+ "11:" // Single vector of channels: Loop: After loop
+ "ands x20, %x[n_valid_cells], #0x3\n"
+ "beq 13f\n"
+ "12:" // Single vector of channels: Loop: Single input loop
+ "ldr x23, [x19], #0x8\n"
+ "ld1w { z1.s }, p3/Z, [x23, x28, LSL #2]\n"
+ "subs x20, x20, #0x1\n"
+ "fadd z5.s, z5.s, z1.s\n"
+ "bgt 12b\n"
+ "13:" // Single vector of channels: Loop: Single input loop: End
+ "fmul z5.s, z5.s, z6.s\n"
+ "st1w { z5.s }, p3, [%x[outptr], x28, LSL #2]\n"
+ "incw x28\n"
+ "whilelt p3.s, x28, %x[n_channels]\n"
+ "b.any 8b\n"
+ "14:" // End
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [outptr] "r" (outptr), [rescale_ptr] "r" (&rescale_value)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace pooling
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME)
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst.hpp
new file mode 100644
index 0000000..4e3cd6e
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst.hpp
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#pragma once
+
+namespace arm_conv {
+namespace pooling {
+
+void sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst_impl(unsigned int, const float *const *const, float *const *const, bool, unsigned int, unsigned int, unsigned int, unsigned int);
+
+struct sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst : public DepthfirstStrategy<float, float>
+{
+ using Parent = DepthfirstStrategy<float, float>;
+
+ const static auto pooling_type = PoolingType::MAX;
+ const static auto pool_rows = 2u, pool_cols = 2u;
+ const static auto stride_rows = 1u, stride_cols = 1u;
+
+ sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst(const CPUInfo *)
+ : Parent(pool_rows, pool_cols, stride_rows, stride_cols, 2, 2) {}
+
+ Parent::KernelType get_kernel(void) const { return sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst_impl; }
+};
+
+} // namespace pooling
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
new file mode 100644
index 0000000..be254d3
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
@@ -0,0 +1,148 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+
+#include <cstddef>
+#include <cstdint>
+
+#if defined(__ARM_FEATURE_SVE) && defined(ARM_COMPUTE_ENABLE_SME)
+
+namespace arm_conv {
+namespace pooling {
+
+void sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst_impl(
+ const unsigned int n_channels,
+ const float *const *const inptrs,
+ float *const *const outptrs,
+ const bool exclude_padding,
+ const unsigned int pad_left,
+ const unsigned int pad_top,
+ const unsigned int pad_right,
+ const unsigned int pad_bottom
+)
+{
+ struct KernelArgs
+ {
+ const uint64_t n_channels;
+ const float *const *const inptrs;
+ float *const *const outptrs;
+ KernelArgs(
+ unsigned int channels,
+ const float *const *input_ptrs,
+ float *const * output_ptrs,
+ bool, unsigned int, unsigned int, unsigned int, unsigned int
+ ) : n_channels(channels),
+ inptrs(input_ptrs),
+ outptrs(output_ptrs)
+ {
+ }
+ };
+
+ const KernelArgs args(n_channels, inptrs, outptrs, exclude_padding,
+ pad_left, pad_top, pad_right, pad_bottom);
+
+ __asm__ __volatile__(
+ "ldr x20, [%x[args], %[offsetof_outptrs]]\n"
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "mov x14, #0x0\n"
+ "ptrue p2.b\n"
+ "ldr x19, [%x[args], %[offsetof_inptrs]]\n"
+ "mov x13, #0x0\n"
+ "ldr x12, [%x[args], %[offsetof_n_channels]]\n"
+ "whilelt p1.s, x14, x12\n"
+ "ldp x11, x10, [x20, #0x0]\n"
+ "ldp x9, x28, [x20, #0x10]\n"
+ "ldp x27, x26, [x19, #0x0]\n"
+ "ld1w { z29.s }, p1/Z, [x26, x14, LSL #2]\n"
+ "ldp x25, x24, [x19, #0x10]\n"
+ "ld1w { z28.s }, p1/Z, [x24, x14, LSL #2]\n"
+ "ldp x23, x22, [x19, #0x20]\n"
+ "ld1w { z27.s }, p1/Z, [x23, x14, LSL #2]\n"
+ "ldp x21, x20, [x19, #0x30]\n"
+ "ld1w { z26.s }, p1/Z, [x20, x14, LSL #2]\n"
+ "ldr x19, [x19, #0x40]\n"
+ "ld1w { z20.s }, p1/Z, [x27, x14, LSL #2]\n"
+ "ld1w { z25.s }, p1/Z, [x22, x14, LSL #2]\n"
+ "ld1w { z24.s }, p1/Z, [x25, x14, LSL #2]\n"
+ "ld1w { z23.s }, p1/Z, [x21, x14, LSL #2]\n"
+ "ld1w { z19.s }, p1/Z, [x19, x14, LSL #2]\n"
+ "incw x14\n"
+ "whilelt p1.s, x14, x12\n"
+ "b.none 2f\n"
+ "1:" // Vector: Loop
+ "movprfx z22, z29\n fmax z22.s, p2/M, z22.s, z27.s\n"
+ "movprfx z21, z27\n fmax z21.s, p2/M, z21.s, z26.s\n"
+ "ld1w { z29.s }, p1/Z, [x26, x14, LSL #2]\n"
+ "whilelt p0.s, x13, x12\n"
+ "movprfx z18, z28\n fmax z18.s, p2/M, z18.s, z20.s\n"
+ "movprfx z20, z25\n fmax z20.s, p2/M, z20.s, z24.s\n"
+ "ld1w { z27.s }, p1/Z, [x23, x14, LSL #2]\n"
+ "movprfx z17, z23\n fmax z17.s, p2/M, z17.s, z28.s\n"
+ "movprfx z16, z25\n fmax z16.s, p2/M, z16.s, z19.s\n"
+ "ld1w { z26.s }, p1/Z, [x20, x14, LSL #2]\n"
+ "ld1w { z28.s }, p1/Z, [x24, x14, LSL #2]\n"
+ "movprfx z19, z18\n fmax z19.s, p2/M, z19.s, z22.s\n"
+ "movprfx z18, z22\n fmax z18.s, p2/M, z18.s, z20.s\n"
+ "ld1w { z20.s }, p1/Z, [x27, x14, LSL #2]\n"
+ "fmax z17.s, p2/M, z17.s, z21.s\n"
+ "fmax z16.s, p2/M, z16.s, z21.s\n"
+ "ld1w { z25.s }, p1/Z, [x22, x14, LSL #2]\n"
+ "st1w { z19.s }, p0, [x11, x13, LSL #2]\n"
+ "ld1w { z24.s }, p1/Z, [x25, x14, LSL #2]\n"
+ "st1w { z18.s }, p0, [x10, x13, LSL #2]\n"
+ "ld1w { z23.s }, p1/Z, [x21, x14, LSL #2]\n"
+ "st1w { z17.s }, p0, [x9, x13, LSL #2]\n"
+ "ld1w { z19.s }, p1/Z, [x19, x14, LSL #2]\n"
+ "incw x14\n"
+ "whilelt p1.s, x14, x12\n"
+ "st1w { z16.s }, p0, [x28, x13, LSL #2]\n"
+ "incw x13\n"
+ "b.any 1b\n"
+ "2:" // Vector: Tail
+ "movprfx z22, z29\n fmax z22.s, p2/M, z22.s, z27.s\n"
+ "movprfx z21, z27\n fmax z21.s, p2/M, z21.s, z26.s\n"
+ "whilelt p0.s, x13, x12\n"
+ "movprfx z18, z28\n fmax z18.s, p2/M, z18.s, z20.s\n"
+ "movprfx z20, z25\n fmax z20.s, p2/M, z20.s, z24.s\n"
+ "movprfx z17, z23\n fmax z17.s, p2/M, z17.s, z28.s\n"
+ "movprfx z16, z25\n fmax z16.s, p2/M, z16.s, z19.s\n"
+ "movprfx z19, z18\n fmax z19.s, p2/M, z19.s, z22.s\n"
+ "movprfx z18, z22\n fmax z18.s, p2/M, z18.s, z20.s\n"
+ "st1w { z19.s }, p0, [x11, x13, LSL #2]\n"
+ "fmax z17.s, p2/M, z17.s, z21.s\n"
+ "fmax z16.s, p2/M, z16.s, z21.s\n"
+ "st1w { z18.s }, p0, [x10, x13, LSL #2]\n"
+ "st1w { z17.s }, p0, [x9, x13, LSL #2]\n"
+ "st1w { z16.s }, p0, [x28, x13, LSL #2]\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [offsetof_inptrs] "I" (offsetof(KernelArgs, inptrs)), [offsetof_n_channels] "I" (offsetof(KernelArgs, n_channels)), [offsetof_outptrs] "I" (offsetof(KernelArgs, outptrs))
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x10", "x11", "x12", "x13", "x14", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace pooling
+} // namespace arm_conv
+
+#endif // defined(__ARM_FEATURE_SVE) && defined(ARM_COMPUTE_ENABLE_SME)
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_max_generic_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_max_generic_depthfirst.hpp
new file mode 100644
index 0000000..0c0e445
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_max_generic_depthfirst.hpp
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <cstdint>
+
+#pragma once
+
+namespace arm_conv {
+namespace pooling {
+
+void sme_fp32_nhwc_max_generic_depthfirst_impl(const uint64_t, const uint64_t n_valid_cells, uint64_t n_channels, const float *const *const inptrs, float *outptr);
+
+struct sme_fp32_nhwc_max_generic_depthfirst : IGenericDepthfirstStrategy<float, float>
+{
+ using Parent = IGenericDepthfirstStrategy<float, float>;
+ sme_fp32_nhwc_max_generic_depthfirst(const CPUInfo *) {}
+ typename Parent::KernelType get_kernel(void) const override { return sme_fp32_nhwc_max_generic_depthfirst_impl; }
+};
+
+} // namespace pooling
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_max_generic_depthfirst/generic.cpp
new file mode 100644
index 0000000..b9f90ea
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_max_generic_depthfirst/generic.cpp
@@ -0,0 +1,224 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME)
+
+#include <cstdint>
+
+namespace arm_conv {
+namespace pooling {
+
+
+void sme_fp32_nhwc_max_generic_depthfirst_impl(
+ const uint64_t,
+ const uint64_t n_valid_cells,
+ uint64_t n_channels,
+ const float *const *const inptrs,
+ float *outptr
+)
+{
+ __asm__ __volatile__(
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "mov x28, #0x0\n"
+ "cntw x27\n"
+ "cntw x26, ALL, MUL #2\n"
+ "cntw x25, ALL, MUL #3\n"
+ "whilelt p4.s, x28, %x[n_channels]\n"
+ "whilelt p3.s, x27, %x[n_channels]\n"
+ "whilelt p2.s, x26, %x[n_channels]\n"
+ "whilelt p1.s, x25, %x[n_channels]\n"
+ "ptrue p0.b\n"
+ "b.none 7f\n"
+ "1:" // 4-vectors of channels
+ "lsr x24, %x[n_valid_cells], #0x2\n"
+ "mov z4.s, #0xff800000\n"
+ "mov z3.s, #0xff800000\n"
+ "mov x19, %x[inptrs]\n"
+ "mov z2.s, #0xff800000\n"
+ "mov z1.s, #0xff800000\n"
+ "cbz x24, 4f\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "ld1w { z0.s }, p4/Z, [x23, x28, LSL #2]\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "add x19, x19, #0x20\n"
+ "ld1w { z31.s }, p4/Z, [x22, x28, LSL #2]\n"
+ "ld1w { z23.s }, p4/Z, [x21, x28, LSL #2]\n"
+ "ld1w { z30.s }, p4/Z, [x20, x28, LSL #2]\n"
+ "ld1w { z18.s }, p3/Z, [x23, x27, LSL #2]\n"
+ "ld1w { z29.s }, p3/Z, [x22, x27, LSL #2]\n"
+ "ld1w { z22.s }, p3/Z, [x21, x27, LSL #2]\n"
+ "ld1w { z28.s }, p3/Z, [x20, x27, LSL #2]\n"
+ "ld1w { z17.s }, p2/Z, [x23, x26, LSL #2]\n"
+ "ld1w { z27.s }, p2/Z, [x22, x26, LSL #2]\n"
+ "ld1w { z21.s }, p2/Z, [x21, x26, LSL #2]\n"
+ "ld1w { z26.s }, p2/Z, [x20, x26, LSL #2]\n"
+ "ld1w { z16.s }, p1/Z, [x23, x25, LSL #2]\n"
+ "ld1w { z25.s }, p1/Z, [x22, x25, LSL #2]\n"
+ "ld1w { z20.s }, p1/Z, [x21, x25, LSL #2]\n"
+ "ld1w { z24.s }, p1/Z, [x20, x25, LSL #2]\n"
+ "beq 3f\n"
+ "2:" // 4-vectors of channels: 4 inputs loop
+ "movprfx z19, z0\n fmax z19.s, p0/M, z19.s, z31.s\n"
+ "fmax z23.s, p0/M, z23.s, z30.s\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "fmax z18.s, p0/M, z18.s, z29.s\n"
+ "fmax z22.s, p0/M, z22.s, z28.s\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "add x19, x19, #0x20\n"
+ "fmax z17.s, p0/M, z17.s, z27.s\n"
+ "fmax z21.s, p0/M, z21.s, z26.s\n"
+ "ld1w { z0.s }, p4/Z, [x23, x28, LSL #2]\n"
+ "fmax z16.s, p0/M, z16.s, z25.s\n"
+ "fmax z20.s, p0/M, z20.s, z24.s\n"
+ "ld1w { z31.s }, p4/Z, [x22, x28, LSL #2]\n"
+ "fmax z19.s, p0/M, z19.s, z23.s\n"
+ "fmax z18.s, p0/M, z18.s, z22.s\n"
+ "ld1w { z23.s }, p4/Z, [x21, x28, LSL #2]\n"
+ "fmax z17.s, p0/M, z17.s, z21.s\n"
+ "fmax z16.s, p0/M, z16.s, z20.s\n"
+ "ld1w { z30.s }, p4/Z, [x20, x28, LSL #2]\n"
+ "fmax z4.s, p0/M, z4.s, z19.s\n"
+ "fmax z3.s, p0/M, z3.s, z18.s\n"
+ "ld1w { z18.s }, p3/Z, [x23, x27, LSL #2]\n"
+ "fmax z2.s, p0/M, z2.s, z17.s\n"
+ "fmax z1.s, p0/M, z1.s, z16.s\n"
+ "ld1w { z29.s }, p3/Z, [x22, x27, LSL #2]\n"
+ "ld1w { z22.s }, p3/Z, [x21, x27, LSL #2]\n"
+ "ld1w { z28.s }, p3/Z, [x20, x27, LSL #2]\n"
+ "ld1w { z17.s }, p2/Z, [x23, x26, LSL #2]\n"
+ "ld1w { z27.s }, p2/Z, [x22, x26, LSL #2]\n"
+ "ld1w { z21.s }, p2/Z, [x21, x26, LSL #2]\n"
+ "ld1w { z26.s }, p2/Z, [x20, x26, LSL #2]\n"
+ "ld1w { z16.s }, p1/Z, [x23, x25, LSL #2]\n"
+ "ld1w { z25.s }, p1/Z, [x22, x25, LSL #2]\n"
+ "ld1w { z20.s }, p1/Z, [x21, x25, LSL #2]\n"
+ "ld1w { z24.s }, p1/Z, [x20, x25, LSL #2]\n"
+ "bgt 2b\n"
+ "3:" // 4-vectors of channels: 4 inputs tail
+ "movprfx z19, z0\n fmax z19.s, p0/M, z19.s, z31.s\n"
+ "fmax z23.s, p0/M, z23.s, z30.s\n"
+ "fmax z18.s, p0/M, z18.s, z29.s\n"
+ "fmax z22.s, p0/M, z22.s, z28.s\n"
+ "fmax z17.s, p0/M, z17.s, z27.s\n"
+ "fmax z21.s, p0/M, z21.s, z26.s\n"
+ "fmax z16.s, p0/M, z16.s, z25.s\n"
+ "fmax z20.s, p0/M, z20.s, z24.s\n"
+ "fmax z19.s, p0/M, z19.s, z23.s\n"
+ "fmax z18.s, p0/M, z18.s, z22.s\n"
+ "fmax z17.s, p0/M, z17.s, z21.s\n"
+ "fmax z16.s, p0/M, z16.s, z20.s\n"
+ "fmax z4.s, p0/M, z4.s, z19.s\n"
+ "fmax z3.s, p0/M, z3.s, z18.s\n"
+ "fmax z2.s, p0/M, z2.s, z17.s\n"
+ "fmax z1.s, p0/M, z1.s, z16.s\n"
+ "4:" // 4-vectors of channels: After loop
+ "ands x20, %x[n_valid_cells], #0x3\n"
+ "beq 6f\n"
+ "5:" // 4-vectors of channels: Single input loop
+ "ldr x23, [x19], #0x8\n"
+ "ld1w { z0.s }, p4/Z, [x23, x28, LSL #2]\n"
+ "subs x20, x20, #0x1\n"
+ "fmax z4.s, p0/M, z4.s, z0.s\n"
+ "ld1w { z18.s }, p3/Z, [x23, x27, LSL #2]\n"
+ "fmax z3.s, p0/M, z3.s, z18.s\n"
+ "ld1w { z17.s }, p2/Z, [x23, x26, LSL #2]\n"
+ "fmax z2.s, p0/M, z2.s, z17.s\n"
+ "ld1w { z16.s }, p1/Z, [x23, x25, LSL #2]\n"
+ "fmax z1.s, p0/M, z1.s, z16.s\n"
+ "bgt 5b\n"
+ "6:" // 4-vectors of channels: Single input loop: End
+ "st1w { z4.s }, p4, [%x[outptr], x28, LSL #2]\n"
+ "incw x28, ALL, MUL #4\n"
+ "st1w { z3.s }, p3, [%x[outptr], x27, LSL #2]\n"
+ "incw x27, ALL, MUL #4\n"
+ "st1w { z2.s }, p2, [%x[outptr], x26, LSL #2]\n"
+ "incw x26, ALL, MUL #4\n"
+ "st1w { z1.s }, p1, [%x[outptr], x25, LSL #2]\n"
+ "incw x25, ALL, MUL #4\n"
+ "whilelt p1.s, x25, %x[n_channels]\n"
+ "b.any 1b\n"
+ "7:" // Single vector of channels
+ "whilelt p4.s, x28, %x[n_channels]\n"
+ "b.none 14f\n"
+ "8:" // Single vector of channels: Loop
+ "lsr x24, %x[n_valid_cells], #0x2\n"
+ "mov z4.s, #0xff800000\n"
+ "mov x19, %x[inptrs]\n"
+ "cbz x24, 11f\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "ld1w { z0.s }, p4/Z, [x23, x28, LSL #2]\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "add x19, x19, #0x20\n"
+ "ld1w { z31.s }, p4/Z, [x22, x28, LSL #2]\n"
+ "ld1w { z23.s }, p4/Z, [x21, x28, LSL #2]\n"
+ "ld1w { z30.s }, p4/Z, [x20, x28, LSL #2]\n"
+ "beq 10f\n"
+ "9:" // Single vector of channels: Loop: 4 inputs loop
+ "movprfx z19, z0\n fmax z19.s, p0/M, z19.s, z31.s\n"
+ "fmax z23.s, p0/M, z23.s, z30.s\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "fmax z19.s, p0/M, z19.s, z23.s\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "fmax z4.s, p0/M, z4.s, z19.s\n"
+ "add x19, x19, #0x20\n"
+ "ld1w { z0.s }, p4/Z, [x23, x28, LSL #2]\n"
+ "ld1w { z31.s }, p4/Z, [x22, x28, LSL #2]\n"
+ "ld1w { z23.s }, p4/Z, [x21, x28, LSL #2]\n"
+ "ld1w { z30.s }, p4/Z, [x20, x28, LSL #2]\n"
+ "bgt 9b\n"
+ "10:" // Single vector of channels: Loop: 4 inputs tail
+ "movprfx z19, z0\n fmax z19.s, p0/M, z19.s, z31.s\n"
+ "fmax z23.s, p0/M, z23.s, z30.s\n"
+ "fmax z19.s, p0/M, z19.s, z23.s\n"
+ "fmax z4.s, p0/M, z4.s, z19.s\n"
+ "11:" // Single vector of channels: Loop: After loop
+ "ands x20, %x[n_valid_cells], #0x3\n"
+ "beq 13f\n"
+ "12:" // Single vector of channels: Loop: Single input loop
+ "ldr x23, [x19], #0x8\n"
+ "ld1w { z0.s }, p4/Z, [x23, x28, LSL #2]\n"
+ "subs x20, x20, #0x1\n"
+ "fmax z4.s, p0/M, z4.s, z0.s\n"
+ "bgt 12b\n"
+ "13:" // Single vector of channels: Loop: Single input loop: End
+ "st1w { z4.s }, p4, [%x[outptr], x28, LSL #2]\n"
+ "incw x28\n"
+ "whilelt p4.s, x28, %x[n_channels]\n"
+ "b.any 8b\n"
+ "14:" // End
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [outptr] "r" (outptr)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace pooling
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME)
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_avg_generic_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_avg_generic_depthfirst.hpp
new file mode 100644
index 0000000..e383a4c
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_avg_generic_depthfirst.hpp
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <cstdint>
+
+#pragma once
+
+namespace arm_conv {
+namespace pooling {
+
+void sme_s8_nhwc_avg_generic_depthfirst_impl(const uint64_t window_cells, const uint64_t n_valid_cells, uint64_t n_channels, const int8_t *const *const inptrs, int8_t *outptr);
+
+struct sme_s8_nhwc_avg_generic_depthfirst : IGenericDepthfirstStrategy<int8_t, int8_t>
+{
+ using Parent = IGenericDepthfirstStrategy<int8_t, int8_t>;
+ sme_s8_nhwc_avg_generic_depthfirst(const CPUInfo *) {}
+ typename Parent::KernelType get_kernel(void) const override { return sme_s8_nhwc_avg_generic_depthfirst_impl; }
+};
+
+} // namespace pooling
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_avg_generic_depthfirst/generic.cpp
new file mode 100644
index 0000000..c5066d1
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_avg_generic_depthfirst/generic.cpp
@@ -0,0 +1,417 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME)
+
+#include <cstdint>
+#include <cstring>
+#include <cmath>
+
+
+namespace arm_conv {
+namespace pooling {
+
+namespace {
+ struct RescaleParams
+ {
+ int32_t multiplier, shift;
+ };
+
+ constexpr RescaleParams rescale_params[8] = {
+ {0x40000000, -0}, // 1/2
+ {0x55555556, -1}, // 1/3
+ {0x40000000, -1}, // 1/4
+ {0x66666666, -2}, // 1/5
+ {0x55555556, -2}, // 1/6
+ {0x49249249, -2}, // 1/7
+ {0x40000000, -2}, // 1/8
+ {0x71c71c72, -3}, // 1/9
+ };
+}
+
+void sme_s8_nhwc_avg_generic_depthfirst_impl(
+ const uint64_t window_cells,
+ const uint64_t n_valid_cells,
+ uint64_t n_channels,
+ const int8_t *const *const inptrs,
+ int8_t *outptr
+)
+{
+ if (n_valid_cells == 1 && window_cells == 1)
+ {
+ // In this case, simply copy from the input to the output
+ std::memcpy(outptr, *inptrs, n_channels);
+ return;
+ }
+
+ // Compute (or look up) the rescale values
+ int32_t shift_value = 0, rescale_value = 0;
+ if (2 <= window_cells && window_cells <= 9)
+ {
+ auto ¶ms = rescale_params[window_cells - 2];
+ rescale_value = params.multiplier;
+ shift_value = params.shift;
+ }
+ else
+ {
+ auto f_rescale_value = 1.0f / static_cast<float>(window_cells);
+
+ shift_value = 0;
+ while (f_rescale_value < 0.5f)
+ {
+ shift_value--;
+ f_rescale_value *= 2.0f;
+ }
+
+ rescale_value = static_cast<int32_t>(round(f_rescale_value * static_cast<float>(1ll << 31)));
+ if (static_cast<int64_t>(rescale_value) == (1ll << 31))
+ {
+ shift_value++;
+ rescale_value >>= 1;
+ }
+ }
+
+ __asm__ __volatile__(
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "mov x26, #0x0\n"
+ "cntb x25\n"
+ "cntb x24, ALL, MUL #2\n"
+ "cntb x23, ALL, MUL #3\n"
+ "whilelt p4.b, x26, %x[n_channels]\n"
+ "whilelt p3.b, x25, %x[n_channels]\n"
+ "whilelt p2.b, x24, %x[n_channels]\n"
+ "whilelt p1.b, x23, %x[n_channels]\n"
+ "ptrue p0.b\n"
+ "b.none 7f\n"
+ "1:" // 4-vectors of channels
+ "lsr x22, %x[n_valid_cells], #0x1\n"
+ "mov z15.s, #0x0\n"
+ "mov z14.s, #0x0\n"
+ "mov x19, %x[inptrs]\n"
+ "mov z13.s, #0x0\n"
+ "mov z12.s, #0x0\n"
+ "mov z11.s, #0x0\n"
+ "mov z10.s, #0x0\n"
+ "mov z9.s, #0x0\n"
+ "mov z8.s, #0x0\n"
+ "mov z7.s, #0x0\n"
+ "mov z6.s, #0x0\n"
+ "mov z5.s, #0x0\n"
+ "mov z4.s, #0x0\n"
+ "mov z3.s, #0x0\n"
+ "mov z2.s, #0x0\n"
+ "mov z1.s, #0x0\n"
+ "mov z0.s, #0x0\n"
+ "cbz x22, 4f\n"
+ "ldp x21, x20, [x19, #0x0]\n"
+ "subs x22, x22, #0x1\n"
+ "add x19, x19, #0x10\n"
+ "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+ "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+ "ld1b { z29.b }, p3/Z, [x21, x25]\n"
+ "ld1b { z28.b }, p3/Z, [x20, x25]\n"
+ "ld1b { z27.b }, p2/Z, [x21, x24]\n"
+ "ld1b { z26.b }, p2/Z, [x20, x24]\n"
+ "ld1b { z25.b }, p1/Z, [x21, x23]\n"
+ "ld1b { z24.b }, p1/Z, [x20, x23]\n"
+ "beq 3f\n"
+ "2:" // 4-vectors of channels: 2 inputs loop
+ ".inst 0x455e03f7 // saddlb z23.h, z31.b, z30.b\n"
+ ".inst 0x455e07f6 // saddlt z22.h, z31.b, z30.b\n"
+ "ldp x21, x20, [x19, #0x0]\n"
+ "subs x22, x22, #0x1\n"
+ ".inst 0x455c03b5 // saddlb z21.h, z29.b, z28.b\n"
+ ".inst 0x455c07b4 // saddlt z20.h, z29.b, z28.b\n"
+ "add x19, x19, #0x10\n"
+ "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+ ".inst 0x455a0373 // saddlb z19.h, z27.b, z26.b\n"
+ ".inst 0x455a0772 // saddlt z18.h, z27.b, z26.b\n"
+ "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+ ".inst 0x45580331 // saddlb z17.h, z25.b, z24.b\n"
+ ".inst 0x45580730 // saddlt z16.h, z25.b, z24.b\n"
+ "ld1b { z29.b }, p3/Z, [x21, x25]\n"
+ ".inst 0x459741ef // saddwb z15.s, z15.s, z23.h\n"
+ ".inst 0x459745ce // saddwt z14.s, z14.s, z23.h\n"
+ "ld1b { z28.b }, p3/Z, [x20, x25]\n"
+ ".inst 0x459641ad // saddwb z13.s, z13.s, z22.h\n"
+ ".inst 0x4596458c // saddwt z12.s, z12.s, z22.h\n"
+ "ld1b { z27.b }, p2/Z, [x21, x24]\n"
+ ".inst 0x4595416b // saddwb z11.s, z11.s, z21.h\n"
+ ".inst 0x4595454a // saddwt z10.s, z10.s, z21.h\n"
+ "ld1b { z26.b }, p2/Z, [x20, x24]\n"
+ ".inst 0x45944129 // saddwb z9.s, z9.s, z20.h\n"
+ ".inst 0x45944508 // saddwt z8.s, z8.s, z20.h\n"
+ "ld1b { z25.b }, p1/Z, [x21, x23]\n"
+ ".inst 0x459340e7 // saddwb z7.s, z7.s, z19.h\n"
+ ".inst 0x459344c6 // saddwt z6.s, z6.s, z19.h\n"
+ "ld1b { z24.b }, p1/Z, [x20, x23]\n"
+ ".inst 0x459240a5 // saddwb z5.s, z5.s, z18.h\n"
+ ".inst 0x45924484 // saddwt z4.s, z4.s, z18.h\n"
+ ".inst 0x45914063 // saddwb z3.s, z3.s, z17.h\n"
+ ".inst 0x45914442 // saddwt z2.s, z2.s, z17.h\n"
+ ".inst 0x45904021 // saddwb z1.s, z1.s, z16.h\n"
+ ".inst 0x45904400 // saddwt z0.s, z0.s, z16.h\n"
+ "bgt 2b\n"
+ "3:" // 4-vectors of channels: 2 inputs tail
+ ".inst 0x455e03f7 // saddlb z23.h, z31.b, z30.b\n"
+ ".inst 0x455e07f6 // saddlt z22.h, z31.b, z30.b\n"
+ ".inst 0x455c03b5 // saddlb z21.h, z29.b, z28.b\n"
+ ".inst 0x455c07b4 // saddlt z20.h, z29.b, z28.b\n"
+ ".inst 0x455a0373 // saddlb z19.h, z27.b, z26.b\n"
+ ".inst 0x455a0772 // saddlt z18.h, z27.b, z26.b\n"
+ ".inst 0x45580331 // saddlb z17.h, z25.b, z24.b\n"
+ ".inst 0x45580730 // saddlt z16.h, z25.b, z24.b\n"
+ ".inst 0x459741ef // saddwb z15.s, z15.s, z23.h\n"
+ ".inst 0x459745ce // saddwt z14.s, z14.s, z23.h\n"
+ ".inst 0x459641ad // saddwb z13.s, z13.s, z22.h\n"
+ ".inst 0x4596458c // saddwt z12.s, z12.s, z22.h\n"
+ ".inst 0x4595416b // saddwb z11.s, z11.s, z21.h\n"
+ ".inst 0x4595454a // saddwt z10.s, z10.s, z21.h\n"
+ ".inst 0x45944129 // saddwb z9.s, z9.s, z20.h\n"
+ ".inst 0x45944508 // saddwt z8.s, z8.s, z20.h\n"
+ ".inst 0x459340e7 // saddwb z7.s, z7.s, z19.h\n"
+ ".inst 0x459344c6 // saddwt z6.s, z6.s, z19.h\n"
+ ".inst 0x459240a5 // saddwb z5.s, z5.s, z18.h\n"
+ ".inst 0x45924484 // saddwt z4.s, z4.s, z18.h\n"
+ ".inst 0x45914063 // saddwb z3.s, z3.s, z17.h\n"
+ ".inst 0x45914442 // saddwt z2.s, z2.s, z17.h\n"
+ ".inst 0x45904021 // saddwb z1.s, z1.s, z16.h\n"
+ ".inst 0x45904400 // saddwt z0.s, z0.s, z16.h\n"
+ "4:" // 4-vectors of channels: After loop
+ "ands x20, %x[n_valid_cells], #0x1\n"
+ "beq 6f\n"
+ "5:" // 4-vectors of channels: Single input loop
+ "ldr x21, [x19], #0x8\n"
+ "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+ ".inst 0x4508a3f7 // sshllb z23.h, z31.b, #0x0\n"
+ ".inst 0x4508a7f6 // sshllt z22.h, z31.b, #0x0\n"
+ "ld1b { z29.b }, p3/Z, [x21, x25]\n"
+ ".inst 0x4508a3b5 // sshllb z21.h, z29.b, #0x0\n"
+ ".inst 0x4508a7b4 // sshllt z20.h, z29.b, #0x0\n"
+ "subs x20, x20, #0x1\n"
+ "ld1b { z27.b }, p2/Z, [x21, x24]\n"
+ ".inst 0x4508a373 // sshllb z19.h, z27.b, #0x0\n"
+ ".inst 0x4508a772 // sshllt z18.h, z27.b, #0x0\n"
+ "ld1b { z25.b }, p1/Z, [x21, x23]\n"
+ ".inst 0x4508a331 // sshllb z17.h, z25.b, #0x0\n"
+ ".inst 0x4508a730 // sshllt z16.h, z25.b, #0x0\n"
+ ".inst 0x459741ef // saddwb z15.s, z15.s, z23.h\n"
+ ".inst 0x459745ce // saddwt z14.s, z14.s, z23.h\n"
+ ".inst 0x459641ad // saddwb z13.s, z13.s, z22.h\n"
+ ".inst 0x4596458c // saddwt z12.s, z12.s, z22.h\n"
+ ".inst 0x4595416b // saddwb z11.s, z11.s, z21.h\n"
+ ".inst 0x4595454a // saddwt z10.s, z10.s, z21.h\n"
+ ".inst 0x45944129 // saddwb z9.s, z9.s, z20.h\n"
+ ".inst 0x45944508 // saddwt z8.s, z8.s, z20.h\n"
+ ".inst 0x459340e7 // saddwb z7.s, z7.s, z19.h\n"
+ ".inst 0x459344c6 // saddwt z6.s, z6.s, z19.h\n"
+ ".inst 0x459240a5 // saddwb z5.s, z5.s, z18.h\n"
+ ".inst 0x45924484 // saddwt z4.s, z4.s, z18.h\n"
+ ".inst 0x45914063 // saddwb z3.s, z3.s, z17.h\n"
+ ".inst 0x45914442 // saddwt z2.s, z2.s, z17.h\n"
+ ".inst 0x45904021 // saddwb z1.s, z1.s, z16.h\n"
+ ".inst 0x45904400 // saddwt z0.s, z0.s, z16.h\n"
+ "bgt 5b\n"
+ "6:" // 4-vectors of channels: Single input loop: End
+ "ld1rw { z17.s }, p0/Z, [%x[rescale_ptr]]\n"
+ ".inst 0x04b175ef // sqdmulh z15.s, z15.s, z17.s\n"
+ ".inst 0x04b175ce // sqdmulh z14.s, z14.s, z17.s\n"
+ ".inst 0x04b175ad // sqdmulh z13.s, z13.s, z17.s\n"
+ ".inst 0x04b1758c // sqdmulh z12.s, z12.s, z17.s\n"
+ "ld1rw { z16.s }, p0/Z, [%x[shift_ptr]]\n"
+ ".inst 0x04b1756b // sqdmulh z11.s, z11.s, z17.s\n"
+ ".inst 0x04b1754a // sqdmulh z10.s, z10.s, z17.s\n"
+ ".inst 0x04b17529 // sqdmulh z9.s, z9.s, z17.s\n"
+ ".inst 0x04b17508 // sqdmulh z8.s, z8.s, z17.s\n"
+ ".inst 0x04b174e7 // sqdmulh z7.s, z7.s, z17.s\n"
+ ".inst 0x04b174c6 // sqdmulh z6.s, z6.s, z17.s\n"
+ ".inst 0x04b174a5 // sqdmulh z5.s, z5.s, z17.s\n"
+ ".inst 0x04b17484 // sqdmulh z4.s, z4.s, z17.s\n"
+ ".inst 0x04b17463 // sqdmulh z3.s, z3.s, z17.s\n"
+ ".inst 0x04b17442 // sqdmulh z2.s, z2.s, z17.s\n"
+ ".inst 0x04b17421 // sqdmulh z1.s, z1.s, z17.s\n"
+ ".inst 0x04b17400 // sqdmulh z0.s, z0.s, z17.s\n"
+ "mov z19.s, #0x7f\n"
+ ".inst 0x4482820f // srshl z15.s, p0/M, z15.s, z16.s\n"
+ ".inst 0x4482820e // srshl z14.s, p0/M, z14.s, z16.s\n"
+ ".inst 0x4482820d // srshl z13.s, p0/M, z13.s, z16.s\n"
+ ".inst 0x4482820c // srshl z12.s, p0/M, z12.s, z16.s\n"
+ ".inst 0x4482820b // srshl z11.s, p0/M, z11.s, z16.s\n"
+ ".inst 0x4482820a // srshl z10.s, p0/M, z10.s, z16.s\n"
+ ".inst 0x44828209 // srshl z9.s, p0/M, z9.s, z16.s\n"
+ ".inst 0x44828208 // srshl z8.s, p0/M, z8.s, z16.s\n"
+ ".inst 0x44828207 // srshl z7.s, p0/M, z7.s, z16.s\n"
+ ".inst 0x44828206 // srshl z6.s, p0/M, z6.s, z16.s\n"
+ ".inst 0x44828205 // srshl z5.s, p0/M, z5.s, z16.s\n"
+ ".inst 0x44828204 // srshl z4.s, p0/M, z4.s, z16.s\n"
+ ".inst 0x44828203 // srshl z3.s, p0/M, z3.s, z16.s\n"
+ ".inst 0x44828202 // srshl z2.s, p0/M, z2.s, z16.s\n"
+ ".inst 0x44828201 // srshl z1.s, p0/M, z1.s, z16.s\n"
+ ".inst 0x44828200 // srshl z0.s, p0/M, z0.s, z16.s\n"
+ "not z16.s, p0/M, z19.s\n"
+ "smax z15.s, p0/M, z15.s, z16.s\n"
+ "smax z14.s, p0/M, z14.s, z16.s\n"
+ "smax z13.s, p0/M, z13.s, z16.s\n"
+ "smax z12.s, p0/M, z12.s, z16.s\n"
+ "smax z11.s, p0/M, z11.s, z16.s\n"
+ "smax z10.s, p0/M, z10.s, z16.s\n"
+ "smax z9.s, p0/M, z9.s, z16.s\n"
+ "smax z8.s, p0/M, z8.s, z16.s\n"
+ "smax z7.s, p0/M, z7.s, z16.s\n"
+ "smax z6.s, p0/M, z6.s, z16.s\n"
+ "smax z5.s, p0/M, z5.s, z16.s\n"
+ "smax z4.s, p0/M, z4.s, z16.s\n"
+ "smax z3.s, p0/M, z3.s, z16.s\n"
+ "smax z2.s, p0/M, z2.s, z16.s\n"
+ "smax z1.s, p0/M, z1.s, z16.s\n"
+ "smax z0.s, p0/M, z0.s, z16.s\n"
+ "smin z15.s, p0/M, z15.s, z19.s\n"
+ "smin z14.s, p0/M, z14.s, z19.s\n"
+ "trn1 z23.h, z15.h, z14.h\n"
+ "smin z13.s, p0/M, z13.s, z19.s\n"
+ "smin z12.s, p0/M, z12.s, z19.s\n"
+ "trn1 z16.h, z13.h, z12.h\n"
+ "smin z11.s, p0/M, z11.s, z19.s\n"
+ "smin z10.s, p0/M, z10.s, z19.s\n"
+ "trn1 z22.h, z11.h, z10.h\n"
+ "smin z9.s, p0/M, z9.s, z19.s\n"
+ "smin z8.s, p0/M, z8.s, z19.s\n"
+ "trn1 z18.h, z9.h, z8.h\n"
+ "smin z7.s, p0/M, z7.s, z19.s\n"
+ "smin z6.s, p0/M, z6.s, z19.s\n"
+ "trn1 z21.h, z7.h, z6.h\n"
+ "smin z5.s, p0/M, z5.s, z19.s\n"
+ "smin z4.s, p0/M, z4.s, z19.s\n"
+ "trn1 z17.h, z5.h, z4.h\n"
+ "smin z3.s, p0/M, z3.s, z19.s\n"
+ "smin z2.s, p0/M, z2.s, z19.s\n"
+ "trn1 z20.h, z3.h, z2.h\n"
+ "smin z1.s, p0/M, z1.s, z19.s\n"
+ "smin z0.s, p0/M, z0.s, z19.s\n"
+ "trn1 z19.h, z1.h, z0.h\n"
+ "trn1 z16.b, z23.b, z16.b\n"
+ "trn1 z18.b, z22.b, z18.b\n"
+ "st1b { z16.b }, p4, [%x[outptr], x26]\n"
+ "incb x26, ALL, MUL #4\n"
+ "trn1 z17.b, z21.b, z17.b\n"
+ "trn1 z16.b, z20.b, z19.b\n"
+ "st1b { z18.b }, p3, [%x[outptr], x25]\n"
+ "incb x25, ALL, MUL #4\n"
+ "st1b { z17.b }, p2, [%x[outptr], x24]\n"
+ "incb x24, ALL, MUL #4\n"
+ "st1b { z16.b }, p1, [%x[outptr], x23]\n"
+ "incb x23, ALL, MUL #4\n"
+ "whilelt p1.b, x23, %x[n_channels]\n"
+ "b.any 1b\n"
+ "7:" // Single vector of channels
+ "whilelt p4.b, x26, %x[n_channels]\n"
+ "b.none 14f\n"
+ "8:" // Single vector of channels: Loop
+ "lsr x22, %x[n_valid_cells], #0x1\n"
+ "mov z15.s, #0x0\n"
+ "mov z14.s, #0x0\n"
+ "mov x19, %x[inptrs]\n"
+ "mov z13.s, #0x0\n"
+ "mov z12.s, #0x0\n"
+ "cbz x22, 11f\n"
+ "ldp x21, x20, [x19, #0x0]\n"
+ "subs x22, x22, #0x1\n"
+ "add x19, x19, #0x10\n"
+ "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+ "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+ "beq 10f\n"
+ "9:" // Single vector of channels: Loop: 2 inputs loop
+ ".inst 0x455e03f7 // saddlb z23.h, z31.b, z30.b\n"
+ ".inst 0x455e07f6 // saddlt z22.h, z31.b, z30.b\n"
+ "ldp x21, x20, [x19, #0x0]\n"
+ "subs x22, x22, #0x1\n"
+ ".inst 0x459741ef // saddwb z15.s, z15.s, z23.h\n"
+ ".inst 0x459745ce // saddwt z14.s, z14.s, z23.h\n"
+ "add x19, x19, #0x10\n"
+ "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+ ".inst 0x459641ad // saddwb z13.s, z13.s, z22.h\n"
+ ".inst 0x4596458c // saddwt z12.s, z12.s, z22.h\n"
+ "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+ "bgt 9b\n"
+ "10:" // Single vector of channels: Loop: 2 inputs tail
+ ".inst 0x455e03f7 // saddlb z23.h, z31.b, z30.b\n"
+ ".inst 0x455e07f6 // saddlt z22.h, z31.b, z30.b\n"
+ ".inst 0x459741ef // saddwb z15.s, z15.s, z23.h\n"
+ ".inst 0x459745ce // saddwt z14.s, z14.s, z23.h\n"
+ ".inst 0x459641ad // saddwb z13.s, z13.s, z22.h\n"
+ ".inst 0x4596458c // saddwt z12.s, z12.s, z22.h\n"
+ "11:" // Single vector of channels: Loop: After loop
+ "ands x20, %x[n_valid_cells], #0x1\n"
+ "beq 13f\n"
+ "12:" // Single vector of channels: Loop: Single input loop
+ "ldr x21, [x19], #0x8\n"
+ "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+ ".inst 0x4508a3f7 // sshllb z23.h, z31.b, #0x0\n"
+ ".inst 0x4508a7f6 // sshllt z22.h, z31.b, #0x0\n"
+ "subs x20, x20, #0x1\n"
+ ".inst 0x459741ef // saddwb z15.s, z15.s, z23.h\n"
+ ".inst 0x459745ce // saddwt z14.s, z14.s, z23.h\n"
+ ".inst 0x459641ad // saddwb z13.s, z13.s, z22.h\n"
+ ".inst 0x4596458c // saddwt z12.s, z12.s, z22.h\n"
+ "bgt 12b\n"
+ "13:" // Single vector of channels: Loop: Single input loop: End
+ "ld1rw { z17.s }, p0/Z, [%x[rescale_ptr]]\n"
+ ".inst 0x04b175ef // sqdmulh z15.s, z15.s, z17.s\n"
+ ".inst 0x04b175ce // sqdmulh z14.s, z14.s, z17.s\n"
+ ".inst 0x04b175ad // sqdmulh z13.s, z13.s, z17.s\n"
+ ".inst 0x04b1758c // sqdmulh z12.s, z12.s, z17.s\n"
+ "ld1rw { z16.s }, p0/Z, [%x[shift_ptr]]\n"
+ "mov z19.s, #0x7f\n"
+ ".inst 0x4482820f // srshl z15.s, p0/M, z15.s, z16.s\n"
+ ".inst 0x4482820e // srshl z14.s, p0/M, z14.s, z16.s\n"
+ ".inst 0x4482820d // srshl z13.s, p0/M, z13.s, z16.s\n"
+ ".inst 0x4482820c // srshl z12.s, p0/M, z12.s, z16.s\n"
+ "not z16.s, p0/M, z19.s\n"
+ "smax z15.s, p0/M, z15.s, z16.s\n"
+ "smax z14.s, p0/M, z14.s, z16.s\n"
+ "smax z13.s, p0/M, z13.s, z16.s\n"
+ "smax z12.s, p0/M, z12.s, z16.s\n"
+ "smin z15.s, p0/M, z15.s, z19.s\n"
+ "smin z14.s, p0/M, z14.s, z19.s\n"
+ "trn1 z23.h, z15.h, z14.h\n"
+ "smin z13.s, p0/M, z13.s, z19.s\n"
+ "smin z12.s, p0/M, z12.s, z19.s\n"
+ "trn1 z16.h, z13.h, z12.h\n"
+ "trn1 z16.b, z23.b, z16.b\n"
+ "st1b { z16.b }, p4, [%x[outptr], x26]\n"
+ "incb x26\n"
+ "whilelt p4.b, x26, %x[n_channels]\n"
+ "b.any 8b\n"
+ "14:" // End
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [outptr] "r" (outptr), [rescale_ptr] "r" (&rescale_value), [shift_ptr] "r" (&shift_value)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace pooling
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME)
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp
new file mode 100644
index 0000000..1613970
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#pragma once
+
+namespace arm_conv {
+namespace pooling {
+
+void sme_s8_nhwc_max_2x2_s1_output2x2_depthfirst_impl(unsigned int, const int8_t *const *const, int8_t *const *const, bool, unsigned int, unsigned int, unsigned int, unsigned int);
+
+struct sme_s8_nhwc_max_2x2_s1_output2x2_depthfirst : public DepthfirstStrategy<int8_t, int8_t>
+{
+ using Parent = DepthfirstStrategy<int8_t, int8_t>;
+
+ const static auto pooling_type = PoolingType::MAX;
+ const static auto pool_rows = 2u, pool_cols = 2u;
+ const static auto stride_rows = 1u, stride_cols = 1u;
+
+ sme_s8_nhwc_max_2x2_s1_output2x2_depthfirst(const CPUInfo *)
+ : Parent(pool_rows, pool_cols, stride_rows, stride_cols, 2, 2) {}
+
+ Parent::KernelType get_kernel(void) const { return sme_s8_nhwc_max_2x2_s1_output2x2_depthfirst_impl; }
+};
+
+} // namespace pooling
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
new file mode 100644
index 0000000..d25bec0
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
@@ -0,0 +1,148 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+
+#include <cstddef>
+#include <cstdint>
+
+#if defined(__ARM_FEATURE_SVE) && defined(ARM_COMPUTE_ENABLE_SME)
+
+namespace arm_conv {
+namespace pooling {
+
+void sme_s8_nhwc_max_2x2_s1_output2x2_depthfirst_impl(
+ const unsigned int n_channels,
+ const int8_t *const *const inptrs,
+ int8_t *const *const outptrs,
+ const bool exclude_padding,
+ const unsigned int pad_left,
+ const unsigned int pad_top,
+ const unsigned int pad_right,
+ const unsigned int pad_bottom
+)
+{
+ struct KernelArgs
+ {
+ const uint64_t n_channels;
+ const int8_t *const *const inptrs;
+ int8_t *const *const outptrs;
+ KernelArgs(
+ unsigned int channels,
+ const int8_t *const *input_ptrs,
+ int8_t *const * output_ptrs,
+ bool, unsigned int, unsigned int, unsigned int, unsigned int
+ ) : n_channels(channels),
+ inptrs(input_ptrs),
+ outptrs(output_ptrs)
+ {
+ }
+ };
+
+ const KernelArgs args(n_channels, inptrs, outptrs, exclude_padding,
+ pad_left, pad_top, pad_right, pad_bottom);
+
+ __asm__ __volatile__(
+ "ldr x20, [%x[args], %[offsetof_outptrs]]\n"
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "mov x14, #0x0\n"
+ "ptrue p2.b\n"
+ "ldr x19, [%x[args], %[offsetof_inptrs]]\n"
+ "mov x13, #0x0\n"
+ "ldr x12, [%x[args], %[offsetof_n_channels]]\n"
+ "whilelt p1.b, x14, x12\n"
+ "ldp x11, x10, [x20, #0x0]\n"
+ "ldp x9, x28, [x20, #0x10]\n"
+ "ldp x27, x26, [x19, #0x0]\n"
+ "ld1b { z29.b }, p1/Z, [x26, x14]\n"
+ "ldp x25, x24, [x19, #0x10]\n"
+ "ld1b { z28.b }, p1/Z, [x24, x14]\n"
+ "ldp x23, x22, [x19, #0x20]\n"
+ "ld1b { z27.b }, p1/Z, [x23, x14]\n"
+ "ldp x21, x20, [x19, #0x30]\n"
+ "ld1b { z26.b }, p1/Z, [x20, x14]\n"
+ "ldr x19, [x19, #0x40]\n"
+ "ld1b { z20.b }, p1/Z, [x27, x14]\n"
+ "ld1b { z25.b }, p1/Z, [x22, x14]\n"
+ "ld1b { z24.b }, p1/Z, [x25, x14]\n"
+ "ld1b { z23.b }, p1/Z, [x21, x14]\n"
+ "ld1b { z19.b }, p1/Z, [x19, x14]\n"
+ "incw x14\n"
+ "whilelt p1.b, x14, x12\n"
+ "b.none 2f\n"
+ "1:" // Vector: Loop
+ "movprfx z22, z29\n smax z22.b, p2/M, z22.b, z27.b\n"
+ "movprfx z21, z27\n smax z21.b, p2/M, z21.b, z26.b\n"
+ "ld1b { z29.b }, p1/Z, [x26, x14]\n"
+ "whilelt p0.b, x13, x12\n"
+ "movprfx z18, z28\n smax z18.b, p2/M, z18.b, z20.b\n"
+ "movprfx z20, z25\n smax z20.b, p2/M, z20.b, z24.b\n"
+ "ld1b { z27.b }, p1/Z, [x23, x14]\n"
+ "movprfx z17, z23\n smax z17.b, p2/M, z17.b, z28.b\n"
+ "movprfx z16, z25\n smax z16.b, p2/M, z16.b, z19.b\n"
+ "ld1b { z26.b }, p1/Z, [x20, x14]\n"
+ "ld1b { z28.b }, p1/Z, [x24, x14]\n"
+ "movprfx z19, z18\n smax z19.b, p2/M, z19.b, z22.b\n"
+ "movprfx z18, z22\n smax z18.b, p2/M, z18.b, z20.b\n"
+ "ld1b { z20.b }, p1/Z, [x27, x14]\n"
+ "smax z17.b, p2/M, z17.b, z21.b\n"
+ "smax z16.b, p2/M, z16.b, z21.b\n"
+ "ld1b { z25.b }, p1/Z, [x22, x14]\n"
+ "st1b { z19.b }, p0, [x11, x13]\n"
+ "ld1b { z24.b }, p1/Z, [x25, x14]\n"
+ "st1b { z18.b }, p0, [x10, x13]\n"
+ "ld1b { z23.b }, p1/Z, [x21, x14]\n"
+ "st1b { z17.b }, p0, [x9, x13]\n"
+ "ld1b { z19.b }, p1/Z, [x19, x14]\n"
+ "incw x14\n"
+ "whilelt p1.b, x14, x12\n"
+ "st1b { z16.b }, p0, [x28, x13]\n"
+ "incw x13\n"
+ "b.any 1b\n"
+ "2:" // Vector: Tail
+ "movprfx z22, z29\n smax z22.b, p2/M, z22.b, z27.b\n"
+ "movprfx z21, z27\n smax z21.b, p2/M, z21.b, z26.b\n"
+ "whilelt p0.b, x13, x12\n"
+ "movprfx z18, z28\n smax z18.b, p2/M, z18.b, z20.b\n"
+ "movprfx z20, z25\n smax z20.b, p2/M, z20.b, z24.b\n"
+ "movprfx z17, z23\n smax z17.b, p2/M, z17.b, z28.b\n"
+ "movprfx z16, z25\n smax z16.b, p2/M, z16.b, z19.b\n"
+ "movprfx z19, z18\n smax z19.b, p2/M, z19.b, z22.b\n"
+ "movprfx z18, z22\n smax z18.b, p2/M, z18.b, z20.b\n"
+ "st1b { z19.b }, p0, [x11, x13]\n"
+ "smax z17.b, p2/M, z17.b, z21.b\n"
+ "smax z16.b, p2/M, z16.b, z21.b\n"
+ "st1b { z18.b }, p0, [x10, x13]\n"
+ "st1b { z17.b }, p0, [x9, x13]\n"
+ "st1b { z16.b }, p0, [x28, x13]\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [offsetof_inptrs] "I" (offsetof(KernelArgs, inptrs)), [offsetof_n_channels] "I" (offsetof(KernelArgs, n_channels)), [offsetof_outptrs] "I" (offsetof(KernelArgs, outptrs))
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x10", "x11", "x12", "x13", "x14", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace pooling
+} // namespace arm_conv
+
+#endif // defined(__ARM_FEATURE_SVE) && defined(ARM_COMPUTE_ENABLE_SME)
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_max_generic_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_max_generic_depthfirst.hpp
new file mode 100644
index 0000000..56aa120
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_max_generic_depthfirst.hpp
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <cstdint>
+
+#pragma once
+
+namespace arm_conv {
+namespace pooling {
+
+void sme_s8_nhwc_max_generic_depthfirst_impl(const uint64_t, const uint64_t n_valid_cells, uint64_t n_channels, const int8_t *const *const inptrs, int8_t *outptr);
+
+struct sme_s8_nhwc_max_generic_depthfirst : IGenericDepthfirstStrategy<int8_t, int8_t>
+{
+ using Parent = IGenericDepthfirstStrategy<int8_t, int8_t>;
+ sme_s8_nhwc_max_generic_depthfirst(const CPUInfo *) {}
+ typename Parent::KernelType get_kernel(void) const override { return sme_s8_nhwc_max_generic_depthfirst_impl; }
+};
+
+} // namespace pooling
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_max_generic_depthfirst/generic.cpp
new file mode 100644
index 0000000..86ad4fe
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_max_generic_depthfirst/generic.cpp
@@ -0,0 +1,224 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME)
+
+#include <cstdint>
+
+namespace arm_conv {
+namespace pooling {
+
+
+void sme_s8_nhwc_max_generic_depthfirst_impl(
+ const uint64_t,
+ const uint64_t n_valid_cells,
+ uint64_t n_channels,
+ const int8_t *const *const inptrs,
+ int8_t *outptr
+)
+{
+ __asm__ __volatile__(
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "mov x28, #0x0\n"
+ "cntb x27\n"
+ "cntb x26, ALL, MUL #2\n"
+ "cntb x25, ALL, MUL #3\n"
+ "whilelt p4.b, x28, %x[n_channels]\n"
+ "whilelt p3.b, x27, %x[n_channels]\n"
+ "whilelt p2.b, x26, %x[n_channels]\n"
+ "whilelt p1.b, x25, %x[n_channels]\n"
+ "ptrue p0.b\n"
+ "b.none 7f\n"
+ "1:" // 4-vectors of channels
+ "lsr x24, %x[n_valid_cells], #0x2\n"
+ "mov z4.b, #0x80\n"
+ "mov z3.b, #0x80\n"
+ "mov x19, %x[inptrs]\n"
+ "mov z2.b, #0x80\n"
+ "mov z1.b, #0x80\n"
+ "cbz x24, 4f\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "ld1b { z0.b }, p4/Z, [x23, x28]\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "add x19, x19, #0x20\n"
+ "ld1b { z31.b }, p4/Z, [x22, x28]\n"
+ "ld1b { z23.b }, p4/Z, [x21, x28]\n"
+ "ld1b { z30.b }, p4/Z, [x20, x28]\n"
+ "ld1b { z18.b }, p3/Z, [x23, x27]\n"
+ "ld1b { z29.b }, p3/Z, [x22, x27]\n"
+ "ld1b { z22.b }, p3/Z, [x21, x27]\n"
+ "ld1b { z28.b }, p3/Z, [x20, x27]\n"
+ "ld1b { z17.b }, p2/Z, [x23, x26]\n"
+ "ld1b { z27.b }, p2/Z, [x22, x26]\n"
+ "ld1b { z21.b }, p2/Z, [x21, x26]\n"
+ "ld1b { z26.b }, p2/Z, [x20, x26]\n"
+ "ld1b { z16.b }, p1/Z, [x23, x25]\n"
+ "ld1b { z25.b }, p1/Z, [x22, x25]\n"
+ "ld1b { z20.b }, p1/Z, [x21, x25]\n"
+ "ld1b { z24.b }, p1/Z, [x20, x25]\n"
+ "beq 3f\n"
+ "2:" // 4-vectors of channels: 4 inputs loop
+ "movprfx z19, z0\n smax z19.b, p0/M, z19.b, z31.b\n"
+ "smax z23.b, p0/M, z23.b, z30.b\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "smax z18.b, p0/M, z18.b, z29.b\n"
+ "smax z22.b, p0/M, z22.b, z28.b\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "add x19, x19, #0x20\n"
+ "smax z17.b, p0/M, z17.b, z27.b\n"
+ "smax z21.b, p0/M, z21.b, z26.b\n"
+ "ld1b { z0.b }, p4/Z, [x23, x28]\n"
+ "smax z16.b, p0/M, z16.b, z25.b\n"
+ "smax z20.b, p0/M, z20.b, z24.b\n"
+ "ld1b { z31.b }, p4/Z, [x22, x28]\n"
+ "smax z19.b, p0/M, z19.b, z23.b\n"
+ "smax z18.b, p0/M, z18.b, z22.b\n"
+ "ld1b { z23.b }, p4/Z, [x21, x28]\n"
+ "smax z17.b, p0/M, z17.b, z21.b\n"
+ "smax z16.b, p0/M, z16.b, z20.b\n"
+ "ld1b { z30.b }, p4/Z, [x20, x28]\n"
+ "smax z4.b, p0/M, z4.b, z19.b\n"
+ "smax z3.b, p0/M, z3.b, z18.b\n"
+ "ld1b { z18.b }, p3/Z, [x23, x27]\n"
+ "smax z2.b, p0/M, z2.b, z17.b\n"
+ "smax z1.b, p0/M, z1.b, z16.b\n"
+ "ld1b { z29.b }, p3/Z, [x22, x27]\n"
+ "ld1b { z22.b }, p3/Z, [x21, x27]\n"
+ "ld1b { z28.b }, p3/Z, [x20, x27]\n"
+ "ld1b { z17.b }, p2/Z, [x23, x26]\n"
+ "ld1b { z27.b }, p2/Z, [x22, x26]\n"
+ "ld1b { z21.b }, p2/Z, [x21, x26]\n"
+ "ld1b { z26.b }, p2/Z, [x20, x26]\n"
+ "ld1b { z16.b }, p1/Z, [x23, x25]\n"
+ "ld1b { z25.b }, p1/Z, [x22, x25]\n"
+ "ld1b { z20.b }, p1/Z, [x21, x25]\n"
+ "ld1b { z24.b }, p1/Z, [x20, x25]\n"
+ "bgt 2b\n"
+ "3:" // 4-vectors of channels: 4 inputs tail
+ "movprfx z19, z0\n smax z19.b, p0/M, z19.b, z31.b\n"
+ "smax z23.b, p0/M, z23.b, z30.b\n"
+ "smax z18.b, p0/M, z18.b, z29.b\n"
+ "smax z22.b, p0/M, z22.b, z28.b\n"
+ "smax z17.b, p0/M, z17.b, z27.b\n"
+ "smax z21.b, p0/M, z21.b, z26.b\n"
+ "smax z16.b, p0/M, z16.b, z25.b\n"
+ "smax z20.b, p0/M, z20.b, z24.b\n"
+ "smax z19.b, p0/M, z19.b, z23.b\n"
+ "smax z18.b, p0/M, z18.b, z22.b\n"
+ "smax z17.b, p0/M, z17.b, z21.b\n"
+ "smax z16.b, p0/M, z16.b, z20.b\n"
+ "smax z4.b, p0/M, z4.b, z19.b\n"
+ "smax z3.b, p0/M, z3.b, z18.b\n"
+ "smax z2.b, p0/M, z2.b, z17.b\n"
+ "smax z1.b, p0/M, z1.b, z16.b\n"
+ "4:" // 4-vectors of channels: After loop
+ "ands x20, %x[n_valid_cells], #0x3\n"
+ "beq 6f\n"
+ "5:" // 4-vectors of channels: Single input loop
+ "ldr x23, [x19], #0x8\n"
+ "ld1b { z0.b }, p4/Z, [x23, x28]\n"
+ "subs x20, x20, #0x1\n"
+ "smax z4.b, p0/M, z4.b, z0.b\n"
+ "ld1b { z18.b }, p3/Z, [x23, x27]\n"
+ "smax z3.b, p0/M, z3.b, z18.b\n"
+ "ld1b { z17.b }, p2/Z, [x23, x26]\n"
+ "smax z2.b, p0/M, z2.b, z17.b\n"
+ "ld1b { z16.b }, p1/Z, [x23, x25]\n"
+ "smax z1.b, p0/M, z1.b, z16.b\n"
+ "bgt 5b\n"
+ "6:" // 4-vectors of channels: Single input loop: End
+ "st1b { z4.b }, p4, [%x[outptr], x28]\n"
+ "incb x28, ALL, MUL #4\n"
+ "st1b { z3.b }, p3, [%x[outptr], x27]\n"
+ "incb x27, ALL, MUL #4\n"
+ "st1b { z2.b }, p2, [%x[outptr], x26]\n"
+ "incb x26, ALL, MUL #4\n"
+ "st1b { z1.b }, p1, [%x[outptr], x25]\n"
+ "incb x25, ALL, MUL #4\n"
+ "whilelt p1.b, x25, %x[n_channels]\n"
+ "b.any 1b\n"
+ "7:" // Single vector of channels
+ "whilelt p4.b, x28, %x[n_channels]\n"
+ "b.none 14f\n"
+ "8:" // Single vector of channels: Loop
+ "lsr x24, %x[n_valid_cells], #0x2\n"
+ "mov z4.b, #0x80\n"
+ "mov x19, %x[inptrs]\n"
+ "cbz x24, 11f\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "ld1b { z0.b }, p4/Z, [x23, x28]\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "add x19, x19, #0x20\n"
+ "ld1b { z31.b }, p4/Z, [x22, x28]\n"
+ "ld1b { z23.b }, p4/Z, [x21, x28]\n"
+ "ld1b { z30.b }, p4/Z, [x20, x28]\n"
+ "beq 10f\n"
+ "9:" // Single vector of channels: Loop: 4 inputs loop
+ "movprfx z19, z0\n smax z19.b, p0/M, z19.b, z31.b\n"
+ "smax z23.b, p0/M, z23.b, z30.b\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "smax z19.b, p0/M, z19.b, z23.b\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "smax z4.b, p0/M, z4.b, z19.b\n"
+ "add x19, x19, #0x20\n"
+ "ld1b { z0.b }, p4/Z, [x23, x28]\n"
+ "ld1b { z31.b }, p4/Z, [x22, x28]\n"
+ "ld1b { z23.b }, p4/Z, [x21, x28]\n"
+ "ld1b { z30.b }, p4/Z, [x20, x28]\n"
+ "bgt 9b\n"
+ "10:" // Single vector of channels: Loop: 4 inputs tail
+ "movprfx z19, z0\n smax z19.b, p0/M, z19.b, z31.b\n"
+ "smax z23.b, p0/M, z23.b, z30.b\n"
+ "smax z19.b, p0/M, z19.b, z23.b\n"
+ "smax z4.b, p0/M, z4.b, z19.b\n"
+ "11:" // Single vector of channels: Loop: After loop
+ "ands x20, %x[n_valid_cells], #0x3\n"
+ "beq 13f\n"
+ "12:" // Single vector of channels: Loop: Single input loop
+ "ldr x23, [x19], #0x8\n"
+ "ld1b { z0.b }, p4/Z, [x23, x28]\n"
+ "subs x20, x20, #0x1\n"
+ "smax z4.b, p0/M, z4.b, z0.b\n"
+ "bgt 12b\n"
+ "13:" // Single vector of channels: Loop: Single input loop: End
+ "st1b { z4.b }, p4, [%x[outptr], x28]\n"
+ "incb x28\n"
+ "whilelt p4.b, x28, %x[n_channels]\n"
+ "b.any 8b\n"
+ "14:" // End
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [outptr] "r" (outptr)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace pooling
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME)
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8q_nhwc_avg_generic_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8q_nhwc_avg_generic_depthfirst.hpp
new file mode 100644
index 0000000..ee02c60
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8q_nhwc_avg_generic_depthfirst.hpp
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <cstdint>
+
+#pragma once
+
+namespace arm_conv {
+namespace pooling {
+
+void sme_s8q_nhwc_avg_generic_depthfirst_impl(const uint64_t window_cells, const uint64_t n_valid_cells, uint64_t n_channels, const int8_t *const *const inptrs, int8_t *outptr, const Requantize32 &qp);
+
+struct sme_s8q_nhwc_avg_generic_depthfirst : IGenericDepthfirstStrategy<int8_t, int8_t, Requantize32>
+{
+ using Parent = IGenericDepthfirstStrategy<int8_t, int8_t, Requantize32>;
+ sme_s8q_nhwc_avg_generic_depthfirst(const CPUInfo *) {}
+ typename Parent::KernelType get_kernel(void) const override { return sme_s8q_nhwc_avg_generic_depthfirst_impl; }
+};
+
+} // namespace pooling
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8q_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8q_nhwc_avg_generic_depthfirst/generic.cpp
new file mode 100644
index 0000000..28b7426
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8q_nhwc_avg_generic_depthfirst/generic.cpp
@@ -0,0 +1,458 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME)
+
+#include "src/core/NEON/kernels/assembly/pooling.hpp"
+#include <cstdint>
+#include <cstring>
+#include <cmath>
+
+
+namespace arm_conv {
+namespace pooling {
+
+namespace {
+ struct RescaleParams
+ {
+ int32_t multiplier, shift;
+ };
+
+ constexpr RescaleParams rescale_params[8] = {
+ {0x40000000, -0}, // 1/2
+ {0x55555556, -1}, // 1/3
+ {0x40000000, -1}, // 1/4
+ {0x66666666, -2}, // 1/5
+ {0x55555556, -2}, // 1/6
+ {0x49249249, -2}, // 1/7
+ {0x40000000, -2}, // 1/8
+ {0x71c71c72, -3}, // 1/9
+ };
+}
+
+void sme_s8q_nhwc_avg_generic_depthfirst_impl(
+ const uint64_t window_cells,
+ const uint64_t n_valid_cells,
+ uint64_t n_channels,
+ const int8_t *const *const inptrs,
+ int8_t *outptr,
+ const Requantize32 &qp
+)
+{
+ if (n_valid_cells == 1 && window_cells == 1)
+ {
+ // In this case, simply copy from the input to the output
+ std::memcpy(outptr, *inptrs, n_channels);
+ return;
+ }
+
+ // Compute (or look up) the rescale values
+ int32_t shift_value = 0, rescale_value = 0;
+ if (2 <= window_cells && window_cells <= 9)
+ {
+ auto ¶ms = rescale_params[window_cells - 2];
+ rescale_value = params.multiplier;
+ shift_value = params.shift;
+ }
+ else
+ {
+ auto f_rescale_value = 1.0f / static_cast<float>(window_cells);
+
+ shift_value = 0;
+ while (f_rescale_value < 0.5f)
+ {
+ shift_value--;
+ f_rescale_value *= 2.0f;
+ }
+
+ rescale_value = static_cast<int32_t>(round(f_rescale_value * static_cast<float>(1ll << 31)));
+ if (static_cast<int64_t>(rescale_value) == (1ll << 31))
+ {
+ shift_value++;
+ rescale_value >>= 1;
+ }
+ }
+
+ // Combine together the rescale value for the requantization and the scaling
+ // factor for the average pool.
+ const int32_t shift = qp.per_layer_left_shift - qp.per_layer_right_shift + shift_value;
+ const int32_t left_shift = shift > 0 ? shift : 0;
+ const int32_t right_shift = shift <= 0 ? shift : 0;
+
+ int32_t combined_rescale_value = 0;
+ __asm__ __volatile__ (
+ "mov v16.s[0], %w[per_layer_mul]\n"
+ "mov v17.s[0], %w[rescale_value]\n"
+ "sqrdmulh s18, s16, s17\n"
+ "mov %w[combined_rescale_value], v18.s[0]\n"
+ : [combined_rescale_value] "=r" (combined_rescale_value)
+ : [per_layer_mul] "r" (qp.per_layer_mul), [rescale_value] "r" (rescale_value)
+ : "v16", "v17", "v18"
+ );
+
+ __asm__ __volatile__(
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "mov x26, #0x0\n"
+ "cntb x25\n"
+ "cntb x24, ALL, MUL #2\n"
+ "cntb x23, ALL, MUL #3\n"
+ "whilelt p4.b, x26, %x[n_channels]\n"
+ "whilelt p3.b, x25, %x[n_channels]\n"
+ "whilelt p2.b, x24, %x[n_channels]\n"
+ "whilelt p1.b, x23, %x[n_channels]\n"
+ "ptrue p0.b\n"
+ "b.none 7f\n"
+ "1:" // 4-vectors of channels
+ "lsr x22, %x[n_valid_cells], #0x1\n"
+ "mov z15.s, #0x0\n"
+ "mov z14.s, #0x0\n"
+ "mov x19, %x[inptrs]\n"
+ "mov z13.s, #0x0\n"
+ "mov z12.s, #0x0\n"
+ "mov z11.s, #0x0\n"
+ "mov z10.s, #0x0\n"
+ "mov z9.s, #0x0\n"
+ "mov z8.s, #0x0\n"
+ "mov z7.s, #0x0\n"
+ "mov z6.s, #0x0\n"
+ "mov z5.s, #0x0\n"
+ "mov z4.s, #0x0\n"
+ "mov z3.s, #0x0\n"
+ "mov z2.s, #0x0\n"
+ "mov z1.s, #0x0\n"
+ "mov z0.s, #0x0\n"
+ "cbz x22, 4f\n"
+ "ldp x21, x20, [x19, #0x0]\n"
+ "subs x22, x22, #0x1\n"
+ "add x19, x19, #0x10\n"
+ "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+ "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+ "ld1b { z29.b }, p3/Z, [x21, x25]\n"
+ "ld1b { z28.b }, p3/Z, [x20, x25]\n"
+ "ld1b { z27.b }, p2/Z, [x21, x24]\n"
+ "ld1b { z26.b }, p2/Z, [x20, x24]\n"
+ "ld1b { z25.b }, p1/Z, [x21, x23]\n"
+ "ld1b { z24.b }, p1/Z, [x20, x23]\n"
+ "beq 3f\n"
+ "2:" // 4-vectors of channels: 2 inputs loop
+ ".inst 0x455e03f7 // saddlb z23.h, z31.b, z30.b\n"
+ ".inst 0x455e07f6 // saddlt z22.h, z31.b, z30.b\n"
+ "ldp x21, x20, [x19, #0x0]\n"
+ "subs x22, x22, #0x1\n"
+ ".inst 0x455c03b5 // saddlb z21.h, z29.b, z28.b\n"
+ ".inst 0x455c07b4 // saddlt z20.h, z29.b, z28.b\n"
+ "add x19, x19, #0x10\n"
+ "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+ ".inst 0x455a0373 // saddlb z19.h, z27.b, z26.b\n"
+ ".inst 0x455a0772 // saddlt z18.h, z27.b, z26.b\n"
+ "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+ ".inst 0x45580331 // saddlb z17.h, z25.b, z24.b\n"
+ ".inst 0x45580730 // saddlt z16.h, z25.b, z24.b\n"
+ "ld1b { z29.b }, p3/Z, [x21, x25]\n"
+ ".inst 0x459741ef // saddwb z15.s, z15.s, z23.h\n"
+ ".inst 0x459745ce // saddwt z14.s, z14.s, z23.h\n"
+ "ld1b { z28.b }, p3/Z, [x20, x25]\n"
+ ".inst 0x459641ad // saddwb z13.s, z13.s, z22.h\n"
+ ".inst 0x4596458c // saddwt z12.s, z12.s, z22.h\n"
+ "ld1b { z27.b }, p2/Z, [x21, x24]\n"
+ ".inst 0x4595416b // saddwb z11.s, z11.s, z21.h\n"
+ ".inst 0x4595454a // saddwt z10.s, z10.s, z21.h\n"
+ "ld1b { z26.b }, p2/Z, [x20, x24]\n"
+ ".inst 0x45944129 // saddwb z9.s, z9.s, z20.h\n"
+ ".inst 0x45944508 // saddwt z8.s, z8.s, z20.h\n"
+ "ld1b { z25.b }, p1/Z, [x21, x23]\n"
+ ".inst 0x459340e7 // saddwb z7.s, z7.s, z19.h\n"
+ ".inst 0x459344c6 // saddwt z6.s, z6.s, z19.h\n"
+ "ld1b { z24.b }, p1/Z, [x20, x23]\n"
+ ".inst 0x459240a5 // saddwb z5.s, z5.s, z18.h\n"
+ ".inst 0x45924484 // saddwt z4.s, z4.s, z18.h\n"
+ ".inst 0x45914063 // saddwb z3.s, z3.s, z17.h\n"
+ ".inst 0x45914442 // saddwt z2.s, z2.s, z17.h\n"
+ ".inst 0x45904021 // saddwb z1.s, z1.s, z16.h\n"
+ ".inst 0x45904400 // saddwt z0.s, z0.s, z16.h\n"
+ "bgt 2b\n"
+ "3:" // 4-vectors of channels: 2 inputs tail
+ ".inst 0x455e03f7 // saddlb z23.h, z31.b, z30.b\n"
+ ".inst 0x455e07f6 // saddlt z22.h, z31.b, z30.b\n"
+ ".inst 0x455c03b5 // saddlb z21.h, z29.b, z28.b\n"
+ ".inst 0x455c07b4 // saddlt z20.h, z29.b, z28.b\n"
+ ".inst 0x455a0373 // saddlb z19.h, z27.b, z26.b\n"
+ ".inst 0x455a0772 // saddlt z18.h, z27.b, z26.b\n"
+ ".inst 0x45580331 // saddlb z17.h, z25.b, z24.b\n"
+ ".inst 0x45580730 // saddlt z16.h, z25.b, z24.b\n"
+ ".inst 0x459741ef // saddwb z15.s, z15.s, z23.h\n"
+ ".inst 0x459745ce // saddwt z14.s, z14.s, z23.h\n"
+ ".inst 0x459641ad // saddwb z13.s, z13.s, z22.h\n"
+ ".inst 0x4596458c // saddwt z12.s, z12.s, z22.h\n"
+ ".inst 0x4595416b // saddwb z11.s, z11.s, z21.h\n"
+ ".inst 0x4595454a // saddwt z10.s, z10.s, z21.h\n"
+ ".inst 0x45944129 // saddwb z9.s, z9.s, z20.h\n"
+ ".inst 0x45944508 // saddwt z8.s, z8.s, z20.h\n"
+ ".inst 0x459340e7 // saddwb z7.s, z7.s, z19.h\n"
+ ".inst 0x459344c6 // saddwt z6.s, z6.s, z19.h\n"
+ ".inst 0x459240a5 // saddwb z5.s, z5.s, z18.h\n"
+ ".inst 0x45924484 // saddwt z4.s, z4.s, z18.h\n"
+ ".inst 0x45914063 // saddwb z3.s, z3.s, z17.h\n"
+ ".inst 0x45914442 // saddwt z2.s, z2.s, z17.h\n"
+ ".inst 0x45904021 // saddwb z1.s, z1.s, z16.h\n"
+ ".inst 0x45904400 // saddwt z0.s, z0.s, z16.h\n"
+ "4:" // 4-vectors of channels: After loop
+ "ands x20, %x[n_valid_cells], #0x1\n"
+ "beq 6f\n"
+ "5:" // 4-vectors of channels: Single input loop
+ "ldr x21, [x19], #0x8\n"
+ "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+ ".inst 0x4508a3f7 // sshllb z23.h, z31.b, #0x0\n"
+ ".inst 0x4508a7f6 // sshllt z22.h, z31.b, #0x0\n"
+ "ld1b { z29.b }, p3/Z, [x21, x25]\n"
+ ".inst 0x4508a3b5 // sshllb z21.h, z29.b, #0x0\n"
+ ".inst 0x4508a7b4 // sshllt z20.h, z29.b, #0x0\n"
+ "subs x20, x20, #0x1\n"
+ "ld1b { z27.b }, p2/Z, [x21, x24]\n"
+ ".inst 0x4508a373 // sshllb z19.h, z27.b, #0x0\n"
+ ".inst 0x4508a772 // sshllt z18.h, z27.b, #0x0\n"
+ "ld1b { z25.b }, p1/Z, [x21, x23]\n"
+ ".inst 0x4508a331 // sshllb z17.h, z25.b, #0x0\n"
+ ".inst 0x4508a730 // sshllt z16.h, z25.b, #0x0\n"
+ ".inst 0x459741ef // saddwb z15.s, z15.s, z23.h\n"
+ ".inst 0x459745ce // saddwt z14.s, z14.s, z23.h\n"
+ ".inst 0x459641ad // saddwb z13.s, z13.s, z22.h\n"
+ ".inst 0x4596458c // saddwt z12.s, z12.s, z22.h\n"
+ ".inst 0x4595416b // saddwb z11.s, z11.s, z21.h\n"
+ ".inst 0x4595454a // saddwt z10.s, z10.s, z21.h\n"
+ ".inst 0x45944129 // saddwb z9.s, z9.s, z20.h\n"
+ ".inst 0x45944508 // saddwt z8.s, z8.s, z20.h\n"
+ ".inst 0x459340e7 // saddwb z7.s, z7.s, z19.h\n"
+ ".inst 0x459344c6 // saddwt z6.s, z6.s, z19.h\n"
+ ".inst 0x459240a5 // saddwb z5.s, z5.s, z18.h\n"
+ ".inst 0x45924484 // saddwt z4.s, z4.s, z18.h\n"
+ ".inst 0x45914063 // saddwb z3.s, z3.s, z17.h\n"
+ ".inst 0x45914442 // saddwt z2.s, z2.s, z17.h\n"
+ ".inst 0x45904021 // saddwb z1.s, z1.s, z16.h\n"
+ ".inst 0x45904400 // saddwt z0.s, z0.s, z16.h\n"
+ "bgt 5b\n"
+ "6:" // 4-vectors of channels: Single input loop: End
+ "ld1rw { z18.s }, p0/Z, [%x[left_shift]]\n"
+ ".inst 0x4482824f // srshl z15.s, p0/M, z15.s, z18.s\n"
+ ".inst 0x4482824e // srshl z14.s, p0/M, z14.s, z18.s\n"
+ ".inst 0x4482824d // srshl z13.s, p0/M, z13.s, z18.s\n"
+ ".inst 0x4482824c // srshl z12.s, p0/M, z12.s, z18.s\n"
+ "ld1rw { z17.s }, p0/Z, [%x[combined_rescale_value]]\n"
+ ".inst 0x4482824b // srshl z11.s, p0/M, z11.s, z18.s\n"
+ ".inst 0x4482824a // srshl z10.s, p0/M, z10.s, z18.s\n"
+ "ld1rw { z16.s }, p0/Z, [%x[right_shift]]\n"
+ ".inst 0x44828249 // srshl z9.s, p0/M, z9.s, z18.s\n"
+ ".inst 0x44828248 // srshl z8.s, p0/M, z8.s, z18.s\n"
+ ".inst 0x44828247 // srshl z7.s, p0/M, z7.s, z18.s\n"
+ ".inst 0x44828246 // srshl z6.s, p0/M, z6.s, z18.s\n"
+ ".inst 0x44828245 // srshl z5.s, p0/M, z5.s, z18.s\n"
+ ".inst 0x44828244 // srshl z4.s, p0/M, z4.s, z18.s\n"
+ ".inst 0x44828243 // srshl z3.s, p0/M, z3.s, z18.s\n"
+ ".inst 0x44828242 // srshl z2.s, p0/M, z2.s, z18.s\n"
+ ".inst 0x44828241 // srshl z1.s, p0/M, z1.s, z18.s\n"
+ ".inst 0x44828240 // srshl z0.s, p0/M, z0.s, z18.s\n"
+ ".inst 0x04b175ef // sqrdmulh z15.s, z15.s, z17.s\n"
+ ".inst 0x04b175ce // sqrdmulh z14.s, z14.s, z17.s\n"
+ ".inst 0x04b175ad // sqrdmulh z13.s, z13.s, z17.s\n"
+ ".inst 0x04b1758c // sqrdmulh z12.s, z12.s, z17.s\n"
+ ".inst 0x04b1756b // sqrdmulh z11.s, z11.s, z17.s\n"
+ ".inst 0x04b1754a // sqrdmulh z10.s, z10.s, z17.s\n"
+ ".inst 0x04b17529 // sqrdmulh z9.s, z9.s, z17.s\n"
+ ".inst 0x04b17508 // sqrdmulh z8.s, z8.s, z17.s\n"
+ ".inst 0x04b174e7 // sqrdmulh z7.s, z7.s, z17.s\n"
+ ".inst 0x04b174c6 // sqrdmulh z6.s, z6.s, z17.s\n"
+ ".inst 0x04b174a5 // sqrdmulh z5.s, z5.s, z17.s\n"
+ ".inst 0x04b17484 // sqrdmulh z4.s, z4.s, z17.s\n"
+ ".inst 0x04b17463 // sqrdmulh z3.s, z3.s, z17.s\n"
+ ".inst 0x04b17442 // sqrdmulh z2.s, z2.s, z17.s\n"
+ ".inst 0x04b17421 // sqrdmulh z1.s, z1.s, z17.s\n"
+ ".inst 0x04b17400 // sqrdmulh z0.s, z0.s, z17.s\n"
+ "mov z19.s, #0x7f\n"
+ ".inst 0x4482820f // srshl z15.s, p0/M, z15.s, z16.s\n"
+ ".inst 0x4482820e // srshl z14.s, p0/M, z14.s, z16.s\n"
+ ".inst 0x4482820d // srshl z13.s, p0/M, z13.s, z16.s\n"
+ ".inst 0x4482820c // srshl z12.s, p0/M, z12.s, z16.s\n"
+ ".inst 0x4482820b // srshl z11.s, p0/M, z11.s, z16.s\n"
+ ".inst 0x4482820a // srshl z10.s, p0/M, z10.s, z16.s\n"
+ ".inst 0x44828209 // srshl z9.s, p0/M, z9.s, z16.s\n"
+ ".inst 0x44828208 // srshl z8.s, p0/M, z8.s, z16.s\n"
+ ".inst 0x44828207 // srshl z7.s, p0/M, z7.s, z16.s\n"
+ ".inst 0x44828206 // srshl z6.s, p0/M, z6.s, z16.s\n"
+ ".inst 0x44828205 // srshl z5.s, p0/M, z5.s, z16.s\n"
+ ".inst 0x44828204 // srshl z4.s, p0/M, z4.s, z16.s\n"
+ ".inst 0x44828203 // srshl z3.s, p0/M, z3.s, z16.s\n"
+ ".inst 0x44828202 // srshl z2.s, p0/M, z2.s, z16.s\n"
+ ".inst 0x44828201 // srshl z1.s, p0/M, z1.s, z16.s\n"
+ ".inst 0x44828200 // srshl z0.s, p0/M, z0.s, z16.s\n"
+ "not z16.s, p0/M, z19.s\n"
+ "smax z15.s, p0/M, z15.s, z16.s\n"
+ "smax z14.s, p0/M, z14.s, z16.s\n"
+ "smax z13.s, p0/M, z13.s, z16.s\n"
+ "smax z12.s, p0/M, z12.s, z16.s\n"
+ "smax z11.s, p0/M, z11.s, z16.s\n"
+ "smax z10.s, p0/M, z10.s, z16.s\n"
+ "smax z9.s, p0/M, z9.s, z16.s\n"
+ "smax z8.s, p0/M, z8.s, z16.s\n"
+ "smax z7.s, p0/M, z7.s, z16.s\n"
+ "smax z6.s, p0/M, z6.s, z16.s\n"
+ "smax z5.s, p0/M, z5.s, z16.s\n"
+ "smax z4.s, p0/M, z4.s, z16.s\n"
+ "smax z3.s, p0/M, z3.s, z16.s\n"
+ "smax z2.s, p0/M, z2.s, z16.s\n"
+ "smax z1.s, p0/M, z1.s, z16.s\n"
+ "smax z0.s, p0/M, z0.s, z16.s\n"
+ "smin z15.s, p0/M, z15.s, z19.s\n"
+ "smin z14.s, p0/M, z14.s, z19.s\n"
+ "trn1 z23.h, z15.h, z14.h\n"
+ "smin z13.s, p0/M, z13.s, z19.s\n"
+ "smin z12.s, p0/M, z12.s, z19.s\n"
+ "trn1 z16.h, z13.h, z12.h\n"
+ "smin z11.s, p0/M, z11.s, z19.s\n"
+ "smin z10.s, p0/M, z10.s, z19.s\n"
+ "trn1 z22.h, z11.h, z10.h\n"
+ "smin z9.s, p0/M, z9.s, z19.s\n"
+ "smin z8.s, p0/M, z8.s, z19.s\n"
+ "trn1 z18.h, z9.h, z8.h\n"
+ "smin z7.s, p0/M, z7.s, z19.s\n"
+ "smin z6.s, p0/M, z6.s, z19.s\n"
+ "trn1 z21.h, z7.h, z6.h\n"
+ "smin z5.s, p0/M, z5.s, z19.s\n"
+ "smin z4.s, p0/M, z4.s, z19.s\n"
+ "trn1 z17.h, z5.h, z4.h\n"
+ "smin z3.s, p0/M, z3.s, z19.s\n"
+ "smin z2.s, p0/M, z2.s, z19.s\n"
+ "trn1 z20.h, z3.h, z2.h\n"
+ "smin z1.s, p0/M, z1.s, z19.s\n"
+ "smin z0.s, p0/M, z0.s, z19.s\n"
+ "trn1 z19.h, z1.h, z0.h\n"
+ "trn1 z16.b, z23.b, z16.b\n"
+ "trn1 z18.b, z22.b, z18.b\n"
+ "st1b { z16.b }, p4, [%x[outptr], x26]\n"
+ "incb x26, ALL, MUL #4\n"
+ "trn1 z17.b, z21.b, z17.b\n"
+ "trn1 z16.b, z20.b, z19.b\n"
+ "st1b { z18.b }, p3, [%x[outptr], x25]\n"
+ "incb x25, ALL, MUL #4\n"
+ "st1b { z17.b }, p2, [%x[outptr], x24]\n"
+ "incb x24, ALL, MUL #4\n"
+ "st1b { z16.b }, p1, [%x[outptr], x23]\n"
+ "incb x23, ALL, MUL #4\n"
+ "whilelt p1.b, x23, %x[n_channels]\n"
+ "b.any 1b\n"
+ "7:" // Single vector of channels
+ "whilelt p4.b, x26, %x[n_channels]\n"
+ "b.none 14f\n"
+ "8:" // Single vector of channels: Loop
+ "lsr x22, %x[n_valid_cells], #0x1\n"
+ "mov z15.s, #0x0\n"
+ "mov z14.s, #0x0\n"
+ "mov x19, %x[inptrs]\n"
+ "mov z13.s, #0x0\n"
+ "mov z12.s, #0x0\n"
+ "cbz x22, 11f\n"
+ "ldp x21, x20, [x19, #0x0]\n"
+ "subs x22, x22, #0x1\n"
+ "add x19, x19, #0x10\n"
+ "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+ "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+ "beq 10f\n"
+ "9:" // Single vector of channels: Loop: 2 inputs loop
+ ".inst 0x455e03f7 // saddlb z23.h, z31.b, z30.b\n"
+ ".inst 0x455e07f6 // saddlt z22.h, z31.b, z30.b\n"
+ "ldp x21, x20, [x19, #0x0]\n"
+ "subs x22, x22, #0x1\n"
+ ".inst 0x459741ef // saddwb z15.s, z15.s, z23.h\n"
+ ".inst 0x459745ce // saddwt z14.s, z14.s, z23.h\n"
+ "add x19, x19, #0x10\n"
+ "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+ ".inst 0x459641ad // saddwb z13.s, z13.s, z22.h\n"
+ ".inst 0x4596458c // saddwt z12.s, z12.s, z22.h\n"
+ "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+ "bgt 9b\n"
+ "10:" // Single vector of channels: Loop: 2 inputs tail
+ ".inst 0x455e03f7 // saddlb z23.h, z31.b, z30.b\n"
+ ".inst 0x455e07f6 // saddlt z22.h, z31.b, z30.b\n"
+ ".inst 0x459741ef // saddwb z15.s, z15.s, z23.h\n"
+ ".inst 0x459745ce // saddwt z14.s, z14.s, z23.h\n"
+ ".inst 0x459641ad // saddwb z13.s, z13.s, z22.h\n"
+ ".inst 0x4596458c // saddwt z12.s, z12.s, z22.h\n"
+ "11:" // Single vector of channels: Loop: After loop
+ "ands x20, %x[n_valid_cells], #0x1\n"
+ "beq 13f\n"
+ "12:" // Single vector of channels: Loop: Single input loop
+ "ldr x21, [x19], #0x8\n"
+ "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+ ".inst 0x4508a3f7 // sshllb z23.h, z31.b, #0x0\n"
+ ".inst 0x4508a7f6 // sshllt z22.h, z31.b, #0x0\n"
+ "subs x20, x20, #0x1\n"
+ ".inst 0x459741ef // saddwb z15.s, z15.s, z23.h\n"
+ ".inst 0x459745ce // saddwt z14.s, z14.s, z23.h\n"
+ ".inst 0x459641ad // saddwb z13.s, z13.s, z22.h\n"
+ ".inst 0x4596458c // saddwt z12.s, z12.s, z22.h\n"
+ "bgt 12b\n"
+ "13:" // Single vector of channels: Loop: Single input loop: End
+ "ld1rw { z18.s }, p0/Z, [%x[left_shift]]\n"
+ ".inst 0x4482824f // srshl z15.s, p0/M, z15.s, z18.s\n"
+ ".inst 0x4482824e // srshl z14.s, p0/M, z14.s, z18.s\n"
+ ".inst 0x4482824d // srshl z13.s, p0/M, z13.s, z18.s\n"
+ ".inst 0x4482824c // srshl z12.s, p0/M, z12.s, z18.s\n"
+ "ld1rw { z17.s }, p0/Z, [%x[combined_rescale_value]]\n"
+ ".inst 0x04b175ef // sqrdmulh z15.s, z15.s, z17.s\n"
+ ".inst 0x04b175ce // sqrdmulh z14.s, z14.s, z17.s\n"
+ "ld1rw { z16.s }, p0/Z, [%x[right_shift]]\n"
+ ".inst 0x04b175ad // sqrdmulh z13.s, z13.s, z17.s\n"
+ ".inst 0x04b1758c // sqrdmulh z12.s, z12.s, z17.s\n"
+ "mov z19.s, #0x7f\n"
+ ".inst 0x4482820f // srshl z15.s, p0/M, z15.s, z16.s\n"
+ ".inst 0x4482820e // srshl z14.s, p0/M, z14.s, z16.s\n"
+ ".inst 0x4482820d // srshl z13.s, p0/M, z13.s, z16.s\n"
+ ".inst 0x4482820c // srshl z12.s, p0/M, z12.s, z16.s\n"
+ "not z16.s, p0/M, z19.s\n"
+ "smax z15.s, p0/M, z15.s, z16.s\n"
+ "smax z14.s, p0/M, z14.s, z16.s\n"
+ "smax z13.s, p0/M, z13.s, z16.s\n"
+ "smax z12.s, p0/M, z12.s, z16.s\n"
+ "smin z15.s, p0/M, z15.s, z19.s\n"
+ "smin z14.s, p0/M, z14.s, z19.s\n"
+ "trn1 z23.h, z15.h, z14.h\n"
+ "smin z13.s, p0/M, z13.s, z19.s\n"
+ "smin z12.s, p0/M, z12.s, z19.s\n"
+ "trn1 z16.h, z13.h, z12.h\n"
+ "trn1 z16.b, z23.b, z16.b\n"
+ "st1b { z16.b }, p4, [%x[outptr], x26]\n"
+ "incb x26\n"
+ "whilelt p4.b, x26, %x[n_channels]\n"
+ "b.any 8b\n"
+ "14:" // End
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [combined_rescale_value] "r" (&combined_rescale_value), [inptrs] "r" (inptrs), [left_shift] "r" (&left_shift), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [outptr] "r" (outptr), [right_shift] "r" (&right_shift)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace pooling
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME)
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8q_nhwc_max_generic_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8q_nhwc_max_generic_depthfirst.hpp
new file mode 100644
index 0000000..050aff3
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8q_nhwc_max_generic_depthfirst.hpp
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <cstdint>
+
+#pragma once
+
+namespace arm_conv {
+namespace pooling {
+
+void sme_s8q_nhwc_max_generic_depthfirst_impl(const uint64_t, const uint64_t n_valid_cells, uint64_t n_channels, const int8_t *const *const inptrs, int8_t *outptr, const Requantize32 &qp);
+
+struct sme_s8q_nhwc_max_generic_depthfirst : IGenericDepthfirstStrategy<int8_t, int8_t, Requantize32>
+{
+ using Parent = IGenericDepthfirstStrategy<int8_t, int8_t, Requantize32>;
+ sme_s8q_nhwc_max_generic_depthfirst(const CPUInfo *) {}
+ typename Parent::KernelType get_kernel(void) const override { return sme_s8q_nhwc_max_generic_depthfirst_impl; }
+};
+
+} // namespace pooling
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8q_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8q_nhwc_max_generic_depthfirst/generic.cpp
new file mode 100644
index 0000000..3d13991
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8q_nhwc_max_generic_depthfirst/generic.cpp
@@ -0,0 +1,387 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME)
+
+#include "src/core/NEON/kernels/assembly/pooling.hpp"
+#include <cstdint>
+
+namespace arm_conv {
+namespace pooling {
+
+
+void sme_s8q_nhwc_max_generic_depthfirst_impl(
+ const uint64_t,
+ const uint64_t n_valid_cells,
+ uint64_t n_channels,
+ const int8_t *const *const inptrs,
+ int8_t *outptr,
+ const Requantize32 &qp
+)
+{
+ __asm__ __volatile__(
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "mov x28, #0x0\n"
+ "cntb x27\n"
+ "cntb x26, ALL, MUL #2\n"
+ "cntb x25, ALL, MUL #3\n"
+ "whilelt p4.b, x28, %x[n_channels]\n"
+ "whilelt p3.b, x27, %x[n_channels]\n"
+ "whilelt p2.b, x26, %x[n_channels]\n"
+ "whilelt p1.b, x25, %x[n_channels]\n"
+ "ptrue p0.b\n"
+ "b.none 7f\n"
+ "1:" // 4-vectors of channels
+ "lsr x24, %x[n_valid_cells], #0x2\n"
+ "mov z4.b, #0x80\n"
+ "mov z3.b, #0x80\n"
+ "mov x19, %x[inptrs]\n"
+ "mov z2.b, #0x80\n"
+ "mov z1.b, #0x80\n"
+ "cbz x24, 4f\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "ld1b { z0.b }, p4/Z, [x23, x28]\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "add x19, x19, #0x20\n"
+ "ld1b { z31.b }, p4/Z, [x22, x28]\n"
+ "ld1b { z23.b }, p4/Z, [x21, x28]\n"
+ "ld1b { z30.b }, p4/Z, [x20, x28]\n"
+ "ld1b { z18.b }, p3/Z, [x23, x27]\n"
+ "ld1b { z29.b }, p3/Z, [x22, x27]\n"
+ "ld1b { z22.b }, p3/Z, [x21, x27]\n"
+ "ld1b { z28.b }, p3/Z, [x20, x27]\n"
+ "ld1b { z17.b }, p2/Z, [x23, x26]\n"
+ "ld1b { z27.b }, p2/Z, [x22, x26]\n"
+ "ld1b { z21.b }, p2/Z, [x21, x26]\n"
+ "ld1b { z26.b }, p2/Z, [x20, x26]\n"
+ "ld1b { z16.b }, p1/Z, [x23, x25]\n"
+ "ld1b { z25.b }, p1/Z, [x22, x25]\n"
+ "ld1b { z20.b }, p1/Z, [x21, x25]\n"
+ "ld1b { z24.b }, p1/Z, [x20, x25]\n"
+ "beq 3f\n"
+ "2:" // 4-vectors of channels: 4 inputs loop
+ "movprfx z19, z0\n smax z19.b, p0/M, z19.b, z31.b\n"
+ "smax z23.b, p0/M, z23.b, z30.b\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "smax z18.b, p0/M, z18.b, z29.b\n"
+ "smax z22.b, p0/M, z22.b, z28.b\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "add x19, x19, #0x20\n"
+ "smax z17.b, p0/M, z17.b, z27.b\n"
+ "smax z21.b, p0/M, z21.b, z26.b\n"
+ "ld1b { z0.b }, p4/Z, [x23, x28]\n"
+ "smax z16.b, p0/M, z16.b, z25.b\n"
+ "smax z20.b, p0/M, z20.b, z24.b\n"
+ "ld1b { z31.b }, p4/Z, [x22, x28]\n"
+ "smax z19.b, p0/M, z19.b, z23.b\n"
+ "smax z18.b, p0/M, z18.b, z22.b\n"
+ "ld1b { z23.b }, p4/Z, [x21, x28]\n"
+ "smax z17.b, p0/M, z17.b, z21.b\n"
+ "smax z16.b, p0/M, z16.b, z20.b\n"
+ "ld1b { z30.b }, p4/Z, [x20, x28]\n"
+ "smax z4.b, p0/M, z4.b, z19.b\n"
+ "smax z3.b, p0/M, z3.b, z18.b\n"
+ "ld1b { z18.b }, p3/Z, [x23, x27]\n"
+ "smax z2.b, p0/M, z2.b, z17.b\n"
+ "smax z1.b, p0/M, z1.b, z16.b\n"
+ "ld1b { z29.b }, p3/Z, [x22, x27]\n"
+ "ld1b { z22.b }, p3/Z, [x21, x27]\n"
+ "ld1b { z28.b }, p3/Z, [x20, x27]\n"
+ "ld1b { z17.b }, p2/Z, [x23, x26]\n"
+ "ld1b { z27.b }, p2/Z, [x22, x26]\n"
+ "ld1b { z21.b }, p2/Z, [x21, x26]\n"
+ "ld1b { z26.b }, p2/Z, [x20, x26]\n"
+ "ld1b { z16.b }, p1/Z, [x23, x25]\n"
+ "ld1b { z25.b }, p1/Z, [x22, x25]\n"
+ "ld1b { z20.b }, p1/Z, [x21, x25]\n"
+ "ld1b { z24.b }, p1/Z, [x20, x25]\n"
+ "bgt 2b\n"
+ "3:" // 4-vectors of channels: 4 inputs tail
+ "movprfx z19, z0\n smax z19.b, p0/M, z19.b, z31.b\n"
+ "smax z23.b, p0/M, z23.b, z30.b\n"
+ "smax z18.b, p0/M, z18.b, z29.b\n"
+ "smax z22.b, p0/M, z22.b, z28.b\n"
+ "smax z17.b, p0/M, z17.b, z27.b\n"
+ "smax z21.b, p0/M, z21.b, z26.b\n"
+ "smax z16.b, p0/M, z16.b, z25.b\n"
+ "smax z20.b, p0/M, z20.b, z24.b\n"
+ "smax z19.b, p0/M, z19.b, z23.b\n"
+ "smax z18.b, p0/M, z18.b, z22.b\n"
+ "smax z17.b, p0/M, z17.b, z21.b\n"
+ "smax z16.b, p0/M, z16.b, z20.b\n"
+ "smax z4.b, p0/M, z4.b, z19.b\n"
+ "smax z3.b, p0/M, z3.b, z18.b\n"
+ "smax z2.b, p0/M, z2.b, z17.b\n"
+ "smax z1.b, p0/M, z1.b, z16.b\n"
+ "4:" // 4-vectors of channels: After loop
+ "ands x20, %x[n_valid_cells], #0x3\n"
+ "beq 6f\n"
+ "5:" // 4-vectors of channels: Single input loop
+ "ldr x23, [x19], #0x8\n"
+ "ld1b { z0.b }, p4/Z, [x23, x28]\n"
+ "subs x20, x20, #0x1\n"
+ "smax z4.b, p0/M, z4.b, z0.b\n"
+ "ld1b { z18.b }, p3/Z, [x23, x27]\n"
+ "smax z3.b, p0/M, z3.b, z18.b\n"
+ "ld1b { z17.b }, p2/Z, [x23, x26]\n"
+ "smax z2.b, p0/M, z2.b, z17.b\n"
+ "ld1b { z16.b }, p1/Z, [x23, x25]\n"
+ "smax z1.b, p0/M, z1.b, z16.b\n"
+ "bgt 5b\n"
+ "6:" // 4-vectors of channels: Single input loop: End
+ ".inst 0x4508a097 // sshllb z23.h, z4.b, #0x0\n"
+ ".inst 0x4508a496 // sshllt z22.h, z4.b, #0x0\n"
+ "add x19, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
+ "ld1rw { z4.s }, p0/Z, [x19]\n"
+ ".inst 0x4508a075 // sshllb z21.h, z3.b, #0x0\n"
+ ".inst 0x4508a472 // sshllt z18.h, z3.b, #0x0\n"
+ "add x19, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
+ "ld1rw { z3.s }, p0/Z, [x19]\n"
+ ".inst 0x4508a054 // sshllb z20.h, z2.b, #0x0\n"
+ ".inst 0x4508a451 // sshllt z17.h, z2.b, #0x0\n"
+ "add x19, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
+ "ld1rw { z2.s }, p0/Z, [x19]\n"
+ ".inst 0x4508a033 // sshllb z19.h, z1.b, #0x0\n"
+ ".inst 0x4508a430 // sshllt z16.h, z1.b, #0x0\n"
+ ".inst 0x4510a2e1 // sshllb z1.s, z23.h, #0x0\n"
+ ".inst 0x4510a6f7 // sshllt z23.s, z23.h, #0x0\n"
+ ".inst 0x4510a2c0 // sshllb z0.s, z22.h, #0x0\n"
+ ".inst 0x4510a6df // sshllt z31.s, z22.h, #0x0\n"
+ ".inst 0x4510a2be // sshllb z30.s, z21.h, #0x0\n"
+ ".inst 0x4510a6b6 // sshllt z22.s, z21.h, #0x0\n"
+ ".inst 0x4510a25d // sshllb z29.s, z18.h, #0x0\n"
+ ".inst 0x4510a652 // sshllt z18.s, z18.h, #0x0\n"
+ ".inst 0x4510a29c // sshllb z28.s, z20.h, #0x0\n"
+ ".inst 0x4510a695 // sshllt z21.s, z20.h, #0x0\n"
+ ".inst 0x4510a23b // sshllb z27.s, z17.h, #0x0\n"
+ ".inst 0x4510a631 // sshllt z17.s, z17.h, #0x0\n"
+ ".inst 0x4510a27a // sshllb z26.s, z19.h, #0x0\n"
+ ".inst 0x4510a674 // sshllt z20.s, z19.h, #0x0\n"
+ ".inst 0x4510a219 // sshllb z25.s, z16.h, #0x0\n"
+ ".inst 0x4510a618 // sshllt z24.s, z16.h, #0x0\n"
+ ".inst 0x44828081 // srshl z1.s, p0/M, z1.s, z4.s\n"
+ ".inst 0x44828097 // srshl z23.s, p0/M, z23.s, z4.s\n"
+ ".inst 0x44828080 // srshl z0.s, p0/M, z0.s, z4.s\n"
+ ".inst 0x4482809f // srshl z31.s, p0/M, z31.s, z4.s\n"
+ ".inst 0x4482809e // srshl z30.s, p0/M, z30.s, z4.s\n"
+ ".inst 0x44828096 // srshl z22.s, p0/M, z22.s, z4.s\n"
+ ".inst 0x4482809d // srshl z29.s, p0/M, z29.s, z4.s\n"
+ ".inst 0x44828092 // srshl z18.s, p0/M, z18.s, z4.s\n"
+ ".inst 0x4482809c // srshl z28.s, p0/M, z28.s, z4.s\n"
+ ".inst 0x44828095 // srshl z21.s, p0/M, z21.s, z4.s\n"
+ ".inst 0x4482809b // srshl z27.s, p0/M, z27.s, z4.s\n"
+ ".inst 0x44828091 // srshl z17.s, p0/M, z17.s, z4.s\n"
+ ".inst 0x4482809a // srshl z26.s, p0/M, z26.s, z4.s\n"
+ ".inst 0x44828094 // srshl z20.s, p0/M, z20.s, z4.s\n"
+ ".inst 0x44828099 // srshl z25.s, p0/M, z25.s, z4.s\n"
+ ".inst 0x44828098 // srshl z24.s, p0/M, z24.s, z4.s\n"
+ ".inst 0x04a37421 // sqrdmulh z1.s, z1.s, z3.s\n"
+ ".inst 0x04a376f7 // sqrdmulh z23.s, z23.s, z3.s\n"
+ ".inst 0x04a37400 // sqrdmulh z0.s, z0.s, z3.s\n"
+ ".inst 0x04a377ff // sqrdmulh z31.s, z31.s, z3.s\n"
+ ".inst 0x04a377de // sqrdmulh z30.s, z30.s, z3.s\n"
+ ".inst 0x04a376d6 // sqrdmulh z22.s, z22.s, z3.s\n"
+ ".inst 0x04a377bd // sqrdmulh z29.s, z29.s, z3.s\n"
+ ".inst 0x04a37652 // sqrdmulh z18.s, z18.s, z3.s\n"
+ ".inst 0x04a3779c // sqrdmulh z28.s, z28.s, z3.s\n"
+ ".inst 0x04a376b5 // sqrdmulh z21.s, z21.s, z3.s\n"
+ ".inst 0x04a3777b // sqrdmulh z27.s, z27.s, z3.s\n"
+ ".inst 0x04a37631 // sqrdmulh z17.s, z17.s, z3.s\n"
+ ".inst 0x04a3775a // sqrdmulh z26.s, z26.s, z3.s\n"
+ ".inst 0x04a37694 // sqrdmulh z20.s, z20.s, z3.s\n"
+ ".inst 0x04a37739 // sqrdmulh z25.s, z25.s, z3.s\n"
+ ".inst 0x04a37718 // sqrdmulh z24.s, z24.s, z3.s\n"
+ "mov z19.s, #0x7f\n"
+ ".inst 0x44828041 // srshl z1.s, p0/M, z1.s, z2.s\n"
+ ".inst 0x44828057 // srshl z23.s, p0/M, z23.s, z2.s\n"
+ ".inst 0x44828040 // srshl z0.s, p0/M, z0.s, z2.s\n"
+ ".inst 0x4482805f // srshl z31.s, p0/M, z31.s, z2.s\n"
+ ".inst 0x4482805e // srshl z30.s, p0/M, z30.s, z2.s\n"
+ ".inst 0x44828056 // srshl z22.s, p0/M, z22.s, z2.s\n"
+ ".inst 0x4482805d // srshl z29.s, p0/M, z29.s, z2.s\n"
+ ".inst 0x44828052 // srshl z18.s, p0/M, z18.s, z2.s\n"
+ ".inst 0x4482805c // srshl z28.s, p0/M, z28.s, z2.s\n"
+ ".inst 0x44828055 // srshl z21.s, p0/M, z21.s, z2.s\n"
+ ".inst 0x4482805b // srshl z27.s, p0/M, z27.s, z2.s\n"
+ ".inst 0x44828051 // srshl z17.s, p0/M, z17.s, z2.s\n"
+ ".inst 0x4482805a // srshl z26.s, p0/M, z26.s, z2.s\n"
+ ".inst 0x44828054 // srshl z20.s, p0/M, z20.s, z2.s\n"
+ ".inst 0x44828059 // srshl z25.s, p0/M, z25.s, z2.s\n"
+ ".inst 0x44828058 // srshl z24.s, p0/M, z24.s, z2.s\n"
+ "not z16.s, p0/M, z19.s\n"
+ "smax z1.s, p0/M, z1.s, z16.s\n"
+ "smax z23.s, p0/M, z23.s, z16.s\n"
+ "smax z0.s, p0/M, z0.s, z16.s\n"
+ "smax z31.s, p0/M, z31.s, z16.s\n"
+ "smax z30.s, p0/M, z30.s, z16.s\n"
+ "smax z22.s, p0/M, z22.s, z16.s\n"
+ "smax z29.s, p0/M, z29.s, z16.s\n"
+ "smax z18.s, p0/M, z18.s, z16.s\n"
+ "smax z28.s, p0/M, z28.s, z16.s\n"
+ "smax z21.s, p0/M, z21.s, z16.s\n"
+ "smax z27.s, p0/M, z27.s, z16.s\n"
+ "smax z17.s, p0/M, z17.s, z16.s\n"
+ "smax z26.s, p0/M, z26.s, z16.s\n"
+ "smax z20.s, p0/M, z20.s, z16.s\n"
+ "smax z25.s, p0/M, z25.s, z16.s\n"
+ "smax z24.s, p0/M, z24.s, z16.s\n"
+ "smin z1.s, p0/M, z1.s, z19.s\n"
+ "smin z23.s, p0/M, z23.s, z19.s\n"
+ "trn1 z23.h, z1.h, z23.h\n"
+ "smin z0.s, p0/M, z0.s, z19.s\n"
+ "smin z31.s, p0/M, z31.s, z19.s\n"
+ "trn1 z16.h, z0.h, z31.h\n"
+ "smin z30.s, p0/M, z30.s, z19.s\n"
+ "smin z22.s, p0/M, z22.s, z19.s\n"
+ "trn1 z22.h, z30.h, z22.h\n"
+ "smin z29.s, p0/M, z29.s, z19.s\n"
+ "smin z18.s, p0/M, z18.s, z19.s\n"
+ "trn1 z18.h, z29.h, z18.h\n"
+ "smin z28.s, p0/M, z28.s, z19.s\n"
+ "smin z21.s, p0/M, z21.s, z19.s\n"
+ "trn1 z21.h, z28.h, z21.h\n"
+ "smin z27.s, p0/M, z27.s, z19.s\n"
+ "smin z17.s, p0/M, z17.s, z19.s\n"
+ "trn1 z17.h, z27.h, z17.h\n"
+ "smin z26.s, p0/M, z26.s, z19.s\n"
+ "smin z20.s, p0/M, z20.s, z19.s\n"
+ "trn1 z20.h, z26.h, z20.h\n"
+ "smin z25.s, p0/M, z25.s, z19.s\n"
+ "smin z24.s, p0/M, z24.s, z19.s\n"
+ "trn1 z19.h, z25.h, z24.h\n"
+ "trn1 z16.b, z23.b, z16.b\n"
+ "trn1 z18.b, z22.b, z18.b\n"
+ "st1b { z16.b }, p4, [%x[outptr], x28]\n"
+ "incb x28, ALL, MUL #4\n"
+ "trn1 z17.b, z21.b, z17.b\n"
+ "trn1 z16.b, z20.b, z19.b\n"
+ "st1b { z18.b }, p3, [%x[outptr], x27]\n"
+ "incb x27, ALL, MUL #4\n"
+ "st1b { z17.b }, p2, [%x[outptr], x26]\n"
+ "incb x26, ALL, MUL #4\n"
+ "st1b { z16.b }, p1, [%x[outptr], x25]\n"
+ "incb x25, ALL, MUL #4\n"
+ "whilelt p1.b, x25, %x[n_channels]\n"
+ "b.any 1b\n"
+ "7:" // Single vector of channels
+ "whilelt p4.b, x28, %x[n_channels]\n"
+ "b.none 14f\n"
+ "8:" // Single vector of channels: Loop
+ "lsr x24, %x[n_valid_cells], #0x2\n"
+ "mov z4.b, #0x80\n"
+ "mov x19, %x[inptrs]\n"
+ "cbz x24, 11f\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "ld1b { z0.b }, p4/Z, [x23, x28]\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "add x19, x19, #0x20\n"
+ "ld1b { z31.b }, p4/Z, [x22, x28]\n"
+ "ld1b { z23.b }, p4/Z, [x21, x28]\n"
+ "ld1b { z30.b }, p4/Z, [x20, x28]\n"
+ "beq 10f\n"
+ "9:" // Single vector of channels: Loop: 4 inputs loop
+ "movprfx z19, z0\n smax z19.b, p0/M, z19.b, z31.b\n"
+ "smax z23.b, p0/M, z23.b, z30.b\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "smax z19.b, p0/M, z19.b, z23.b\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "smax z4.b, p0/M, z4.b, z19.b\n"
+ "add x19, x19, #0x20\n"
+ "ld1b { z0.b }, p4/Z, [x23, x28]\n"
+ "ld1b { z31.b }, p4/Z, [x22, x28]\n"
+ "ld1b { z23.b }, p4/Z, [x21, x28]\n"
+ "ld1b { z30.b }, p4/Z, [x20, x28]\n"
+ "bgt 9b\n"
+ "10:" // Single vector of channels: Loop: 4 inputs tail
+ "movprfx z19, z0\n smax z19.b, p0/M, z19.b, z31.b\n"
+ "smax z23.b, p0/M, z23.b, z30.b\n"
+ "smax z19.b, p0/M, z19.b, z23.b\n"
+ "smax z4.b, p0/M, z4.b, z19.b\n"
+ "11:" // Single vector of channels: Loop: After loop
+ "ands x20, %x[n_valid_cells], #0x3\n"
+ "beq 13f\n"
+ "12:" // Single vector of channels: Loop: Single input loop
+ "ldr x23, [x19], #0x8\n"
+ "ld1b { z0.b }, p4/Z, [x23, x28]\n"
+ "subs x20, x20, #0x1\n"
+ "smax z4.b, p0/M, z4.b, z0.b\n"
+ "bgt 12b\n"
+ "13:" // Single vector of channels: Loop: Single input loop: End
+ ".inst 0x4508a097 // sshllb z23.h, z4.b, #0x0\n"
+ ".inst 0x4508a496 // sshllt z22.h, z4.b, #0x0\n"
+ "add x19, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
+ "ld1rw { z4.s }, p0/Z, [x19]\n"
+ ".inst 0x4510a2e1 // sshllb z1.s, z23.h, #0x0\n"
+ ".inst 0x4510a6f7 // sshllt z23.s, z23.h, #0x0\n"
+ "add x19, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
+ "ld1rw { z3.s }, p0/Z, [x19]\n"
+ ".inst 0x4510a2c0 // sshllb z0.s, z22.h, #0x0\n"
+ ".inst 0x4510a6df // sshllt z31.s, z22.h, #0x0\n"
+ "add x19, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
+ "ld1rw { z2.s }, p0/Z, [x19]\n"
+ ".inst 0x44828081 // srshl z1.s, p0/M, z1.s, z4.s\n"
+ ".inst 0x44828097 // srshl z23.s, p0/M, z23.s, z4.s\n"
+ ".inst 0x44828080 // srshl z0.s, p0/M, z0.s, z4.s\n"
+ ".inst 0x4482809f // srshl z31.s, p0/M, z31.s, z4.s\n"
+ ".inst 0x04a37421 // sqrdmulh z1.s, z1.s, z3.s\n"
+ ".inst 0x04a376f7 // sqrdmulh z23.s, z23.s, z3.s\n"
+ ".inst 0x04a37400 // sqrdmulh z0.s, z0.s, z3.s\n"
+ ".inst 0x04a377ff // sqrdmulh z31.s, z31.s, z3.s\n"
+ "mov z19.s, #0x7f\n"
+ ".inst 0x44828041 // srshl z1.s, p0/M, z1.s, z2.s\n"
+ ".inst 0x44828057 // srshl z23.s, p0/M, z23.s, z2.s\n"
+ ".inst 0x44828040 // srshl z0.s, p0/M, z0.s, z2.s\n"
+ ".inst 0x4482805f // srshl z31.s, p0/M, z31.s, z2.s\n"
+ "not z16.s, p0/M, z19.s\n"
+ "smax z1.s, p0/M, z1.s, z16.s\n"
+ "smax z23.s, p0/M, z23.s, z16.s\n"
+ "smax z0.s, p0/M, z0.s, z16.s\n"
+ "smax z31.s, p0/M, z31.s, z16.s\n"
+ "smin z1.s, p0/M, z1.s, z19.s\n"
+ "smin z23.s, p0/M, z23.s, z19.s\n"
+ "trn1 z23.h, z1.h, z23.h\n"
+ "smin z0.s, p0/M, z0.s, z19.s\n"
+ "smin z31.s, p0/M, z31.s, z19.s\n"
+ "trn1 z16.h, z0.h, z31.h\n"
+ "trn1 z16.b, z23.b, z16.b\n"
+ "st1b { z16.b }, p4, [%x[outptr], x28]\n"
+ "incb x28\n"
+ "whilelt p4.b, x28, %x[n_channels]\n"
+ "b.any 8b\n"
+ "14:" // End
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [offsetof_qp_per_layer_left_shift] "I" (offsetof(Requantize32, per_layer_left_shift)), [offsetof_qp_per_layer_mul] "I" (offsetof(Requantize32, per_layer_mul)), [offsetof_qp_per_layer_right_shift] "I" (offsetof(Requantize32, per_layer_right_shift)), [outptr] "r" (outptr), [quant_params] "r" (&qp)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace pooling
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME)
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_avg_generic_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_avg_generic_depthfirst.hpp
new file mode 100644
index 0000000..2cdb288
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_avg_generic_depthfirst.hpp
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <cstdint>
+
+#pragma once
+
+namespace arm_conv {
+namespace pooling {
+
+void sme_u8_nhwc_avg_generic_depthfirst_impl(const uint64_t window_cells, const uint64_t n_valid_cells, uint64_t n_channels, const uint8_t *const *const inptrs, uint8_t *outptr);
+
+struct sme_u8_nhwc_avg_generic_depthfirst : IGenericDepthfirstStrategy<uint8_t, uint8_t>
+{
+ using Parent = IGenericDepthfirstStrategy<uint8_t, uint8_t>;
+ sme_u8_nhwc_avg_generic_depthfirst(const CPUInfo *) {}
+ typename Parent::KernelType get_kernel(void) const override { return sme_u8_nhwc_avg_generic_depthfirst_impl; }
+};
+
+} // namespace pooling
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_avg_generic_depthfirst/generic.cpp
new file mode 100644
index 0000000..e529e4c
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_avg_generic_depthfirst/generic.cpp
@@ -0,0 +1,417 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME)
+
+#include <cstdint>
+#include <cstring>
+#include <cmath>
+
+
+namespace arm_conv {
+namespace pooling {
+
+namespace {
+ struct RescaleParams
+ {
+ int32_t multiplier, shift;
+ };
+
+ constexpr RescaleParams rescale_params[8] = {
+ {0x40000000, -0}, // 1/2
+ {0x55555556, -1}, // 1/3
+ {0x40000000, -1}, // 1/4
+ {0x66666666, -2}, // 1/5
+ {0x55555556, -2}, // 1/6
+ {0x49249249, -2}, // 1/7
+ {0x40000000, -2}, // 1/8
+ {0x71c71c72, -3}, // 1/9
+ };
+}
+
+void sme_u8_nhwc_avg_generic_depthfirst_impl(
+ const uint64_t window_cells,
+ const uint64_t n_valid_cells,
+ uint64_t n_channels,
+ const uint8_t *const *const inptrs,
+ uint8_t *outptr
+)
+{
+ if (n_valid_cells == 1 && window_cells == 1)
+ {
+ // In this case, simply copy from the input to the output
+ std::memcpy(outptr, *inptrs, n_channels);
+ return;
+ }
+
+ // Compute (or look up) the rescale values
+ int32_t shift_value = 0, rescale_value = 0;
+ if (2 <= window_cells && window_cells <= 9)
+ {
+ auto ¶ms = rescale_params[window_cells - 2];
+ rescale_value = params.multiplier;
+ shift_value = params.shift;
+ }
+ else
+ {
+ auto f_rescale_value = 1.0f / static_cast<float>(window_cells);
+
+ shift_value = 0;
+ while (f_rescale_value < 0.5f)
+ {
+ shift_value--;
+ f_rescale_value *= 2.0f;
+ }
+
+ rescale_value = static_cast<int32_t>(round(f_rescale_value * static_cast<float>(1ll << 31)));
+ if (static_cast<int64_t>(rescale_value) == (1ll << 31))
+ {
+ shift_value++;
+ rescale_value >>= 1;
+ }
+ }
+
+ __asm__ __volatile__(
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "mov x26, #0x0\n"
+ "cntb x25\n"
+ "cntb x24, ALL, MUL #2\n"
+ "cntb x23, ALL, MUL #3\n"
+ "whilelt p4.b, x26, %x[n_channels]\n"
+ "whilelt p3.b, x25, %x[n_channels]\n"
+ "whilelt p2.b, x24, %x[n_channels]\n"
+ "whilelt p1.b, x23, %x[n_channels]\n"
+ "ptrue p0.b\n"
+ "b.none 7f\n"
+ "1:" // 4-vectors of channels
+ "lsr x22, %x[n_valid_cells], #0x1\n"
+ "mov z15.s, #0x0\n"
+ "mov z14.s, #0x0\n"
+ "mov x19, %x[inptrs]\n"
+ "mov z13.s, #0x0\n"
+ "mov z12.s, #0x0\n"
+ "mov z11.s, #0x0\n"
+ "mov z10.s, #0x0\n"
+ "mov z9.s, #0x0\n"
+ "mov z8.s, #0x0\n"
+ "mov z7.s, #0x0\n"
+ "mov z6.s, #0x0\n"
+ "mov z5.s, #0x0\n"
+ "mov z4.s, #0x0\n"
+ "mov z3.s, #0x0\n"
+ "mov z2.s, #0x0\n"
+ "mov z1.s, #0x0\n"
+ "mov z0.s, #0x0\n"
+ "cbz x22, 4f\n"
+ "ldp x21, x20, [x19, #0x0]\n"
+ "subs x22, x22, #0x1\n"
+ "add x19, x19, #0x10\n"
+ "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+ "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+ "ld1b { z29.b }, p3/Z, [x21, x25]\n"
+ "ld1b { z28.b }, p3/Z, [x20, x25]\n"
+ "ld1b { z27.b }, p2/Z, [x21, x24]\n"
+ "ld1b { z26.b }, p2/Z, [x20, x24]\n"
+ "ld1b { z25.b }, p1/Z, [x21, x23]\n"
+ "ld1b { z24.b }, p1/Z, [x20, x23]\n"
+ "beq 3f\n"
+ "2:" // 4-vectors of channels: 2 inputs loop
+ ".inst 0x455e0bf7 // uaddlb z23.h, z31.b, z30.b\n"
+ ".inst 0x455e0ff6 // uaddlt z22.h, z31.b, z30.b\n"
+ "ldp x21, x20, [x19, #0x0]\n"
+ "subs x22, x22, #0x1\n"
+ ".inst 0x455c0bb5 // uaddlb z21.h, z29.b, z28.b\n"
+ ".inst 0x455c0fb4 // uaddlt z20.h, z29.b, z28.b\n"
+ "add x19, x19, #0x10\n"
+ "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+ ".inst 0x455a0b73 // uaddlb z19.h, z27.b, z26.b\n"
+ ".inst 0x455a0f72 // uaddlt z18.h, z27.b, z26.b\n"
+ "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+ ".inst 0x45580b31 // uaddlb z17.h, z25.b, z24.b\n"
+ ".inst 0x45580f30 // uaddlt z16.h, z25.b, z24.b\n"
+ "ld1b { z29.b }, p3/Z, [x21, x25]\n"
+ ".inst 0x459749ef // uaddwb z15.s, z15.s, z23.h\n"
+ ".inst 0x45974dce // uaddwt z14.s, z14.s, z23.h\n"
+ "ld1b { z28.b }, p3/Z, [x20, x25]\n"
+ ".inst 0x459649ad // uaddwb z13.s, z13.s, z22.h\n"
+ ".inst 0x45964d8c // uaddwt z12.s, z12.s, z22.h\n"
+ "ld1b { z27.b }, p2/Z, [x21, x24]\n"
+ ".inst 0x4595496b // uaddwb z11.s, z11.s, z21.h\n"
+ ".inst 0x45954d4a // uaddwt z10.s, z10.s, z21.h\n"
+ "ld1b { z26.b }, p2/Z, [x20, x24]\n"
+ ".inst 0x45944929 // uaddwb z9.s, z9.s, z20.h\n"
+ ".inst 0x45944d08 // uaddwt z8.s, z8.s, z20.h\n"
+ "ld1b { z25.b }, p1/Z, [x21, x23]\n"
+ ".inst 0x459348e7 // uaddwb z7.s, z7.s, z19.h\n"
+ ".inst 0x45934cc6 // uaddwt z6.s, z6.s, z19.h\n"
+ "ld1b { z24.b }, p1/Z, [x20, x23]\n"
+ ".inst 0x459248a5 // uaddwb z5.s, z5.s, z18.h\n"
+ ".inst 0x45924c84 // uaddwt z4.s, z4.s, z18.h\n"
+ ".inst 0x45914863 // uaddwb z3.s, z3.s, z17.h\n"
+ ".inst 0x45914c42 // uaddwt z2.s, z2.s, z17.h\n"
+ ".inst 0x45904821 // uaddwb z1.s, z1.s, z16.h\n"
+ ".inst 0x45904c00 // uaddwt z0.s, z0.s, z16.h\n"
+ "bgt 2b\n"
+ "3:" // 4-vectors of channels: 2 inputs tail
+ ".inst 0x455e0bf7 // uaddlb z23.h, z31.b, z30.b\n"
+ ".inst 0x455e0ff6 // uaddlt z22.h, z31.b, z30.b\n"
+ ".inst 0x455c0bb5 // uaddlb z21.h, z29.b, z28.b\n"
+ ".inst 0x455c0fb4 // uaddlt z20.h, z29.b, z28.b\n"
+ ".inst 0x455a0b73 // uaddlb z19.h, z27.b, z26.b\n"
+ ".inst 0x455a0f72 // uaddlt z18.h, z27.b, z26.b\n"
+ ".inst 0x45580b31 // uaddlb z17.h, z25.b, z24.b\n"
+ ".inst 0x45580f30 // uaddlt z16.h, z25.b, z24.b\n"
+ ".inst 0x459749ef // uaddwb z15.s, z15.s, z23.h\n"
+ ".inst 0x45974dce // uaddwt z14.s, z14.s, z23.h\n"
+ ".inst 0x459649ad // uaddwb z13.s, z13.s, z22.h\n"
+ ".inst 0x45964d8c // uaddwt z12.s, z12.s, z22.h\n"
+ ".inst 0x4595496b // uaddwb z11.s, z11.s, z21.h\n"
+ ".inst 0x45954d4a // uaddwt z10.s, z10.s, z21.h\n"
+ ".inst 0x45944929 // uaddwb z9.s, z9.s, z20.h\n"
+ ".inst 0x45944d08 // uaddwt z8.s, z8.s, z20.h\n"
+ ".inst 0x459348e7 // uaddwb z7.s, z7.s, z19.h\n"
+ ".inst 0x45934cc6 // uaddwt z6.s, z6.s, z19.h\n"
+ ".inst 0x459248a5 // uaddwb z5.s, z5.s, z18.h\n"
+ ".inst 0x45924c84 // uaddwt z4.s, z4.s, z18.h\n"
+ ".inst 0x45914863 // uaddwb z3.s, z3.s, z17.h\n"
+ ".inst 0x45914c42 // uaddwt z2.s, z2.s, z17.h\n"
+ ".inst 0x45904821 // uaddwb z1.s, z1.s, z16.h\n"
+ ".inst 0x45904c00 // uaddwt z0.s, z0.s, z16.h\n"
+ "4:" // 4-vectors of channels: After loop
+ "ands x20, %x[n_valid_cells], #0x1\n"
+ "beq 6f\n"
+ "5:" // 4-vectors of channels: Single input loop
+ "ldr x21, [x19], #0x8\n"
+ "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+ ".inst 0x4508abf7 // ushllb z23.h, z31.b, #0x0\n"
+ ".inst 0x4508aff6 // ushllt z22.h, z31.b, #0x0\n"
+ "ld1b { z29.b }, p3/Z, [x21, x25]\n"
+ ".inst 0x4508abb5 // ushllb z21.h, z29.b, #0x0\n"
+ ".inst 0x4508afb4 // ushllt z20.h, z29.b, #0x0\n"
+ "subs x20, x20, #0x1\n"
+ "ld1b { z27.b }, p2/Z, [x21, x24]\n"
+ ".inst 0x4508ab73 // ushllb z19.h, z27.b, #0x0\n"
+ ".inst 0x4508af72 // ushllt z18.h, z27.b, #0x0\n"
+ "ld1b { z25.b }, p1/Z, [x21, x23]\n"
+ ".inst 0x4508ab31 // ushllb z17.h, z25.b, #0x0\n"
+ ".inst 0x4508af30 // ushllt z16.h, z25.b, #0x0\n"
+ ".inst 0x459749ef // uaddwb z15.s, z15.s, z23.h\n"
+ ".inst 0x45974dce // uaddwt z14.s, z14.s, z23.h\n"
+ ".inst 0x459649ad // uaddwb z13.s, z13.s, z22.h\n"
+ ".inst 0x45964d8c // uaddwt z12.s, z12.s, z22.h\n"
+ ".inst 0x4595496b // uaddwb z11.s, z11.s, z21.h\n"
+ ".inst 0x45954d4a // uaddwt z10.s, z10.s, z21.h\n"
+ ".inst 0x45944929 // uaddwb z9.s, z9.s, z20.h\n"
+ ".inst 0x45944d08 // uaddwt z8.s, z8.s, z20.h\n"
+ ".inst 0x459348e7 // uaddwb z7.s, z7.s, z19.h\n"
+ ".inst 0x45934cc6 // uaddwt z6.s, z6.s, z19.h\n"
+ ".inst 0x459248a5 // uaddwb z5.s, z5.s, z18.h\n"
+ ".inst 0x45924c84 // uaddwt z4.s, z4.s, z18.h\n"
+ ".inst 0x45914863 // uaddwb z3.s, z3.s, z17.h\n"
+ ".inst 0x45914c42 // uaddwt z2.s, z2.s, z17.h\n"
+ ".inst 0x45904821 // uaddwb z1.s, z1.s, z16.h\n"
+ ".inst 0x45904c00 // uaddwt z0.s, z0.s, z16.h\n"
+ "bgt 5b\n"
+ "6:" // 4-vectors of channels: Single input loop: End
+ "ld1rw { z17.s }, p0/Z, [%x[rescale_ptr]]\n"
+ ".inst 0x04b175ef // sqdmulh z15.s, z15.s, z17.s\n"
+ ".inst 0x04b175ce // sqdmulh z14.s, z14.s, z17.s\n"
+ ".inst 0x04b175ad // sqdmulh z13.s, z13.s, z17.s\n"
+ ".inst 0x04b1758c // sqdmulh z12.s, z12.s, z17.s\n"
+ "ld1rw { z16.s }, p0/Z, [%x[shift_ptr]]\n"
+ ".inst 0x04b1756b // sqdmulh z11.s, z11.s, z17.s\n"
+ ".inst 0x04b1754a // sqdmulh z10.s, z10.s, z17.s\n"
+ ".inst 0x04b17529 // sqdmulh z9.s, z9.s, z17.s\n"
+ ".inst 0x04b17508 // sqdmulh z8.s, z8.s, z17.s\n"
+ ".inst 0x04b174e7 // sqdmulh z7.s, z7.s, z17.s\n"
+ ".inst 0x04b174c6 // sqdmulh z6.s, z6.s, z17.s\n"
+ ".inst 0x04b174a5 // sqdmulh z5.s, z5.s, z17.s\n"
+ ".inst 0x04b17484 // sqdmulh z4.s, z4.s, z17.s\n"
+ ".inst 0x04b17463 // sqdmulh z3.s, z3.s, z17.s\n"
+ ".inst 0x04b17442 // sqdmulh z2.s, z2.s, z17.s\n"
+ ".inst 0x04b17421 // sqdmulh z1.s, z1.s, z17.s\n"
+ ".inst 0x04b17400 // sqdmulh z0.s, z0.s, z17.s\n"
+ ".inst 0x4482820f // srshl z15.s, p0/M, z15.s, z16.s\n"
+ ".inst 0x4482820e // srshl z14.s, p0/M, z14.s, z16.s\n"
+ ".inst 0x4482820d // srshl z13.s, p0/M, z13.s, z16.s\n"
+ ".inst 0x4482820c // srshl z12.s, p0/M, z12.s, z16.s\n"
+ ".inst 0x4482820b // srshl z11.s, p0/M, z11.s, z16.s\n"
+ ".inst 0x4482820a // srshl z10.s, p0/M, z10.s, z16.s\n"
+ ".inst 0x44828209 // srshl z9.s, p0/M, z9.s, z16.s\n"
+ ".inst 0x44828208 // srshl z8.s, p0/M, z8.s, z16.s\n"
+ ".inst 0x44828207 // srshl z7.s, p0/M, z7.s, z16.s\n"
+ ".inst 0x44828206 // srshl z6.s, p0/M, z6.s, z16.s\n"
+ ".inst 0x44828205 // srshl z5.s, p0/M, z5.s, z16.s\n"
+ ".inst 0x44828204 // srshl z4.s, p0/M, z4.s, z16.s\n"
+ ".inst 0x44828203 // srshl z3.s, p0/M, z3.s, z16.s\n"
+ ".inst 0x44828202 // srshl z2.s, p0/M, z2.s, z16.s\n"
+ ".inst 0x44828201 // srshl z1.s, p0/M, z1.s, z16.s\n"
+ ".inst 0x44828200 // srshl z0.s, p0/M, z0.s, z16.s\n"
+ "mov z16.s, #0x0\n"
+ "mov z19.s, #0xff\n"
+ "smax z15.s, p0/M, z15.s, z16.s\n"
+ "smax z14.s, p0/M, z14.s, z16.s\n"
+ "smax z13.s, p0/M, z13.s, z16.s\n"
+ "smax z12.s, p0/M, z12.s, z16.s\n"
+ "smax z11.s, p0/M, z11.s, z16.s\n"
+ "smax z10.s, p0/M, z10.s, z16.s\n"
+ "smax z9.s, p0/M, z9.s, z16.s\n"
+ "smax z8.s, p0/M, z8.s, z16.s\n"
+ "smax z7.s, p0/M, z7.s, z16.s\n"
+ "smax z6.s, p0/M, z6.s, z16.s\n"
+ "smax z5.s, p0/M, z5.s, z16.s\n"
+ "smax z4.s, p0/M, z4.s, z16.s\n"
+ "smax z3.s, p0/M, z3.s, z16.s\n"
+ "smax z2.s, p0/M, z2.s, z16.s\n"
+ "smax z1.s, p0/M, z1.s, z16.s\n"
+ "smax z0.s, p0/M, z0.s, z16.s\n"
+ "smin z15.s, p0/M, z15.s, z19.s\n"
+ "smin z14.s, p0/M, z14.s, z19.s\n"
+ "trn1 z23.h, z15.h, z14.h\n"
+ "smin z13.s, p0/M, z13.s, z19.s\n"
+ "smin z12.s, p0/M, z12.s, z19.s\n"
+ "trn1 z16.h, z13.h, z12.h\n"
+ "smin z11.s, p0/M, z11.s, z19.s\n"
+ "smin z10.s, p0/M, z10.s, z19.s\n"
+ "trn1 z22.h, z11.h, z10.h\n"
+ "smin z9.s, p0/M, z9.s, z19.s\n"
+ "smin z8.s, p0/M, z8.s, z19.s\n"
+ "trn1 z18.h, z9.h, z8.h\n"
+ "smin z7.s, p0/M, z7.s, z19.s\n"
+ "smin z6.s, p0/M, z6.s, z19.s\n"
+ "trn1 z21.h, z7.h, z6.h\n"
+ "smin z5.s, p0/M, z5.s, z19.s\n"
+ "smin z4.s, p0/M, z4.s, z19.s\n"
+ "trn1 z17.h, z5.h, z4.h\n"
+ "smin z3.s, p0/M, z3.s, z19.s\n"
+ "smin z2.s, p0/M, z2.s, z19.s\n"
+ "trn1 z20.h, z3.h, z2.h\n"
+ "smin z1.s, p0/M, z1.s, z19.s\n"
+ "smin z0.s, p0/M, z0.s, z19.s\n"
+ "trn1 z19.h, z1.h, z0.h\n"
+ "trn1 z16.b, z23.b, z16.b\n"
+ "trn1 z18.b, z22.b, z18.b\n"
+ "st1b { z16.b }, p4, [%x[outptr], x26]\n"
+ "incb x26, ALL, MUL #4\n"
+ "trn1 z17.b, z21.b, z17.b\n"
+ "trn1 z16.b, z20.b, z19.b\n"
+ "st1b { z18.b }, p3, [%x[outptr], x25]\n"
+ "incb x25, ALL, MUL #4\n"
+ "st1b { z17.b }, p2, [%x[outptr], x24]\n"
+ "incb x24, ALL, MUL #4\n"
+ "st1b { z16.b }, p1, [%x[outptr], x23]\n"
+ "incb x23, ALL, MUL #4\n"
+ "whilelt p1.b, x23, %x[n_channels]\n"
+ "b.any 1b\n"
+ "7:" // Single vector of channels
+ "whilelt p4.b, x26, %x[n_channels]\n"
+ "b.none 14f\n"
+ "8:" // Single vector of channels: Loop
+ "lsr x22, %x[n_valid_cells], #0x1\n"
+ "mov z15.s, #0x0\n"
+ "mov z14.s, #0x0\n"
+ "mov x19, %x[inptrs]\n"
+ "mov z13.s, #0x0\n"
+ "mov z12.s, #0x0\n"
+ "cbz x22, 11f\n"
+ "ldp x21, x20, [x19, #0x0]\n"
+ "subs x22, x22, #0x1\n"
+ "add x19, x19, #0x10\n"
+ "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+ "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+ "beq 10f\n"
+ "9:" // Single vector of channels: Loop: 2 inputs loop
+ ".inst 0x455e0bf7 // uaddlb z23.h, z31.b, z30.b\n"
+ ".inst 0x455e0ff6 // uaddlt z22.h, z31.b, z30.b\n"
+ "ldp x21, x20, [x19, #0x0]\n"
+ "subs x22, x22, #0x1\n"
+ ".inst 0x459749ef // uaddwb z15.s, z15.s, z23.h\n"
+ ".inst 0x45974dce // uaddwt z14.s, z14.s, z23.h\n"
+ "add x19, x19, #0x10\n"
+ "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+ ".inst 0x459649ad // uaddwb z13.s, z13.s, z22.h\n"
+ ".inst 0x45964d8c // uaddwt z12.s, z12.s, z22.h\n"
+ "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+ "bgt 9b\n"
+ "10:" // Single vector of channels: Loop: 2 inputs tail
+ ".inst 0x455e0bf7 // uaddlb z23.h, z31.b, z30.b\n"
+ ".inst 0x455e0ff6 // uaddlt z22.h, z31.b, z30.b\n"
+ ".inst 0x459749ef // uaddwb z15.s, z15.s, z23.h\n"
+ ".inst 0x45974dce // uaddwt z14.s, z14.s, z23.h\n"
+ ".inst 0x459649ad // uaddwb z13.s, z13.s, z22.h\n"
+ ".inst 0x45964d8c // uaddwt z12.s, z12.s, z22.h\n"
+ "11:" // Single vector of channels: Loop: After loop
+ "ands x20, %x[n_valid_cells], #0x1\n"
+ "beq 13f\n"
+ "12:" // Single vector of channels: Loop: Single input loop
+ "ldr x21, [x19], #0x8\n"
+ "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+ ".inst 0x4508abf7 // ushllb z23.h, z31.b, #0x0\n"
+ ".inst 0x4508aff6 // ushllt z22.h, z31.b, #0x0\n"
+ "subs x20, x20, #0x1\n"
+ ".inst 0x459749ef // uaddwb z15.s, z15.s, z23.h\n"
+ ".inst 0x45974dce // uaddwt z14.s, z14.s, z23.h\n"
+ ".inst 0x459649ad // uaddwb z13.s, z13.s, z22.h\n"
+ ".inst 0x45964d8c // uaddwt z12.s, z12.s, z22.h\n"
+ "bgt 12b\n"
+ "13:" // Single vector of channels: Loop: Single input loop: End
+ "ld1rw { z17.s }, p0/Z, [%x[rescale_ptr]]\n"
+ ".inst 0x04b175ef // sqdmulh z15.s, z15.s, z17.s\n"
+ ".inst 0x04b175ce // sqdmulh z14.s, z14.s, z17.s\n"
+ ".inst 0x04b175ad // sqdmulh z13.s, z13.s, z17.s\n"
+ ".inst 0x04b1758c // sqdmulh z12.s, z12.s, z17.s\n"
+ "ld1rw { z16.s }, p0/Z, [%x[shift_ptr]]\n"
+ ".inst 0x4482820f // srshl z15.s, p0/M, z15.s, z16.s\n"
+ ".inst 0x4482820e // srshl z14.s, p0/M, z14.s, z16.s\n"
+ ".inst 0x4482820d // srshl z13.s, p0/M, z13.s, z16.s\n"
+ ".inst 0x4482820c // srshl z12.s, p0/M, z12.s, z16.s\n"
+ "mov z16.s, #0x0\n"
+ "mov z19.s, #0xff\n"
+ "smax z15.s, p0/M, z15.s, z16.s\n"
+ "smax z14.s, p0/M, z14.s, z16.s\n"
+ "smax z13.s, p0/M, z13.s, z16.s\n"
+ "smax z12.s, p0/M, z12.s, z16.s\n"
+ "smin z15.s, p0/M, z15.s, z19.s\n"
+ "smin z14.s, p0/M, z14.s, z19.s\n"
+ "trn1 z23.h, z15.h, z14.h\n"
+ "smin z13.s, p0/M, z13.s, z19.s\n"
+ "smin z12.s, p0/M, z12.s, z19.s\n"
+ "trn1 z16.h, z13.h, z12.h\n"
+ "trn1 z16.b, z23.b, z16.b\n"
+ "st1b { z16.b }, p4, [%x[outptr], x26]\n"
+ "incb x26\n"
+ "whilelt p4.b, x26, %x[n_channels]\n"
+ "b.any 8b\n"
+ "14:" // End
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [outptr] "r" (outptr), [rescale_ptr] "r" (&rescale_value), [shift_ptr] "r" (&shift_value)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace pooling
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME)
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp
new file mode 100644
index 0000000..6d5f53d
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#pragma once
+
+namespace arm_conv {
+namespace pooling {
+
+void sme_u8_nhwc_max_2x2_s1_output2x2_depthfirst_impl(unsigned int, const uint8_t *const *const, uint8_t *const *const, bool, unsigned int, unsigned int, unsigned int, unsigned int);
+
+struct sme_u8_nhwc_max_2x2_s1_output2x2_depthfirst : public DepthfirstStrategy<uint8_t, uint8_t>
+{
+ using Parent = DepthfirstStrategy<uint8_t, uint8_t>;
+
+ const static auto pooling_type = PoolingType::MAX;
+ const static auto pool_rows = 2u, pool_cols = 2u;
+ const static auto stride_rows = 1u, stride_cols = 1u;
+
+ sme_u8_nhwc_max_2x2_s1_output2x2_depthfirst(const CPUInfo *)
+ : Parent(pool_rows, pool_cols, stride_rows, stride_cols, 2, 2) {}
+
+ Parent::KernelType get_kernel(void) const { return sme_u8_nhwc_max_2x2_s1_output2x2_depthfirst_impl; }
+};
+
+} // namespace pooling
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
new file mode 100644
index 0000000..d76755a
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
@@ -0,0 +1,148 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+
+#include <cstddef>
+#include <cstdint>
+
+#if defined(__ARM_FEATURE_SVE) && defined(ARM_COMPUTE_ENABLE_SME)
+
+namespace arm_conv {
+namespace pooling {
+
+void sme_u8_nhwc_max_2x2_s1_output2x2_depthfirst_impl(
+ const unsigned int n_channels,
+ const uint8_t *const *const inptrs,
+ uint8_t *const *const outptrs,
+ const bool exclude_padding,
+ const unsigned int pad_left,
+ const unsigned int pad_top,
+ const unsigned int pad_right,
+ const unsigned int pad_bottom
+)
+{
+ struct KernelArgs
+ {
+ const uint64_t n_channels;
+ const uint8_t *const *const inptrs;
+ uint8_t *const *const outptrs;
+ KernelArgs(
+ unsigned int channels,
+ const uint8_t *const *input_ptrs,
+ uint8_t *const * output_ptrs,
+ bool, unsigned int, unsigned int, unsigned int, unsigned int
+ ) : n_channels(channels),
+ inptrs(input_ptrs),
+ outptrs(output_ptrs)
+ {
+ }
+ };
+
+ const KernelArgs args(n_channels, inptrs, outptrs, exclude_padding,
+ pad_left, pad_top, pad_right, pad_bottom);
+
+ __asm__ __volatile__(
+ "ldr x20, [%x[args], %[offsetof_outptrs]]\n"
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "mov x14, #0x0\n"
+ "ptrue p2.b\n"
+ "ldr x19, [%x[args], %[offsetof_inptrs]]\n"
+ "mov x13, #0x0\n"
+ "ldr x12, [%x[args], %[offsetof_n_channels]]\n"
+ "whilelt p1.b, x14, x12\n"
+ "ldp x11, x10, [x20, #0x0]\n"
+ "ldp x9, x28, [x20, #0x10]\n"
+ "ldp x27, x26, [x19, #0x0]\n"
+ "ld1b { z29.b }, p1/Z, [x26, x14]\n"
+ "ldp x25, x24, [x19, #0x10]\n"
+ "ld1b { z28.b }, p1/Z, [x24, x14]\n"
+ "ldp x23, x22, [x19, #0x20]\n"
+ "ld1b { z27.b }, p1/Z, [x23, x14]\n"
+ "ldp x21, x20, [x19, #0x30]\n"
+ "ld1b { z26.b }, p1/Z, [x20, x14]\n"
+ "ldr x19, [x19, #0x40]\n"
+ "ld1b { z20.b }, p1/Z, [x27, x14]\n"
+ "ld1b { z25.b }, p1/Z, [x22, x14]\n"
+ "ld1b { z24.b }, p1/Z, [x25, x14]\n"
+ "ld1b { z23.b }, p1/Z, [x21, x14]\n"
+ "ld1b { z19.b }, p1/Z, [x19, x14]\n"
+ "incw x14\n"
+ "whilelt p1.b, x14, x12\n"
+ "b.none 2f\n"
+ "1:" // Vector: Loop
+ "movprfx z22, z29\n umax z22.b, p2/M, z22.b, z27.b\n"
+ "movprfx z21, z27\n umax z21.b, p2/M, z21.b, z26.b\n"
+ "ld1b { z29.b }, p1/Z, [x26, x14]\n"
+ "whilelt p0.b, x13, x12\n"
+ "movprfx z18, z28\n umax z18.b, p2/M, z18.b, z20.b\n"
+ "movprfx z20, z25\n umax z20.b, p2/M, z20.b, z24.b\n"
+ "ld1b { z27.b }, p1/Z, [x23, x14]\n"
+ "movprfx z17, z23\n umax z17.b, p2/M, z17.b, z28.b\n"
+ "movprfx z16, z25\n umax z16.b, p2/M, z16.b, z19.b\n"
+ "ld1b { z26.b }, p1/Z, [x20, x14]\n"
+ "ld1b { z28.b }, p1/Z, [x24, x14]\n"
+ "movprfx z19, z18\n umax z19.b, p2/M, z19.b, z22.b\n"
+ "movprfx z18, z22\n umax z18.b, p2/M, z18.b, z20.b\n"
+ "ld1b { z20.b }, p1/Z, [x27, x14]\n"
+ "umax z17.b, p2/M, z17.b, z21.b\n"
+ "umax z16.b, p2/M, z16.b, z21.b\n"
+ "ld1b { z25.b }, p1/Z, [x22, x14]\n"
+ "st1b { z19.b }, p0, [x11, x13]\n"
+ "ld1b { z24.b }, p1/Z, [x25, x14]\n"
+ "st1b { z18.b }, p0, [x10, x13]\n"
+ "ld1b { z23.b }, p1/Z, [x21, x14]\n"
+ "st1b { z17.b }, p0, [x9, x13]\n"
+ "ld1b { z19.b }, p1/Z, [x19, x14]\n"
+ "incw x14\n"
+ "whilelt p1.b, x14, x12\n"
+ "st1b { z16.b }, p0, [x28, x13]\n"
+ "incw x13\n"
+ "b.any 1b\n"
+ "2:" // Vector: Tail
+ "movprfx z22, z29\n umax z22.b, p2/M, z22.b, z27.b\n"
+ "movprfx z21, z27\n umax z21.b, p2/M, z21.b, z26.b\n"
+ "whilelt p0.b, x13, x12\n"
+ "movprfx z18, z28\n umax z18.b, p2/M, z18.b, z20.b\n"
+ "movprfx z20, z25\n umax z20.b, p2/M, z20.b, z24.b\n"
+ "movprfx z17, z23\n umax z17.b, p2/M, z17.b, z28.b\n"
+ "movprfx z16, z25\n umax z16.b, p2/M, z16.b, z19.b\n"
+ "movprfx z19, z18\n umax z19.b, p2/M, z19.b, z22.b\n"
+ "movprfx z18, z22\n umax z18.b, p2/M, z18.b, z20.b\n"
+ "st1b { z19.b }, p0, [x11, x13]\n"
+ "umax z17.b, p2/M, z17.b, z21.b\n"
+ "umax z16.b, p2/M, z16.b, z21.b\n"
+ "st1b { z18.b }, p0, [x10, x13]\n"
+ "st1b { z17.b }, p0, [x9, x13]\n"
+ "st1b { z16.b }, p0, [x28, x13]\n"
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [args] "r" (&args), [offsetof_inptrs] "I" (offsetof(KernelArgs, inptrs)), [offsetof_n_channels] "I" (offsetof(KernelArgs, n_channels)), [offsetof_outptrs] "I" (offsetof(KernelArgs, outptrs))
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x10", "x11", "x12", "x13", "x14", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace pooling
+} // namespace arm_conv
+
+#endif // defined(__ARM_FEATURE_SVE) && defined(ARM_COMPUTE_ENABLE_SME)
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_max_generic_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_max_generic_depthfirst.hpp
new file mode 100644
index 0000000..5c637ec
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_max_generic_depthfirst.hpp
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <cstdint>
+
+#pragma once
+
+namespace arm_conv {
+namespace pooling {
+
+void sme_u8_nhwc_max_generic_depthfirst_impl(const uint64_t, const uint64_t n_valid_cells, uint64_t n_channels, const uint8_t *const *const inptrs, uint8_t *outptr);
+
+struct sme_u8_nhwc_max_generic_depthfirst : IGenericDepthfirstStrategy<uint8_t, uint8_t>
+{
+ using Parent = IGenericDepthfirstStrategy<uint8_t, uint8_t>;
+ sme_u8_nhwc_max_generic_depthfirst(const CPUInfo *) {}
+ typename Parent::KernelType get_kernel(void) const override { return sme_u8_nhwc_max_generic_depthfirst_impl; }
+};
+
+} // namespace pooling
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_max_generic_depthfirst/generic.cpp
new file mode 100644
index 0000000..21af2eb
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_max_generic_depthfirst/generic.cpp
@@ -0,0 +1,224 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME)
+
+#include <cstdint>
+
+namespace arm_conv {
+namespace pooling {
+
+
+void sme_u8_nhwc_max_generic_depthfirst_impl(
+ const uint64_t,
+ const uint64_t n_valid_cells,
+ uint64_t n_channels,
+ const uint8_t *const *const inptrs,
+ uint8_t *outptr
+)
+{
+ __asm__ __volatile__(
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "mov x28, #0x0\n"
+ "cntb x27\n"
+ "cntb x26, ALL, MUL #2\n"
+ "cntb x25, ALL, MUL #3\n"
+ "whilelt p4.b, x28, %x[n_channels]\n"
+ "whilelt p3.b, x27, %x[n_channels]\n"
+ "whilelt p2.b, x26, %x[n_channels]\n"
+ "whilelt p1.b, x25, %x[n_channels]\n"
+ "ptrue p0.b\n"
+ "b.none 7f\n"
+ "1:" // 4-vectors of channels
+ "lsr x24, %x[n_valid_cells], #0x2\n"
+ "mov z4.b, #0x0\n"
+ "mov z3.b, #0x0\n"
+ "mov x19, %x[inptrs]\n"
+ "mov z2.b, #0x0\n"
+ "mov z1.b, #0x0\n"
+ "cbz x24, 4f\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "ld1b { z0.b }, p4/Z, [x23, x28]\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "add x19, x19, #0x20\n"
+ "ld1b { z31.b }, p4/Z, [x22, x28]\n"
+ "ld1b { z23.b }, p4/Z, [x21, x28]\n"
+ "ld1b { z30.b }, p4/Z, [x20, x28]\n"
+ "ld1b { z18.b }, p3/Z, [x23, x27]\n"
+ "ld1b { z29.b }, p3/Z, [x22, x27]\n"
+ "ld1b { z22.b }, p3/Z, [x21, x27]\n"
+ "ld1b { z28.b }, p3/Z, [x20, x27]\n"
+ "ld1b { z17.b }, p2/Z, [x23, x26]\n"
+ "ld1b { z27.b }, p2/Z, [x22, x26]\n"
+ "ld1b { z21.b }, p2/Z, [x21, x26]\n"
+ "ld1b { z26.b }, p2/Z, [x20, x26]\n"
+ "ld1b { z16.b }, p1/Z, [x23, x25]\n"
+ "ld1b { z25.b }, p1/Z, [x22, x25]\n"
+ "ld1b { z20.b }, p1/Z, [x21, x25]\n"
+ "ld1b { z24.b }, p1/Z, [x20, x25]\n"
+ "beq 3f\n"
+ "2:" // 4-vectors of channels: 4 inputs loop
+ "movprfx z19, z0\n umax z19.b, p0/M, z19.b, z31.b\n"
+ "umax z23.b, p0/M, z23.b, z30.b\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "umax z18.b, p0/M, z18.b, z29.b\n"
+ "umax z22.b, p0/M, z22.b, z28.b\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "add x19, x19, #0x20\n"
+ "umax z17.b, p0/M, z17.b, z27.b\n"
+ "umax z21.b, p0/M, z21.b, z26.b\n"
+ "ld1b { z0.b }, p4/Z, [x23, x28]\n"
+ "umax z16.b, p0/M, z16.b, z25.b\n"
+ "umax z20.b, p0/M, z20.b, z24.b\n"
+ "ld1b { z31.b }, p4/Z, [x22, x28]\n"
+ "umax z19.b, p0/M, z19.b, z23.b\n"
+ "umax z18.b, p0/M, z18.b, z22.b\n"
+ "ld1b { z23.b }, p4/Z, [x21, x28]\n"
+ "umax z17.b, p0/M, z17.b, z21.b\n"
+ "umax z16.b, p0/M, z16.b, z20.b\n"
+ "ld1b { z30.b }, p4/Z, [x20, x28]\n"
+ "umax z4.b, p0/M, z4.b, z19.b\n"
+ "umax z3.b, p0/M, z3.b, z18.b\n"
+ "ld1b { z18.b }, p3/Z, [x23, x27]\n"
+ "umax z2.b, p0/M, z2.b, z17.b\n"
+ "umax z1.b, p0/M, z1.b, z16.b\n"
+ "ld1b { z29.b }, p3/Z, [x22, x27]\n"
+ "ld1b { z22.b }, p3/Z, [x21, x27]\n"
+ "ld1b { z28.b }, p3/Z, [x20, x27]\n"
+ "ld1b { z17.b }, p2/Z, [x23, x26]\n"
+ "ld1b { z27.b }, p2/Z, [x22, x26]\n"
+ "ld1b { z21.b }, p2/Z, [x21, x26]\n"
+ "ld1b { z26.b }, p2/Z, [x20, x26]\n"
+ "ld1b { z16.b }, p1/Z, [x23, x25]\n"
+ "ld1b { z25.b }, p1/Z, [x22, x25]\n"
+ "ld1b { z20.b }, p1/Z, [x21, x25]\n"
+ "ld1b { z24.b }, p1/Z, [x20, x25]\n"
+ "bgt 2b\n"
+ "3:" // 4-vectors of channels: 4 inputs tail
+ "movprfx z19, z0\n umax z19.b, p0/M, z19.b, z31.b\n"
+ "umax z23.b, p0/M, z23.b, z30.b\n"
+ "umax z18.b, p0/M, z18.b, z29.b\n"
+ "umax z22.b, p0/M, z22.b, z28.b\n"
+ "umax z17.b, p0/M, z17.b, z27.b\n"
+ "umax z21.b, p0/M, z21.b, z26.b\n"
+ "umax z16.b, p0/M, z16.b, z25.b\n"
+ "umax z20.b, p0/M, z20.b, z24.b\n"
+ "umax z19.b, p0/M, z19.b, z23.b\n"
+ "umax z18.b, p0/M, z18.b, z22.b\n"
+ "umax z17.b, p0/M, z17.b, z21.b\n"
+ "umax z16.b, p0/M, z16.b, z20.b\n"
+ "umax z4.b, p0/M, z4.b, z19.b\n"
+ "umax z3.b, p0/M, z3.b, z18.b\n"
+ "umax z2.b, p0/M, z2.b, z17.b\n"
+ "umax z1.b, p0/M, z1.b, z16.b\n"
+ "4:" // 4-vectors of channels: After loop
+ "ands x20, %x[n_valid_cells], #0x3\n"
+ "beq 6f\n"
+ "5:" // 4-vectors of channels: Single input loop
+ "ldr x23, [x19], #0x8\n"
+ "ld1b { z0.b }, p4/Z, [x23, x28]\n"
+ "subs x20, x20, #0x1\n"
+ "umax z4.b, p0/M, z4.b, z0.b\n"
+ "ld1b { z18.b }, p3/Z, [x23, x27]\n"
+ "umax z3.b, p0/M, z3.b, z18.b\n"
+ "ld1b { z17.b }, p2/Z, [x23, x26]\n"
+ "umax z2.b, p0/M, z2.b, z17.b\n"
+ "ld1b { z16.b }, p1/Z, [x23, x25]\n"
+ "umax z1.b, p0/M, z1.b, z16.b\n"
+ "bgt 5b\n"
+ "6:" // 4-vectors of channels: Single input loop: End
+ "st1b { z4.b }, p4, [%x[outptr], x28]\n"
+ "incb x28, ALL, MUL #4\n"
+ "st1b { z3.b }, p3, [%x[outptr], x27]\n"
+ "incb x27, ALL, MUL #4\n"
+ "st1b { z2.b }, p2, [%x[outptr], x26]\n"
+ "incb x26, ALL, MUL #4\n"
+ "st1b { z1.b }, p1, [%x[outptr], x25]\n"
+ "incb x25, ALL, MUL #4\n"
+ "whilelt p1.b, x25, %x[n_channels]\n"
+ "b.any 1b\n"
+ "7:" // Single vector of channels
+ "whilelt p4.b, x28, %x[n_channels]\n"
+ "b.none 14f\n"
+ "8:" // Single vector of channels: Loop
+ "lsr x24, %x[n_valid_cells], #0x2\n"
+ "mov z4.b, #0x0\n"
+ "mov x19, %x[inptrs]\n"
+ "cbz x24, 11f\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "ld1b { z0.b }, p4/Z, [x23, x28]\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "add x19, x19, #0x20\n"
+ "ld1b { z31.b }, p4/Z, [x22, x28]\n"
+ "ld1b { z23.b }, p4/Z, [x21, x28]\n"
+ "ld1b { z30.b }, p4/Z, [x20, x28]\n"
+ "beq 10f\n"
+ "9:" // Single vector of channels: Loop: 4 inputs loop
+ "movprfx z19, z0\n umax z19.b, p0/M, z19.b, z31.b\n"
+ "umax z23.b, p0/M, z23.b, z30.b\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "umax z19.b, p0/M, z19.b, z23.b\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "umax z4.b, p0/M, z4.b, z19.b\n"
+ "add x19, x19, #0x20\n"
+ "ld1b { z0.b }, p4/Z, [x23, x28]\n"
+ "ld1b { z31.b }, p4/Z, [x22, x28]\n"
+ "ld1b { z23.b }, p4/Z, [x21, x28]\n"
+ "ld1b { z30.b }, p4/Z, [x20, x28]\n"
+ "bgt 9b\n"
+ "10:" // Single vector of channels: Loop: 4 inputs tail
+ "movprfx z19, z0\n umax z19.b, p0/M, z19.b, z31.b\n"
+ "umax z23.b, p0/M, z23.b, z30.b\n"
+ "umax z19.b, p0/M, z19.b, z23.b\n"
+ "umax z4.b, p0/M, z4.b, z19.b\n"
+ "11:" // Single vector of channels: Loop: After loop
+ "ands x20, %x[n_valid_cells], #0x3\n"
+ "beq 13f\n"
+ "12:" // Single vector of channels: Loop: Single input loop
+ "ldr x23, [x19], #0x8\n"
+ "ld1b { z0.b }, p4/Z, [x23, x28]\n"
+ "subs x20, x20, #0x1\n"
+ "umax z4.b, p0/M, z4.b, z0.b\n"
+ "bgt 12b\n"
+ "13:" // Single vector of channels: Loop: Single input loop: End
+ "st1b { z4.b }, p4, [%x[outptr], x28]\n"
+ "incb x28\n"
+ "whilelt p4.b, x28, %x[n_channels]\n"
+ "b.any 8b\n"
+ "14:" // End
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [outptr] "r" (outptr)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace pooling
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME)
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8q_nhwc_avg_generic_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8q_nhwc_avg_generic_depthfirst.hpp
new file mode 100644
index 0000000..2930993
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8q_nhwc_avg_generic_depthfirst.hpp
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <cstdint>
+
+#pragma once
+
+namespace arm_conv {
+namespace pooling {
+
+void sme_u8q_nhwc_avg_generic_depthfirst_impl(const uint64_t window_cells, const uint64_t n_valid_cells, uint64_t n_channels, const uint8_t *const *const inptrs, uint8_t *outptr, const Requantize32 &qp);
+
+struct sme_u8q_nhwc_avg_generic_depthfirst : IGenericDepthfirstStrategy<uint8_t, uint8_t, Requantize32>
+{
+ using Parent = IGenericDepthfirstStrategy<uint8_t, uint8_t, Requantize32>;
+ sme_u8q_nhwc_avg_generic_depthfirst(const CPUInfo *) {}
+ typename Parent::KernelType get_kernel(void) const override { return sme_u8q_nhwc_avg_generic_depthfirst_impl; }
+};
+
+} // namespace pooling
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8q_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8q_nhwc_avg_generic_depthfirst/generic.cpp
new file mode 100644
index 0000000..8a3cafa
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8q_nhwc_avg_generic_depthfirst/generic.cpp
@@ -0,0 +1,487 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME)
+
+#include "src/core/NEON/kernels/assembly/pooling.hpp"
+#include <cstdint>
+#include <cstring>
+#include <cmath>
+
+
+namespace arm_conv {
+namespace pooling {
+
+namespace {
+ struct RescaleParams
+ {
+ int32_t multiplier, shift;
+ };
+
+ constexpr RescaleParams rescale_params[8] = {
+ {0x40000000, -0}, // 1/2
+ {0x55555556, -1}, // 1/3
+ {0x40000000, -1}, // 1/4
+ {0x66666666, -2}, // 1/5
+ {0x55555556, -2}, // 1/6
+ {0x49249249, -2}, // 1/7
+ {0x40000000, -2}, // 1/8
+ {0x71c71c72, -3}, // 1/9
+ };
+}
+
+void sme_u8q_nhwc_avg_generic_depthfirst_impl(
+ const uint64_t window_cells,
+ const uint64_t n_valid_cells,
+ uint64_t n_channels,
+ const uint8_t *const *const inptrs,
+ uint8_t *outptr,
+ const Requantize32 &qp
+)
+{
+ if (n_valid_cells == 1 && window_cells == 1)
+ {
+ // In this case, simply copy from the input to the output
+ std::memcpy(outptr, *inptrs, n_channels);
+ return;
+ }
+
+ // Compute (or look up) the rescale values
+ int32_t shift_value = 0, rescale_value = 0;
+ if (2 <= window_cells && window_cells <= 9)
+ {
+ auto ¶ms = rescale_params[window_cells - 2];
+ rescale_value = params.multiplier;
+ shift_value = params.shift;
+ }
+ else
+ {
+ auto f_rescale_value = 1.0f / static_cast<float>(window_cells);
+
+ shift_value = 0;
+ while (f_rescale_value < 0.5f)
+ {
+ shift_value--;
+ f_rescale_value *= 2.0f;
+ }
+
+ rescale_value = static_cast<int32_t>(round(f_rescale_value * static_cast<float>(1ll << 31)));
+ if (static_cast<int64_t>(rescale_value) == (1ll << 31))
+ {
+ shift_value++;
+ rescale_value >>= 1;
+ }
+ }
+
+
+ // Initialise the accumulators such that the offsets are subtracted for all
+ // valid inputs.
+ const int32_t accumulator_init = -qp.input_offset * n_valid_cells;
+
+ // Combine together the rescale value for the requantization and the scaling
+ // factor for the average pool.
+ const int32_t shift = qp.per_layer_left_shift - qp.per_layer_right_shift + shift_value;
+ const int32_t left_shift = shift > 0 ? shift : 0;
+ const int32_t right_shift = shift <= 0 ? shift : 0;
+
+ int32_t combined_rescale_value = 0;
+ __asm__ __volatile__ (
+ "mov v16.s[0], %w[per_layer_mul]\n"
+ "mov v17.s[0], %w[rescale_value]\n"
+ "sqrdmulh s18, s16, s17\n"
+ "mov %w[combined_rescale_value], v18.s[0]\n"
+ : [combined_rescale_value] "=r" (combined_rescale_value)
+ : [per_layer_mul] "r" (qp.per_layer_mul), [rescale_value] "r" (rescale_value)
+ : "v16", "v17", "v18"
+ );
+
+ __asm__ __volatile__(
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "mov x26, #0x0\n"
+ "cntb x25\n"
+ "cntb x24, ALL, MUL #2\n"
+ "cntb x23, ALL, MUL #3\n"
+ "whilelt p4.b, x26, %x[n_channels]\n"
+ "whilelt p3.b, x25, %x[n_channels]\n"
+ "whilelt p2.b, x24, %x[n_channels]\n"
+ "whilelt p1.b, x23, %x[n_channels]\n"
+ "ptrue p0.b\n"
+ "b.none 7f\n"
+ "1:" // 4-vectors of channels
+ "ld1rw { z15.s }, p0/Z, [%x[accumulator_init]]\n"
+ "lsr x22, %x[n_valid_cells], #0x1\n"
+ "mov z14.d, z15.d\n"
+ "mov z13.d, z15.d\n"
+ "mov z12.d, z15.d\n"
+ "mov z11.d, z15.d\n"
+ "mov x19, %x[inptrs]\n"
+ "mov z10.d, z15.d\n"
+ "mov z9.d, z15.d\n"
+ "mov z8.d, z15.d\n"
+ "mov z7.d, z15.d\n"
+ "mov z6.d, z15.d\n"
+ "mov z5.d, z15.d\n"
+ "mov z4.d, z15.d\n"
+ "mov z3.d, z15.d\n"
+ "mov z2.d, z15.d\n"
+ "mov z1.d, z15.d\n"
+ "mov z0.d, z15.d\n"
+ "cbz x22, 4f\n"
+ "ldp x21, x20, [x19, #0x0]\n"
+ "subs x22, x22, #0x1\n"
+ "add x19, x19, #0x10\n"
+ "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+ "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+ "ld1b { z29.b }, p3/Z, [x21, x25]\n"
+ "ld1b { z28.b }, p3/Z, [x20, x25]\n"
+ "ld1b { z27.b }, p2/Z, [x21, x24]\n"
+ "ld1b { z26.b }, p2/Z, [x20, x24]\n"
+ "ld1b { z25.b }, p1/Z, [x21, x23]\n"
+ "ld1b { z24.b }, p1/Z, [x20, x23]\n"
+ "beq 3f\n"
+ "2:" // 4-vectors of channels: 2 inputs loop
+ ".inst 0x455e0bf7 // uaddlb z23.h, z31.b, z30.b\n"
+ ".inst 0x455e0ff6 // uaddlt z22.h, z31.b, z30.b\n"
+ "ldp x21, x20, [x19, #0x0]\n"
+ "subs x22, x22, #0x1\n"
+ ".inst 0x455c0bb5 // uaddlb z21.h, z29.b, z28.b\n"
+ ".inst 0x455c0fb4 // uaddlt z20.h, z29.b, z28.b\n"
+ "add x19, x19, #0x10\n"
+ "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+ ".inst 0x455a0b73 // uaddlb z19.h, z27.b, z26.b\n"
+ ".inst 0x455a0f72 // uaddlt z18.h, z27.b, z26.b\n"
+ "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+ ".inst 0x45580b31 // uaddlb z17.h, z25.b, z24.b\n"
+ ".inst 0x45580f30 // uaddlt z16.h, z25.b, z24.b\n"
+ "ld1b { z29.b }, p3/Z, [x21, x25]\n"
+ ".inst 0x459749ef // uaddwb z15.s, z15.s, z23.h\n"
+ ".inst 0x45974dce // uaddwt z14.s, z14.s, z23.h\n"
+ "ld1b { z28.b }, p3/Z, [x20, x25]\n"
+ ".inst 0x459649ad // uaddwb z13.s, z13.s, z22.h\n"
+ ".inst 0x45964d8c // uaddwt z12.s, z12.s, z22.h\n"
+ "ld1b { z27.b }, p2/Z, [x21, x24]\n"
+ ".inst 0x4595496b // uaddwb z11.s, z11.s, z21.h\n"
+ ".inst 0x45954d4a // uaddwt z10.s, z10.s, z21.h\n"
+ "ld1b { z26.b }, p2/Z, [x20, x24]\n"
+ ".inst 0x45944929 // uaddwb z9.s, z9.s, z20.h\n"
+ ".inst 0x45944d08 // uaddwt z8.s, z8.s, z20.h\n"
+ "ld1b { z25.b }, p1/Z, [x21, x23]\n"
+ ".inst 0x459348e7 // uaddwb z7.s, z7.s, z19.h\n"
+ ".inst 0x45934cc6 // uaddwt z6.s, z6.s, z19.h\n"
+ "ld1b { z24.b }, p1/Z, [x20, x23]\n"
+ ".inst 0x459248a5 // uaddwb z5.s, z5.s, z18.h\n"
+ ".inst 0x45924c84 // uaddwt z4.s, z4.s, z18.h\n"
+ ".inst 0x45914863 // uaddwb z3.s, z3.s, z17.h\n"
+ ".inst 0x45914c42 // uaddwt z2.s, z2.s, z17.h\n"
+ ".inst 0x45904821 // uaddwb z1.s, z1.s, z16.h\n"
+ ".inst 0x45904c00 // uaddwt z0.s, z0.s, z16.h\n"
+ "bgt 2b\n"
+ "3:" // 4-vectors of channels: 2 inputs tail
+ ".inst 0x455e0bf7 // uaddlb z23.h, z31.b, z30.b\n"
+ ".inst 0x455e0ff6 // uaddlt z22.h, z31.b, z30.b\n"
+ ".inst 0x455c0bb5 // uaddlb z21.h, z29.b, z28.b\n"
+ ".inst 0x455c0fb4 // uaddlt z20.h, z29.b, z28.b\n"
+ ".inst 0x455a0b73 // uaddlb z19.h, z27.b, z26.b\n"
+ ".inst 0x455a0f72 // uaddlt z18.h, z27.b, z26.b\n"
+ ".inst 0x45580b31 // uaddlb z17.h, z25.b, z24.b\n"
+ ".inst 0x45580f30 // uaddlt z16.h, z25.b, z24.b\n"
+ ".inst 0x459749ef // uaddwb z15.s, z15.s, z23.h\n"
+ ".inst 0x45974dce // uaddwt z14.s, z14.s, z23.h\n"
+ ".inst 0x459649ad // uaddwb z13.s, z13.s, z22.h\n"
+ ".inst 0x45964d8c // uaddwt z12.s, z12.s, z22.h\n"
+ ".inst 0x4595496b // uaddwb z11.s, z11.s, z21.h\n"
+ ".inst 0x45954d4a // uaddwt z10.s, z10.s, z21.h\n"
+ ".inst 0x45944929 // uaddwb z9.s, z9.s, z20.h\n"
+ ".inst 0x45944d08 // uaddwt z8.s, z8.s, z20.h\n"
+ ".inst 0x459348e7 // uaddwb z7.s, z7.s, z19.h\n"
+ ".inst 0x45934cc6 // uaddwt z6.s, z6.s, z19.h\n"
+ ".inst 0x459248a5 // uaddwb z5.s, z5.s, z18.h\n"
+ ".inst 0x45924c84 // uaddwt z4.s, z4.s, z18.h\n"
+ ".inst 0x45914863 // uaddwb z3.s, z3.s, z17.h\n"
+ ".inst 0x45914c42 // uaddwt z2.s, z2.s, z17.h\n"
+ ".inst 0x45904821 // uaddwb z1.s, z1.s, z16.h\n"
+ ".inst 0x45904c00 // uaddwt z0.s, z0.s, z16.h\n"
+ "4:" // 4-vectors of channels: After loop
+ "ands x20, %x[n_valid_cells], #0x1\n"
+ "beq 6f\n"
+ "5:" // 4-vectors of channels: Single input loop
+ "ldr x21, [x19], #0x8\n"
+ "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+ ".inst 0x4508abf7 // ushllb z23.h, z31.b, #0x0\n"
+ ".inst 0x4508aff6 // ushllt z22.h, z31.b, #0x0\n"
+ "ld1b { z29.b }, p3/Z, [x21, x25]\n"
+ ".inst 0x4508abb5 // ushllb z21.h, z29.b, #0x0\n"
+ ".inst 0x4508afb4 // ushllt z20.h, z29.b, #0x0\n"
+ "subs x20, x20, #0x1\n"
+ "ld1b { z27.b }, p2/Z, [x21, x24]\n"
+ ".inst 0x4508ab73 // ushllb z19.h, z27.b, #0x0\n"
+ ".inst 0x4508af72 // ushllt z18.h, z27.b, #0x0\n"
+ "ld1b { z25.b }, p1/Z, [x21, x23]\n"
+ ".inst 0x4508ab31 // ushllb z17.h, z25.b, #0x0\n"
+ ".inst 0x4508af30 // ushllt z16.h, z25.b, #0x0\n"
+ ".inst 0x459749ef // uaddwb z15.s, z15.s, z23.h\n"
+ ".inst 0x45974dce // uaddwt z14.s, z14.s, z23.h\n"
+ ".inst 0x459649ad // uaddwb z13.s, z13.s, z22.h\n"
+ ".inst 0x45964d8c // uaddwt z12.s, z12.s, z22.h\n"
+ ".inst 0x4595496b // uaddwb z11.s, z11.s, z21.h\n"
+ ".inst 0x45954d4a // uaddwt z10.s, z10.s, z21.h\n"
+ ".inst 0x45944929 // uaddwb z9.s, z9.s, z20.h\n"
+ ".inst 0x45944d08 // uaddwt z8.s, z8.s, z20.h\n"
+ ".inst 0x459348e7 // uaddwb z7.s, z7.s, z19.h\n"
+ ".inst 0x45934cc6 // uaddwt z6.s, z6.s, z19.h\n"
+ ".inst 0x459248a5 // uaddwb z5.s, z5.s, z18.h\n"
+ ".inst 0x45924c84 // uaddwt z4.s, z4.s, z18.h\n"
+ ".inst 0x45914863 // uaddwb z3.s, z3.s, z17.h\n"
+ ".inst 0x45914c42 // uaddwt z2.s, z2.s, z17.h\n"
+ ".inst 0x45904821 // uaddwb z1.s, z1.s, z16.h\n"
+ ".inst 0x45904c00 // uaddwt z0.s, z0.s, z16.h\n"
+ "bgt 5b\n"
+ "6:" // 4-vectors of channels: Single input loop: End
+ "ld1rw { z19.s }, p0/Z, [%x[left_shift]]\n"
+ ".inst 0x4482826f // srshl z15.s, p0/M, z15.s, z19.s\n"
+ ".inst 0x4482826e // srshl z14.s, p0/M, z14.s, z19.s\n"
+ "add x19, %x[quant_params], %[offsetof_qp_output_offset]\n"
+ ".inst 0x4482826d // srshl z13.s, p0/M, z13.s, z19.s\n"
+ ".inst 0x4482826c // srshl z12.s, p0/M, z12.s, z19.s\n"
+ "ld1rw { z18.s }, p0/Z, [%x[combined_rescale_value]]\n"
+ ".inst 0x4482826b // srshl z11.s, p0/M, z11.s, z19.s\n"
+ ".inst 0x4482826a // srshl z10.s, p0/M, z10.s, z19.s\n"
+ "ld1rw { z17.s }, p0/Z, [%x[right_shift]]\n"
+ ".inst 0x44828269 // srshl z9.s, p0/M, z9.s, z19.s\n"
+ ".inst 0x44828268 // srshl z8.s, p0/M, z8.s, z19.s\n"
+ "ld1rw { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x44828267 // srshl z7.s, p0/M, z7.s, z19.s\n"
+ ".inst 0x44828266 // srshl z6.s, p0/M, z6.s, z19.s\n"
+ ".inst 0x44828265 // srshl z5.s, p0/M, z5.s, z19.s\n"
+ ".inst 0x44828264 // srshl z4.s, p0/M, z4.s, z19.s\n"
+ ".inst 0x44828263 // srshl z3.s, p0/M, z3.s, z19.s\n"
+ ".inst 0x44828262 // srshl z2.s, p0/M, z2.s, z19.s\n"
+ ".inst 0x44828261 // srshl z1.s, p0/M, z1.s, z19.s\n"
+ ".inst 0x44828260 // srshl z0.s, p0/M, z0.s, z19.s\n"
+ ".inst 0x04b275ef // sqrdmulh z15.s, z15.s, z18.s\n"
+ ".inst 0x04b275ce // sqrdmulh z14.s, z14.s, z18.s\n"
+ ".inst 0x04b275ad // sqrdmulh z13.s, z13.s, z18.s\n"
+ ".inst 0x04b2758c // sqrdmulh z12.s, z12.s, z18.s\n"
+ ".inst 0x04b2756b // sqrdmulh z11.s, z11.s, z18.s\n"
+ ".inst 0x04b2754a // sqrdmulh z10.s, z10.s, z18.s\n"
+ ".inst 0x04b27529 // sqrdmulh z9.s, z9.s, z18.s\n"
+ ".inst 0x04b27508 // sqrdmulh z8.s, z8.s, z18.s\n"
+ ".inst 0x04b274e7 // sqrdmulh z7.s, z7.s, z18.s\n"
+ ".inst 0x04b274c6 // sqrdmulh z6.s, z6.s, z18.s\n"
+ ".inst 0x04b274a5 // sqrdmulh z5.s, z5.s, z18.s\n"
+ ".inst 0x04b27484 // sqrdmulh z4.s, z4.s, z18.s\n"
+ ".inst 0x04b27463 // sqrdmulh z3.s, z3.s, z18.s\n"
+ ".inst 0x04b27442 // sqrdmulh z2.s, z2.s, z18.s\n"
+ ".inst 0x04b27421 // sqrdmulh z1.s, z1.s, z18.s\n"
+ ".inst 0x04b27400 // sqrdmulh z0.s, z0.s, z18.s\n"
+ ".inst 0x4482822f // srshl z15.s, p0/M, z15.s, z17.s\n"
+ ".inst 0x4482822e // srshl z14.s, p0/M, z14.s, z17.s\n"
+ ".inst 0x4482822d // srshl z13.s, p0/M, z13.s, z17.s\n"
+ ".inst 0x4482822c // srshl z12.s, p0/M, z12.s, z17.s\n"
+ ".inst 0x4482822b // srshl z11.s, p0/M, z11.s, z17.s\n"
+ ".inst 0x4482822a // srshl z10.s, p0/M, z10.s, z17.s\n"
+ ".inst 0x44828229 // srshl z9.s, p0/M, z9.s, z17.s\n"
+ ".inst 0x44828228 // srshl z8.s, p0/M, z8.s, z17.s\n"
+ ".inst 0x44828227 // srshl z7.s, p0/M, z7.s, z17.s\n"
+ ".inst 0x44828226 // srshl z6.s, p0/M, z6.s, z17.s\n"
+ ".inst 0x44828225 // srshl z5.s, p0/M, z5.s, z17.s\n"
+ ".inst 0x44828224 // srshl z4.s, p0/M, z4.s, z17.s\n"
+ ".inst 0x44828223 // srshl z3.s, p0/M, z3.s, z17.s\n"
+ ".inst 0x44828222 // srshl z2.s, p0/M, z2.s, z17.s\n"
+ ".inst 0x44828221 // srshl z1.s, p0/M, z1.s, z17.s\n"
+ ".inst 0x44828220 // srshl z0.s, p0/M, z0.s, z17.s\n"
+ "add z15.s, z15.s, z16.s\n"
+ "add z14.s, z14.s, z16.s\n"
+ "add z13.s, z13.s, z16.s\n"
+ "add z12.s, z12.s, z16.s\n"
+ "add z11.s, z11.s, z16.s\n"
+ "add z10.s, z10.s, z16.s\n"
+ "add z9.s, z9.s, z16.s\n"
+ "add z8.s, z8.s, z16.s\n"
+ "add z7.s, z7.s, z16.s\n"
+ "add z6.s, z6.s, z16.s\n"
+ "add z5.s, z5.s, z16.s\n"
+ "add z4.s, z4.s, z16.s\n"
+ "add z3.s, z3.s, z16.s\n"
+ "add z2.s, z2.s, z16.s\n"
+ "add z1.s, z1.s, z16.s\n"
+ "add z0.s, z0.s, z16.s\n"
+ "mov z16.s, #0x0\n"
+ "mov z19.s, #0xff\n"
+ "smax z15.s, p0/M, z15.s, z16.s\n"
+ "smax z14.s, p0/M, z14.s, z16.s\n"
+ "smax z13.s, p0/M, z13.s, z16.s\n"
+ "smax z12.s, p0/M, z12.s, z16.s\n"
+ "smax z11.s, p0/M, z11.s, z16.s\n"
+ "smax z10.s, p0/M, z10.s, z16.s\n"
+ "smax z9.s, p0/M, z9.s, z16.s\n"
+ "smax z8.s, p0/M, z8.s, z16.s\n"
+ "smax z7.s, p0/M, z7.s, z16.s\n"
+ "smax z6.s, p0/M, z6.s, z16.s\n"
+ "smax z5.s, p0/M, z5.s, z16.s\n"
+ "smax z4.s, p0/M, z4.s, z16.s\n"
+ "smax z3.s, p0/M, z3.s, z16.s\n"
+ "smax z2.s, p0/M, z2.s, z16.s\n"
+ "smax z1.s, p0/M, z1.s, z16.s\n"
+ "smax z0.s, p0/M, z0.s, z16.s\n"
+ "smin z15.s, p0/M, z15.s, z19.s\n"
+ "smin z14.s, p0/M, z14.s, z19.s\n"
+ "trn1 z23.h, z15.h, z14.h\n"
+ "smin z13.s, p0/M, z13.s, z19.s\n"
+ "smin z12.s, p0/M, z12.s, z19.s\n"
+ "trn1 z16.h, z13.h, z12.h\n"
+ "smin z11.s, p0/M, z11.s, z19.s\n"
+ "smin z10.s, p0/M, z10.s, z19.s\n"
+ "trn1 z22.h, z11.h, z10.h\n"
+ "smin z9.s, p0/M, z9.s, z19.s\n"
+ "smin z8.s, p0/M, z8.s, z19.s\n"
+ "trn1 z18.h, z9.h, z8.h\n"
+ "smin z7.s, p0/M, z7.s, z19.s\n"
+ "smin z6.s, p0/M, z6.s, z19.s\n"
+ "trn1 z21.h, z7.h, z6.h\n"
+ "smin z5.s, p0/M, z5.s, z19.s\n"
+ "smin z4.s, p0/M, z4.s, z19.s\n"
+ "trn1 z17.h, z5.h, z4.h\n"
+ "smin z3.s, p0/M, z3.s, z19.s\n"
+ "smin z2.s, p0/M, z2.s, z19.s\n"
+ "trn1 z20.h, z3.h, z2.h\n"
+ "smin z1.s, p0/M, z1.s, z19.s\n"
+ "smin z0.s, p0/M, z0.s, z19.s\n"
+ "trn1 z19.h, z1.h, z0.h\n"
+ "trn1 z16.b, z23.b, z16.b\n"
+ "trn1 z18.b, z22.b, z18.b\n"
+ "st1b { z16.b }, p4, [%x[outptr], x26]\n"
+ "incb x26, ALL, MUL #4\n"
+ "trn1 z17.b, z21.b, z17.b\n"
+ "trn1 z16.b, z20.b, z19.b\n"
+ "st1b { z18.b }, p3, [%x[outptr], x25]\n"
+ "incb x25, ALL, MUL #4\n"
+ "st1b { z17.b }, p2, [%x[outptr], x24]\n"
+ "incb x24, ALL, MUL #4\n"
+ "st1b { z16.b }, p1, [%x[outptr], x23]\n"
+ "incb x23, ALL, MUL #4\n"
+ "whilelt p1.b, x23, %x[n_channels]\n"
+ "b.any 1b\n"
+ "7:" // Single vector of channels
+ "whilelt p4.b, x26, %x[n_channels]\n"
+ "b.none 14f\n"
+ "8:" // Single vector of channels: Loop
+ "ld1rw { z15.s }, p0/Z, [%x[accumulator_init]]\n"
+ "lsr x22, %x[n_valid_cells], #0x1\n"
+ "mov z14.d, z15.d\n"
+ "mov z13.d, z15.d\n"
+ "mov z12.d, z15.d\n"
+ "mov x19, %x[inptrs]\n"
+ "cbz x22, 11f\n"
+ "ldp x21, x20, [x19, #0x0]\n"
+ "subs x22, x22, #0x1\n"
+ "add x19, x19, #0x10\n"
+ "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+ "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+ "beq 10f\n"
+ "9:" // Single vector of channels: Loop: 2 inputs loop
+ ".inst 0x455e0bf7 // uaddlb z23.h, z31.b, z30.b\n"
+ ".inst 0x455e0ff6 // uaddlt z22.h, z31.b, z30.b\n"
+ "ldp x21, x20, [x19, #0x0]\n"
+ "subs x22, x22, #0x1\n"
+ ".inst 0x459749ef // uaddwb z15.s, z15.s, z23.h\n"
+ ".inst 0x45974dce // uaddwt z14.s, z14.s, z23.h\n"
+ "add x19, x19, #0x10\n"
+ "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+ ".inst 0x459649ad // uaddwb z13.s, z13.s, z22.h\n"
+ ".inst 0x45964d8c // uaddwt z12.s, z12.s, z22.h\n"
+ "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+ "bgt 9b\n"
+ "10:" // Single vector of channels: Loop: 2 inputs tail
+ ".inst 0x455e0bf7 // uaddlb z23.h, z31.b, z30.b\n"
+ ".inst 0x455e0ff6 // uaddlt z22.h, z31.b, z30.b\n"
+ ".inst 0x459749ef // uaddwb z15.s, z15.s, z23.h\n"
+ ".inst 0x45974dce // uaddwt z14.s, z14.s, z23.h\n"
+ ".inst 0x459649ad // uaddwb z13.s, z13.s, z22.h\n"
+ ".inst 0x45964d8c // uaddwt z12.s, z12.s, z22.h\n"
+ "11:" // Single vector of channels: Loop: After loop
+ "ands x20, %x[n_valid_cells], #0x1\n"
+ "beq 13f\n"
+ "12:" // Single vector of channels: Loop: Single input loop
+ "ldr x21, [x19], #0x8\n"
+ "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+ ".inst 0x4508abf7 // ushllb z23.h, z31.b, #0x0\n"
+ ".inst 0x4508aff6 // ushllt z22.h, z31.b, #0x0\n"
+ "subs x20, x20, #0x1\n"
+ ".inst 0x459749ef // uaddwb z15.s, z15.s, z23.h\n"
+ ".inst 0x45974dce // uaddwt z14.s, z14.s, z23.h\n"
+ ".inst 0x459649ad // uaddwb z13.s, z13.s, z22.h\n"
+ ".inst 0x45964d8c // uaddwt z12.s, z12.s, z22.h\n"
+ "bgt 12b\n"
+ "13:" // Single vector of channels: Loop: Single input loop: End
+ "ld1rw { z19.s }, p0/Z, [%x[left_shift]]\n"
+ ".inst 0x4482826f // srshl z15.s, p0/M, z15.s, z19.s\n"
+ ".inst 0x4482826e // srshl z14.s, p0/M, z14.s, z19.s\n"
+ "add x19, %x[quant_params], %[offsetof_qp_output_offset]\n"
+ ".inst 0x4482826d // srshl z13.s, p0/M, z13.s, z19.s\n"
+ ".inst 0x4482826c // srshl z12.s, p0/M, z12.s, z19.s\n"
+ "ld1rw { z18.s }, p0/Z, [%x[combined_rescale_value]]\n"
+ ".inst 0x04b275ef // sqrdmulh z15.s, z15.s, z18.s\n"
+ ".inst 0x04b275ce // sqrdmulh z14.s, z14.s, z18.s\n"
+ "ld1rw { z17.s }, p0/Z, [%x[right_shift]]\n"
+ ".inst 0x04b275ad // sqrdmulh z13.s, z13.s, z18.s\n"
+ ".inst 0x04b2758c // sqrdmulh z12.s, z12.s, z18.s\n"
+ "ld1rw { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x4482822f // srshl z15.s, p0/M, z15.s, z17.s\n"
+ ".inst 0x4482822e // srshl z14.s, p0/M, z14.s, z17.s\n"
+ ".inst 0x4482822d // srshl z13.s, p0/M, z13.s, z17.s\n"
+ ".inst 0x4482822c // srshl z12.s, p0/M, z12.s, z17.s\n"
+ "add z15.s, z15.s, z16.s\n"
+ "add z14.s, z14.s, z16.s\n"
+ "add z13.s, z13.s, z16.s\n"
+ "add z12.s, z12.s, z16.s\n"
+ "mov z16.s, #0x0\n"
+ "mov z19.s, #0xff\n"
+ "smax z15.s, p0/M, z15.s, z16.s\n"
+ "smax z14.s, p0/M, z14.s, z16.s\n"
+ "smax z13.s, p0/M, z13.s, z16.s\n"
+ "smax z12.s, p0/M, z12.s, z16.s\n"
+ "smin z15.s, p0/M, z15.s, z19.s\n"
+ "smin z14.s, p0/M, z14.s, z19.s\n"
+ "trn1 z23.h, z15.h, z14.h\n"
+ "smin z13.s, p0/M, z13.s, z19.s\n"
+ "smin z12.s, p0/M, z12.s, z19.s\n"
+ "trn1 z16.h, z13.h, z12.h\n"
+ "trn1 z16.b, z23.b, z16.b\n"
+ "st1b { z16.b }, p4, [%x[outptr], x26]\n"
+ "incb x26\n"
+ "whilelt p4.b, x26, %x[n_channels]\n"
+ "b.any 8b\n"
+ "14:" // End
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [accumulator_init] "r" (&accumulator_init), [combined_rescale_value] "r" (&combined_rescale_value), [inptrs] "r" (inptrs), [left_shift] "r" (&left_shift), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [offsetof_qp_output_offset] "I" (offsetof(Requantize32, output_offset)), [outptr] "r" (outptr), [quant_params] "r" (&qp), [right_shift] "r" (&right_shift)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace pooling
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME)
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8q_nhwc_max_generic_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8q_nhwc_max_generic_depthfirst.hpp
new file mode 100644
index 0000000..d7bf6cb
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8q_nhwc_max_generic_depthfirst.hpp
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <cstdint>
+
+#pragma once
+
+namespace arm_conv {
+namespace pooling {
+
+void sme_u8q_nhwc_max_generic_depthfirst_impl(const uint64_t, const uint64_t n_valid_cells, uint64_t n_channels, const uint8_t *const *const inptrs, uint8_t *outptr, const Requantize32 &qp);
+
+struct sme_u8q_nhwc_max_generic_depthfirst : IGenericDepthfirstStrategy<uint8_t, uint8_t, Requantize32>
+{
+ using Parent = IGenericDepthfirstStrategy<uint8_t, uint8_t, Requantize32>;
+ sme_u8q_nhwc_max_generic_depthfirst(const CPUInfo *) {}
+ typename Parent::KernelType get_kernel(void) const override { return sme_u8q_nhwc_max_generic_depthfirst_impl; }
+};
+
+} // namespace pooling
+} // namespace arm_conv
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8q_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8q_nhwc_max_generic_depthfirst/generic.cpp
new file mode 100644
index 0000000..7914e35
--- /dev/null
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8q_nhwc_max_generic_depthfirst/generic.cpp
@@ -0,0 +1,417 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if defined(ARM_COMPUTE_ENABLE_SME)
+
+#include "src/core/NEON/kernels/assembly/pooling.hpp"
+#include <cstdint>
+
+namespace arm_conv {
+namespace pooling {
+
+
+void sme_u8q_nhwc_max_generic_depthfirst_impl(
+ const uint64_t,
+ const uint64_t n_valid_cells,
+ uint64_t n_channels,
+ const uint8_t *const *const inptrs,
+ uint8_t *outptr,
+ const Requantize32 &qp
+)
+{
+ __asm__ __volatile__(
+ ".inst 0xd503477f // SMSTART ZA\n"
+ "mov x28, #0x0\n"
+ "cntb x27\n"
+ "cntb x26, ALL, MUL #2\n"
+ "cntb x25, ALL, MUL #3\n"
+ "whilelt p4.b, x28, %x[n_channels]\n"
+ "whilelt p3.b, x27, %x[n_channels]\n"
+ "whilelt p2.b, x26, %x[n_channels]\n"
+ "whilelt p1.b, x25, %x[n_channels]\n"
+ "ptrue p0.b\n"
+ "b.none 7f\n"
+ "1:" // 4-vectors of channels
+ "lsr x24, %x[n_valid_cells], #0x2\n"
+ "mov z5.b, #0x0\n"
+ "mov z3.b, #0x0\n"
+ "mov x19, %x[inptrs]\n"
+ "mov z2.b, #0x0\n"
+ "mov z1.b, #0x0\n"
+ "cbz x24, 4f\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "ld1b { z0.b }, p4/Z, [x23, x28]\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "add x19, x19, #0x20\n"
+ "ld1b { z31.b }, p4/Z, [x22, x28]\n"
+ "ld1b { z23.b }, p4/Z, [x21, x28]\n"
+ "ld1b { z30.b }, p4/Z, [x20, x28]\n"
+ "ld1b { z18.b }, p3/Z, [x23, x27]\n"
+ "ld1b { z29.b }, p3/Z, [x22, x27]\n"
+ "ld1b { z22.b }, p3/Z, [x21, x27]\n"
+ "ld1b { z28.b }, p3/Z, [x20, x27]\n"
+ "ld1b { z17.b }, p2/Z, [x23, x26]\n"
+ "ld1b { z27.b }, p2/Z, [x22, x26]\n"
+ "ld1b { z21.b }, p2/Z, [x21, x26]\n"
+ "ld1b { z26.b }, p2/Z, [x20, x26]\n"
+ "ld1b { z16.b }, p1/Z, [x23, x25]\n"
+ "ld1b { z25.b }, p1/Z, [x22, x25]\n"
+ "ld1b { z20.b }, p1/Z, [x21, x25]\n"
+ "ld1b { z24.b }, p1/Z, [x20, x25]\n"
+ "beq 3f\n"
+ "2:" // 4-vectors of channels: 4 inputs loop
+ "movprfx z19, z0\n umax z19.b, p0/M, z19.b, z31.b\n"
+ "umax z23.b, p0/M, z23.b, z30.b\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "umax z18.b, p0/M, z18.b, z29.b\n"
+ "umax z22.b, p0/M, z22.b, z28.b\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "add x19, x19, #0x20\n"
+ "umax z17.b, p0/M, z17.b, z27.b\n"
+ "umax z21.b, p0/M, z21.b, z26.b\n"
+ "ld1b { z0.b }, p4/Z, [x23, x28]\n"
+ "umax z16.b, p0/M, z16.b, z25.b\n"
+ "umax z20.b, p0/M, z20.b, z24.b\n"
+ "ld1b { z31.b }, p4/Z, [x22, x28]\n"
+ "umax z19.b, p0/M, z19.b, z23.b\n"
+ "umax z18.b, p0/M, z18.b, z22.b\n"
+ "ld1b { z23.b }, p4/Z, [x21, x28]\n"
+ "umax z17.b, p0/M, z17.b, z21.b\n"
+ "umax z16.b, p0/M, z16.b, z20.b\n"
+ "ld1b { z30.b }, p4/Z, [x20, x28]\n"
+ "umax z5.b, p0/M, z5.b, z19.b\n"
+ "umax z3.b, p0/M, z3.b, z18.b\n"
+ "ld1b { z18.b }, p3/Z, [x23, x27]\n"
+ "umax z2.b, p0/M, z2.b, z17.b\n"
+ "umax z1.b, p0/M, z1.b, z16.b\n"
+ "ld1b { z29.b }, p3/Z, [x22, x27]\n"
+ "ld1b { z22.b }, p3/Z, [x21, x27]\n"
+ "ld1b { z28.b }, p3/Z, [x20, x27]\n"
+ "ld1b { z17.b }, p2/Z, [x23, x26]\n"
+ "ld1b { z27.b }, p2/Z, [x22, x26]\n"
+ "ld1b { z21.b }, p2/Z, [x21, x26]\n"
+ "ld1b { z26.b }, p2/Z, [x20, x26]\n"
+ "ld1b { z16.b }, p1/Z, [x23, x25]\n"
+ "ld1b { z25.b }, p1/Z, [x22, x25]\n"
+ "ld1b { z20.b }, p1/Z, [x21, x25]\n"
+ "ld1b { z24.b }, p1/Z, [x20, x25]\n"
+ "bgt 2b\n"
+ "3:" // 4-vectors of channels: 4 inputs tail
+ "movprfx z19, z0\n umax z19.b, p0/M, z19.b, z31.b\n"
+ "umax z23.b, p0/M, z23.b, z30.b\n"
+ "umax z18.b, p0/M, z18.b, z29.b\n"
+ "umax z22.b, p0/M, z22.b, z28.b\n"
+ "umax z17.b, p0/M, z17.b, z27.b\n"
+ "umax z21.b, p0/M, z21.b, z26.b\n"
+ "umax z16.b, p0/M, z16.b, z25.b\n"
+ "umax z20.b, p0/M, z20.b, z24.b\n"
+ "umax z19.b, p0/M, z19.b, z23.b\n"
+ "umax z18.b, p0/M, z18.b, z22.b\n"
+ "umax z17.b, p0/M, z17.b, z21.b\n"
+ "umax z16.b, p0/M, z16.b, z20.b\n"
+ "umax z5.b, p0/M, z5.b, z19.b\n"
+ "umax z3.b, p0/M, z3.b, z18.b\n"
+ "umax z2.b, p0/M, z2.b, z17.b\n"
+ "umax z1.b, p0/M, z1.b, z16.b\n"
+ "4:" // 4-vectors of channels: After loop
+ "ands x20, %x[n_valid_cells], #0x3\n"
+ "beq 6f\n"
+ "5:" // 4-vectors of channels: Single input loop
+ "ldr x23, [x19], #0x8\n"
+ "ld1b { z0.b }, p4/Z, [x23, x28]\n"
+ "subs x20, x20, #0x1\n"
+ "umax z5.b, p0/M, z5.b, z0.b\n"
+ "ld1b { z18.b }, p3/Z, [x23, x27]\n"
+ "umax z3.b, p0/M, z3.b, z18.b\n"
+ "ld1b { z17.b }, p2/Z, [x23, x26]\n"
+ "umax z2.b, p0/M, z2.b, z17.b\n"
+ "ld1b { z16.b }, p1/Z, [x23, x25]\n"
+ "umax z1.b, p0/M, z1.b, z16.b\n"
+ "bgt 5b\n"
+ "6:" // 4-vectors of channels: Single input loop: End
+ "add x19, %x[quant_params], %[offsetof_qp_input_offset]\n"
+ "ld1rw { z4.s }, p0/Z, [x19]\n"
+ ".inst 0x4508a8b7 // ushllb z23.h, z5.b, #0x0\n"
+ ".inst 0x4508acb9 // ushllt z25.h, z5.b, #0x0\n"
+ ".inst 0x4508a876 // ushllb z22.h, z3.b, #0x0\n"
+ ".inst 0x4508ac72 // ushllt z18.h, z3.b, #0x0\n"
+ "add x19, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
+ "ld1rw { z3.s }, p0/Z, [x19]\n"
+ ".inst 0x4508a855 // ushllb z21.h, z2.b, #0x0\n"
+ ".inst 0x4508ac51 // ushllt z17.h, z2.b, #0x0\n"
+ "add x19, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
+ "ld1rw { z2.s }, p0/Z, [x19]\n"
+ ".inst 0x4508a834 // ushllb z20.h, z1.b, #0x0\n"
+ ".inst 0x4508ac38 // ushllt z24.h, z1.b, #0x0\n"
+ "add x19, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
+ "ld1rw { z19.s }, p0/Z, [x19]\n"
+ "neg z4.s, p0/M, z4.s\n"
+ ".inst 0x45974081 // saddwb z1.s, z4.s, z23.h\n"
+ "add x19, %x[quant_params], %[offsetof_qp_output_offset]\n"
+ "ld1rw { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x45974497 // saddwt z23.s, z4.s, z23.h\n"
+ ".inst 0x45994080 // saddwb z0.s, z4.s, z25.h\n"
+ ".inst 0x4599449f // saddwt z31.s, z4.s, z25.h\n"
+ ".inst 0x4596409e // saddwb z30.s, z4.s, z22.h\n"
+ ".inst 0x45964496 // saddwt z22.s, z4.s, z22.h\n"
+ ".inst 0x4592409d // saddwb z29.s, z4.s, z18.h\n"
+ ".inst 0x45924492 // saddwt z18.s, z4.s, z18.h\n"
+ ".inst 0x4595409c // saddwb z28.s, z4.s, z21.h\n"
+ ".inst 0x45954495 // saddwt z21.s, z4.s, z21.h\n"
+ ".inst 0x4591409b // saddwb z27.s, z4.s, z17.h\n"
+ ".inst 0x45914491 // saddwt z17.s, z4.s, z17.h\n"
+ ".inst 0x4594409a // saddwb z26.s, z4.s, z20.h\n"
+ ".inst 0x45944494 // saddwt z20.s, z4.s, z20.h\n"
+ ".inst 0x45984099 // saddwb z25.s, z4.s, z24.h\n"
+ ".inst 0x45984498 // saddwt z24.s, z4.s, z24.h\n"
+ ".inst 0x44828061 // srshl z1.s, p0/M, z1.s, z3.s\n"
+ ".inst 0x44828077 // srshl z23.s, p0/M, z23.s, z3.s\n"
+ ".inst 0x44828060 // srshl z0.s, p0/M, z0.s, z3.s\n"
+ ".inst 0x4482807f // srshl z31.s, p0/M, z31.s, z3.s\n"
+ ".inst 0x4482807e // srshl z30.s, p0/M, z30.s, z3.s\n"
+ ".inst 0x44828076 // srshl z22.s, p0/M, z22.s, z3.s\n"
+ ".inst 0x4482807d // srshl z29.s, p0/M, z29.s, z3.s\n"
+ ".inst 0x44828072 // srshl z18.s, p0/M, z18.s, z3.s\n"
+ ".inst 0x4482807c // srshl z28.s, p0/M, z28.s, z3.s\n"
+ ".inst 0x44828075 // srshl z21.s, p0/M, z21.s, z3.s\n"
+ ".inst 0x4482807b // srshl z27.s, p0/M, z27.s, z3.s\n"
+ ".inst 0x44828071 // srshl z17.s, p0/M, z17.s, z3.s\n"
+ ".inst 0x4482807a // srshl z26.s, p0/M, z26.s, z3.s\n"
+ ".inst 0x44828074 // srshl z20.s, p0/M, z20.s, z3.s\n"
+ ".inst 0x44828079 // srshl z25.s, p0/M, z25.s, z3.s\n"
+ ".inst 0x44828078 // srshl z24.s, p0/M, z24.s, z3.s\n"
+ ".inst 0x04a27421 // sqrdmulh z1.s, z1.s, z2.s\n"
+ ".inst 0x04a276f7 // sqrdmulh z23.s, z23.s, z2.s\n"
+ ".inst 0x04a27400 // sqrdmulh z0.s, z0.s, z2.s\n"
+ ".inst 0x04a277ff // sqrdmulh z31.s, z31.s, z2.s\n"
+ ".inst 0x04a277de // sqrdmulh z30.s, z30.s, z2.s\n"
+ ".inst 0x04a276d6 // sqrdmulh z22.s, z22.s, z2.s\n"
+ ".inst 0x04a277bd // sqrdmulh z29.s, z29.s, z2.s\n"
+ ".inst 0x04a27652 // sqrdmulh z18.s, z18.s, z2.s\n"
+ ".inst 0x04a2779c // sqrdmulh z28.s, z28.s, z2.s\n"
+ ".inst 0x04a276b5 // sqrdmulh z21.s, z21.s, z2.s\n"
+ ".inst 0x04a2777b // sqrdmulh z27.s, z27.s, z2.s\n"
+ ".inst 0x04a27631 // sqrdmulh z17.s, z17.s, z2.s\n"
+ ".inst 0x04a2775a // sqrdmulh z26.s, z26.s, z2.s\n"
+ ".inst 0x04a27694 // sqrdmulh z20.s, z20.s, z2.s\n"
+ ".inst 0x04a27739 // sqrdmulh z25.s, z25.s, z2.s\n"
+ ".inst 0x04a27718 // sqrdmulh z24.s, z24.s, z2.s\n"
+ ".inst 0x44828261 // srshl z1.s, p0/M, z1.s, z19.s\n"
+ ".inst 0x44828277 // srshl z23.s, p0/M, z23.s, z19.s\n"
+ ".inst 0x44828260 // srshl z0.s, p0/M, z0.s, z19.s\n"
+ ".inst 0x4482827f // srshl z31.s, p0/M, z31.s, z19.s\n"
+ ".inst 0x4482827e // srshl z30.s, p0/M, z30.s, z19.s\n"
+ ".inst 0x44828276 // srshl z22.s, p0/M, z22.s, z19.s\n"
+ ".inst 0x4482827d // srshl z29.s, p0/M, z29.s, z19.s\n"
+ ".inst 0x44828272 // srshl z18.s, p0/M, z18.s, z19.s\n"
+ ".inst 0x4482827c // srshl z28.s, p0/M, z28.s, z19.s\n"
+ ".inst 0x44828275 // srshl z21.s, p0/M, z21.s, z19.s\n"
+ ".inst 0x4482827b // srshl z27.s, p0/M, z27.s, z19.s\n"
+ ".inst 0x44828271 // srshl z17.s, p0/M, z17.s, z19.s\n"
+ ".inst 0x4482827a // srshl z26.s, p0/M, z26.s, z19.s\n"
+ ".inst 0x44828274 // srshl z20.s, p0/M, z20.s, z19.s\n"
+ ".inst 0x44828279 // srshl z25.s, p0/M, z25.s, z19.s\n"
+ ".inst 0x44828278 // srshl z24.s, p0/M, z24.s, z19.s\n"
+ "add z1.s, z1.s, z16.s\n"
+ "add z23.s, z23.s, z16.s\n"
+ "add z0.s, z0.s, z16.s\n"
+ "add z31.s, z31.s, z16.s\n"
+ "add z30.s, z30.s, z16.s\n"
+ "add z22.s, z22.s, z16.s\n"
+ "add z29.s, z29.s, z16.s\n"
+ "add z18.s, z18.s, z16.s\n"
+ "add z28.s, z28.s, z16.s\n"
+ "add z21.s, z21.s, z16.s\n"
+ "add z27.s, z27.s, z16.s\n"
+ "add z17.s, z17.s, z16.s\n"
+ "add z26.s, z26.s, z16.s\n"
+ "add z20.s, z20.s, z16.s\n"
+ "add z25.s, z25.s, z16.s\n"
+ "add z24.s, z24.s, z16.s\n"
+ "mov z16.s, #0x0\n"
+ "mov z19.s, #0xff\n"
+ "smax z1.s, p0/M, z1.s, z16.s\n"
+ "smax z23.s, p0/M, z23.s, z16.s\n"
+ "smax z0.s, p0/M, z0.s, z16.s\n"
+ "smax z31.s, p0/M, z31.s, z16.s\n"
+ "smax z30.s, p0/M, z30.s, z16.s\n"
+ "smax z22.s, p0/M, z22.s, z16.s\n"
+ "smax z29.s, p0/M, z29.s, z16.s\n"
+ "smax z18.s, p0/M, z18.s, z16.s\n"
+ "smax z28.s, p0/M, z28.s, z16.s\n"
+ "smax z21.s, p0/M, z21.s, z16.s\n"
+ "smax z27.s, p0/M, z27.s, z16.s\n"
+ "smax z17.s, p0/M, z17.s, z16.s\n"
+ "smax z26.s, p0/M, z26.s, z16.s\n"
+ "smax z20.s, p0/M, z20.s, z16.s\n"
+ "smax z25.s, p0/M, z25.s, z16.s\n"
+ "smax z24.s, p0/M, z24.s, z16.s\n"
+ "smin z1.s, p0/M, z1.s, z19.s\n"
+ "smin z23.s, p0/M, z23.s, z19.s\n"
+ "smin z0.s, p0/M, z0.s, z19.s\n"
+ "trn1 z23.h, z1.h, z23.h\n"
+ "smin z31.s, p0/M, z31.s, z19.s\n"
+ "smin z30.s, p0/M, z30.s, z19.s\n"
+ "trn1 z16.h, z0.h, z31.h\n"
+ "smin z22.s, p0/M, z22.s, z19.s\n"
+ "smin z29.s, p0/M, z29.s, z19.s\n"
+ "trn1 z22.h, z30.h, z22.h\n"
+ "smin z18.s, p0/M, z18.s, z19.s\n"
+ "smin z28.s, p0/M, z28.s, z19.s\n"
+ "trn1 z18.h, z29.h, z18.h\n"
+ "smin z21.s, p0/M, z21.s, z19.s\n"
+ "smin z27.s, p0/M, z27.s, z19.s\n"
+ "trn1 z21.h, z28.h, z21.h\n"
+ "smin z17.s, p0/M, z17.s, z19.s\n"
+ "smin z26.s, p0/M, z26.s, z19.s\n"
+ "trn1 z17.h, z27.h, z17.h\n"
+ "smin z20.s, p0/M, z20.s, z19.s\n"
+ "smin z25.s, p0/M, z25.s, z19.s\n"
+ "trn1 z20.h, z26.h, z20.h\n"
+ "smin z24.s, p0/M, z24.s, z19.s\n"
+ "trn1 z19.h, z25.h, z24.h\n"
+ "trn1 z16.b, z23.b, z16.b\n"
+ "trn1 z18.b, z22.b, z18.b\n"
+ "trn1 z17.b, z21.b, z17.b\n"
+ "st1b { z16.b }, p4, [%x[outptr], x28]\n"
+ "incb x28, ALL, MUL #4\n"
+ "trn1 z16.b, z20.b, z19.b\n"
+ "st1b { z18.b }, p3, [%x[outptr], x27]\n"
+ "incb x27, ALL, MUL #4\n"
+ "st1b { z17.b }, p2, [%x[outptr], x26]\n"
+ "incb x26, ALL, MUL #4\n"
+ "st1b { z16.b }, p1, [%x[outptr], x25]\n"
+ "incb x25, ALL, MUL #4\n"
+ "whilelt p1.b, x25, %x[n_channels]\n"
+ "b.any 1b\n"
+ "7:" // Single vector of channels
+ "whilelt p4.b, x28, %x[n_channels]\n"
+ "b.none 14f\n"
+ "8:" // Single vector of channels: Loop
+ "lsr x24, %x[n_valid_cells], #0x2\n"
+ "mov z5.b, #0x0\n"
+ "mov x19, %x[inptrs]\n"
+ "cbz x24, 11f\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "ld1b { z0.b }, p4/Z, [x23, x28]\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "add x19, x19, #0x20\n"
+ "ld1b { z31.b }, p4/Z, [x22, x28]\n"
+ "ld1b { z23.b }, p4/Z, [x21, x28]\n"
+ "ld1b { z30.b }, p4/Z, [x20, x28]\n"
+ "beq 10f\n"
+ "9:" // Single vector of channels: Loop: 4 inputs loop
+ "movprfx z19, z0\n umax z19.b, p0/M, z19.b, z31.b\n"
+ "umax z23.b, p0/M, z23.b, z30.b\n"
+ "ldp x23, x22, [x19, #0x0]\n"
+ "subs x24, x24, #0x1\n"
+ "umax z19.b, p0/M, z19.b, z23.b\n"
+ "ldp x21, x20, [x19, #0x10]\n"
+ "umax z5.b, p0/M, z5.b, z19.b\n"
+ "add x19, x19, #0x20\n"
+ "ld1b { z0.b }, p4/Z, [x23, x28]\n"
+ "ld1b { z31.b }, p4/Z, [x22, x28]\n"
+ "ld1b { z23.b }, p4/Z, [x21, x28]\n"
+ "ld1b { z30.b }, p4/Z, [x20, x28]\n"
+ "bgt 9b\n"
+ "10:" // Single vector of channels: Loop: 4 inputs tail
+ "movprfx z19, z0\n umax z19.b, p0/M, z19.b, z31.b\n"
+ "umax z23.b, p0/M, z23.b, z30.b\n"
+ "umax z19.b, p0/M, z19.b, z23.b\n"
+ "umax z5.b, p0/M, z5.b, z19.b\n"
+ "11:" // Single vector of channels: Loop: After loop
+ "ands x20, %x[n_valid_cells], #0x3\n"
+ "beq 13f\n"
+ "12:" // Single vector of channels: Loop: Single input loop
+ "ldr x23, [x19], #0x8\n"
+ "ld1b { z0.b }, p4/Z, [x23, x28]\n"
+ "subs x20, x20, #0x1\n"
+ "umax z5.b, p0/M, z5.b, z0.b\n"
+ "bgt 12b\n"
+ "13:" // Single vector of channels: Loop: Single input loop: End
+ "add x19, %x[quant_params], %[offsetof_qp_input_offset]\n"
+ "ld1rw { z4.s }, p0/Z, [x19]\n"
+ ".inst 0x4508a8b7 // ushllb z23.h, z5.b, #0x0\n"
+ ".inst 0x4508acb9 // ushllt z25.h, z5.b, #0x0\n"
+ "neg z4.s, p0/M, z4.s\n"
+ ".inst 0x45974081 // saddwb z1.s, z4.s, z23.h\n"
+ "add x19, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
+ "ld1rw { z3.s }, p0/Z, [x19]\n"
+ ".inst 0x45974497 // saddwt z23.s, z4.s, z23.h\n"
+ ".inst 0x45994080 // saddwb z0.s, z4.s, z25.h\n"
+ "add x19, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
+ "ld1rw { z2.s }, p0/Z, [x19]\n"
+ ".inst 0x4599449f // saddwt z31.s, z4.s, z25.h\n"
+ ".inst 0x44828061 // srshl z1.s, p0/M, z1.s, z3.s\n"
+ "add x19, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
+ "ld1rw { z19.s }, p0/Z, [x19]\n"
+ ".inst 0x44828077 // srshl z23.s, p0/M, z23.s, z3.s\n"
+ ".inst 0x44828060 // srshl z0.s, p0/M, z0.s, z3.s\n"
+ "add x19, %x[quant_params], %[offsetof_qp_output_offset]\n"
+ "ld1rw { z16.s }, p0/Z, [x19]\n"
+ ".inst 0x4482807f // srshl z31.s, p0/M, z31.s, z3.s\n"
+ ".inst 0x04a27421 // sqrdmulh z1.s, z1.s, z2.s\n"
+ ".inst 0x04a276f7 // sqrdmulh z23.s, z23.s, z2.s\n"
+ ".inst 0x04a27400 // sqrdmulh z0.s, z0.s, z2.s\n"
+ ".inst 0x04a277ff // sqrdmulh z31.s, z31.s, z2.s\n"
+ ".inst 0x44828261 // srshl z1.s, p0/M, z1.s, z19.s\n"
+ ".inst 0x44828277 // srshl z23.s, p0/M, z23.s, z19.s\n"
+ ".inst 0x44828260 // srshl z0.s, p0/M, z0.s, z19.s\n"
+ ".inst 0x4482827f // srshl z31.s, p0/M, z31.s, z19.s\n"
+ "add z1.s, z1.s, z16.s\n"
+ "add z23.s, z23.s, z16.s\n"
+ "add z0.s, z0.s, z16.s\n"
+ "add z31.s, z31.s, z16.s\n"
+ "mov z16.s, #0x0\n"
+ "mov z19.s, #0xff\n"
+ "smax z1.s, p0/M, z1.s, z16.s\n"
+ "smax z23.s, p0/M, z23.s, z16.s\n"
+ "smax z0.s, p0/M, z0.s, z16.s\n"
+ "smax z31.s, p0/M, z31.s, z16.s\n"
+ "smin z1.s, p0/M, z1.s, z19.s\n"
+ "smin z23.s, p0/M, z23.s, z19.s\n"
+ "smin z0.s, p0/M, z0.s, z19.s\n"
+ "trn1 z23.h, z1.h, z23.h\n"
+ "smin z31.s, p0/M, z31.s, z19.s\n"
+ "trn1 z16.h, z0.h, z31.h\n"
+ "trn1 z16.b, z23.b, z16.b\n"
+ "st1b { z16.b }, p4, [%x[outptr], x28]\n"
+ "incb x28\n"
+ "whilelt p4.b, x28, %x[n_channels]\n"
+ "b.any 8b\n"
+ "14:" // End
+ ".inst 0xd503467f // SMSTOP\n"
+ :
+ : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [offsetof_qp_input_offset] "I" (offsetof(Requantize32, input_offset)), [offsetof_qp_output_offset] "I" (offsetof(Requantize32, output_offset)), [offsetof_qp_per_layer_left_shift] "I" (offsetof(Requantize32, per_layer_left_shift)), [offsetof_qp_per_layer_mul] "I" (offsetof(Requantize32, per_layer_mul)), [offsetof_qp_per_layer_right_shift] "I" (offsetof(Requantize32, per_layer_right_shift)), [outptr] "r" (outptr), [quant_params] "r" (&qp)
+ : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+ );
+}
+
+} // namespace pooling
+} // namespace arm_conv
+
+#endif // defined(ARM_COMPUTE_ENABLE_SME)
diff --git a/src/core/NEON/kernels/arm_conv/pooling/pooling_fp16.cpp b/src/core/NEON/kernels/arm_conv/pooling/pooling_fp16.cpp
index e3ce652..a7f3dd3a 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/pooling_fp16.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/pooling_fp16.cpp
@@ -33,6 +33,12 @@
#include "kernels/cpp_nhwc_1x1_stride_any_depthfirst.hpp"
#if defined(__aarch64__)
+#if defined(ARM_COMPUTE_ENABLE_SME)
+#include "kernels/sme_fp16_nhwc_max_2x2_s1_output2x2_depthfirst.hpp"
+#include "kernels/sme_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp"
+#include "kernels/sme_fp16_nhwc_avg_generic_depthfirst.hpp"
+#include "kernels/sme_fp16_nhwc_max_generic_depthfirst.hpp"
+#endif // defined(ARM_COMPUTE_ENABLE_SME)
#if defined(ARM_COMPUTE_ENABLE_SVE)
#include "kernels/sve_fp16_nhwc_max_2x2_s1_output2x2_depthfirst.hpp"
#include "kernels/sve_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp"
@@ -62,6 +68,58 @@
},
},
#if defined(__aarch64__)
+#if defined(ARM_COMPUTE_ENABLE_SME)
+ {
+ PoolingMethod::DEPTHFIRST,
+ "sme_fp16_nhwc_max_2x2_s1_output2x2_depthfirst",
+ [] (const PoolingArgs &args, const Nothing &os) -> bool {
+ return args.cpu_info->has_sme() &&
+ is_supported<sme_fp16_nhwc_max_2x2_s1_output2x2_depthfirst>(args, os);
+ },
+ nullptr,
+ [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon<__fp16, __fp16> * {
+ auto strat = new sme_fp16_nhwc_max_2x2_s1_output2x2_depthfirst(args.cpu_info);
+ return new PoolingDepthfirst<__fp16>(strat, args);
+ },
+ },
+ {
+ PoolingMethod::DEPTHFIRST,
+ "sme_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst",
+ [] (const PoolingArgs &args, const Nothing &os) -> bool {
+ return args.cpu_info->has_sme() &&
+ is_supported<sme_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst>(args, os);
+ },
+ nullptr,
+ [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon<__fp16, __fp16> * {
+ auto strat = new sme_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst(args.cpu_info);
+ return new PoolingDepthfirst<__fp16>(strat, args);
+ },
+ },
+ {
+ PoolingMethod::DEPTHFIRST,
+ "sme_fp16_nhwc_avg_generic_depthfirst",
+ [] (const PoolingArgs &args, const Nothing &) -> bool {
+ return args.cpu_info->has_sme() && args.pool_type == PoolingType::AVERAGE;
+ },
+ nullptr,
+ [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon<__fp16, __fp16> * {
+ auto strat = new sme_fp16_nhwc_avg_generic_depthfirst(args.cpu_info);
+ return new PoolingDepthfirstGeneric<__fp16>(strat, args);
+ },
+ },
+ {
+ PoolingMethod::DEPTHFIRST,
+ "sme_fp16_nhwc_max_generic_depthfirst",
+ [] (const PoolingArgs &args, const Nothing &) -> bool {
+ return args.cpu_info->has_sme() && args.pool_type == PoolingType::MAX;
+ },
+ nullptr,
+ [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon<__fp16, __fp16> * {
+ auto strat = new sme_fp16_nhwc_max_generic_depthfirst(args.cpu_info);
+ return new PoolingDepthfirstGeneric<__fp16>(strat, args);
+ },
+ },
+#endif // defined(ARM_COMPUTE_ENABLE_SME)
#if defined(ARM_COMPUTE_ENABLE_SVE)
{
PoolingMethod::DEPTHFIRST,
diff --git a/src/core/NEON/kernels/arm_conv/pooling/pooling_fp32.cpp b/src/core/NEON/kernels/arm_conv/pooling/pooling_fp32.cpp
index 5ee0884..99d1065 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/pooling_fp32.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/pooling_fp32.cpp
@@ -30,6 +30,12 @@
#include "kernels/cpp_nhwc_1x1_stride_any_depthfirst.hpp"
#if defined(__aarch64__)
+#if defined(ARM_COMPUTE_ENABLE_SME)
+#include "kernels/sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst.hpp"
+#include "kernels/sme_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp"
+#include "kernels/sme_fp32_nhwc_avg_generic_depthfirst.hpp"
+#include "kernels/sme_fp32_nhwc_max_generic_depthfirst.hpp"
+#endif // defined(ARM_COMPUTE_ENABLE_SME)
#if defined(ARM_COMPUTE_ENABLE_SVE)
#include "kernels/sve_fp32_nhwc_max_2x2_s1_output2x2_depthfirst.hpp"
#include "kernels/sve_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp"
@@ -59,6 +65,58 @@
},
},
#if defined(__aarch64__)
+#if defined(ARM_COMPUTE_ENABLE_SME)
+ {
+ PoolingMethod::DEPTHFIRST,
+ "sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst",
+ [] (const PoolingArgs &args, const Nothing &os) -> bool {
+ return args.cpu_info->has_sme() &&
+ is_supported<sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst>(args, os);
+ },
+ nullptr,
+ [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon<float, float> * {
+ auto strat = new sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst(args.cpu_info);
+ return new PoolingDepthfirst<float>(strat, args);
+ },
+ },
+ {
+ PoolingMethod::DEPTHFIRST,
+ "sme_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst",
+ [] (const PoolingArgs &args, const Nothing &os) -> bool {
+ return args.cpu_info->has_sme() &&
+ is_supported<sme_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst>(args, os);
+ },
+ nullptr,
+ [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon<float, float> * {
+ auto strat = new sme_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst(args.cpu_info);
+ return new PoolingDepthfirst<float>(strat, args);
+ },
+ },
+ {
+ PoolingMethod::DEPTHFIRST,
+ "sme_fp32_nhwc_avg_generic_depthfirst",
+ [] (const PoolingArgs &args, const Nothing &) -> bool {
+ return args.cpu_info->has_sme() && args.pool_type == PoolingType::AVERAGE;
+ },
+ nullptr,
+ [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon<float, float> * {
+ auto strat = new sme_fp32_nhwc_avg_generic_depthfirst(args.cpu_info);
+ return new PoolingDepthfirstGeneric<float>(strat, args);
+ },
+ },
+ {
+ PoolingMethod::DEPTHFIRST,
+ "sme_fp32_nhwc_max_generic_depthfirst",
+ [] (const PoolingArgs &args, const Nothing &) -> bool {
+ return args.cpu_info->has_sme() && args.pool_type == PoolingType::MAX;
+ },
+ nullptr,
+ [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon<float, float> * {
+ auto strat = new sme_fp32_nhwc_max_generic_depthfirst(args.cpu_info);
+ return new PoolingDepthfirstGeneric<float>(strat, args);
+ },
+ },
+#endif // defined(ARM_COMPUTE_ENABLE_SME)
#if defined(ARM_COMPUTE_ENABLE_SVE)
{
PoolingMethod::DEPTHFIRST,
diff --git a/src/core/NEON/kernels/arm_conv/pooling/pooling_s8.cpp b/src/core/NEON/kernels/arm_conv/pooling/pooling_s8.cpp
index 0867abc..8d08ddc 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/pooling_s8.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/pooling_s8.cpp
@@ -30,6 +30,11 @@
#include "kernels/cpp_nhwc_1x1_stride_any_depthfirst.hpp"
#if defined(__aarch64__)
+#if defined(ARM_COMPUTE_ENABLE_SME)
+#include "kernels/sme_s8_nhwc_avg_generic_depthfirst.hpp"
+#include "kernels/sme_s8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp"
+#include "kernels/sme_s8_nhwc_max_generic_depthfirst.hpp"
+#endif // defined(ARM_COMPUTE_ENABLE_SME)
#if defined(ARM_COMPUTE_ENABLE_SVE)
#include "kernels/sve_s8_nhwc_avg_generic_depthfirst.hpp"
#include "kernels/sve_s8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp"
@@ -59,6 +64,45 @@
},
},
#if defined(__aarch64__)
+#if defined(ARM_COMPUTE_ENABLE_SME)
+ {
+ PoolingMethod::DEPTHFIRST,
+ "sme_s8_nhwc_max_2x2_s1_output2x2_depthfirst",
+ [] (const PoolingArgs &args, const Nothing &os) -> bool {
+ return args.cpu_info->has_sme() &&
+ is_supported<sme_s8_nhwc_max_2x2_s1_output2x2_depthfirst>(args, os);
+ },
+ nullptr,
+ [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon<int8_t, int8_t> * {
+ auto strat = new sme_s8_nhwc_max_2x2_s1_output2x2_depthfirst(args.cpu_info);
+ return new PoolingDepthfirst<int8_t>(strat, args);
+ },
+ },
+ {
+ PoolingMethod::DEPTHFIRST,
+ "sme_s8_nhwc_avg_generic_depthfirst",
+ [] (const PoolingArgs &args, const Nothing &) -> bool {
+ return args.cpu_info->has_sme2() && args.pool_type == PoolingType::AVERAGE;
+ },
+ nullptr,
+ [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon<int8_t, int8_t> * {
+ auto strat = new sme_s8_nhwc_avg_generic_depthfirst(args.cpu_info);
+ return new PoolingDepthfirstGeneric<int8_t>(strat, args);
+ },
+ },
+ {
+ PoolingMethod::DEPTHFIRST,
+ "sme_s8_nhwc_max_generic_depthfirst",
+ [] (const PoolingArgs &args, const Nothing &) -> bool {
+ return args.cpu_info->has_sme() && args.pool_type == PoolingType::MAX;
+ },
+ nullptr,
+ [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon<int8_t, int8_t> * {
+ auto strat = new sme_s8_nhwc_max_generic_depthfirst(args.cpu_info);
+ return new PoolingDepthfirstGeneric<int8_t>(strat, args);
+ },
+ },
+#endif // defined(ARM_COMPUTE_ENABLE_SME)
#if defined(ARM_COMPUTE_ENABLE_SVE)
{
PoolingMethod::DEPTHFIRST,
diff --git a/src/core/NEON/kernels/arm_conv/pooling/pooling_s8q.cpp b/src/core/NEON/kernels/arm_conv/pooling/pooling_s8q.cpp
index 6209f7c..dcb3c8f 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/pooling_s8q.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/pooling_s8q.cpp
@@ -28,6 +28,10 @@
#include "pooling_depthfirst_generic.hpp"
#if defined(__aarch64__)
+#if defined(ARM_COMPUTE_ENABLE_SME)
+#include "kernels/sme_s8q_nhwc_avg_generic_depthfirst.hpp"
+#include "kernels/sme_s8q_nhwc_max_generic_depthfirst.hpp"
+#endif // defined(ARM_COMPUTE_ENABLE_SME)
#if defined(ARM_COMPUTE_ENABLE_SVE)
#include "kernels/sve_s8q_nhwc_avg_generic_depthfirst.hpp"
#include "kernels/sve_s8q_nhwc_max_generic_depthfirst.hpp"
@@ -43,6 +47,32 @@
static const PoolingImplementation<int8_t, int8_t, Requantize32> pooling_s8q_methods[] = {
#if defined(__aarch64__)
+#if defined(ARM_COMPUTE_ENABLE_SME)
+ {
+ PoolingMethod::DEPTHFIRST,
+ "sme_s8q_nhwc_avg_generic_depthfirst",
+ [] (const PoolingArgs &args, const Requantize32 &) -> bool {
+ return args.cpu_info->has_sme2() && args.pool_type == PoolingType::AVERAGE;
+ },
+ nullptr,
+ [] (const PoolingArgs &args, const Requantize32 &rq) -> PoolingCommon<int8_t, int8_t> * {
+ auto strat = new sme_s8q_nhwc_avg_generic_depthfirst(args.cpu_info);
+ return new PoolingDepthfirstGeneric<int8_t, int8_t, Requantize32>(strat, args, rq);
+ },
+ },
+ {
+ PoolingMethod::DEPTHFIRST,
+ "sme_s8q_nhwc_max_generic_depthfirst",
+ [] (const PoolingArgs &args, const Requantize32 &) -> bool {
+ return args.cpu_info->has_sme2() && args.pool_type == PoolingType::MAX;
+ },
+ nullptr,
+ [] (const PoolingArgs &args, const Requantize32 &rq) -> PoolingCommon<int8_t, int8_t> * {
+ auto strat = new sme_s8q_nhwc_max_generic_depthfirst(args.cpu_info);
+ return new PoolingDepthfirstGeneric<int8_t, int8_t, Requantize32>(strat, args, rq);
+ },
+ },
+#endif // defined(ARM_COMPUTE_ENABLE_SME)
#if defined(ARM_COMPUTE_ENABLE_SVE)
{
PoolingMethod::DEPTHFIRST,
diff --git a/src/core/NEON/kernels/arm_conv/pooling/pooling_u8.cpp b/src/core/NEON/kernels/arm_conv/pooling/pooling_u8.cpp
index b0c908a..ee5a79b 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/pooling_u8.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/pooling_u8.cpp
@@ -30,6 +30,11 @@
#include "kernels/cpp_nhwc_1x1_stride_any_depthfirst.hpp"
#if defined(__aarch64__)
+#if defined(ARM_COMPUTE_ENABLE_SME)
+#include "kernels/sme_u8_nhwc_avg_generic_depthfirst.hpp"
+#include "kernels/sme_u8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp"
+#include "kernels/sme_u8_nhwc_max_generic_depthfirst.hpp"
+#endif // defined(ARM_COMPUTE_ENABLE_SME)
#if defined(ARM_COMPUTE_ENABLE_SVE)
#include "kernels/sve_u8_nhwc_avg_generic_depthfirst.hpp"
#include "kernels/sve_u8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp"
@@ -59,6 +64,52 @@
},
},
#if defined(__aarch64__)
+#if defined(ARM_COMPUTE_ENABLE_SME)
+ {
+ PoolingMethod::DEPTHFIRST,
+ "sme_u8_nhwc_max_2x2_s1_output2x2_depthfirst",
+ [] (const PoolingArgs &args, const Nothing &os) -> bool {
+ return args.cpu_info->has_sme() &&
+ is_supported<sme_u8_nhwc_max_2x2_s1_output2x2_depthfirst>(args, os);
+ },
+ nullptr,
+ [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon<uint8_t, uint8_t> * {
+ auto strat = new sme_u8_nhwc_max_2x2_s1_output2x2_depthfirst(args.cpu_info);
+ return new PoolingDepthfirst<uint8_t>(strat, args);
+ },
+ },
+ {
+ PoolingMethod::DEPTHFIRST,
+ "sme_u8_nhwc_avg_generic_depthfirst",
+ [] (const PoolingArgs &args, const Nothing &) -> bool {
+ // This kernel can only be used when there is either no padding, or we don't care
+ // about the value of the padding. Otherwise, we would need to pass in the zero-point
+ // for the quantization regime.
+ return (args.exclude_padding ||
+ (args.padding.top == 0 && args.padding.bottom == 0 &&
+ args.padding.left == 0 && args.padding.right == 0)
+ ) && args.pool_type == PoolingType::AVERAGE &&
+ args.cpu_info->has_sme2();
+ },
+ nullptr,
+ [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon<uint8_t, uint8_t> * {
+ auto strat = new sme_u8_nhwc_avg_generic_depthfirst(args.cpu_info);
+ return new PoolingDepthfirstGeneric<uint8_t>(strat, args);
+ },
+ },
+ {
+ PoolingMethod::DEPTHFIRST,
+ "sme_u8_nhwc_max_generic_depthfirst",
+ [] (const PoolingArgs &args, const Nothing &) -> bool {
+ return args.cpu_info->has_sme() && args.pool_type == PoolingType::MAX;
+ },
+ nullptr,
+ [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon<uint8_t, uint8_t> * {
+ auto strat = new sme_u8_nhwc_max_generic_depthfirst(args.cpu_info);
+ return new PoolingDepthfirstGeneric<uint8_t>(strat, args);
+ },
+ },
+#endif // defined(ARM_COMPUTE_ENABLE_SME)
#if defined(ARM_COMPUTE_ENABLE_SVE)
{
PoolingMethod::DEPTHFIRST,
diff --git a/src/core/NEON/kernels/arm_conv/pooling/pooling_u8q.cpp b/src/core/NEON/kernels/arm_conv/pooling/pooling_u8q.cpp
index de0420a..cd1b028 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/pooling_u8q.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/pooling_u8q.cpp
@@ -28,6 +28,10 @@
#include "pooling_depthfirst_generic.hpp"
#if defined(__aarch64__)
+#if defined(ARM_COMPUTE_ENABLE_SME)
+#include "kernels/sme_u8q_nhwc_avg_generic_depthfirst.hpp"
+#include "kernels/sme_u8q_nhwc_max_generic_depthfirst.hpp"
+#endif // defined(ARM_COMPUTE_ENABLE_SME)
#if defined(ARM_COMPUTE_ENABLE_SVE)
#include "kernels/sve_u8q_nhwc_avg_generic_depthfirst.hpp"
#include "kernels/sve_u8q_nhwc_max_generic_depthfirst.hpp"
@@ -43,6 +47,32 @@
static const PoolingImplementation<uint8_t, uint8_t, Requantize32> pooling_u8q_methods[] = {
#if defined(__aarch64__)
+#if defined(ARM_COMPUTE_ENABLE_SME)
+ {
+ PoolingMethod::DEPTHFIRST,
+ "sme_u8q_nhwc_avg_generic_depthfirst",
+ [] (const PoolingArgs &args, const Requantize32 &) -> bool {
+ return args.cpu_info->has_sme2() && args.pool_type == PoolingType::AVERAGE;
+ },
+ nullptr,
+ [] (const PoolingArgs &args, const Requantize32 &rq) -> PoolingCommon<uint8_t, uint8_t> * {
+ auto strat = new sme_u8q_nhwc_avg_generic_depthfirst(args.cpu_info);
+ return new PoolingDepthfirstGeneric<uint8_t, uint8_t, Requantize32>(strat, args, rq);
+ },
+ },
+ {
+ PoolingMethod::DEPTHFIRST,
+ "sme_u8q_nhwc_max_generic_depthfirst",
+ [] (const PoolingArgs &args, const Requantize32 &) -> bool {
+ return args.cpu_info->has_sme2() && args.pool_type == PoolingType::MAX;
+ },
+ nullptr,
+ [] (const PoolingArgs &args, const Requantize32 &rq) -> PoolingCommon<uint8_t, uint8_t> * {
+ auto strat = new sme_u8q_nhwc_max_generic_depthfirst(args.cpu_info);
+ return new PoolingDepthfirstGeneric<uint8_t, uint8_t, Requantize32>(strat, args, rq);
+ },
+ },
+#endif // defined(ARM_COMPUTE_ENABLE_SME)
#if defined(ARM_COMPUTE_ENABLE_SVE)
{
PoolingMethod::DEPTHFIRST,