COMPMID-2160: Implement Round for NEON
Change-Id: Ie80e2ad294eaf95bc823d979842c320e8fb41f67
Signed-off-by: Usama Arif <usama.arif@arm.com>
Reviewed-on: https://review.mlplatform.org/c/1215
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
diff --git a/arm_compute/core/NEON/NEMath.h b/arm_compute/core/NEON/NEMath.h
index 5c60d73..46d97f6 100644
--- a/arm_compute/core/NEON/NEMath.h
+++ b/arm_compute/core/NEON/NEMath.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016, 2017 ARM Limited.
+ * Copyright (c) 2016-2019 ARM Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -36,6 +36,14 @@
*/
float32x4_t vfloorq_f32(float32x4_t val);
+/** Calculate round value of a vector to nearest with ties to even.
+ *
+ * @param[in] val Input vector value in F32 format.
+ *
+ * @return The calculated round vector.
+ */
+float32x4_t vroundq_rte_f32(float32x4_t val);
+
/** Calculate inverse square root.
*
* @param[in] x Input value.
@@ -123,12 +131,20 @@
*
* @note We clamp x to [-5,5] to avoid overflowing issues.
*
- * @param[in] val Input vector value in F32 format.
+ * @param[in] val Input vector value in F16 format.
*
* @return The calculated Hyperbolic Tangent.
*/
float16x8_t vtanhq_f16(float16x8_t val);
+/** Calculate round value of a vector to nearest with ties to even.
+ *
+ * @param[in] val Input vector value in F16 format.
+ *
+ * @return The calculated round vector.
+ */
+float16x8_t vroundq_rte_f16(float16x8_t val);
+
/** Calculate reciprocal.
*
* @param[in] x Input value.
diff --git a/arm_compute/core/NEON/NEMath.inl b/arm_compute/core/NEON/NEMath.inl
index 27b4fc2..172aaef 100644
--- a/arm_compute/core/NEON/NEMath.inl
+++ b/arm_compute/core/NEON/NEMath.inl
@@ -65,6 +65,26 @@
return vbslq_f32(vcgtq_f32(r, val), vsubq_f32(r, CONST_1), r);
}
+inline float32x4_t vroundq_rte_f32(float32x4_t val)
+{
+#ifdef __aarch64__
+ return vrndnq_f32(val);
+#else // __aarch64__
+ static const float32x4_t CONST_HALF_FLOAT = vdupq_n_f32(0.5f);
+ static const float32x4_t CONST_1_FLOAT = vdupq_n_f32(1.f);
+ static const int32x4_t CONST_1_INT = vdupq_n_s32(1);
+ const float32x4_t floor_val = vfloorq_f32(val);
+ const float32x4_t diff = vsubq_f32(val, floor_val);
+
+ /*
+ * Select the floor value when (diff<0.5 || (diff==0.5 && floor_val%2==0).
+ * This condition is checked by vorrq_u32(vcltq_f32(diff, CONST_HALF_FLOAT) ,vandq_u32(vceqq_f32(diff, CONST_HALF_FLOAT) , vmvnq_u32(vtstq_s32(vandq_s32(vcvtq_s32_f32(floor_val), CONST_1_INT),CONST_1_INT))))
+ */
+
+ return vbslq_f32(vorrq_u32(vcltq_f32(diff, CONST_HALF_FLOAT) ,vandq_u32(vceqq_f32(diff, CONST_HALF_FLOAT) , vmvnq_u32(vtstq_s32(vandq_s32(vcvtq_s32_f32(floor_val), CONST_1_INT),CONST_1_INT)))), floor_val, vaddq_f32(floor_val, CONST_1_FLOAT));
+#endif // __aarch64__
+}
+
inline float32x2_t vinvsqrt_f32(float32x2_t x)
{
float32x2_t sqrt_reciprocal = vrsqrte_f32(x);
@@ -184,6 +204,12 @@
return vbslq_f16(vcgtq_f16(r, val), vsubq_f16(r, CONST_1), r);
}
+
+inline float16x8_t vroundq_rte_f16(float16x8_t val)
+{
+ return vrndnq_f16(val);
+}
+
inline float16x4_t vinvsqrt_f16(float16x4_t x)
{
float16x4_t sqrt_reciprocal = vrsqrte_f16(x);
diff --git a/arm_compute/core/NEON/wrapper/intrinsics/intrinsics.h b/arm_compute/core/NEON/wrapper/intrinsics/intrinsics.h
index 012f686..c9dbb2f 100644
--- a/arm_compute/core/NEON/wrapper/intrinsics/intrinsics.h
+++ b/arm_compute/core/NEON/wrapper/intrinsics/intrinsics.h
@@ -57,6 +57,7 @@
#include "arm_compute/core/NEON/wrapper/intrinsics/pmin.h"
#include "arm_compute/core/NEON/wrapper/intrinsics/pow.h"
#include "arm_compute/core/NEON/wrapper/intrinsics/rev64.h"
+#include "arm_compute/core/NEON/wrapper/intrinsics/round.h"
#include "arm_compute/core/NEON/wrapper/intrinsics/setlane.h"
#include "arm_compute/core/NEON/wrapper/intrinsics/store.h"
#include "arm_compute/core/NEON/wrapper/intrinsics/sub.h"
diff --git a/arm_compute/core/NEON/wrapper/intrinsics/round.h b/arm_compute/core/NEON/wrapper/intrinsics/round.h
new file mode 100644
index 0000000..da63bf6
--- /dev/null
+++ b/arm_compute/core/NEON/wrapper/intrinsics/round.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_WRAPPER_ROUND_H__
+#define __ARM_COMPUTE_WRAPPER_ROUND_H__
+
+#include "arm_compute/core/NEON/NEMath.h"
+#include <arm_neon.h>
+
+namespace arm_compute
+{
+namespace wrapper
+{
+#define VROUNDQ_IMPL(vtype, postfix) \
+ inline vtype vround(const vtype &a) \
+ { \
+ return vroundq_rte_##postfix(a); \
+ }
+
+VROUNDQ_IMPL(float32x4_t, f32)
+#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
+VROUNDQ_IMPL(float16x8_t, f16)
+#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
+#undef VROUNDQ_IMPL
+
+} // namespace wrapper
+} // namespace arm_compute
+#endif /* __ARM_COMPUTE_WRAPPER_ROUND_H__ */