COMPMID-934: Asymmetric padding support.

Change-Id: Ibe7a679e4c053a088b8c893e495c97cb24bf7272
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/121298
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
diff --git a/tests/datasets/PoolingLayerDataset.h b/tests/datasets/PoolingLayerDataset.h
index 56ec3b8..53e392f 100644
--- a/tests/datasets/PoolingLayerDataset.h
+++ b/tests/datasets/PoolingLayerDataset.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017 ARM Limited.
+ * Copyright (c) 2017-2018 ARM Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -105,6 +105,19 @@
     std::vector<TensorShape>      _dst_shapes{};
     std::vector<PoolingLayerInfo> _infos{};
 };
+
+// Special pooling dataset
+class PoolingLayerDatasetSpecial final : public PoolingLayerDataset
+{
+public:
+    PoolingLayerDatasetSpecial()
+    {
+        // Special cases
+        add_config(TensorShape(60U, 52U, 3U, 2U), TensorShape(13U, 11U, 32U), PoolingLayerInfo(PoolingType::AVG, Size2D(100, 100), PadStrideInfo(5, 5, 50, 50), true));
+        // Asymmetric padding
+        add_config(TensorShape(112U, 112U, 32U), TensorShape(56U, 56U, 32U), PoolingLayerInfo(PoolingType::MAX, 3, PadStrideInfo(2, 2, 0, 1, 0, 1, DimensionRoundingType::FLOOR)));
+    }
+};
 } // namespace datasets
 } // namespace test
 } // namespace arm_compute