COMPMID-1775: Implement CLGEMMReshapeRHSMatrixKernel to reshape the RHS matrix of GEMM/GEMMLowp
Change-Id: I77f2bfcc5d170bcc2428a2f27104942c1ec877d7
Reviewed-on: https://review.mlplatform.org/375
Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
diff --git a/arm_compute/core/CL/CLKernels.h b/arm_compute/core/CL/CLKernels.h
index 7bfd447..37b92f2 100644
--- a/arm_compute/core/CL/CLKernels.h
+++ b/arm_compute/core/CL/CLKernels.h
@@ -80,6 +80,7 @@
#include "arm_compute/core/CL/kernels/CLGEMMMatrixMultiplyKernel.h"
#include "arm_compute/core/CL/kernels/CLGEMMMatrixVectorMultiplyKernel.h"
#include "arm_compute/core/CL/kernels/CLGEMMReshapeLHSMatrixKernel.h"
+#include "arm_compute/core/CL/kernels/CLGEMMReshapeRHSMatrixKernel.h"
#include "arm_compute/core/CL/kernels/CLGEMMTranspose1xWKernel.h"
#include "arm_compute/core/CL/kernels/CLGaussian3x3Kernel.h"
#include "arm_compute/core/CL/kernels/CLGaussian5x5Kernel.h"
diff --git a/arm_compute/core/CL/kernels/CLGEMMReshapeRHSMatrixKernel.h b/arm_compute/core/CL/kernels/CLGEMMReshapeRHSMatrixKernel.h
new file mode 100644
index 0000000..611549a
--- /dev/null
+++ b/arm_compute/core/CL/kernels/CLGEMMReshapeRHSMatrixKernel.h
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2018 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_CLGEMMRESHAPERHSMATRIXKERNEL_H__
+#define __ARM_COMPUTE_CLGEMMRESHAPERHSMATRIXKERNEL_H__
+
+#include "arm_compute/core/CL/ICLKernel.h"
+
+namespace arm_compute
+{
+class ICLTensor;
+
+/** OpenCL kernel to reshape the RHS matrix when performing the matrix multiplication
+ * In particular, this kernel splits the input matrix in blocks of size K0xN0 and stores each one in
+ * the output matrix unrolling the values */
+class CLGEMMReshapeRHSMatrixKernel : public ICLKernel
+{
+public:
+ /** Default constructor */
+ CLGEMMReshapeRHSMatrixKernel();
+ /** Prevent instances of this class from being copied (As this class contains pointers) */
+ CLGEMMReshapeRHSMatrixKernel(const CLGEMMReshapeRHSMatrixKernel &) = delete;
+ /** Prevent instances of this class from being copied (As this class contains pointers) */
+ CLGEMMReshapeRHSMatrixKernel &operator=(const CLGEMMReshapeRHSMatrixKernel &) = delete;
+ /** Allow instances of this class to be moved */
+ CLGEMMReshapeRHSMatrixKernel(CLGEMMReshapeRHSMatrixKernel &&) = default;
+ /** Allow instances of this class to be moved */
+ CLGEMMReshapeRHSMatrixKernel &operator=(CLGEMMReshapeRHSMatrixKernel &&) = default;
+ /** Initialise the kernel's input and output.
+ *
+ * @param[in] input Input tensor. Data types supported: U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32
+ * @param[out] output Output tensor. Data type supported: same as @p input
+ * @param[in] rhs_info RHS matrix information to be used for reshaping. This object contains all the necessary
+ * information to reshape the input tensor. Only the following values are supported:
+ * rhs_info.n0: 2,4,8,16
+ * rhs_info.k0: 1,2,4,8,16 (k0 = 1 and k0 = 2 only if rhs_info.transpose = false)
+ * rhs_info.h0: greater than 0
+ * rhs_info.transpose: true, false
+ * rhs_info.interleave: true, false
+ */
+ void configure(const ICLTensor *input, ICLTensor *output, const GEMMRHSMatrixInfo &rhs_info);
+ /** Static function to check if given info will lead to a valid configuration of @ref CLGEMMReshapeRHSMatrixKernel
+ *
+ * @param[in] input Input tensor info. Data types supported: U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32
+ * @param[in] output Output tensor info which stores the interleaved matrix. Data type supported: same as @p input.
+ * @param[in] rhs_info RHS matrix information to be used for reshaping. This object contains all the necessary
+ * information to reshape the input tensor. Only the following values are supported:
+ * rhs_info.n0: 2,4,8,16
+ * rhs_info.k0: 1,2,4,8,16 (k0 = 1 and k0 = 2 only if rhs_info.transpose = false)
+ * rhs_info.h0: greater than 0
+ * rhs_info.transpose: true, false
+ * rhs_info.interleave: true, false
+ *
+ * @return a status
+ */
+ static Status validate(const ITensorInfo *input, const ITensorInfo *output, const GEMMRHSMatrixInfo &rhs_info);
+
+ // Inherited methods overridden
+ void run(const Window &window, cl::CommandQueue &queue) override;
+
+private:
+ const ICLTensor *_input;
+ ICLTensor *_output;
+};
+} // namespace arm_compute
+#endif /* __ARM_COMPUTE_CLGEMMRESHAPERHSMATRIXKERNEL_H__ */
\ No newline at end of file
diff --git a/arm_compute/core/Types.h b/arm_compute/core/Types.h
index 55b0ccb..6ef9878 100644
--- a/arm_compute/core/Types.h
+++ b/arm_compute/core/Types.h
@@ -1781,6 +1781,16 @@
bool interleave{ true }; /**< True if the v0 (m0xk0) blocks have to be interleaved in the output row */
};
+/** GEMM RHS (Right Hand Side) matrix information */
+struct GEMMRHSMatrixInfo
+{
+ unsigned int n0{ 1 }; /**< Number of columns processed by the matrix multiplication */
+ unsigned int k0{ 1 }; /**< Number of partial accumulations performed by the matrix multiplication */
+ unsigned int h0{ 1 }; /**< Number of horizontal blocks of size (k0xn0) stored on the same output row */
+ bool transpose{ true }; /**< True if the (k0xn0) block has to be transposed before been stored */
+ bool interleave{ true }; /**< True if the h0 (k0xn0) blocks have to be interleaved in the output row */
+};
+
/** GEMM information class. This class stores the necessary information to compute GEMM functions
*
* This object also contains the information about how matrix A and matrix B have been reshaped
diff --git a/arm_compute/core/utils/misc/ShapeCalculator.h b/arm_compute/core/utils/misc/ShapeCalculator.h
index 88ce8d9..33893ad 100644
--- a/arm_compute/core/utils/misc/ShapeCalculator.h
+++ b/arm_compute/core/utils/misc/ShapeCalculator.h
@@ -138,6 +138,34 @@
return lhs_shape;
}
+inline TensorShape compute_rhs_reshaped_shape(const ITensorInfo &a, const GEMMRHSMatrixInfo &rhs_info)
+{
+ ARM_COMPUTE_ERROR_ON(rhs_info.n0 == 0);
+ ARM_COMPUTE_ERROR_ON(rhs_info.k0 == 0);
+ ARM_COMPUTE_ERROR_ON(rhs_info.h0 == 0);
+
+ // Input width/height
+ const unsigned int input_width = a.dimension(0);
+ const unsigned int input_height = a.dimension(1);
+
+ // Number of horizontal/vertical blocks in the input tensor
+ const unsigned int num_horiz_blocks = std::ceil(input_width / static_cast<float>(rhs_info.n0));
+ const unsigned int num_vert_blocks = std::ceil(input_height / static_cast<float>(rhs_info.k0));
+
+ // Block size
+ const unsigned int block_size = rhs_info.n0 * rhs_info.k0;
+
+ // Output width/height
+ const unsigned int output_width = block_size * num_vert_blocks * rhs_info.h0;
+ const unsigned int output_height = std::ceil(num_horiz_blocks / static_cast<float>(rhs_info.h0));
+
+ TensorShape rhs_shape{ a.tensor_shape() };
+ rhs_shape.set(0, output_width);
+ rhs_shape.set(1, output_height);
+
+ return rhs_shape;
+}
+
inline TensorShape compute_interleaved_shape(const ITensorInfo &a, int mult_interleave4x4_height = 1, bool reinterpret_input_as_3d = false)
{
// The interleaved output matrix will have the following shape: [ a_height * W, ceil(a_width / W) ] where W = 4 * mult_interleave4x4_height