commit 51847d5dd9cad6bc81673642a01fd531def44311
author Giorgio Arena <giorgio.arena@arm.com> Tue Oct 19 15:45:57 2021 +0100
committer Sheri Zhang <sheri.zhang@arm.com> Wed Oct 20 15:54:24 2021 +0000
tree 1c5b79334d054141308c1e03e05749ac33ed5d34
parent 7a8cf1707e45ea011e0db5c0b3091c381ccd387f

Implement CLDirectConv3DKernel - uint8/int8

Resolve COMPMID-4663

Signed-off-by: Giorgio Arena <giorgio.arena@arm.com>
Change-Id: I5c3c1cffed5385c06b789543318f7f4d6096987e
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6468
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Sheri Zhang <sheri.zhang@arm.com>

docs/user_guide/operator_list.dox

diff --git a/docs/user_guide/operator_list.dox b/docs/user_guide/operator_list.dox
index 1d06a39..55bfe38 100644
--- a/docs/user_guide/operator_list.dox
+++ b/docs/user_guide/operator_list.dox
@@ -629,6 +629,8 @@
     <tr><th>src0<th>src1<th>src2<th>dst
     <tr><td>F16<td>F16<td>F16<td>F16
     <tr><td>F32<td>F32<td>F32<td>F32
+    <tr><td>QASYMM8<td>QASYMM8<td>S32<td>QASYMM8
+    <tr><td>QASYMM8_SIGNED<td>QASYMM8_SIGNED<td>S32<td>QASYMM8_SIGNED
     </table>
 <tr>
   <td rowspan="2">Copy