commit 5a4fe19c23729f1e58e947ed15e865dc33c35ff6
author Gian Marco Iodice <gianmarco.iodice@arm.com> Mon Mar 16 12:22:37 2020 +0000
committer Gian Marco Iodice <gianmarco.iodice@arm.com> Wed Apr 08 15:31:25 2020 +0000
tree 006c2253f3b674c33f2fc540bfb78efbb816317d
parent 11d4918b2321d1e590124f44dd68e6cda223dbdc

COMPMID-3112: Reworking heuristic for CLGEMM - part1

The new heuristic only affects the floating point execution

Change-Id: Ia6edc14ab1bdda4cee31b7afb096d0305d99b809
Signed-off-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/2942
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>

src/runtime/CL/gemm/CLGEMMKernelSelectionMidgard.cpp

diff --git a/src/runtime/CL/gemm/CLGEMMKernelSelectionMidgard.cpp b/src/runtime/CL/gemm/CLGEMMKernelSelectionMidgard.cpp
new file mode 100644
index 0000000..b7bb720
--- /dev/null
+++ b/src/runtime/CL/gemm/CLGEMMKernelSelectionMidgard.cpp
@@ -0,0 +1,95 @@
+/*
+ * Copyright (c) 2020 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#include "arm_compute/runtime/CL/gemm/CLGEMMKernelSelectionMidgard.h"
+
+#include "arm_compute/core/CL/CLHelpers.h"
+#include "arm_compute/core/CL/CLKernelLibrary.h"
+#include "arm_compute/core/CL/gemm/CLGEMMHelpers.h"
+#include "arm_compute/core/GPUTarget.h"
+
+#include <map>
+#include <utility>
+
+namespace arm_compute
+{
+namespace cl_gemm
+{
+CLGEMMKernelSelectionMidgard::CLGEMMKernelSelectionMidgard(GPUTarget gpu)
+    : ICLGEMMKernelSelection(gpu)
+{
+}
+
+CLGEMMKernelType CLGEMMKernelSelectionMidgard::select_kernel(const CLGEMMKernelSelectionParams &params)
+{
+    // _target could be used in the future to have a dedicated heuristic for each GPU IP
+    ARM_COMPUTE_UNUSED(_target);
+
+    using FunctionExecutorPtr = CLGEMMKernelType (CLGEMMKernelSelectionMidgard::*)(unsigned int m, unsigned int n, unsigned int k, bool is_rhs_constant);
+
+    // Configurations for Midgard architectures
+    static std::map<DataType, FunctionExecutorPtr> gemm_configs =
+    {
+        { DataType::F32, &CLGEMMKernelSelectionMidgard::default_f32 },
+        { DataType::F16, &CLGEMMKernelSelectionMidgard::default_f16 },
+        { DataType::QASYMM8, &CLGEMMKernelSelectionMidgard::default_q8 },
+        { DataType::QASYMM8_SIGNED, &CLGEMMKernelSelectionMidgard::default_q8 },
+        { DataType::QSYMM8, &CLGEMMKernelSelectionMidgard::default_q8 },
+        { DataType::QSYMM8_PER_CHANNEL, &CLGEMMKernelSelectionMidgard::default_q8 }
+    };
+
+    const DataType data_type = params.data_type;
+
+    if(gemm_configs.find(data_type) != gemm_configs.end())
+    {
+        return (this->*gemm_configs[data_type])(params.m, params.n, params.k, params.is_rhs_constant);
+    }
+
+    ARM_COMPUTE_ERROR("Not supported data type");
+}
+
+CLGEMMKernelType CLGEMMKernelSelectionMidgard::default_f32(unsigned int m, unsigned int n, unsigned int k, bool is_rhs_constant)
+{
+    ARM_COMPUTE_UNUSED(n, k);
+
+    // We reshape the matrices only if we do not have the vector-by-matrix case and we reshape the matrix B only once
+    return ((m != 1) && is_rhs_constant) ? CLGEMMKernelType::RESHAPED_V1 : CLGEMMKernelType::NATIVE_V1;
+}
+
+CLGEMMKernelType CLGEMMKernelSelectionMidgard::default_f16(unsigned int m, unsigned int n, unsigned int k, bool is_rhs_constant)
+{
+    ARM_COMPUTE_UNUSED(n, k);
+
+    // We reshape the matrices only if we do not have the vector-by-matrix case and we reshape the matrix B only once
+    return ((m != 1) && is_rhs_constant) ? CLGEMMKernelType::RESHAPED_V1 : CLGEMMKernelType::NATIVE_V1;
+}
+
+CLGEMMKernelType CLGEMMKernelSelectionMidgard::default_q8(unsigned int m, unsigned int n, unsigned int k, bool is_rhs_constant)
+{
+    ARM_COMPUTE_UNUSED(n, k);
+
+    // We reshape the matrices only if we do not have the vector-by-matrix case and we reshape the matrix B only once
+    return ((m != 1) && is_rhs_constant) ? CLGEMMKernelType::RESHAPED_V1 : CLGEMMKernelType::NATIVE_V1;
+}
+} // namespace cl_gemm
+} // namespace arm_compute