commit 5ae8d804d67f57fbfa793800ddcc21a5aff954dd
author Giorgio Arena <giorgio.arena@arm.com> Thu Nov 18 18:02:13 2021 +0000
committer Yair Schwarzbaum <yair.schwarzbaum@arm.com> Wed Jan 12 06:52:04 2022 +0000
tree 1defbe7f788645f6f0fb4c3f79be6c4b8ecfb709
parent 3475ffe40b7db99c782cbaf351aa7b4e341562ef

Enable kernel selection testing (Phase #1)

Change-Id: I1d65fb9d3a7583cf8d4163ca7c0fbee27dc52633
Signed-off-by: Yair Schwarzbaum <yair.schwarzbaum@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6767
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>

src/core/CPP/CPPTypes.cpp

diff --git a/src/core/CPP/CPPTypes.cpp b/src/core/CPP/CPPTypes.cpp
index 44cd000..c197932 100644
--- a/src/core/CPP/CPPTypes.cpp
+++ b/src/core/CPP/CPPTypes.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2021 Arm Limited.
+ * Copyright (c) 2018-2022 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -26,6 +26,7 @@
 
 #include "arm_compute/core/Error.h"
 #include "src/common/cpuinfo/CpuInfo.h"
+#include "src/common/cpuinfo/CpuIsaInfo.h"
 
 namespace arm_compute
 {
@@ -110,6 +111,11 @@
     return _impl->info.cpu_model(cpuid);
 }
 
+cpuinfo::CpuIsaInfo CPUInfo::get_isa() const
+{
+    return _impl->info.isa();
+}
+
 unsigned int CPUInfo::get_L1_cache_size() const
 {
     return _impl->L1_cache_size;