commit 5bf441260da09d10b72d77014addeb65b9e139f7
author Teresa Charlin <teresa.charlinreyes@arm.com> Mon Jan 18 10:28:12 2021 +0000
committer TeresaARM <teresa.charlinreyes@arm.com> Tue Jan 19 09:46:24 2021 +0000
tree b7ca832c2b361737b7a8b86d41b2ad8f2a9a267b
parent 61ba0697756af0e4dc191af158669af0cee2be79

LOGICAL_NOT fail

Explicitly cast scalar to vector for LOGICAL_NOT

Related with COMPUTE-12536 and IVGCVSW-5617

Change-Id: I03accce000f8889fc4fb88c42c3c87845acb4f42
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4874
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>

src/core/CL/cl_kernels/elementwise_unary.cl

diff --git a/src/core/CL/cl_kernels/elementwise_unary.cl b/src/core/CL/cl_kernels/elementwise_unary.cl
index 63594ae..d2d9d97 100644
--- a/src/core/CL/cl_kernels/elementwise_unary.cl
+++ b/src/core/CL/cl_kernels/elementwise_unary.cl
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2020 Arm Limited.
+ * Copyright (c) 2018-2021 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -40,8 +40,9 @@
 #define natural_log_op(input) log(input)
 // Calculate round (Cannot use round function as it rounds halfway cases away from zero).
 #if defined(VEC_SIZE)
-#define round_op(input) CONVERT(CONVERT_SAT_ROUND(input, VEC_DATA_TYPE(int, VEC_SIZE), rte), VEC_DATA_TYPE(DATA_TYPE, VEC_SIZE))
-#define logical_not_op(input) CONVERT((!input) & 0x1, VEC_DATA_TYPE(DATA_TYPE, VEC_SIZE))
+#define VEC_TYPE VEC_DATA_TYPE(DATA_TYPE, VEC_SIZE)
+#define round_op(input) CONVERT(CONVERT_SAT_ROUND(input, VEC_DATA_TYPE(int, VEC_SIZE), rte), VEC_TYPE)
+#define logical_not_op(input) CONVERT(CONVERT(!input, VEC_TYPE) & ((VEC_TYPE)0x1), VEC_TYPE)
 #else // defined(VEC_SIZE)
 #define round_op(input) CONVERT(CONVERT_SAT_ROUND(input, int, rte), DATA_TYPE)
 #define logical_not_op(input) ((!input) & 0x1)