COMPMID-3176: Remove padding from NEArithmeticSubtractionKernel
COMPMID-3487: Refactor NEArithmeticSubtractionKernel
Refactored code in order to remove paddings. This resulted in
a big increase in libary size so after some rework the total size
dropped by 4Kb.
Change-Id: I4e3014c2ae49c29c6090b195ea16620afcf6c09f
Signed-off-by: Michalis Spyrou <michalis.spyrou@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/3206
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
diff --git a/arm_compute/core/NEON/wrapper/intrinsics/sub.h b/arm_compute/core/NEON/wrapper/intrinsics/sub.h
index 2c6c961..f46b57c 100644
--- a/arm_compute/core/NEON/wrapper/intrinsics/sub.h
+++ b/arm_compute/core/NEON/wrapper/intrinsics/sub.h
@@ -64,6 +64,7 @@
#undef VSUB_IMPL
+// VQSUB: Vector saturating sub (No notion of saturation for floating point)
#define VQSUB_IMPL(stype, vtype, prefix, postfix) \
inline vtype vqsub(const vtype &a, const vtype &b) \
{ \
@@ -78,6 +79,10 @@
VQSUB_IMPL(int32x2_t, int32x2_t, vqsub, s32)
VQSUB_IMPL(uint64x1_t, uint64x1_t, vqsub, u64)
VQSUB_IMPL(int64x1_t, int64x1_t, vqsub, s64)
+VQSUB_IMPL(float32x2_t, float32x2_t, vsub, f32)
+#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
+VQSUB_IMPL(float16x4_t, float16x4_t, vsub, f16)
+#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
VQSUB_IMPL(uint8x16_t, uint8x16_t, vqsubq, u8)
VQSUB_IMPL(int8x16_t, int8x16_t, vqsubq, s8)
@@ -87,8 +92,12 @@
VQSUB_IMPL(int32x4_t, int32x4_t, vqsubq, s32)
VQSUB_IMPL(uint64x2_t, uint64x2_t, vqsubq, u64)
VQSUB_IMPL(int64x2_t, int64x2_t, vqsubq, s64)
-
+VQSUB_IMPL(float32x4_t, float32x4_t, vsubq, f32)
+#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
+VQSUB_IMPL(float16x8_t, float16x8_t, vsubq, f16)
+#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
#undef VQSUB_IMPL
+
} // namespace wrapper
} // namespace arm_compute
#endif /* ARM_COMPUTE_WRAPPER_SUB_H */