commit 679fc96d8c1f8ce2a880f94a9b592f94bc472241
author Manuel Bottini <manuel.bottini@arm.com> Tue Apr 21 16:08:53 2020 +0100
committer Manuel Bottini <manuel.bottini@arm.com> Wed Apr 22 14:10:42 2020 +0000
tree 8e7a61b072a5bb69fa809c9642bc463761cc1653
parent 9230e2789e421021804bc3a65cf47df4749b0765

COMPMID-3280: Make all ML primitives for CL use the new interface - Part1 - Fix2

- const fix in the CLKernels part 2

Change-Id: Ia12845e291b4137cbaf76eb8438e381c4fd0368a
Signed-off-by: Manuel Bottini <manuel.bottini@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/3071
Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>

src/core/CL/kernels/CLROIAlignLayerKernel.cpp

diff --git a/src/core/CL/kernels/CLROIAlignLayerKernel.cpp b/src/core/CL/kernels/CLROIAlignLayerKernel.cpp
index cc1af52..de99223 100644
--- a/src/core/CL/kernels/CLROIAlignLayerKernel.cpp
+++ b/src/core/CL/kernels/CLROIAlignLayerKernel.cpp
@@ -108,7 +108,7 @@
     configure(CLKernelLibrary::get().get_compile_context(), input, rois, output, pool_info);
 }
 
-void CLROIAlignLayerKernel::configure(CLCompileContext &compile_context, const ICLTensor *input, const ICLTensor *rois, ICLTensor *output, const ROIPoolingLayerInfo &pool_info)
+void CLROIAlignLayerKernel::configure(const CLCompileContext &compile_context, const ICLTensor *input, const ICLTensor *rois, ICLTensor *output, const ROIPoolingLayerInfo &pool_info)
 {
     ARM_COMPUTE_ERROR_ON_NULLPTR(input, output, rois);
     ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(input->info(), rois->info(), output->info(), pool_info));