Add kernel selection UT for submitted kernels

 * Softmax kernel
 * Elementwise unary kernel
 * Elementwise binary

** This change require some refactor in the kernel cpp and h files

Resolves COMPMID-5043
Change-Id: I58979b023ec31d759690847b3f85fc4baefbbf98
Signed-off-by: Dana Zlotnik <dana.zlotnik@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/7033
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
diff --git a/filelist.json b/filelist.json
index ba19321..bba3d56 100644
--- a/filelist.json
+++ b/filelist.json
@@ -1262,20 +1262,23 @@
           "common": [
             "src/cpu/operators/CpuElementwise.cpp",
             "src/cpu/kernels/CpuElementwiseKernel.cpp",
-            "src/runtime/NEON/functions/NEElementwiseOperations.cpp",
-            "src/cpu/kernels/elementwise_binary/generic/neon/qasymm8.cpp",
-            "src/cpu/kernels/elementwise_binary/generic/neon/qasymm8_signed.cpp"
+            "src/runtime/NEON/functions/NEElementwiseOperations.cpp"
           ],
           "neon":{
             "fp32": ["src/cpu/kernels/elementwise_binary/generic/neon/fp32.cpp"],
             "fp16": ["src/cpu/kernels/elementwise_binary/generic/neon/fp16.cpp"],
-            "integer": ["src/cpu/kernels/elementwise_binary/generic/neon/integer.cpp"]
+            "integer": ["src/cpu/kernels/elementwise_binary/generic/neon/integer.cpp"],
+            "qasymm8": ["src/cpu/kernels/elementwise_binary/generic/neon/qasymm8.cpp"],
+            "qasymm8_signed": ["src/cpu/kernels/elementwise_binary/generic/neon/qasymm8_signed.cpp"]
           },
           "sve": {
             "common": ["src/cpu/kernels/elementwise_binary/generic/sve/impl.cpp" ],
             "integer": ["src/cpu/kernels/elementwise_binary/generic/sve/integer.cpp"],
             "fp32": ["src/cpu/kernels/elementwise_binary/generic/sve/fp32.cpp"],
-            "fp16": ["src/cpu/kernels/elementwise_binary/generic/sve/fp16.cpp"], 
+            "fp16": ["src/cpu/kernels/elementwise_binary/generic/sve/fp16.cpp"]
+
+          }, 
+          "sve2":{
             "qasymm8": ["src/cpu/kernels/elementwise_binary/generic/sve2/qasymm8.cpp"],
             "qasymm8_signed": ["src/cpu/kernels/elementwise_binary/generic/sve2/qasymm8_signed.cpp"]
           }
@@ -1899,16 +1902,20 @@
           ],
           "neon":{
             "fp32": ["src/cpu/kernels/softmax/generic/neon/fp32.cpp"],
-            "fp16": ["src/cpu/kernels/softmax/generic/neon/fp16.cpp"],
-            "qasymm8": ["src/cpu/kernels/softmax/generic/neon/qasymm8.cpp"],
-            "qasymm8_signed": ["src/cpu/kernels/softmax/generic/neon/qasymm8_signed.cpp"]
+            "fp16": ["src/cpu/kernels/softmax/generic/neon/fp16.cpp"], 
+            "qasymm8":[ "src/cpu/kernels/softmax/generic/neon/qasymm8.cpp"], 
+            "qasymm8_signed":["src/cpu/kernels/softmax/generic/neon/qasymm8_signed.cpp"]
           },
           "sve": {
             "common": [ "src/cpu/kernels/softmax/generic/sve/impl.cpp" ],
             "fp32": ["src/cpu/kernels/softmax/generic/sve/fp32.cpp"],
             "fp16": ["src/cpu/kernels/softmax/generic/sve/fp16.cpp"],
-            "qasymm8": ["src/cpu/kernels/softmax/generic/sve/qasymm8.cpp" ,"src/cpu/kernels/softmax/generic/sve2/qasymm8.cpp" ],
-            "qasymm8_signed": ["src/cpu/kernels/softmax/generic/sve/qasymm8_signed.cpp", "src/cpu/kernels/softmax/generic/sve2/qasymm8_signed.cpp"]
+            "qasymm8": ["src/cpu/kernels/softmax/generic/sve/qasymm8.cpp" ],
+            "qasymm8_signed": ["src/cpu/kernels/softmax/generic/sve/qasymm8_signed.cpp"]
+          },
+          "sve2":{
+            "qasymm8":[ "src/cpu/kernels/softmax/generic/sve2/qasymm8.cpp"], 
+            "qasymm8_signed":["src/cpu/kernels/softmax/generic/sve2/qasymm8_signed.cpp"]
           }
         }
       },