commit 9104cd559222b98f2b21f14d4fd561ed4a4e9bc2
author Adnan AlSinan <adnan.alsinan@arm.com> Wed Apr 06 16:19:31 2022 +0100
committer Adnan AlSinan <adnan.alsinan@arm.com> Wed Apr 13 11:55:45 2022 +0000
tree 628b30de762e8e1dc3d21c5dcb76a92212fa00af
parent 16c5697085c256c19fb8ba4bef6188d61f30a88b

Add support for int8 CpuPool3d

- Add implementation for the CPU pooling 3d layer.
- NDHWC data layout support.
- Support QASYMM8/QASYMM8_SIGNED.
- Add Pooling helper file for Pool3d/2d common functions.

Resolves COMPMID-4668

Change-Id: Iadf042036b076099c2353d6e2fe9fc623bc263d8
Signed-off-by: Adnan AlSinan <adnan.alsinan@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/7387
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>

src/cpu/kernels/CpuPool3dKernel.h

diff --git a/src/cpu/kernels/CpuPool3dKernel.h b/src/cpu/kernels/CpuPool3dKernel.h
index f762cfc..437f2af 100644
--- a/src/cpu/kernels/CpuPool3dKernel.h
+++ b/src/cpu/kernels/CpuPool3dKernel.h
@@ -51,8 +51,10 @@
      * |:--------------|:--------------|
      * |F16            |F16            |
      * |F32            |F32            |
+     * |QASYMM8        |QASYMM8        |
+     * |QASYMM8_SIGNED |QASYMM8_SIGNED |
      *
-     * @param[in]  src       Source tensor info. Data types supported: F16/F32.
+     * @param[in]  src       Source tensor info. Data types supported: F16/F32/QASYMM8/QASYMM8_SIGNED.
      * @param[out] dst       Destination tensor info. Data types supported: Same as @p src.
      * @param[in]  pool_info Contains pooling operation information described in @ref Pooling3dLayerInfo.
      */