commit 9637b2e4fc33b2264aa5586dd6b2ed1045db5075
author Michele Di Giorgio <michele.digiorgio@arm.com> Mon Sep 23 16:49:49 2019 +0100
committer Michele Di Giorgio <michele.digiorgio@arm.com> Mon Sep 30 16:45:51 2019 +0000
tree a22d4dd2ff18f86a2da2920151002415b80fefca
parent cecb0a75a9de0a12d30f8fabbe16a656c722afa1

COMPMID-2671: Change ArgMinMax NEON/CL output type to Signed32

Change-Id: I718f3884928271c5b0afb259d5bfe9df284f18e6
Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Reviewed-on: https://review.mlplatform.org/c/1995
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>

arm_compute/core/NEON/kernels/NEReductionOperationKernel.h

diff --git a/arm_compute/core/NEON/kernels/NEReductionOperationKernel.h b/arm_compute/core/NEON/kernels/NEReductionOperationKernel.h
index a4cb330..4b28b8d 100644
--- a/arm_compute/core/NEON/kernels/NEReductionOperationKernel.h
+++ b/arm_compute/core/NEON/kernels/NEReductionOperationKernel.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2018 ARM Limited.
+ * Copyright (c) 2017-2019 ARM Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -30,7 +30,13 @@
 {
 class ITensor;
 
-/** NEON kernel to perform a reduction operation */
+/** NEON kernel to perform a reduction operation
+ *
+ * @note For ARG_MIN/ARG_MAX reduction, the indices are computed in unsigned
+ *       32-bit (U32). It is the user's responsibility to check that the
+ *       results do not overflow in case the output data type is set to signed
+ *       32-bit integer (S32).
+ */
 class NEReductionOperationKernel : public INEKernel
 {
 public:
@@ -54,7 +60,7 @@
     /** Set the source, destination of the kernel
      *
      * @param[in]  input  Source tensor. Data type supported: QASYMM8/F16/F32. Data layouts supported: NCHW.
-     * @param[out] output Destination tensor.Data types and data layouts supported: same as @p input.
+     * @param[out] output Destination tensor.Data types and data layouts supported: same as @p input, S32 for ARG_MIX/ARG_MAX.
      *                    Output will have the same number of dimensions as input.
      * @param[in]  axis   Axis along which to reduce. Supported reduction axis : 0
      * @param[in]  op     Reduction operation to perform.
@@ -64,7 +70,7 @@
     /** Static function to check if given info will lead to a valid configuration of @ref NEReductionOperationKernel.
      *
      * @param[in] input  Source tensor info. Data type supported: QASYMM8/F16/F32. Data layouts supported: NCHW.
-     * @param[in] output Destination tensor info.Data types and data layouts supported: same as @p input.
+     * @param[in] output Destination tensor info.Data types and data layouts supported: same as @p input, S32 for ARG_MIX/ARG_MAX.
      *                   Output will have the same number of dimensions as input.
      * @param[in] axis   Axis along which to reduce. Supported reduction axis : 0
      * @param[in] op     Reduction operation to perform.