commit 9f7aca97f41a1aa683141f14f19f605f122f7561
author Pablo Marquez Tello <pablo.tello@arm.com> Wed Aug 16 15:21:44 2023 +0100
committer Pablo Marquez Tello <pablo.tello@arm.com> Tue Nov 28 10:15:44 2023 +0000
tree bac1b5abd9b5324d8d2f9583e41660a81c398597
parent 8d4cdd43a74574e0f99f83f1adb1d391c0c85abe

Changes to enable FP16 in armv8a multi_isa

* This is the initial patch to start working on enabling fp16 in all
  multi_isa builds. More changes are required in the way we register
  the kernels using the macro REGISTER_FP16_NEON.

* In this patch we add the capability to build the fp16 files in listed in
  filelist.json with the correct arch option to enable FP16

* This patch is required towards building an universal multi_isa binary
  where fp16 is enable.

* Enable REGISTER_FP16_NEON macro for all builds by removing
  __ARM_FEATURE_FP16_VECTOR_ARITHMETIC guard from the macro definition.
  The macro has to be used across all types of builds.

Change-Id: I99f4c273f6ee04cad3c097e5e374200f48568fa9
Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10682
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Jakub Sujak <jakub.sujak@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>

src/core/common/Registrars.h

diff --git a/src/core/common/Registrars.h b/src/core/common/Registrars.h
index 686304b..50b3fc1 100644
--- a/src/core/common/Registrars.h
+++ b/src/core/common/Registrars.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2020-2022 Arm Limited.
+ * Copyright (c) 2020-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -21,8 +21,8 @@
  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  * SOFTWARE.
  */
-#ifndef SRC_CORE_COMMON_REGISTRARS_H
-#define SRC_CORE_COMMON_REGISTRARS_H
+#ifndef ACL_SRC_CORE_COMMON_REGISTRARS_H
+#define ACL_SRC_CORE_COMMON_REGISTRARS_H
 
 #if defined(ENABLE_FP16_KERNELS)
 
@@ -38,11 +38,11 @@
 #define REGISTER_FP16_SVE2(func_name) nullptr
 #endif /* defined(ARM_COMPUTE_ENABLE_SVE2) */
 
-#if defined(ARM_COMPUTE_ENABLE_NEON) && defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
+#if defined(ARM_COMPUTE_ENABLE_NEON)
 #define REGISTER_FP16_NEON(func_name) &(func_name)
 #else /* !defined(ARM_COMPUTE_ENABLE_NEON) */
 #define REGISTER_FP16_NEON(func_name) nullptr
-#endif /* defined(ARM_COMPUTE_ENABLE_NEON) && defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) */
+#endif /* defined(ARM_COMPUTE_ENABLE_NEON) */
 
 #else /* !defined(ENABLE_FP16_KERNELS) */
 #define REGISTER_FP16_NEON(func_name) nullptr
@@ -179,4 +179,4 @@
 #define REGISTER_BF16_NEON(func_name) nullptr
 #endif /* defined(ARM_COMPUTE_ENABLE_BF16)*/
 
-#endif /* SRC_CORE_COMMON_REGISTRARS_H */
+#endif // ACL_SRC_CORE_COMMON_REGISTRARS_H