COMPMID-1687: Optimize CLGEMMMatrixMultiplyKernel (part 1)
Extended CLGEMMMatrixMultiplyReshapedKernel to support more parameters
Change-Id: I4a27f986e3fe2dd071a4ccba5cfa0565f3db39ad
Reviewed-on: https://review.mlplatform.org/495
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com>
diff --git a/arm_compute/core/CL/kernels/CLGEMMMatrixMultiplyReshapedKernel.h b/arm_compute/core/CL/kernels/CLGEMMMatrixMultiplyReshapedKernel.h
index d0f67e6..cb23b96 100644
--- a/arm_compute/core/CL/kernels/CLGEMMMatrixMultiplyReshapedKernel.h
+++ b/arm_compute/core/CL/kernels/CLGEMMMatrixMultiplyReshapedKernel.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018 ARM Limited.
+ * Copyright (c) 2018-2019 ARM Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -83,6 +83,7 @@
ICLTensor *_output;
bool _slide_matrix_b;
bool _reinterpret_output_as_3d;
+ unsigned int _k;
};
} // namespace arm_compute
#endif /*__ARM_COMPUTE_CLGEMMMATRIXMULTIPLYRESHAPEDKERNEL_H__*/
\ No newline at end of file
diff --git a/arm_compute/core/CL/kernels/CLGEMMReshapeLHSMatrixKernel.h b/arm_compute/core/CL/kernels/CLGEMMReshapeLHSMatrixKernel.h
index 6c9b2a0..969aad9 100644
--- a/arm_compute/core/CL/kernels/CLGEMMReshapeLHSMatrixKernel.h
+++ b/arm_compute/core/CL/kernels/CLGEMMReshapeLHSMatrixKernel.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018 ARM Limited.
+ * Copyright (c) 2018-2019 ARM Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -54,7 +54,7 @@
* @param[in] lhs_info LHS matrix information to be used for reshaping. This object contains all the necessary
* information to reshape the input tensor. Only the following values are supported:
* lhs_info.m0: 2,3,4,5,6,7,8
- * lhs_info.k0: 2,4,8,16
+ * lhs_info.k0: 2,3,4,8,16
* lhs_info.v0: greater than 0
* lhs_info.transpose: true, false
* lhs_info.interleave: true, false
@@ -68,7 +68,7 @@
* @param[in] lhs_info LHS matrix information to be used for reshaping. This object contains all the necessary
* information to reshape the input tensor. Only the following values are supported:
* lhs_info.m0: 2,3,4,5,6,7,8
- * lhs_info.k0: 2,4,8,16
+ * lhs_info.k0: 2,3,4,8,16
* lhs_info.v0: greater than 0
* lhs_info.transpose: true, false
* lhs_info.interleave: true, false
diff --git a/arm_compute/core/CL/kernels/CLGEMMReshapeRHSMatrixKernel.h b/arm_compute/core/CL/kernels/CLGEMMReshapeRHSMatrixKernel.h
index 611549a..55e3786 100644
--- a/arm_compute/core/CL/kernels/CLGEMMReshapeRHSMatrixKernel.h
+++ b/arm_compute/core/CL/kernels/CLGEMMReshapeRHSMatrixKernel.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018 ARM Limited.
+ * Copyright (c) 2018-2019 ARM Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -52,8 +52,8 @@
* @param[out] output Output tensor. Data type supported: same as @p input
* @param[in] rhs_info RHS matrix information to be used for reshaping. This object contains all the necessary
* information to reshape the input tensor. Only the following values are supported:
- * rhs_info.n0: 2,4,8,16
- * rhs_info.k0: 1,2,4,8,16 (k0 = 1 and k0 = 2 only if rhs_info.transpose = false)
+ * rhs_info.n0: 2,3,4,8,16
+ * rhs_info.k0: 1,2,3,4,8,16 (k0 = 1 only if rhs_info.transpose = false)
* rhs_info.h0: greater than 0
* rhs_info.transpose: true, false
* rhs_info.interleave: true, false
@@ -65,8 +65,8 @@
* @param[in] output Output tensor info which stores the interleaved matrix. Data type supported: same as @p input.
* @param[in] rhs_info RHS matrix information to be used for reshaping. This object contains all the necessary
* information to reshape the input tensor. Only the following values are supported:
- * rhs_info.n0: 2,4,8,16
- * rhs_info.k0: 1,2,4,8,16 (k0 = 1 and k0 = 2 only if rhs_info.transpose = false)
+ * rhs_info.n0: 2,3,4,8,16
+ * rhs_info.k0: 1,2,3,4,8,16 (k0 = 1 only if rhs_info.transpose = false)
* rhs_info.h0: greater than 0
* rhs_info.transpose: true, false
* rhs_info.interleave: true, false