commit cd22cbfd02a4fcb49cb40622372a13b865db80ee
author Georgios Pinitas <georgios.pinitas@arm.com> Wed Dec 02 16:06:01 2020 +0000
committer Georgios Pinitas <georgios.pinitas@arm.com> Thu Dec 03 13:31:20 2020 +0000
tree 7029396e73c117a8a1a9b5b80131c2a8f56d43be
parent 96b16b65dd96351b8af1b2a785856ce13cc8ba84

Update GEMV heuristics for quantized types for A53

Switch assembly kernels to dispatch a 4x4 blocked GEMM kernel for A53
when M <= 4 instead of the 8x12 u16 based one.

Resolves: COMPMID-3983

Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com>
Change-Id: Ic46a1b51a7c075e46dcb5cd578c75260ded0540c
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4640
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>

src/core/NEON/kernels/arm_gemm/gemm_int8.cpp

diff --git a/src/core/NEON/kernels/arm_gemm/gemm_int8.cpp b/src/core/NEON/kernels/arm_gemm/gemm_int8.cpp
index 31f2250..f081558 100644
--- a/src/core/NEON/kernels/arm_gemm/gemm_int8.cpp
+++ b/src/core/NEON/kernels/arm_gemm/gemm_int8.cpp
@@ -105,7 +105,7 @@
     GemmMethod::GEMM_INTERLEAVED,
     "a64_gemm_s16_8x12",
     nullptr,
-    [](const GemmArgs &args) { return args._ci->get_cpu_model() == CPUModel::A53 && args._Ksize>4; },
+    [](const GemmArgs &args) { return args._ci->get_cpu_model() == CPUModel::A53 && ((args._Msize > 28) || ((args._Msize % 8) > 4)); },
     [](const GemmArgs &args) { return new GemmInterleaved<cls_a64_gemm_s16_8x12, int8_t, int32_t>(args); },
 },
 {

src/core/NEON/kernels/arm_gemm/gemm_qint8.cpp

diff --git a/src/core/NEON/kernels/arm_gemm/gemm_qint8.cpp b/src/core/NEON/kernels/arm_gemm/gemm_qint8.cpp
index 05c5116..0ffe808 100644
--- a/src/core/NEON/kernels/arm_gemm/gemm_qint8.cpp
+++ b/src/core/NEON/kernels/arm_gemm/gemm_qint8.cpp
@@ -128,7 +128,7 @@
     GemmMethod::GEMM_INTERLEAVED,
     "a64_gemm_s16_8x12",
     nullptr,
-    [](const GemmArgs &args, const Requantize32 &) { return args._ci->get_cpu_model() == CPUModel::A53; },
+    [](const GemmArgs &args, const Requantize32 &) { return args._ci->get_cpu_model() == CPUModel::A53 && ((args._Msize > 28) || ((args._Msize % 8) > 4)); },
     [](const GemmArgs &args, const Requantize32 &qp) { return new GemmInterleavedQuantized<cls_a64_gemm_s16_8x12, int8_t, int8_t>(args, qp); }
 },
 {

src/core/NEON/kernels/arm_gemm/gemm_quint8.cpp

diff --git a/src/core/NEON/kernels/arm_gemm/gemm_quint8.cpp b/src/core/NEON/kernels/arm_gemm/gemm_quint8.cpp
index 7342fda..84628c0 100644
--- a/src/core/NEON/kernels/arm_gemm/gemm_quint8.cpp
+++ b/src/core/NEON/kernels/arm_gemm/gemm_quint8.cpp
@@ -118,7 +118,7 @@
     GemmMethod::GEMM_INTERLEAVED,
     "a64_gemm_u16_8x12",
     nullptr,
-    [](const GemmArgs &args, const Requantize32 &) { return args._ci->get_cpu_model() == CPUModel::A53; },
+    [](const GemmArgs &args, const Requantize32 &) { return args._ci->get_cpu_model() == CPUModel::A53 && args._Msize > 4; },
     [](const GemmArgs &args, const Requantize32 &qp) { return new GemmInterleavedQuantized<cls_a64_gemm_u16_8x12, uint8_t, uint8_t>(args, qp); },
 },
 {

src/core/NEON/kernels/arm_gemm/gemm_uint8.cpp

diff --git a/src/core/NEON/kernels/arm_gemm/gemm_uint8.cpp b/src/core/NEON/kernels/arm_gemm/gemm_uint8.cpp
index c300b8c..7d24ea6 100644
--- a/src/core/NEON/kernels/arm_gemm/gemm_uint8.cpp
+++ b/src/core/NEON/kernels/arm_gemm/gemm_uint8.cpp
@@ -106,7 +106,7 @@
     GemmMethod::GEMM_INTERLEAVED,
     "a64_gemm_u16_8x12",
     nullptr,
-    [](const GemmArgs &args) { return args._ci->get_cpu_model() == CPUModel::A53; },
+    [](const GemmArgs &args) { return args._ci->get_cpu_model() == CPUModel::A53 && args._Msize > 4; },
     [](const GemmArgs &args) { return new GemmInterleaved<cls_a64_gemm_u16_8x12, uint8_t, uint32_t>(args); },
 },
 {