commit da0e5139cbd76a7077ee553abc34b09b655d00a9
author Pablo Tello <pablo.tello@arm.com> Wed Feb 27 13:32:51 2019 +0000
committer Giuseppe Rossini <giuseppe.rossini@arm.com> Mon Mar 11 12:55:11 2019 +0000
tree fdece4673a0c40fb7b1d1321931fea04f1b8d6e1
parent 471043616a869f0e696c8db4e1d0a62b45b4decf

COMPMID-1882: Improve memory coalescence when reshaping the weights for CLDepthwiseConvolution

Change-Id: Ib226fd3e7d2715847594eb5bafa46c938672cf9b
Signed-off-by: giuros01 <giuseppe.rossini@arm.com>
Reviewed-on: https://review.mlplatform.org/c/839
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>

src/core/CL/kernels/CLDepthwiseConvolutionLayer3x3NCHWKernel.cpp

diff --git a/src/core/CL/kernels/CLDepthwiseConvolutionLayer3x3NCHWKernel.cpp b/src/core/CL/kernels/CLDepthwiseConvolutionLayer3x3NCHWKernel.cpp
index 770740d..83fac16 100644
--- a/src/core/CL/kernels/CLDepthwiseConvolutionLayer3x3NCHWKernel.cpp
+++ b/src/core/CL/kernels/CLDepthwiseConvolutionLayer3x3NCHWKernel.cpp
@@ -173,7 +173,7 @@
 
         kernel_name = is_qasymm ? "dwc_3x3_native_qasymm8" : "depthwise_convolution_3x3";
         kernel_name += (is_qasymm && is_dot8_supported ? "_dot8" : "");
-        kernel_name += "_nchw";
+        kernel_name += (is_qasymm ? "_nchw" : "");
 
         num_elems_written_per_iteration_x = 8 / data_size_from_type(input->data_type());
         num_elems_written_per_iteration_y = (is_qasymm && conv_stride_y == 1) ? 2 : 1;