commit | e6836523ed6672ee1d622f240038a1173d57923c | [log] [tgz] |
---|---|---|
author | Michael Tyler <michael.tyler@arm.com> | Tue Jun 25 14:09:37 2024 +0100 |
committer | Michael Tyler <michael.tyler@arm.com> | Wed Jun 26 15:50:40 2024 +0000 |
tree | e4158dfdc0884cd304f83907a5f63b65450512fb | |
parent | 5d6fff041ade7eb44af0945867212f3979be3d3e [diff] [blame] |
Optimize memory management of CPU operators Resolves COMPMID-7172 Change-Id: I0acac5e4cb24056a88b4356d9239b33721d65d13 Signed-off-by: Michael Tyler <michael.tyler@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11762 Benchmark: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Suhail M <MohammedSuhail.Munshi@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
diff --git a/docs/user_guide/release_version_and_change_log.dox b/docs/user_guide/release_version_and_change_log.dox index 8047938..5968ec8 100644 --- a/docs/user_guide/release_version_and_change_log.dox +++ b/docs/user_guide/release_version_and_change_log.dox
@@ -50,6 +50,7 @@ - Add SVE fixed format interleaved BF16 DOT kernel. - Updates and optimizations to assembly kernels. - Expose CpuGemm functionality using the experimental operators api + - Optimize CPU operator memory management. v24.06 Public minor release - Enable FP16 in multiple Neon™ kernels for multi_isa + v8a