Make CpuActivation stateless
- Rename NEActivationLayer to CpuActivation
- Add member function to generate execution window
Partially Resolves: COMPMID-3992
Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com>
Change-Id: I4e1ae15cf456b860d3080b2fedc4dbcce7d1bb79
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4791
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Michalis Spyrou <michalis.spyrou@arm.com>
diff --git a/src/runtime/NEON/functions/NEActivationLayer.cpp b/src/runtime/NEON/functions/NEActivationLayer.cpp
index 27f01f6..2b5c51f 100644
--- a/src/runtime/NEON/functions/NEActivationLayer.cpp
+++ b/src/runtime/NEON/functions/NEActivationLayer.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2020 Arm Limited.
+ * Copyright (c) 2017-2021 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -23,37 +23,17 @@
*/
#include "arm_compute/runtime/NEON/functions/NEActivationLayer.h"
-#include "arm_compute/core/Error.h"
-#include "arm_compute/core/experimental/Types.h"
-#include "arm_compute/runtime/IRuntimeContext.h"
-#include "arm_compute/runtime/Tensor.h"
-#include "src/core/NEON/kernels/NEActivationLayerKernel.h"
+#include "arm_compute/core/Validate.h"
+#include "src/runtime/cpu/operators/CpuActivation.h"
namespace arm_compute
{
-namespace experimental
-{
-NEActivationLayer::~NEActivationLayer() = default;
-
-void NEActivationLayer::configure(const ITensorInfo *input, ITensorInfo *output, const ActivationLayerInfo &activation_info)
-{
- auto k = std::make_unique<NEActivationLayerKernel>();
- k->configure(input, output, activation_info);
- _kernel = std::move(k);
-}
-
-Status NEActivationLayer::validate(const ITensorInfo *input, const ITensorInfo *output, const ActivationLayerInfo &activation_info)
-{
- return NEActivationLayerKernel::validate(input, output, activation_info);
-}
-} // namespace experimental
-
struct NEActivationLayer::Impl
{
- const ITensor *src{ nullptr };
- ITensor *dst{ nullptr };
- IRuntimeContext *ctx{ nullptr };
- std::unique_ptr<experimental::NEActivationLayer> op{ nullptr };
+ const ITensor *src{ nullptr };
+ ITensor *dst{ nullptr };
+ IRuntimeContext *ctx{ nullptr };
+ std::unique_ptr<cpu::CpuActivation> op{ nullptr };
};
NEActivationLayer::NEActivationLayer(IRuntimeContext *ctx)
@@ -61,27 +41,24 @@
{
_impl->ctx = ctx;
}
-
NEActivationLayer::NEActivationLayer(NEActivationLayer &&) = default;
-
NEActivationLayer &NEActivationLayer::operator=(NEActivationLayer &&) = default;
-
-NEActivationLayer::~NEActivationLayer() = default;
+NEActivationLayer::~NEActivationLayer() = default;
void NEActivationLayer::configure(ITensor *input, ITensor *output, ActivationLayerInfo activation_info)
{
- ARM_COMPUTE_ERROR_ON_NULLPTR(input);
-
_impl->src = input;
_impl->dst = output == nullptr ? input : output;
- _impl->op = std::make_unique<experimental::NEActivationLayer>();
+ ARM_COMPUTE_ERROR_ON_NULLPTR(_impl->src, _impl->dst);
+
+ _impl->op = std::make_unique<cpu::CpuActivation>();
_impl->op->configure(_impl->src->info(), _impl->dst->info(), activation_info);
}
Status NEActivationLayer::validate(const ITensorInfo *input, const ITensorInfo *output, const ActivationLayerInfo &act_info)
{
- return experimental::NEActivationLayer::validate(input, output, act_info);
+ return cpu::CpuActivation::validate(input, output, act_info);
}
void NEActivationLayer::run()
diff --git a/src/runtime/NEON/functions/NEFloor.cpp b/src/runtime/NEON/functions/NEFloor.cpp
index b4ecb1e..f8a3c13 100644
--- a/src/runtime/NEON/functions/NEFloor.cpp
+++ b/src/runtime/NEON/functions/NEFloor.cpp
@@ -23,10 +23,18 @@
*/
#include "arm_compute/runtime/NEON/functions/NEFloor.h"
+#include "arm_compute/core/Validate.h"
#include "src/runtime/cpu/operators/CpuFloor.h"
namespace arm_compute
{
+struct NEFloor::Impl
+{
+ const ITensor *src{ nullptr };
+ ITensor *dst{ nullptr };
+ std::unique_ptr<cpu::CpuFloor> op{ nullptr };
+};
+
NEFloor::NEFloor()
: _impl(std::make_unique<Impl>())
{
@@ -35,15 +43,10 @@
NEFloor &NEFloor::operator=(NEFloor &&) = default;
NEFloor::~NEFloor() = default;
-struct NEFloor::Impl
-{
- const ITensor *src{ nullptr };
- ITensor *dst{ nullptr };
- std::unique_ptr<cpu::CpuFloor> op{ nullptr };
-};
-
void NEFloor::configure(const ITensor *input, ITensor *output)
{
+ ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
+
_impl->src = input;
_impl->dst = output;
diff --git a/src/runtime/cpu/ICpuOperator.h b/src/runtime/cpu/ICpuOperator.h
index bb7de1b..70ab436 100644
--- a/src/runtime/cpu/ICpuOperator.h
+++ b/src/runtime/cpu/ICpuOperator.h
@@ -30,7 +30,7 @@
{
namespace cpu
{
-using ICpuOperator = arm_compute::experimental::INEOperator;
+using ICpuOperator = experimental::INEOperator;
} // namespace cpu
} // namespace arm_compute
#endif /* ARM_COMPUTE_ICPUOPERATOR_H */
diff --git a/src/runtime/cpu/operators/CpuActivation.cpp b/src/runtime/cpu/operators/CpuActivation.cpp
new file mode 100644
index 0000000..7753c96
--- /dev/null
+++ b/src/runtime/cpu/operators/CpuActivation.cpp
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2021 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#include "src/runtime/cpu/operators/CpuActivation.h"
+
+#include "src/core/cpu/kernels/CpuActivationKernel.h"
+
+namespace arm_compute
+{
+namespace cpu
+{
+void CpuActivation::configure(const ITensorInfo *input, ITensorInfo *output, const ActivationLayerInfo &activation_info)
+{
+ auto k = std::make_unique<kernels::CpuActivationKernel>();
+ k->configure(input, output, activation_info);
+ _kernel = std::move(k);
+}
+
+Status CpuActivation::validate(const ITensorInfo *input, const ITensorInfo *output, const ActivationLayerInfo &activation_info)
+{
+ return kernels::CpuActivationKernel::validate(input, output, activation_info);
+}
+} // namespace cpu
+} // namespace arm_compute
diff --git a/src/runtime/cpu/operators/CpuActivation.h b/src/runtime/cpu/operators/CpuActivation.h
new file mode 100644
index 0000000..25bc903
--- /dev/null
+++ b/src/runtime/cpu/operators/CpuActivation.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2021 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef ARM_COMPUTE_CPU_ACTIVATION_H
+#define ARM_COMPUTE_CPU_ACTIVATION_H
+
+#include "src/runtime/cpu/ICpuOperator.h"
+
+namespace arm_compute
+{
+namespace cpu
+{
+/** Basic function to run @ref CpuActivationKernel */
+class CpuActivation : public ICpuOperator
+{
+public:
+ /** Constructor */
+ CpuActivation() = default;
+ /** Set the input and output tensor.
+ *
+ * @param[in] input Source tensor info. Data types supported: QASYMM8/QASYMM8_SIGNED/QSYMM16/F16/F32.
+ * @param[out] output Destination tensor info. Data type supported: same as @p src
+ * @param[in] activation_info Activation layer parameters.
+ */
+ void configure(const ITensorInfo *input, ITensorInfo *output, const ActivationLayerInfo &activation_info);
+ /** Static function to check if given info will lead to a valid configuration of @ref NEActivationLayer
+ *
+ * @param[in] input Source tensor info. Data types supported: QASYMM8/QASYMM8_SIGNED/QSYMM16/F16/F32.
+ * @param[in] output Destination tensor info. Data type supported: same as @p src
+ * @param[in] act_info Activation layer information.
+ *
+ * @return a status
+ */
+ static Status validate(const ITensorInfo *input, const ITensorInfo *output, const ActivationLayerInfo &act_info);
+};
+} // namespace cpu
+} // namespace arm_compute
+#endif /* ARM_COMPUTE_CPU_ACTIVATION_H */