blob: 3b45b07ed90341a38ebdeb43370ced2021f45003 [file] [log] [blame]
Anthony Barbier6ff3b192017-09-04 18:44:23 +01001/*
Michalis Spyroubcfd09a2019-05-01 13:03:59 +01002 * Copyright (c) 2016-2019 ARM Limited.
Anthony Barbier6ff3b192017-09-04 18:44:23 +01003 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24#include "arm_compute/core/CL/kernels/CLGaussian5x5Kernel.h"
25
26#include <cstdint>
27
28using namespace arm_compute;
29
30void CLGaussian5x5HorKernel::configure(const ICLTensor *input, ICLTensor *output, bool border_undefined)
31{
Michalis Spyroubcfd09a2019-05-01 13:03:59 +010032 const std::array<int16_t, 5> matrix = { 1, 4, 6, 4, 1 };
Anthony Barbier6ff3b192017-09-04 18:44:23 +010033
34 // Set arguments
Michalis Spyroubcfd09a2019-05-01 13:03:59 +010035 CLSeparableConvolution5x5HorKernel::configure(input, output, matrix.data(), border_undefined);
Anthony Barbier6ff3b192017-09-04 18:44:23 +010036}
37
38void CLGaussian5x5VertKernel::configure(const ICLTensor *input, ICLTensor *output, bool border_undefined)
39{
Michalis Spyroubcfd09a2019-05-01 13:03:59 +010040 const uint32_t scale = 256;
41 const std::array<int16_t, 5> matrix = { 1, 4, 6, 4, 1 };
Anthony Barbier6ff3b192017-09-04 18:44:23 +010042
43 // Set arguments
Michalis Spyroubcfd09a2019-05-01 13:03:59 +010044 CLSeparableConvolution5x5VertKernel::configure(input, output, matrix.data(), scale, border_undefined);
Anthony Barbier6ff3b192017-09-04 18:44:23 +010045}