Gian Marco | 58c5794 | 2017-11-28 09:10:03 +0000 | [diff] [blame] | 1 | /* |
Georgios Pinitas | f72f936 | 2018-01-12 16:29:45 +0000 | [diff] [blame] | 2 | * Copyright (c) 2017-2018 ARM Limited. |
Gian Marco | 58c5794 | 2017-11-28 09:10:03 +0000 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: MIT |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to |
| 8 | * deal in the Software without restriction, including without limitation the |
| 9 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or |
| 10 | * sell copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in all |
| 14 | * copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 19 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 22 | * SOFTWARE. |
| 23 | */ |
| 24 | #ifndef __ARM_COMPUTE_NEASYMM_H__ |
| 25 | #define __ARM_COMPUTE_NEASYMM_H__ |
| 26 | |
| 27 | #include <arm_neon.h> |
| 28 | |
| 29 | namespace arm_compute |
| 30 | { |
Michel Iwaniec | 5dfeae6 | 2017-11-29 10:48:23 +0000 | [diff] [blame] | 31 | using qasymm8x8_t = uint8x8_t; /**< 8 bit quantized asymmetric vector with 8 elements */ |
| 32 | using qasymm8x8x2_t = uint8x8x2_t; /**< 8 bit quantized asymmetric vector with 16 elements */ |
| 33 | using qasymm8x8x3_t = uint8x8x3_t; /**< 8 bit quantized asymmetric vector with 24 elements */ |
| 34 | using qasymm8x8x4_t = uint8x8x4_t; /**< 8 bit quantized asymmetric vector with 32 elements */ |
| 35 | using qasymm8x16_t = uint8x16_t; /**< 8 bit quantized asymmetric vector with 16 elements */ |
| 36 | |
Gian Marco | 58c5794 | 2017-11-28 09:10:03 +0000 | [diff] [blame] | 37 | /** Round to the nearest division by a power-of-two using exponent |
| 38 | * |
| 39 | * @note This function calculates the following expression: (x + 2^n -1 ) / 2^n where n = exponent |
| 40 | * |
| 41 | * @param[in] x Vector of 4 elements |
| 42 | * @param[in] exponent Integer value used to round to nearest division by a power-of-two |
| 43 | * |
| 44 | * @return the nearest division by a power-of-two using exponent |
| 45 | */ |
| 46 | int32x4_t rounding_divide_by_pow2(int32x4_t x, int exponent); |
Michel Iwaniec | 5dfeae6 | 2017-11-29 10:48:23 +0000 | [diff] [blame] | 47 | |
| 48 | /** Perform a multiply-accumulate on all 16 components of a QASYMM8 vector |
| 49 | * |
| 50 | * vd*vs + vo |
| 51 | * |
| 52 | * @param[in] vd Input vector value in QASYMM8 format |
| 53 | * @param[in] vs Vector multiplier in F32 format. The multiplier value must be duplicated across all four lanes. |
| 54 | * @param[in] vo Vector addend in F32 format. The addend value must be duplicated across all four lanes. |
| 55 | * |
| 56 | * @return A 16-component vector in QASYMM8 format, saturated to fit |
| 57 | */ |
| 58 | uint8x16_t vmlaq_qasymm8(qasymm8x16_t vd, float32x4_t vs, float32x4_t vo); |
Georgios Pinitas | f72f936 | 2018-01-12 16:29:45 +0000 | [diff] [blame] | 59 | |
| 60 | /** Performs final quantization step on 16 elements |
| 61 | * |
| 62 | * @tparam is_bounded_relu Specified if a fused bounded relu should be applied |
| 63 | * |
| 64 | * @param in_s32 Input to be quantized. |
| 65 | * @param result_fixedpoint_multiplier Result multiplier parameter |
| 66 | * @param result_shift Result shift parameter |
| 67 | * @param result_offset_after_shift_s32 Result offset parameter |
| 68 | * @param min_u8 Relu lower bound |
| 69 | * @param max_u8 Relu upper bound |
| 70 | * |
| 71 | * @return Quantized values |
| 72 | */ |
| 73 | template <bool is_bounded_relu> |
| 74 | uint8x16_t finalize_quantization(int32x4x4_t &in_s32, |
| 75 | int result_fixedpoint_multiplier, |
| 76 | int32_t result_shift, |
| 77 | int32x4_t result_offset_after_shift_s32, |
| 78 | uint8x16_t min_u8, |
| 79 | uint8x16_t max_u8) |
| 80 | { |
| 81 | const static int32x4_t zero_s32 = vdupq_n_s32(0); |
| 82 | |
| 83 | // Fixed point multiplication with vector saturating rounding doubling multiply high with scalar |
| 84 | in_s32.val[0] = vqrdmulhq_n_s32(in_s32.val[0], result_fixedpoint_multiplier); |
| 85 | in_s32.val[1] = vqrdmulhq_n_s32(in_s32.val[1], result_fixedpoint_multiplier); |
| 86 | in_s32.val[2] = vqrdmulhq_n_s32(in_s32.val[2], result_fixedpoint_multiplier); |
| 87 | in_s32.val[3] = vqrdmulhq_n_s32(in_s32.val[3], result_fixedpoint_multiplier); |
| 88 | |
| 89 | // Round to the nearest division by a power-of-two using result_shift_s32 |
| 90 | in_s32.val[0] = rounding_divide_by_pow2(in_s32.val[0], result_shift); |
| 91 | in_s32.val[1] = rounding_divide_by_pow2(in_s32.val[1], result_shift); |
| 92 | in_s32.val[2] = rounding_divide_by_pow2(in_s32.val[2], result_shift); |
| 93 | in_s32.val[3] = rounding_divide_by_pow2(in_s32.val[3], result_shift); |
| 94 | |
| 95 | // Add the offset terms |
| 96 | in_s32.val[0] = vaddq_s32(in_s32.val[0], result_offset_after_shift_s32); |
| 97 | in_s32.val[1] = vaddq_s32(in_s32.val[1], result_offset_after_shift_s32); |
| 98 | in_s32.val[2] = vaddq_s32(in_s32.val[2], result_offset_after_shift_s32); |
| 99 | in_s32.val[3] = vaddq_s32(in_s32.val[3], result_offset_after_shift_s32); |
| 100 | |
| 101 | // Saturate negative values |
| 102 | in_s32.val[0] = vmaxq_s32(in_s32.val[0], zero_s32); |
| 103 | in_s32.val[1] = vmaxq_s32(in_s32.val[1], zero_s32); |
| 104 | in_s32.val[2] = vmaxq_s32(in_s32.val[2], zero_s32); |
| 105 | in_s32.val[3] = vmaxq_s32(in_s32.val[3], zero_s32); |
| 106 | |
| 107 | // Convert S32 to S16 |
| 108 | const int16x8x2_t in_s16 = |
| 109 | { |
| 110 | { |
| 111 | vcombine_s16(vqmovn_s32(in_s32.val[0]), vqmovn_s32(in_s32.val[1])), |
| 112 | vcombine_s16(vqmovn_s32(in_s32.val[2]), vqmovn_s32(in_s32.val[3])) |
| 113 | } |
| 114 | }; |
| 115 | |
| 116 | // Convert S16 to U8 |
| 117 | uint8x16_t out_u8 = vcombine_u8(vqmovun_s16(in_s16.val[0]), vqmovun_s16(in_s16.val[1])); |
| 118 | |
| 119 | if(is_bounded_relu) |
| 120 | { |
| 121 | out_u8 = vmaxq_u8(out_u8, min_u8); |
| 122 | out_u8 = vminq_u8(out_u8, max_u8); |
| 123 | } |
| 124 | |
| 125 | return out_u8; |
| 126 | } |
Gian Marco | 58c5794 | 2017-11-28 09:10:03 +0000 | [diff] [blame] | 127 | } // namespace arm_compute |
| 128 | #include "arm_compute/core/NEON/NEAsymm.inl" |
Michel Iwaniec | 5dfeae6 | 2017-11-29 10:48:23 +0000 | [diff] [blame] | 129 | #endif // __ARM_COMPUTE_NEASYMM_H__ |