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Manuel Bottinib4bb6a02021-05-24 16:01:32 +01001/*
Matthew Benthamf1aeab92023-05-30 13:35:34 +00002 * Copyright (c) 2019-2021, 2023 Arm Limited.
Manuel Bottinib4bb6a02021-05-24 16:01:32 +01003 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
Michele Di Giorgiod02d5ed2021-01-22 09:47:04 +000024#ifndef ARM_COMPUTE_CPU_DEPTHWISE_CONV2D_ASSEMBLY_DISPATCH_H
25#define ARM_COMPUTE_CPU_DEPTHWISE_CONV2D_ASSEMBLY_DISPATCH_H
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010026
SiCong Li91295492023-07-21 18:16:13 +010027#include "arm_compute/function_info/ActivationLayerInfo.h"
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010028
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010029#include "src/core/common/Macros.h"
Georgios Pinitas7891a732021-08-20 21:39:25 +010030#include "src/cpu/ICpuOperator.h"
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010031
32namespace arm_compute
33{
Matthew Benthamf1aeab92023-05-30 13:35:34 +000034struct ConvolutionInfo;
35
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010036namespace cpu
37{
38/** Depthwise convolution assembly kernel glue */
39class CpuDepthwiseConv2dAssemblyDispatch : public ICpuOperator
40{
41public:
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010042 CpuDepthwiseConv2dAssemblyDispatch();
43 ARM_COMPUTE_DISALLOW_COPY_ALLOW_MOVE(CpuDepthwiseConv2dAssemblyDispatch);
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010044 ~CpuDepthwiseConv2dAssemblyDispatch();
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010045 /** Initialize the function's source, destination, kernels and border_size.
46 *
47 * @note Supports only NHWC format
48 *
Michele Di Giorgiod02d5ed2021-01-22 09:47:04 +000049 * @param[in] src Source tensor info. Data type supported: QASYMM8/QASYMM8_SIGNED/F16/F32.
50 * @param[in] weights Weights tensor info. These are 3D tensors with shape [W, H, IFM].
51 * Data type supported: same as @p src or QASYMM8/QASYMM8_SIGNED/QSYMM8_PER_CHANNEL when @p src is QASYMM8/QASYMM8_SIGNED.
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010052 * @param[in] bias (Optional) Biases tensor info. A 1D tensor with shape [IFM]. Must be nullptr if not needed.
Michele Di Giorgiod02d5ed2021-01-22 09:47:04 +000053 * Data type supported: same as @p src or S32 if @p src is quantized.
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010054 * @param[out] dst Destination tensor info. Data type supported: same as @p src.
55 * @param[in] info Depthwise convolution meta-data.
56 */
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010057 void configure(const ITensorInfo *src,
58 const ITensorInfo *weights,
59 const ITensorInfo *bias,
60 ITensorInfo *dst,
61 const ConvolutionInfo &info);
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010062 /** Static function to check if given info will lead to a valid configuration
63 *
64 * Similar to CpuDepthwiseConv2dAssemblyDispatch::configure()
65 *
66 * @return a status
67 */
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010068 static Status validate(const ITensorInfo *src,
69 const ITensorInfo *weights,
70 const ITensorInfo *bias,
71 const ITensorInfo *dst,
72 const ConvolutionInfo &info);
Michele Di Giorgiod02d5ed2021-01-22 09:47:04 +000073 /** Checks if activation is supported by the assembly kernels
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010074 *
Michele Di Giorgiod02d5ed2021-01-22 09:47:04 +000075 * @param[in] activation Activation to check
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010076 *
Michele Di Giorgiod02d5ed2021-01-22 09:47:04 +000077 * @return True if activation is supported else false
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010078 */
Michele Di Giorgiod02d5ed2021-01-22 09:47:04 +000079 static bool is_activation_supported(const ActivationLayerInfo &activation);
Georgios Pinitas2eb5d162021-07-02 09:01:49 +010080
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010081 // Inherited methods overridden:
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010082 void run(ITensorPack &tensors) override;
83 void prepare(ITensorPack &tensors) override;
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010084 experimental::MemoryRequirements workspace() const override;
85
86private:
87 struct LocalImpl;
88 std::unique_ptr<LocalImpl> _pImpl;
89};
90} // namespace cpu
91} // namespace arm_compute
Michele Di Giorgiod02d5ed2021-01-22 09:47:04 +000092#endif /* ARM_COMPUTE_CPU_DEPTHWISE_CONV2D_ASSEMBLY_DISPATCH_H */