Vidhya Sudhan Loganathan | 5e96be7 | 2018-12-18 14:17:00 +0000 | [diff] [blame] | 1 | /* |
Teresa Charlin | 6268742 | 2021-04-28 10:58:49 +0100 | [diff] [blame] | 2 | * Copyright (c) 2018-2021 Arm Limited. |
Vidhya Sudhan Loganathan | 5e96be7 | 2018-12-18 14:17:00 +0000 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: MIT |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to |
| 8 | * deal in the Software without restriction, including without limitation the |
| 9 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or |
| 10 | * sell copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in all |
| 14 | * copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 19 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 22 | * SOFTWARE. |
| 23 | */ |
Michalis Spyrou | f464337 | 2019-11-29 16:17:13 +0000 | [diff] [blame] | 24 | #ifndef ARM_COMPUTE_CLRANGE_H |
| 25 | #define ARM_COMPUTE_CLRANGE_H |
Vidhya Sudhan Loganathan | 5e96be7 | 2018-12-18 14:17:00 +0000 | [diff] [blame] | 26 | |
| 27 | #include "arm_compute/core/Types.h" |
| 28 | #include "arm_compute/runtime/CL/ICLSimpleFunction.h" |
| 29 | |
| 30 | namespace arm_compute |
| 31 | { |
Sang-Hoon Park | bef7fa2 | 2020-10-21 15:58:54 +0100 | [diff] [blame] | 32 | class CLCompileContext; |
Vidhya Sudhan Loganathan | 5e96be7 | 2018-12-18 14:17:00 +0000 | [diff] [blame] | 33 | class ICLTensor; |
Sang-Hoon Park | bef7fa2 | 2020-10-21 15:58:54 +0100 | [diff] [blame] | 34 | class ITensorInfo; |
Vidhya Sudhan Loganathan | 5e96be7 | 2018-12-18 14:17:00 +0000 | [diff] [blame] | 35 | |
| 36 | /** Basic function to run @ref CLRangeKernel |
| 37 | * |
| 38 | * @note The tensor data type for the output must be U8/S8/QASYMM8/U16/S16/U32/S32/F16/F32. |
| 39 | * @note The function performs generates a sequence with the given start, end and step. |
| 40 | */ |
| 41 | class CLRange : public ICLSimpleFunction |
| 42 | { |
| 43 | public: |
Manuel Bottini | 053e751 | 2018-12-28 15:05:20 +0000 | [diff] [blame] | 44 | /** Initialize the kernel's start, end, step and output tensor. |
Vidhya Sudhan Loganathan | 5e96be7 | 2018-12-18 14:17:00 +0000 | [diff] [blame] | 45 | * |
Teresa Charlin | 6268742 | 2021-04-28 10:58:49 +0100 | [diff] [blame] | 46 | * Valid data layouts: |
| 47 | * - All |
| 48 | * |
| 49 | * Valid data type configurations: |
| 50 | * |dst | |
| 51 | * |:---------| |
| 52 | * |U8 | |
| 53 | * |S8 | |
| 54 | * |QASYMM8 | |
| 55 | * |U16 | |
| 56 | * |S16 | |
| 57 | * |U32 | |
| 58 | * |S32 | |
| 59 | * |F16 | |
| 60 | * |F32 | |
| 61 | * |
Vidhya Sudhan Loganathan | 5e96be7 | 2018-12-18 14:17:00 +0000 | [diff] [blame] | 62 | * @param[out] output Output tensor. Data types supported: U8/S8/QASYMM8/U16/S16/U32/S32/F16/F32. |
| 63 | * @param[in] start The starting value of the sequence. |
| 64 | * @param[in] end The ending (not including) value of the sequence. |
| 65 | * @param[in] step The gap between each pair of values in the sequence. Default is 1. |
| 66 | */ |
| 67 | void configure(ICLTensor *output, float start, float end, float step = 1.f); |
Manuel Bottini | 2b84be5 | 2020-04-08 10:15:51 +0100 | [diff] [blame] | 68 | /** Initialize the kernel's start, end, step and output tensor. |
| 69 | * |
| 70 | * @param[in] compile_context The compile context to be used. |
| 71 | * @param[out] output Output tensor. Data types supported: U8/S8/QASYMM8/U16/S16/U32/S32/F16/F32. |
| 72 | * @param[in] start The starting value of the sequence. |
| 73 | * @param[in] end The ending (not including) value of the sequence. |
| 74 | * @param[in] step The gap between each pair of values in the sequence. Default is 1. |
| 75 | */ |
| 76 | void configure(const CLCompileContext &compile_context, ICLTensor *output, float start, float end, float step = 1.f); |
Vidhya Sudhan Loganathan | 5e96be7 | 2018-12-18 14:17:00 +0000 | [diff] [blame] | 77 | /** Static function to check if given info will lead to a valid configuration of @ref CLRange |
| 78 | * |
| 79 | * @param[in] output Output tensor info. Data types supported: U8/S8/QASYMM8/U16/S16/U32/S32/F16/F32. |
| 80 | * @param[in] start The starting value of the sequence. |
| 81 | * @param[in] end The ending (not including) value of the sequence. |
| 82 | * @param[in] step The gap between each pair of values in the sequence. Default is 1. |
| 83 | * |
| 84 | * @return a status |
| 85 | */ |
| 86 | static Status validate(const ITensorInfo *output, float start, float end, float step = 1.f); |
| 87 | }; |
| 88 | } // namespace arm_compute |
Michalis Spyrou | f464337 | 2019-11-29 16:17:13 +0000 | [diff] [blame] | 89 | #endif /* ARM_COMPUTE_CLRANGE_H */ |