Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2021 Arm Limited. |
| 3 | * |
| 4 | * SPDX-License-Identifier: MIT |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to |
| 8 | * deal in the Software without restriction, including without limitation the |
| 9 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or |
| 10 | * sell copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in all |
| 14 | * copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 19 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 22 | * SOFTWARE. |
| 23 | */ |
| 24 | |
Michalis Spyrou | 20fca52 | 2021-06-07 14:23:57 +0100 | [diff] [blame^] | 25 | #if defined(ARM_COMPUTE_ENABLE_SVE) |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 26 | |
| 27 | #include "arm_gemm.hpp" |
| 28 | #include "src/core/NEON/kernels/arm_gemm/utils.hpp" |
| 29 | #include "src/core/NEON/kernels/assembly/depthwise.hpp" |
| 30 | #include <cstdint> |
| 31 | |
| 32 | namespace arm_conv { |
| 33 | namespace depthwise { |
| 34 | |
| 35 | struct interleave_sve_u8q_3x3_dot |
| 36 | { |
| 37 | static size_t get_packed_size(const DepthwiseArgs &); |
| 38 | static void pack_parameters(unsigned int n_channels, void *outptr, const int32_t *bias, const uint8_t *weights, const arm_gemm::Requantize32 &qp, size_t ld_weight_col, size_t ld_weight_row); |
| 39 | }; |
| 40 | |
| 41 | size_t interleave_sve_u8q_3x3_dot::get_packed_size(const DepthwiseArgs &args) |
| 42 | { |
| 43 | // We store 7 vectors for every <vector_of_ints> of channels. |
| 44 | const unsigned int n = arm_gemm::roundup( |
| 45 | arm_gemm::iceildiv((long unsigned int) args.input_channels, |
| 46 | get_vector_length<int32_t>(arm_gemm::VLType::SVE)), 4lu |
| 47 | ); |
| 48 | return n * 7 * get_vector_length<uint8_t>(arm_gemm::VLType::SVE); |
| 49 | } |
| 50 | |
| 51 | void interleave_sve_u8q_3x3_dot::pack_parameters(unsigned int n_channels, void *outptr, const int32_t *bias, const uint8_t *weights, const arm_gemm::Requantize32 &qp, size_t ld_weight_col, size_t ld_weight_row) |
| 52 | { |
| 53 | __asm__ __volatile__( |
| 54 | "mov z30.b, #0x0\n" |
| 55 | "ptrue p2.b\n" |
| 56 | "ld1rw { z29.s }, p2/Z, [%x[qp], %[offsetof_input_offset]]\n" |
| 57 | "mov z28.b, #0x1\n" |
| 58 | "cmp %x[ld_weight_col], XZR\n" |
| 59 | "mov z16.s, #0x9\n" |
| 60 | "ld1rw { z27.s }, p2/Z, [%x[qp], %[offsetof_weights_offset]]\n" |
| 61 | "csel %x[ld_weight_col], %x[ld_weight_col], %x[n_channels], NE\n" |
| 62 | "mul z27.s, p2/M, z27.s, z29.s\n" |
| 63 | "ld1rw { z26.s }, p2/Z, [%x[qp], %[offsetof_per_layer_mul]]\n" |
| 64 | "mov x19, #0x3\n" |
| 65 | "mul z27.s, p2/M, z27.s, z16.s\n" |
| 66 | "ld1rw { z25.s }, p2/Z, [%x[qp], %[offsetof_per_layer_right_shift]]\n" |
| 67 | "mul x19, %x[ld_weight_col], x19\n" |
| 68 | "cmp %x[ld_weight_row], XZR\n" |
| 69 | "add x23, %x[ld_weight_col], %x[ld_weight_col]\n" |
| 70 | "csel %x[ld_weight_row], %x[ld_weight_row], x19, NE\n" |
| 71 | "add x22, %x[weights], %x[ld_weight_row]\n" |
| 72 | "add x21, x22, %x[ld_weight_row]\n" |
| 73 | "whilelt p1.s, XZR, %x[n_channels]\n" |
| 74 | "mov x20, #0x0\n" |
| 75 | "pfalse p8.b\n" |
| 76 | "cbz %x[bias], 1f\n" |
| 77 | "ptrue p8.s\n" |
| 78 | "1:" // No bias |
| 79 | |
| 80 | "2:" // Loop |
| 81 | "mov z24.s, #0x0\n" |
| 82 | "cntp x19, p2, p1.s\n" |
| 83 | "and p0.b, p2/Z, p8.b, p1.b\n" |
| 84 | "ld1w { z23.s }, p0/Z, [%x[bias], x20, LSL #2]\n" |
| 85 | "whilelt p0.b, XZR, x19\n" |
| 86 | "ld1b { z17.b }, p0/Z, [%x[weights]]\n" |
| 87 | "ld1b { z16.b }, p0/Z, [%x[weights], %x[ld_weight_col]]\n" |
| 88 | "zip1 z18.b, z16.b, z30.b\n" |
| 89 | "ld1b { z16.b }, p0/Z, [%x[weights], x23]\n" |
| 90 | "add %x[weights], %x[weights], x19\n" |
| 91 | "zip1 z16.b, z17.b, z16.b\n" |
| 92 | "ld1b { z22.b }, p0/Z, [x22]\n" |
| 93 | "ld1b { z17.b }, p0/Z, [x22, %x[ld_weight_col]]\n" |
| 94 | "zip1 z21.b, z16.b, z18.b\n" |
| 95 | "ld1b { z16.b }, p0/Z, [x22, x23]\n" |
| 96 | "udot z24.s, z28.b, z21.b\n" |
| 97 | "add x22, x22, x19\n" |
| 98 | "zip1 z18.b, z17.b, z30.b\n" |
| 99 | "ld1b { z20.b }, p0/Z, [x21]\n" |
| 100 | "ld1b { z19.b }, p0/Z, [x21, %x[ld_weight_col]]\n" |
| 101 | "zip1 z17.b, z22.b, z16.b\n" |
| 102 | "ld1b { z16.b }, p0/Z, [x21, x23]\n" |
| 103 | "zip1 z18.b, z17.b, z18.b\n" |
| 104 | "add x21, x21, x19\n" |
| 105 | "zip1 z17.b, z19.b, z30.b\n" |
| 106 | "udot z24.s, z28.b, z18.b\n" |
| 107 | "zip1 z16.b, z20.b, z16.b\n" |
| 108 | "zip1 z16.b, z16.b, z17.b\n" |
| 109 | "udot z24.s, z28.b, z16.b\n" |
| 110 | "mls z23.s, p2/M, z24.s, z29.s\n" |
| 111 | "add z23.s, z23.s, z27.s\n" |
| 112 | "st1w { z23.s }, p2, [%x[outptr]]\n" |
| 113 | "st1b { z21.b }, p2, [%x[outptr], #1, MUL VL]\n" |
| 114 | "st1b { z18.b }, p2, [%x[outptr], #2, MUL VL]\n" |
| 115 | "st1b { z16.b }, p2, [%x[outptr], #3, MUL VL]\n" |
| 116 | "addvl %x[outptr], %x[outptr], #4\n" |
| 117 | "cbz %x[rq_mul_perchannel], 3f\n" |
| 118 | "ld1w { z26.s }, p1/Z, [%x[rq_mul_perchannel], x20, LSL #2]\n" |
| 119 | "ld1w { z25.s }, p1/Z, [%x[rq_shift_perchannel], x20, LSL #2]\n" |
| 120 | "3:" // Loop: Quantisation parameters: Store |
| 121 | "st1w { z26.s }, p2, [%x[outptr]]\n" |
| 122 | "incw x20\n" |
| 123 | "st1w { z25.s }, p2, [%x[outptr], #1, MUL VL]\n" |
| 124 | "whilelt p1.s, x20, %x[n_channels]\n" |
| 125 | "addvl %x[outptr], %x[outptr], #2\n" |
| 126 | "b.any 2b\n" |
| 127 | : [ld_weight_col] "+&r" (ld_weight_col), [ld_weight_row] "+&r" (ld_weight_row), [outptr] "+&r" (outptr), [weights] "+&r" (weights) |
| 128 | : [bias] "r" (bias), [n_channels] "r" (n_channels), [offsetof_input_offset] "I" (offsetof(arm_gemm::Requantize32, a_offset)), [offsetof_per_layer_mul] "I" (offsetof(arm_gemm::Requantize32, per_layer_mul)), [offsetof_per_layer_right_shift] "I" (offsetof(arm_gemm::Requantize32, per_layer_right_shift)), [offsetof_weights_offset] "I" (offsetof(arm_gemm::Requantize32, b_offset)), [qp] "r" (&qp), [rq_mul_perchannel] "r" (qp.per_channel_muls), [rq_shift_perchannel] "r" (qp.per_channel_right_shifts) |
| 129 | : "cc", "memory", "p0", "p1", "p2", "p8", "x19", "x20", "x21", "x22", "x23", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30" |
| 130 | ); |
| 131 | } |
| 132 | |
| 133 | } // namespace depthwise |
| 134 | } // namespace arm_conv |
| 135 | |
Michalis Spyrou | 20fca52 | 2021-06-07 14:23:57 +0100 | [diff] [blame^] | 136 | #endif // defined(ARM_COMPUTE_ENABLE_SVE) |