Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1 | /* |
Pablo Marquez Tello | 2676424 | 2024-02-22 15:52:59 +0000 | [diff] [blame^] | 2 | * Copyright (c) 2021-2024 Arm Limited. |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: MIT |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to |
| 8 | * deal in the Software without restriction, including without limitation the |
| 9 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or |
| 10 | * sell copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in all |
| 14 | * copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 19 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 22 | * SOFTWARE. |
| 23 | */ |
| 24 | |
| 25 | #include "arm_gemm.hpp" |
| 26 | |
| 27 | #include <cstddef> |
| 28 | #include <cstdint> |
| 29 | |
| 30 | #if defined(__aarch64__) |
| 31 | |
| 32 | namespace arm_conv { |
| 33 | namespace depthwise { |
| 34 | |
| 35 | void a64_s8q_nhwc_3x3_s2_output2x2_mla_depthfirst_impl( |
| 36 | const unsigned int n_channels, |
| 37 | const int8_t *const *const inptrs, |
| 38 | const int8_t *const weights, |
| 39 | const int32_t *const bias, |
| 40 | const arm_gemm::Requantize32 &qp, |
| 41 | const int32_t *const requant_muls, |
| 42 | const int32_t *const requant_shifts, |
| 43 | int8_t *const *const outptrs |
| 44 | ) |
| 45 | { |
| 46 | struct Params |
| 47 | { |
Pablo Marquez Tello | 2676424 | 2024-02-22 15:52:59 +0000 | [diff] [blame^] | 48 | uint64_t n_channels; |
ramelg01 | 8a16488 | 2022-04-07 02:42:52 +0100 | [diff] [blame] | 49 | const void *weights; |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 50 | const int32_t *bias; |
| 51 | const arm_gemm::Requantize32 *requant; |
| 52 | const int32_t *const requant_muls; |
| 53 | const int32_t *const requant_shifts; |
| 54 | int8_t *const *const outptrs; |
| 55 | const int8_t *inptrs[25]; |
| 56 | |
| 57 | Params( |
| 58 | long unsigned int n_channels, |
| 59 | const int8_t *const *inptrs_raw, |
ramelg01 | 8a16488 | 2022-04-07 02:42:52 +0100 | [diff] [blame] | 60 | const void *const weights, |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 61 | const int32_t *const bias, |
| 62 | const arm_gemm::Requantize32 &qp, |
| 63 | const int32_t *const requant_muls, |
| 64 | const int32_t *const requant_shifts, |
| 65 | int8_t *const *outptrs |
| 66 | ) : n_channels(n_channels), weights(weights), bias(bias), |
| 67 | requant(&qp), requant_muls(requant_muls), |
| 68 | requant_shifts(requant_shifts), outptrs(outptrs) |
| 69 | { |
| 70 | inptrs[0] = inptrs_raw[12]; |
| 71 | inptrs[1] = inptrs_raw[0]; |
| 72 | inptrs[2] = inptrs_raw[1]; |
| 73 | inptrs[3] = inptrs_raw[3]; |
| 74 | inptrs[4] = inptrs_raw[4]; |
| 75 | inptrs[5] = inptrs_raw[5]; |
| 76 | inptrs[6] = inptrs_raw[6]; |
| 77 | inptrs[7] = inptrs_raw[2]; |
| 78 | inptrs[8] = inptrs_raw[8]; |
| 79 | inptrs[9] = inptrs_raw[9]; |
| 80 | inptrs[10] = inptrs_raw[7]; |
| 81 | inptrs[11] = inptrs_raw[15]; |
| 82 | inptrs[12] = inptrs_raw[10]; |
| 83 | inptrs[13] = inptrs_raw[16]; |
| 84 | inptrs[14] = inptrs_raw[11]; |
| 85 | inptrs[15] = inptrs_raw[18]; |
| 86 | inptrs[16] = inptrs_raw[13]; |
| 87 | inptrs[17] = inptrs_raw[19]; |
| 88 | inptrs[18] = inptrs_raw[20]; |
| 89 | inptrs[19] = inptrs_raw[14]; |
| 90 | inptrs[20] = inptrs_raw[21]; |
| 91 | inptrs[21] = inptrs_raw[17]; |
| 92 | inptrs[22] = inptrs_raw[23]; |
| 93 | inptrs[23] = inptrs_raw[22]; |
| 94 | inptrs[24] = inptrs_raw[24]; |
| 95 | |
| 96 | } |
| 97 | }; |
| 98 | |
| 99 | const Params params(n_channels, inptrs, weights, bias, qp, |
| 100 | requant_muls, requant_shifts, outptrs); |
| 101 | |
| 102 | __asm__ __volatile__( |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 103 | "ldr x7, [%x[params], %[offsetof_Params_n_channels]]\n" |
| 104 | "ldr x23, [%x[params], %[offsetof_Params_requant]]\n" |
| 105 | "lsr x8, x7, #0x3\n" |
| 106 | "add x20, x23, %[offsetof_Requantize32_a_offset]\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 107 | "ld1r { v6.16b }, [x20]\n" |
ramelg01 | 8a16488 | 2022-04-07 02:42:52 +0100 | [diff] [blame] | 108 | "ldr x22, [%x[params], %[offsetof_Params_outptrs]]\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 109 | "add x21, x23, %[offsetof_Requantize32_b_offset]\n" |
| 110 | "add x20, x23, %[offsetof_Requantize32_c_offset]\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 111 | "ld1r { v15.16b }, [x21]\n" |
| 112 | "ld1r { v13.8h }, [x20]\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 113 | "add x21, x23, %[offsetof_Requantize32_minval]\n" |
| 114 | "add x20, x23, %[offsetof_Requantize32_maxval]\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 115 | "ld1r { v17.8h }, [x21]\n" |
| 116 | "ld1r { v24.8h }, [x20]\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 117 | "mov x17, #0x0\n" |
| 118 | "mov x16, #0x0\n" |
| 119 | "add x15, %x[params], %[offsetof_Params_inptrs]\n" |
| 120 | "ldr x14, [%x[params], %[offsetof_Params_weights]]\n" |
ramelg01 | 8a16488 | 2022-04-07 02:42:52 +0100 | [diff] [blame] | 121 | "ldr x13, [%x[params], %[offsetof_Params_requant_muls]]\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 122 | "ldr x12, [%x[params], %[offsetof_Params_requant_shifts]]\n" |
| 123 | "ldp x11, x10, [x22, #0x0]\n" |
| 124 | "ldp x9, x28, [x22, #0x10]\n" |
| 125 | "cbz x8, 3f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 126 | "ldr d11, [x14, #0x0]\n" |
| 127 | "ldr d22, [x14, #0x8]\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 128 | "subs x8, x8, #0x1\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 129 | "ssubl v11.8h, v11.8b, v15.8b\n" |
| 130 | "ldr d14, [x14, #0x10]\n" |
| 131 | "ldr d28, [x14, #0x18]\n" |
| 132 | "ssubl v22.8h, v22.8b, v15.8b\n" |
| 133 | "ssubl v14.8h, v14.8b, v15.8b\n" |
| 134 | "ldr d18, [x14, #0x20]\n" |
| 135 | "ldr d9, [x14, #0x28]\n" |
| 136 | "ssubl v28.8h, v28.8b, v15.8b\n" |
| 137 | "ssubl v18.8h, v18.8b, v15.8b\n" |
| 138 | "ldr d26, [x14, #0x30]\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 139 | "ldr d7, [x14, #0x38]\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 140 | "ssubl v9.8h, v9.8b, v15.8b\n" |
| 141 | "ssubl v26.8h, v26.8b, v15.8b\n" |
| 142 | "ldr d4, [x14, #0x40]\n" |
| 143 | "ldr x20, [%x[params], %[offsetof_Params_bias]]\n" |
| 144 | "ssubl v7.8h, v7.8b, v15.8b\n" |
| 145 | "ssubl v4.8h, v4.8b, v15.8b\n" |
| 146 | "ldr q5, [x20, #0x0]\n" |
| 147 | "ldr q3, [x20, #0x10]\n" |
| 148 | "add x20, x20, #0x20\n" |
| 149 | "str x20, [%x[params], %[offsetof_Params_bias]]\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 150 | "ldp x27, x26, [x15, #0x0]\n" |
| 151 | "ldp x25, x24, [x15, #0x10]\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 152 | "mov v21.16b, v5.16b\n" |
| 153 | "mov v8.16b, v3.16b\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 154 | "ldp x23, x22, [x15, #0x20]\n" |
| 155 | "ldp x21, x20, [x15, #0x30]\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 156 | "mov v20.16b, v5.16b\n" |
| 157 | "mov v0.16b, v3.16b\n" |
| 158 | "ldr d25, [x27, x17]\n" |
| 159 | "ldr d27, [x26, x17]\n" |
| 160 | "mov v19.16b, v5.16b\n" |
| 161 | "mov v31.16b, v3.16b\n" |
| 162 | "ldr d1, [x25, x17]\n" |
| 163 | "ldr d2, [x24, x17]\n" |
| 164 | "ssubl v25.8h, v25.8b, v6.8b\n" |
| 165 | "ssubl v27.8h, v27.8b, v6.8b\n" |
| 166 | "ldr d12, [x23, x17]\n" |
| 167 | "ldr d16, [x22, x17]\n" |
| 168 | "ssubl v1.8h, v1.8b, v6.8b\n" |
| 169 | "ssubl v2.8h, v2.8b, v6.8b\n" |
| 170 | "ldr d23, [x21, x17]\n" |
| 171 | "ldr d10, [x20, x17]\n" |
| 172 | "ssubl v12.8h, v12.8b, v6.8b\n" |
| 173 | "ssubl v16.8h, v16.8b, v6.8b\n" |
| 174 | "ssubl v23.8h, v23.8b, v6.8b\n" |
| 175 | "ssubl v10.8h, v10.8b, v6.8b\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 176 | "beq 2f\n" |
| 177 | "1:" // Loop |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 178 | "ldr q30, [x13, #0x0]\n" |
| 179 | "ldr q29, [x12, #0x0]\n" |
| 180 | "smlal v5.4s, v25.4h, v4.4h\n" |
| 181 | "smlal2 v3.4s, v25.8h, v4.8h\n" |
| 182 | "ldr x21, [x15, #0x58]\n" |
| 183 | "ldr x20, [x15, #0x78]\n" |
| 184 | "smlal v5.4s, v27.4h, v11.4h\n" |
| 185 | "smlal v21.4s, v25.4h, v26.4h\n" |
| 186 | "ldr x25, [x15, #0x60]\n" |
| 187 | "ldr x24, [x15, #0x80]\n" |
| 188 | "smlal v20.4s, v25.4h, v14.4h\n" |
| 189 | "smlal v19.4s, v25.4h, v11.4h\n" |
| 190 | "smlal2 v3.4s, v27.8h, v11.8h\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 191 | "ldr d27, [x21, x17]\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 192 | "ssubl v27.8h, v27.8b, v6.8b\n" |
| 193 | "smlal v5.4s, v1.4h, v22.4h\n" |
| 194 | "smlal2 v8.4s, v25.8h, v26.8h\n" |
| 195 | "smlal2 v0.4s, v25.8h, v14.8h\n" |
| 196 | "ldr x23, [x15, #0x68]\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 197 | "ldr x22, [x15, #0x88]\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 198 | "smlal2 v31.4s, v25.8h, v11.8h\n" |
| 199 | "ldr d25, [x20, x17]\n" |
| 200 | "ssubl v25.8h, v25.8b, v6.8b\n" |
| 201 | "smlal v21.4s, v2.4h, v22.4h\n" |
| 202 | "smlal v20.4s, v27.4h, v28.4h\n" |
| 203 | "smlal v19.4s, v25.4h, v18.4h\n" |
| 204 | "ldr x21, [x15, #0x40]\n" |
| 205 | "ldr x20, [x15, #0x70]\n" |
| 206 | "smlal2 v3.4s, v1.8h, v22.8h\n" |
| 207 | "ldr d1, [x25, x17]\n" |
| 208 | "ssubl v1.8h, v1.8b, v6.8b\n" |
| 209 | "smlal v5.4s, v16.4h, v28.4h\n" |
| 210 | "smlal2 v8.4s, v2.8h, v22.8h\n" |
| 211 | "ldr d2, [x24, x17]\n" |
| 212 | "ssubl v2.8h, v2.8b, v6.8b\n" |
| 213 | "smlal2 v0.4s, v27.8h, v28.8h\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 214 | "ldr d27, [x23, x17]\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 215 | "smlal2 v31.4s, v25.8h, v18.8h\n" |
| 216 | "ldr d25, [x22, x17]\n" |
| 217 | "smlal v21.4s, v12.4h, v14.4h\n" |
| 218 | "ldr x25, [x15, #0x98]\n" |
| 219 | "smlal v20.4s, v1.4h, v11.4h\n" |
| 220 | "smlal v19.4s, v2.4h, v22.4h\n" |
| 221 | "ldr x24, [x15, #0x50]\n" |
| 222 | "smlal2 v3.4s, v16.8h, v28.8h\n" |
| 223 | "ldr d16, [x21, x17]\n" |
| 224 | "ssubl v27.8h, v27.8b, v6.8b\n" |
| 225 | "smlal v5.4s, v23.4h, v18.4h\n" |
| 226 | "ssubl v25.8h, v25.8b, v6.8b\n" |
| 227 | "smlal2 v8.4s, v12.8h, v14.8h\n" |
| 228 | "ldr d12, [x20, x17]\n" |
| 229 | "ldr x23, [x15, #0x48]\n" |
| 230 | "smlal2 v0.4s, v1.8h, v11.8h\n" |
| 231 | "smlal2 v31.4s, v2.8h, v22.8h\n" |
| 232 | "ldr x21, [x15, #0x90]\n" |
| 233 | "ldr x20, [x15, #0xa8]\n" |
| 234 | "smlal v21.4s, v10.4h, v11.4h\n" |
| 235 | "smlal v20.4s, v27.4h, v18.4h\n" |
| 236 | "ssubl v16.8h, v16.8b, v6.8b\n" |
| 237 | "ldr x22, [x15, #0xa0]\n" |
| 238 | "smlal v19.4s, v25.4h, v9.4h\n" |
| 239 | "smlal2 v3.4s, v23.8h, v18.8h\n" |
| 240 | "ldr d23, [x25, x17]\n" |
| 241 | "ssubl v12.8h, v12.8b, v6.8b\n" |
| 242 | "ssubl v23.8h, v23.8b, v6.8b\n" |
| 243 | "smlal v5.4s, v10.4h, v14.4h\n" |
| 244 | "smlal2 v8.4s, v10.8h, v11.8h\n" |
| 245 | "ldr d11, [x24, x17]\n" |
| 246 | "ssubl v11.8h, v11.8b, v6.8b\n" |
| 247 | "smlal2 v0.4s, v27.8h, v18.8h\n" |
| 248 | "ldr d27, [x23, x17]\n" |
| 249 | "smlal2 v31.4s, v25.8h, v9.8h\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 250 | "ldr d25, [x21, x17]\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 251 | "ldr x21, [x15, #0xb0]\n" |
| 252 | "smlal v21.4s, v16.4h, v18.4h\n" |
| 253 | "smlal v20.4s, v12.4h, v22.4h\n" |
| 254 | "smlal v19.4s, v23.4h, v14.4h\n" |
| 255 | "smlal2 v3.4s, v10.8h, v14.8h\n" |
| 256 | "ldr d10, [x20, x17]\n" |
| 257 | "ssubl v27.8h, v27.8b, v6.8b\n" |
| 258 | "ssubl v25.8h, v25.8b, v6.8b\n" |
| 259 | "ssubl v10.8h, v10.8b, v6.8b\n" |
| 260 | "smlal v5.4s, v11.4h, v9.4h\n" |
| 261 | "ldr x20, [x15, #0xb8]\n" |
| 262 | "smlal2 v8.4s, v16.8h, v18.8h\n" |
| 263 | "ldr d18, [x22, x17]\n" |
| 264 | "ldr d16, [x21, x17]\n" |
| 265 | "smlal2 v0.4s, v12.8h, v22.8h\n" |
| 266 | "ldr d22, [x20, x17]\n" |
| 267 | "smlal2 v31.4s, v23.8h, v14.8h\n" |
| 268 | "ldr q14, [x13, #0x10]\n" |
| 269 | "smlal v21.4s, v27.4h, v9.4h\n" |
| 270 | "smlal v20.4s, v25.4h, v26.4h\n" |
| 271 | "smlal v19.4s, v10.4h, v28.4h\n" |
| 272 | "ssubl v18.8h, v18.8b, v6.8b\n" |
| 273 | "ldr x21, [x15, #0xc0]\n" |
| 274 | "smlal2 v3.4s, v11.8h, v9.8h\n" |
| 275 | "ssubl v16.8h, v16.8b, v6.8b\n" |
| 276 | "smlal v5.4s, v1.4h, v26.4h\n" |
| 277 | "ldr x20, [%x[params], %[offsetof_Params_bias]]\n" |
| 278 | "smlal2 v8.4s, v27.8h, v9.8h\n" |
| 279 | "ldr d27, [x21, x17]\n" |
| 280 | "smlal2 v0.4s, v25.8h, v26.8h\n" |
| 281 | "ldr q25, [x12, #0x10]\n" |
| 282 | "smlal2 v31.4s, v10.8h, v28.8h\n" |
| 283 | "smlal v21.4s, v11.4h, v28.4h\n" |
| 284 | "ssubl v22.8h, v22.8b, v6.8b\n" |
| 285 | "add x14, x14, #0x48\n" |
| 286 | "smlal v20.4s, v18.4h, v7.4h\n" |
| 287 | "smlal v19.4s, v16.4h, v7.4h\n" |
| 288 | "ssubl v27.8h, v27.8b, v6.8b\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 289 | "add x17, x17, #0x8\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 290 | "smlal2 v3.4s, v1.8h, v26.8h\n" |
| 291 | "smlal v5.4s, v12.4h, v7.4h\n" |
| 292 | "sqrdmulh v5.4s, v5.4s, v30.4s\n" |
| 293 | "subs x8, x8, #0x1\n" |
| 294 | "smlal2 v8.4s, v11.8h, v28.8h\n" |
| 295 | "smlal2 v0.4s, v18.8h, v7.8h\n" |
| 296 | "and v28.16b, v5.16b, v29.16b\n" |
| 297 | "add x13, x13, #0x20\n" |
| 298 | "smlal2 v31.4s, v16.8h, v7.8h\n" |
| 299 | "smlal v21.4s, v2.4h, v7.4h\n" |
| 300 | "sshr v28.4s, v28.4s, #0x1f\n" |
| 301 | "add x12, x12, #0x20\n" |
| 302 | "smlal v20.4s, v10.4h, v9.4h\n" |
| 303 | "smlal v19.4s, v22.4h, v26.4h\n" |
| 304 | "sqadd v5.4s, v5.4s, v28.4s\n" |
| 305 | "smlal2 v3.4s, v12.8h, v7.8h\n" |
| 306 | "smlal2 v8.4s, v2.8h, v7.8h\n" |
| 307 | "sqrdmulh v3.4s, v3.4s, v14.4s\n" |
| 308 | "smlal2 v0.4s, v10.8h, v9.8h\n" |
| 309 | "smlal2 v31.4s, v22.8h, v26.8h\n" |
| 310 | "and v16.16b, v3.16b, v25.16b\n" |
| 311 | "smlal v21.4s, v23.4h, v4.4h\n" |
| 312 | "smlal v20.4s, v22.4h, v4.4h\n" |
| 313 | "sqrdmulh v21.4s, v21.4s, v30.4s\n" |
| 314 | "smlal v19.4s, v27.4h, v4.4h\n" |
| 315 | "smlal2 v8.4s, v23.8h, v4.8h\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 316 | "sqrdmulh v20.4s, v20.4s, v30.4s\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 317 | "smlal2 v0.4s, v22.8h, v4.8h\n" |
| 318 | "smlal2 v31.4s, v27.8h, v4.8h\n" |
| 319 | "sqrdmulh v19.4s, v19.4s, v30.4s\n" |
| 320 | "sshr v16.4s, v16.4s, #0x1f\n" |
| 321 | "and v12.16b, v21.16b, v29.16b\n" |
| 322 | "sqrdmulh v8.4s, v8.4s, v14.4s\n" |
| 323 | "and v23.16b, v20.16b, v29.16b\n" |
| 324 | "sqrdmulh v0.4s, v0.4s, v14.4s\n" |
| 325 | "and v9.16b, v19.16b, v29.16b\n" |
| 326 | "sqrdmulh v31.4s, v31.4s, v14.4s\n" |
| 327 | "sqadd v3.4s, v3.4s, v16.4s\n" |
| 328 | "sshr v12.4s, v12.4s, #0x1f\n" |
| 329 | "and v18.16b, v8.16b, v25.16b\n" |
| 330 | "sshr v23.4s, v23.4s, #0x1f\n" |
| 331 | "and v22.16b, v0.16b, v25.16b\n" |
| 332 | "sshr v9.4s, v9.4s, #0x1f\n" |
| 333 | "and v16.16b, v31.16b, v25.16b\n" |
| 334 | "sqadd v21.4s, v21.4s, v12.4s\n" |
| 335 | "sshr v18.4s, v18.4s, #0x1f\n" |
| 336 | "sqadd v20.4s, v20.4s, v23.4s\n" |
| 337 | "sshr v22.4s, v22.4s, #0x1f\n" |
| 338 | "sqadd v19.4s, v19.4s, v9.4s\n" |
| 339 | "sshr v16.4s, v16.4s, #0x1f\n" |
| 340 | "srshl v5.4s, v5.4s, v29.4s\n" |
| 341 | "srshl v21.4s, v21.4s, v29.4s\n" |
| 342 | "sqadd v8.4s, v8.4s, v18.4s\n" |
| 343 | "srshl v20.4s, v20.4s, v29.4s\n" |
| 344 | "sqadd v0.4s, v0.4s, v22.4s\n" |
| 345 | "srshl v19.4s, v19.4s, v29.4s\n" |
| 346 | "sqadd v31.4s, v31.4s, v16.4s\n" |
| 347 | "srshl v3.4s, v3.4s, v25.4s\n" |
| 348 | "sqxtn v5.4h, v5.4s\n" |
| 349 | "srshl v8.4s, v8.4s, v25.4s\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 350 | "sqxtn v21.4h, v21.4s\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 351 | "srshl v0.4s, v0.4s, v25.4s\n" |
| 352 | "sqxtn v20.4h, v20.4s\n" |
| 353 | "srshl v31.4s, v31.4s, v25.4s\n" |
| 354 | "sqxtn v19.4h, v19.4s\n" |
| 355 | "sqxtn2 v5.8h, v3.4s\n" |
| 356 | "sqxtn2 v21.8h, v8.4s\n" |
| 357 | "sqxtn2 v20.8h, v0.4s\n" |
| 358 | "sqxtn2 v19.8h, v31.4s\n" |
| 359 | "sqadd v5.8h, v5.8h, v13.8h\n" |
| 360 | "sqadd v21.8h, v21.8h, v13.8h\n" |
| 361 | "sqadd v20.8h, v20.8h, v13.8h\n" |
| 362 | "sqadd v19.8h, v19.8h, v13.8h\n" |
| 363 | "smax v5.8h, v5.8h, v17.8h\n" |
| 364 | "smax v21.8h, v21.8h, v17.8h\n" |
| 365 | "smax v20.8h, v20.8h, v17.8h\n" |
| 366 | "smax v19.8h, v19.8h, v17.8h\n" |
| 367 | "smin v5.8h, v5.8h, v24.8h\n" |
| 368 | "smin v21.8h, v21.8h, v24.8h\n" |
| 369 | "smin v20.8h, v20.8h, v24.8h\n" |
| 370 | "smin v19.8h, v19.8h, v24.8h\n" |
| 371 | "uzp1 v5.16b, v5.16b, v5.16b\n" |
| 372 | "str d5, [x11, x16]\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 373 | "uzp1 v21.16b, v21.16b, v21.16b\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 374 | "uzp1 v20.16b, v20.16b, v20.16b\n" |
| 375 | "str d21, [x10, x16]\n" |
| 376 | "uzp1 v19.16b, v19.16b, v19.16b\n" |
| 377 | "str d20, [x9, x16]\n" |
| 378 | "str d19, [x28, x16]\n" |
| 379 | "ldr q5, [x20, #0x0]\n" |
| 380 | "ldr q3, [x20, #0x10]\n" |
| 381 | "add x20, x20, #0x20\n" |
| 382 | "ldr d11, [x14, #0x0]\n" |
| 383 | "ldr d22, [x14, #0x8]\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 384 | "add x16, x16, #0x8\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 385 | "str x20, [%x[params], %[offsetof_Params_bias]]\n" |
| 386 | "ldr d14, [x14, #0x10]\n" |
| 387 | "ldr d28, [x14, #0x18]\n" |
| 388 | "mov v21.16b, v5.16b\n" |
| 389 | "mov v8.16b, v3.16b\n" |
| 390 | "ldr d18, [x14, #0x20]\n" |
| 391 | "ldr d9, [x14, #0x28]\n" |
| 392 | "mov v20.16b, v5.16b\n" |
| 393 | "mov v0.16b, v3.16b\n" |
| 394 | "ldr d26, [x14, #0x30]\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 395 | "ldr d7, [x14, #0x38]\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 396 | "mov v19.16b, v5.16b\n" |
| 397 | "mov v31.16b, v3.16b\n" |
| 398 | "ldr d4, [x14, #0x40]\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 399 | "ldp x27, x26, [x15, #0x0]\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 400 | "ssubl v11.8h, v11.8b, v15.8b\n" |
| 401 | "ssubl v22.8h, v22.8b, v15.8b\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 402 | "ldp x25, x24, [x15, #0x10]\n" |
| 403 | "ldp x23, x22, [x15, #0x20]\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 404 | "ssubl v14.8h, v14.8b, v15.8b\n" |
| 405 | "ssubl v28.8h, v28.8b, v15.8b\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 406 | "ldp x21, x20, [x15, #0x30]\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 407 | "ldr d25, [x27, x17]\n" |
| 408 | "ssubl v18.8h, v18.8b, v15.8b\n" |
| 409 | "ssubl v9.8h, v9.8b, v15.8b\n" |
| 410 | "ldr d27, [x26, x17]\n" |
| 411 | "ldr d1, [x25, x17]\n" |
| 412 | "ssubl v26.8h, v26.8b, v15.8b\n" |
| 413 | "ssubl v7.8h, v7.8b, v15.8b\n" |
| 414 | "ldr d2, [x24, x17]\n" |
| 415 | "ldr d12, [x23, x17]\n" |
| 416 | "ssubl v4.8h, v4.8b, v15.8b\n" |
| 417 | "ssubl v25.8h, v25.8b, v6.8b\n" |
| 418 | "ldr d16, [x22, x17]\n" |
| 419 | "ldr d23, [x21, x17]\n" |
| 420 | "ssubl v27.8h, v27.8b, v6.8b\n" |
| 421 | "ssubl v1.8h, v1.8b, v6.8b\n" |
| 422 | "ldr d10, [x20, x17]\n" |
| 423 | "ssubl v2.8h, v2.8b, v6.8b\n" |
| 424 | "ssubl v12.8h, v12.8b, v6.8b\n" |
| 425 | "ssubl v16.8h, v16.8b, v6.8b\n" |
| 426 | "ssubl v23.8h, v23.8b, v6.8b\n" |
| 427 | "ssubl v10.8h, v10.8b, v6.8b\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 428 | "bgt 1b\n" |
| 429 | "2:" // Tail |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 430 | "ldr q29, [x13, #0x0]\n" |
| 431 | "ldr q30, [x12, #0x0]\n" |
| 432 | "smlal v5.4s, v25.4h, v4.4h\n" |
| 433 | "smlal2 v3.4s, v25.8h, v4.8h\n" |
| 434 | "ldr x21, [x15, #0x58]\n" |
| 435 | "ldr x20, [x15, #0x78]\n" |
| 436 | "smlal v5.4s, v27.4h, v11.4h\n" |
| 437 | "smlal v21.4s, v25.4h, v26.4h\n" |
| 438 | "ldr x25, [x15, #0x60]\n" |
| 439 | "ldr x24, [x15, #0x80]\n" |
| 440 | "smlal v20.4s, v25.4h, v14.4h\n" |
| 441 | "smlal v19.4s, v25.4h, v11.4h\n" |
| 442 | "smlal2 v3.4s, v27.8h, v11.8h\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 443 | "ldr d27, [x21, x17]\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 444 | "ssubl v27.8h, v27.8b, v6.8b\n" |
| 445 | "smlal v5.4s, v1.4h, v22.4h\n" |
| 446 | "smlal2 v8.4s, v25.8h, v26.8h\n" |
| 447 | "smlal2 v0.4s, v25.8h, v14.8h\n" |
| 448 | "ldr x23, [x15, #0x68]\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 449 | "ldr x22, [x15, #0x88]\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 450 | "smlal2 v31.4s, v25.8h, v11.8h\n" |
| 451 | "ldr d25, [x20, x17]\n" |
| 452 | "ssubl v25.8h, v25.8b, v6.8b\n" |
| 453 | "smlal v21.4s, v2.4h, v22.4h\n" |
| 454 | "smlal v20.4s, v27.4h, v28.4h\n" |
| 455 | "smlal v19.4s, v25.4h, v18.4h\n" |
| 456 | "ldr x21, [x15, #0x40]\n" |
| 457 | "ldr x20, [x15, #0x70]\n" |
| 458 | "smlal2 v3.4s, v1.8h, v22.8h\n" |
| 459 | "ldr d1, [x25, x17]\n" |
| 460 | "ssubl v1.8h, v1.8b, v6.8b\n" |
| 461 | "smlal v5.4s, v16.4h, v28.4h\n" |
| 462 | "smlal2 v8.4s, v2.8h, v22.8h\n" |
| 463 | "ldr d2, [x24, x17]\n" |
| 464 | "ssubl v2.8h, v2.8b, v6.8b\n" |
| 465 | "smlal2 v0.4s, v27.8h, v28.8h\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 466 | "ldr d27, [x23, x17]\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 467 | "smlal2 v31.4s, v25.8h, v18.8h\n" |
| 468 | "ldr d25, [x22, x17]\n" |
| 469 | "smlal v21.4s, v12.4h, v14.4h\n" |
| 470 | "ldr x25, [x15, #0x98]\n" |
| 471 | "smlal v20.4s, v1.4h, v11.4h\n" |
| 472 | "smlal v19.4s, v2.4h, v22.4h\n" |
| 473 | "ldr x24, [x15, #0x50]\n" |
| 474 | "smlal2 v3.4s, v16.8h, v28.8h\n" |
| 475 | "ldr d16, [x21, x17]\n" |
| 476 | "ssubl v27.8h, v27.8b, v6.8b\n" |
| 477 | "smlal v5.4s, v23.4h, v18.4h\n" |
| 478 | "ssubl v25.8h, v25.8b, v6.8b\n" |
| 479 | "smlal2 v8.4s, v12.8h, v14.8h\n" |
| 480 | "ldr d12, [x20, x17]\n" |
| 481 | "ldr x23, [x15, #0x48]\n" |
| 482 | "smlal2 v0.4s, v1.8h, v11.8h\n" |
| 483 | "smlal2 v31.4s, v2.8h, v22.8h\n" |
| 484 | "ldr x21, [x15, #0x90]\n" |
| 485 | "ldr x20, [x15, #0xa8]\n" |
| 486 | "smlal v21.4s, v10.4h, v11.4h\n" |
| 487 | "smlal v20.4s, v27.4h, v18.4h\n" |
| 488 | "ssubl v16.8h, v16.8b, v6.8b\n" |
| 489 | "ldr x22, [x15, #0xa0]\n" |
| 490 | "smlal v19.4s, v25.4h, v9.4h\n" |
| 491 | "smlal2 v3.4s, v23.8h, v18.8h\n" |
| 492 | "ldr d23, [x25, x17]\n" |
| 493 | "ssubl v12.8h, v12.8b, v6.8b\n" |
| 494 | "ssubl v23.8h, v23.8b, v6.8b\n" |
| 495 | "smlal v5.4s, v10.4h, v14.4h\n" |
| 496 | "smlal2 v8.4s, v10.8h, v11.8h\n" |
| 497 | "ldr d11, [x24, x17]\n" |
| 498 | "ssubl v11.8h, v11.8b, v6.8b\n" |
| 499 | "smlal2 v0.4s, v27.8h, v18.8h\n" |
| 500 | "ldr d27, [x23, x17]\n" |
| 501 | "smlal2 v31.4s, v25.8h, v9.8h\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 502 | "ldr d25, [x21, x17]\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 503 | "ldr x21, [x15, #0xb0]\n" |
| 504 | "smlal v21.4s, v16.4h, v18.4h\n" |
| 505 | "smlal v20.4s, v12.4h, v22.4h\n" |
| 506 | "smlal v19.4s, v23.4h, v14.4h\n" |
| 507 | "smlal2 v3.4s, v10.8h, v14.8h\n" |
| 508 | "ldr d10, [x20, x17]\n" |
| 509 | "ssubl v27.8h, v27.8b, v6.8b\n" |
| 510 | "ssubl v25.8h, v25.8b, v6.8b\n" |
| 511 | "ssubl v10.8h, v10.8b, v6.8b\n" |
| 512 | "smlal v5.4s, v11.4h, v9.4h\n" |
| 513 | "ldr x20, [x15, #0xb8]\n" |
| 514 | "smlal2 v8.4s, v16.8h, v18.8h\n" |
| 515 | "ldr d16, [x22, x17]\n" |
| 516 | "ldr d18, [x21, x17]\n" |
| 517 | "smlal2 v0.4s, v12.8h, v22.8h\n" |
| 518 | "ldr d22, [x20, x17]\n" |
| 519 | "smlal2 v31.4s, v23.8h, v14.8h\n" |
| 520 | "ldr q14, [x13, #0x10]\n" |
| 521 | "smlal v21.4s, v27.4h, v9.4h\n" |
| 522 | "smlal v20.4s, v25.4h, v26.4h\n" |
| 523 | "smlal v19.4s, v10.4h, v28.4h\n" |
| 524 | "ssubl v16.8h, v16.8b, v6.8b\n" |
| 525 | "ldr x20, [x15, #0xc0]\n" |
| 526 | "smlal2 v3.4s, v11.8h, v9.8h\n" |
| 527 | "ssubl v18.8h, v18.8b, v6.8b\n" |
| 528 | "smlal v5.4s, v1.4h, v26.4h\n" |
| 529 | "tst x7, #0x7\n" |
| 530 | "smlal2 v8.4s, v27.8h, v9.8h\n" |
| 531 | "ldr d27, [x20, x17]\n" |
| 532 | "smlal2 v0.4s, v25.8h, v26.8h\n" |
| 533 | "ldr q25, [x12, #0x10]\n" |
| 534 | "smlal2 v31.4s, v10.8h, v28.8h\n" |
| 535 | "smlal v21.4s, v11.4h, v28.4h\n" |
| 536 | "ssubl v22.8h, v22.8b, v6.8b\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 537 | "add x17, x17, #0x8\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 538 | "smlal v20.4s, v16.4h, v7.4h\n" |
| 539 | "smlal v19.4s, v18.4h, v7.4h\n" |
| 540 | "ssubl v27.8h, v27.8b, v6.8b\n" |
| 541 | "add x13, x13, #0x20\n" |
| 542 | "smlal2 v3.4s, v1.8h, v26.8h\n" |
| 543 | "smlal v5.4s, v12.4h, v7.4h\n" |
| 544 | "sqrdmulh v5.4s, v5.4s, v29.4s\n" |
| 545 | "add x12, x12, #0x20\n" |
| 546 | "smlal2 v8.4s, v11.8h, v28.8h\n" |
| 547 | "smlal2 v0.4s, v16.8h, v7.8h\n" |
| 548 | "and v16.16b, v5.16b, v30.16b\n" |
| 549 | "smlal2 v31.4s, v18.8h, v7.8h\n" |
| 550 | "smlal v21.4s, v2.4h, v7.4h\n" |
| 551 | "sshr v16.4s, v16.4s, #0x1f\n" |
| 552 | "smlal v20.4s, v10.4h, v9.4h\n" |
| 553 | "smlal v19.4s, v22.4h, v26.4h\n" |
| 554 | "sqadd v5.4s, v5.4s, v16.4s\n" |
| 555 | "smlal2 v3.4s, v12.8h, v7.8h\n" |
| 556 | "smlal2 v8.4s, v2.8h, v7.8h\n" |
| 557 | "sqrdmulh v3.4s, v3.4s, v14.4s\n" |
| 558 | "smlal2 v0.4s, v10.8h, v9.8h\n" |
| 559 | "smlal2 v31.4s, v22.8h, v26.8h\n" |
| 560 | "and v16.16b, v3.16b, v25.16b\n" |
| 561 | "smlal v21.4s, v23.4h, v4.4h\n" |
| 562 | "smlal v20.4s, v22.4h, v4.4h\n" |
| 563 | "sqrdmulh v21.4s, v21.4s, v29.4s\n" |
| 564 | "smlal v19.4s, v27.4h, v4.4h\n" |
| 565 | "smlal2 v8.4s, v23.8h, v4.8h\n" |
| 566 | "sqrdmulh v20.4s, v20.4s, v29.4s\n" |
| 567 | "smlal2 v0.4s, v22.8h, v4.8h\n" |
| 568 | "smlal2 v31.4s, v27.8h, v4.8h\n" |
| 569 | "sqrdmulh v19.4s, v19.4s, v29.4s\n" |
| 570 | "sshr v16.4s, v16.4s, #0x1f\n" |
| 571 | "and v23.16b, v21.16b, v30.16b\n" |
| 572 | "sqrdmulh v8.4s, v8.4s, v14.4s\n" |
| 573 | "and v27.16b, v20.16b, v30.16b\n" |
| 574 | "sqrdmulh v0.4s, v0.4s, v14.4s\n" |
| 575 | "and v22.16b, v19.16b, v30.16b\n" |
| 576 | "sqrdmulh v31.4s, v31.4s, v14.4s\n" |
| 577 | "sqadd v3.4s, v3.4s, v16.4s\n" |
| 578 | "sshr v23.4s, v23.4s, #0x1f\n" |
| 579 | "and v14.16b, v8.16b, v25.16b\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 580 | "sshr v27.4s, v27.4s, #0x1f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 581 | "and v18.16b, v0.16b, v25.16b\n" |
| 582 | "sshr v22.4s, v22.4s, #0x1f\n" |
| 583 | "and v16.16b, v31.16b, v25.16b\n" |
| 584 | "sqadd v21.4s, v21.4s, v23.4s\n" |
| 585 | "sshr v14.4s, v14.4s, #0x1f\n" |
| 586 | "sqadd v20.4s, v20.4s, v27.4s\n" |
| 587 | "sshr v18.4s, v18.4s, #0x1f\n" |
| 588 | "sqadd v19.4s, v19.4s, v22.4s\n" |
| 589 | "sshr v16.4s, v16.4s, #0x1f\n" |
| 590 | "srshl v5.4s, v5.4s, v30.4s\n" |
| 591 | "srshl v21.4s, v21.4s, v30.4s\n" |
| 592 | "sqadd v8.4s, v8.4s, v14.4s\n" |
| 593 | "srshl v20.4s, v20.4s, v30.4s\n" |
| 594 | "sqadd v0.4s, v0.4s, v18.4s\n" |
| 595 | "srshl v19.4s, v19.4s, v30.4s\n" |
| 596 | "sqadd v31.4s, v31.4s, v16.4s\n" |
| 597 | "srshl v3.4s, v3.4s, v25.4s\n" |
| 598 | "sqxtn v5.4h, v5.4s\n" |
| 599 | "srshl v8.4s, v8.4s, v25.4s\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 600 | "sqxtn v21.4h, v21.4s\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 601 | "srshl v0.4s, v0.4s, v25.4s\n" |
| 602 | "sqxtn v20.4h, v20.4s\n" |
| 603 | "srshl v31.4s, v31.4s, v25.4s\n" |
| 604 | "sqxtn v19.4h, v19.4s\n" |
| 605 | "sqxtn2 v5.8h, v3.4s\n" |
| 606 | "sqxtn2 v21.8h, v8.4s\n" |
| 607 | "sqxtn2 v20.8h, v0.4s\n" |
| 608 | "sqxtn2 v19.8h, v31.4s\n" |
| 609 | "sqadd v5.8h, v5.8h, v13.8h\n" |
| 610 | "sqadd v21.8h, v21.8h, v13.8h\n" |
| 611 | "sqadd v20.8h, v20.8h, v13.8h\n" |
| 612 | "sqadd v19.8h, v19.8h, v13.8h\n" |
| 613 | "smax v5.8h, v5.8h, v17.8h\n" |
| 614 | "smax v21.8h, v21.8h, v17.8h\n" |
| 615 | "smax v20.8h, v20.8h, v17.8h\n" |
| 616 | "smax v19.8h, v19.8h, v17.8h\n" |
| 617 | "smin v5.8h, v5.8h, v24.8h\n" |
| 618 | "smin v21.8h, v21.8h, v24.8h\n" |
| 619 | "smin v20.8h, v20.8h, v24.8h\n" |
| 620 | "smin v19.8h, v19.8h, v24.8h\n" |
| 621 | "uzp1 v5.16b, v5.16b, v5.16b\n" |
| 622 | "str d5, [x11, x16]\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 623 | "uzp1 v21.16b, v21.16b, v21.16b\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 624 | "uzp1 v20.16b, v20.16b, v20.16b\n" |
| 625 | "str d21, [x10, x16]\n" |
| 626 | "uzp1 v19.16b, v19.16b, v19.16b\n" |
| 627 | "str d20, [x9, x16]\n" |
| 628 | "str d19, [x28, x16]\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 629 | "add x16, x16, #0x8\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 630 | "beq 88f\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 631 | "add x14, x14, #0x48\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 632 | "3:" // Oddments |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 633 | "ldr x20, [%x[params], %[offsetof_Params_bias]]\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 634 | "tbz x7, #2, 5f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 635 | "ld1 { v5.4s }, [x20], #0x10\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 636 | "tbz x7, #1, 4f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 637 | "ld1 { v3.d }[0], [x20], #0x8\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 638 | "tbz x7, #0, 7f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 639 | "ld1 { v3.s }[2], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 640 | "b 7f\n" |
| 641 | "4:" // Oddments: Load bias: Bit 2: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 642 | "tbz x7, #0, 7f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 643 | "ld1 { v3.s }[0], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 644 | "b 7f\n" |
| 645 | "5:" // Oddments: Load bias: Bit 2: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 646 | "tbz x7, #1, 6f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 647 | "ld1 { v5.d }[0], [x20], #0x8\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 648 | "tbz x7, #0, 7f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 649 | "ld1 { v5.s }[2], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 650 | "b 7f\n" |
| 651 | "6:" // Oddments: Load bias: Bit 2: Unset: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 652 | "tbz x7, #0, 7f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 653 | "ld1 { v5.s }[0], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 654 | "7:" // Oddments: Load bias: Bit 2: End |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 655 | "ldr d11, [x14, #0x0]\n" |
| 656 | "ldr d22, [x14, #0x8]\n" |
| 657 | "mov v21.16b, v5.16b\n" |
| 658 | "mov v8.16b, v3.16b\n" |
| 659 | "ldr d14, [x14, #0x10]\n" |
| 660 | "ldr d28, [x14, #0x18]\n" |
| 661 | "mov v20.16b, v5.16b\n" |
| 662 | "mov v0.16b, v3.16b\n" |
| 663 | "ldr d18, [x14, #0x20]\n" |
| 664 | "ldr d9, [x14, #0x28]\n" |
| 665 | "mov v19.16b, v5.16b\n" |
| 666 | "mov v31.16b, v3.16b\n" |
| 667 | "ldr d26, [x14, #0x30]\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 668 | "ldr d7, [x14, #0x38]\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 669 | "ssubl v11.8h, v11.8b, v15.8b\n" |
| 670 | "ssubl v22.8h, v22.8b, v15.8b\n" |
| 671 | "ldr d4, [x14, #0x40]\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 672 | "ldp x27, x26, [x15, #0x0]\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 673 | "ssubl v14.8h, v14.8b, v15.8b\n" |
| 674 | "ssubl v28.8h, v28.8b, v15.8b\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 675 | "ldp x25, x24, [x15, #0x10]\n" |
| 676 | "ldp x23, x22, [x15, #0x20]\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 677 | "ssubl v18.8h, v18.8b, v15.8b\n" |
| 678 | "ssubl v9.8h, v9.8b, v15.8b\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 679 | "ldp x21, x20, [x15, #0x30]\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 680 | "ssubl v26.8h, v26.8b, v15.8b\n" |
| 681 | "ssubl v7.8h, v7.8b, v15.8b\n" |
| 682 | "ssubl v4.8h, v4.8b, v15.8b\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 683 | "add x27, x27, x17\n" |
| 684 | "add x26, x26, x17\n" |
| 685 | "add x25, x25, x17\n" |
| 686 | "add x24, x24, x17\n" |
| 687 | "add x23, x23, x17\n" |
| 688 | "add x22, x22, x17\n" |
| 689 | "add x21, x21, x17\n" |
| 690 | "add x20, x20, x17\n" |
| 691 | "tbz x7, #2, 9f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 692 | "ld1 { v25.s }[0], [x27], #0x4\n" |
| 693 | "ld1 { v27.s }[0], [x26], #0x4\n" |
| 694 | "ld1 { v1.s }[0], [x25], #0x4\n" |
| 695 | "ld1 { v2.s }[0], [x24], #0x4\n" |
| 696 | "ld1 { v12.s }[0], [x23], #0x4\n" |
| 697 | "ld1 { v16.s }[0], [x22], #0x4\n" |
| 698 | "ld1 { v23.s }[0], [x21], #0x4\n" |
| 699 | "ld1 { v10.s }[0], [x20], #0x4\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 700 | "tbz x7, #1, 8f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 701 | "ld1 { v25.h }[2], [x27], #0x2\n" |
| 702 | "ld1 { v27.h }[2], [x26], #0x2\n" |
| 703 | "ld1 { v1.h }[2], [x25], #0x2\n" |
| 704 | "ld1 { v2.h }[2], [x24], #0x2\n" |
| 705 | "ld1 { v12.h }[2], [x23], #0x2\n" |
| 706 | "ld1 { v16.h }[2], [x22], #0x2\n" |
| 707 | "ld1 { v23.h }[2], [x21], #0x2\n" |
| 708 | "ld1 { v10.h }[2], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 709 | "tbz x7, #0, 11f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 710 | "ld1 { v25.b }[6], [x27]\n" |
| 711 | "ld1 { v27.b }[6], [x26]\n" |
| 712 | "ld1 { v1.b }[6], [x25]\n" |
| 713 | "ld1 { v2.b }[6], [x24]\n" |
| 714 | "ld1 { v12.b }[6], [x23]\n" |
| 715 | "ld1 { v16.b }[6], [x22]\n" |
| 716 | "ld1 { v23.b }[6], [x21]\n" |
| 717 | "ld1 { v10.b }[6], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 718 | "b 11f\n" |
| 719 | "8:" // Oddments: Initial loads: Bit 2: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 720 | "tbz x7, #0, 11f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 721 | "ld1 { v25.b }[4], [x27]\n" |
| 722 | "ld1 { v27.b }[4], [x26]\n" |
| 723 | "ld1 { v1.b }[4], [x25]\n" |
| 724 | "ld1 { v2.b }[4], [x24]\n" |
| 725 | "ld1 { v12.b }[4], [x23]\n" |
| 726 | "ld1 { v16.b }[4], [x22]\n" |
| 727 | "ld1 { v23.b }[4], [x21]\n" |
| 728 | "ld1 { v10.b }[4], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 729 | "b 11f\n" |
| 730 | "9:" // Oddments: Initial loads: Bit 2: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 731 | "tbz x7, #1, 10f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 732 | "ld1 { v25.h }[0], [x27], #0x2\n" |
| 733 | "ld1 { v27.h }[0], [x26], #0x2\n" |
| 734 | "ld1 { v1.h }[0], [x25], #0x2\n" |
| 735 | "ld1 { v2.h }[0], [x24], #0x2\n" |
| 736 | "ld1 { v12.h }[0], [x23], #0x2\n" |
| 737 | "ld1 { v16.h }[0], [x22], #0x2\n" |
| 738 | "ld1 { v23.h }[0], [x21], #0x2\n" |
| 739 | "ld1 { v10.h }[0], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 740 | "tbz x7, #0, 11f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 741 | "ld1 { v25.b }[2], [x27]\n" |
| 742 | "ld1 { v27.b }[2], [x26]\n" |
| 743 | "ld1 { v1.b }[2], [x25]\n" |
| 744 | "ld1 { v2.b }[2], [x24]\n" |
| 745 | "ld1 { v12.b }[2], [x23]\n" |
| 746 | "ld1 { v16.b }[2], [x22]\n" |
| 747 | "ld1 { v23.b }[2], [x21]\n" |
| 748 | "ld1 { v10.b }[2], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 749 | "b 11f\n" |
| 750 | "10:" // Oddments: Initial loads: Bit 2: Unset: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 751 | "tbz x7, #0, 11f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 752 | "ld1 { v25.b }[0], [x27]\n" |
| 753 | "ld1 { v27.b }[0], [x26]\n" |
| 754 | "ld1 { v1.b }[0], [x25]\n" |
| 755 | "ld1 { v2.b }[0], [x24]\n" |
| 756 | "ld1 { v12.b }[0], [x23]\n" |
| 757 | "ld1 { v16.b }[0], [x22]\n" |
| 758 | "ld1 { v23.b }[0], [x21]\n" |
| 759 | "ld1 { v10.b }[0], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 760 | "11:" // Oddments: Initial loads: Bit 2: End |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 761 | "ssubl v25.8h, v25.8b, v6.8b\n" |
| 762 | "smlal v5.4s, v25.4h, v4.4h\n" |
| 763 | "smlal2 v3.4s, v25.8h, v4.8h\n" |
| 764 | "ldr x20, [x15, #0x40]\n" |
| 765 | "ssubl v27.8h, v27.8b, v6.8b\n" |
| 766 | "smlal v5.4s, v27.4h, v11.4h\n" |
| 767 | "smlal2 v3.4s, v27.8h, v11.8h\n" |
| 768 | "ssubl v1.8h, v1.8b, v6.8b\n" |
| 769 | "smlal v21.4s, v25.4h, v26.4h\n" |
| 770 | "smlal2 v8.4s, v25.8h, v26.8h\n" |
| 771 | "add x20, x20, x17\n" |
| 772 | "smlal v5.4s, v1.4h, v22.4h\n" |
| 773 | "smlal2 v3.4s, v1.8h, v22.8h\n" |
| 774 | "ssubl v2.8h, v2.8b, v6.8b\n" |
| 775 | "ssubl v16.8h, v16.8b, v6.8b\n" |
| 776 | "smlal v21.4s, v2.4h, v22.4h\n" |
| 777 | "smlal2 v8.4s, v2.8h, v22.8h\n" |
| 778 | "smlal v5.4s, v16.4h, v28.4h\n" |
| 779 | "smlal2 v3.4s, v16.8h, v28.8h\n" |
| 780 | "ssubl v12.8h, v12.8b, v6.8b\n" |
| 781 | "ssubl v23.8h, v23.8b, v6.8b\n" |
| 782 | "smlal v21.4s, v12.4h, v14.4h\n" |
| 783 | "smlal2 v8.4s, v12.8h, v14.8h\n" |
| 784 | "smlal v5.4s, v23.4h, v18.4h\n" |
| 785 | "smlal2 v3.4s, v23.8h, v18.8h\n" |
| 786 | "ssubl v10.8h, v10.8b, v6.8b\n" |
| 787 | "smlal v20.4s, v25.4h, v14.4h\n" |
| 788 | "smlal2 v0.4s, v25.8h, v14.8h\n" |
| 789 | "smlal v19.4s, v25.4h, v11.4h\n" |
| 790 | "smlal2 v31.4s, v25.8h, v11.8h\n" |
| 791 | "smlal v5.4s, v10.4h, v14.4h\n" |
| 792 | "smlal2 v3.4s, v10.8h, v14.8h\n" |
| 793 | "smlal v21.4s, v10.4h, v11.4h\n" |
| 794 | "smlal2 v8.4s, v10.8h, v11.8h\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 795 | "tbz x7, #2, 13f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 796 | "ld1 { v15.s }[0], [x20], #0x4\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 797 | "tbz x7, #1, 12f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 798 | "ld1 { v15.h }[2], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 799 | "tbz x7, #0, 15f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 800 | "ld1 { v15.b }[6], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 801 | "b 15f\n" |
| 802 | "12:" // Oddments: Load (1, 3): Bit 2: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 803 | "tbz x7, #0, 15f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 804 | "ld1 { v15.b }[4], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 805 | "b 15f\n" |
| 806 | "13:" // Oddments: Load (1, 3): Bit 2: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 807 | "tbz x7, #1, 14f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 808 | "ld1 { v15.h }[0], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 809 | "tbz x7, #0, 15f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 810 | "ld1 { v15.b }[2], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 811 | "b 15f\n" |
| 812 | "14:" // Oddments: Load (1, 3): Bit 2: Unset: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 813 | "tbz x7, #0, 15f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 814 | "ld1 { v15.b }[0], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 815 | "15:" // Oddments: Load (1, 3): Bit 2: End |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 816 | "ssubl v15.8h, v15.8b, v6.8b\n" |
| 817 | "ldr x20, [x15, #0x48]\n" |
| 818 | "smlal v21.4s, v15.4h, v18.4h\n" |
| 819 | "smlal2 v8.4s, v15.8h, v18.8h\n" |
| 820 | "add x20, x20, x17\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 821 | "tbz x7, #2, 17f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 822 | "ld1 { v16.s }[0], [x20], #0x4\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 823 | "tbz x7, #1, 16f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 824 | "ld1 { v16.h }[2], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 825 | "tbz x7, #0, 19f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 826 | "ld1 { v16.b }[6], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 827 | "b 19f\n" |
| 828 | "16:" // Oddments: Load (1, 4): Bit 2: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 829 | "tbz x7, #0, 19f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 830 | "ld1 { v16.b }[4], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 831 | "b 19f\n" |
| 832 | "17:" // Oddments: Load (1, 4): Bit 2: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 833 | "tbz x7, #1, 18f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 834 | "ld1 { v16.h }[0], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 835 | "tbz x7, #0, 19f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 836 | "ld1 { v16.b }[2], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 837 | "b 19f\n" |
| 838 | "18:" // Oddments: Load (1, 4): Bit 2: Unset: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 839 | "tbz x7, #0, 19f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 840 | "ld1 { v16.b }[0], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 841 | "19:" // Oddments: Load (1, 4): Bit 2: End |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 842 | "ssubl v16.8h, v16.8b, v6.8b\n" |
| 843 | "ldr x20, [x15, #0x50]\n" |
| 844 | "smlal v21.4s, v16.4h, v9.4h\n" |
| 845 | "smlal2 v8.4s, v16.8h, v9.8h\n" |
| 846 | "add x20, x20, x17\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 847 | "tbz x7, #2, 21f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 848 | "ld1 { v16.s }[0], [x20], #0x4\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 849 | "tbz x7, #1, 20f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 850 | "ld1 { v16.h }[2], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 851 | "tbz x7, #0, 23f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 852 | "ld1 { v16.b }[6], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 853 | "b 23f\n" |
| 854 | "20:" // Oddments: Load (1, 2): Bit 2: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 855 | "tbz x7, #0, 23f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 856 | "ld1 { v16.b }[4], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 857 | "b 23f\n" |
| 858 | "21:" // Oddments: Load (1, 2): Bit 2: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 859 | "tbz x7, #1, 22f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 860 | "ld1 { v16.h }[0], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 861 | "tbz x7, #0, 23f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 862 | "ld1 { v16.b }[2], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 863 | "b 23f\n" |
| 864 | "22:" // Oddments: Load (1, 2): Bit 2: Unset: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 865 | "tbz x7, #0, 23f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 866 | "ld1 { v16.b }[0], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 867 | "23:" // Oddments: Load (1, 2): Bit 2: End |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 868 | "ssubl v16.8h, v16.8b, v6.8b\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 869 | "ldr x20, [x15, #0x58]\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 870 | "smlal v5.4s, v16.4h, v9.4h\n" |
| 871 | "smlal2 v3.4s, v16.8h, v9.8h\n" |
| 872 | "smlal v21.4s, v16.4h, v28.4h\n" |
| 873 | "smlal2 v8.4s, v16.8h, v28.8h\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 874 | "add x20, x20, x17\n" |
| 875 | "tbz x7, #2, 25f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 876 | "ld1 { v16.s }[0], [x20], #0x4\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 877 | "tbz x7, #1, 24f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 878 | "ld1 { v16.h }[2], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 879 | "tbz x7, #0, 27f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 880 | "ld1 { v16.b }[6], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 881 | "b 27f\n" |
| 882 | "24:" // Oddments: Load (3, 0): Bit 2: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 883 | "tbz x7, #0, 27f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 884 | "ld1 { v16.b }[4], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 885 | "b 27f\n" |
| 886 | "25:" // Oddments: Load (3, 0): Bit 2: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 887 | "tbz x7, #1, 26f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 888 | "ld1 { v16.h }[0], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 889 | "tbz x7, #0, 27f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 890 | "ld1 { v16.b }[2], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 891 | "b 27f\n" |
| 892 | "26:" // Oddments: Load (3, 0): Bit 2: Unset: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 893 | "tbz x7, #0, 27f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 894 | "ld1 { v16.b }[0], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 895 | "27:" // Oddments: Load (3, 0): Bit 2: End |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 896 | "ssubl v16.8h, v16.8b, v6.8b\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 897 | "ldr x20, [x15, #0x60]\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 898 | "smlal v20.4s, v16.4h, v28.4h\n" |
| 899 | "smlal2 v0.4s, v16.8h, v28.8h\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 900 | "add x20, x20, x17\n" |
| 901 | "tbz x7, #2, 29f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 902 | "ld1 { v16.s }[0], [x20], #0x4\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 903 | "tbz x7, #1, 28f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 904 | "ld1 { v16.h }[2], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 905 | "tbz x7, #0, 31f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 906 | "ld1 { v16.b }[6], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 907 | "b 31f\n" |
| 908 | "28:" // Oddments: Load (2, 0): Bit 2: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 909 | "tbz x7, #0, 31f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 910 | "ld1 { v16.b }[4], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 911 | "b 31f\n" |
| 912 | "29:" // Oddments: Load (2, 0): Bit 2: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 913 | "tbz x7, #1, 30f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 914 | "ld1 { v16.h }[0], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 915 | "tbz x7, #0, 31f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 916 | "ld1 { v16.b }[2], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 917 | "b 31f\n" |
| 918 | "30:" // Oddments: Load (2, 0): Bit 2: Unset: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 919 | "tbz x7, #0, 31f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 920 | "ld1 { v16.b }[0], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 921 | "31:" // Oddments: Load (2, 0): Bit 2: End |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 922 | "ssubl v16.8h, v16.8b, v6.8b\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 923 | "ldr x20, [x15, #0x68]\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 924 | "smlal v5.4s, v16.4h, v26.4h\n" |
| 925 | "smlal2 v3.4s, v16.8h, v26.8h\n" |
| 926 | "smlal v20.4s, v16.4h, v11.4h\n" |
| 927 | "smlal2 v0.4s, v16.8h, v11.8h\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 928 | "add x20, x20, x17\n" |
| 929 | "tbz x7, #2, 33f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 930 | "ld1 { v16.s }[0], [x20], #0x4\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 931 | "tbz x7, #1, 32f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 932 | "ld1 { v16.h }[2], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 933 | "tbz x7, #0, 35f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 934 | "ld1 { v16.b }[6], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 935 | "b 35f\n" |
| 936 | "32:" // Oddments: Load (3, 1): Bit 2: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 937 | "tbz x7, #0, 35f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 938 | "ld1 { v16.b }[4], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 939 | "b 35f\n" |
| 940 | "33:" // Oddments: Load (3, 1): Bit 2: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 941 | "tbz x7, #1, 34f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 942 | "ld1 { v16.h }[0], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 943 | "tbz x7, #0, 35f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 944 | "ld1 { v16.b }[2], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 945 | "b 35f\n" |
| 946 | "34:" // Oddments: Load (3, 1): Bit 2: Unset: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 947 | "tbz x7, #0, 35f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 948 | "ld1 { v16.b }[0], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 949 | "35:" // Oddments: Load (3, 1): Bit 2: End |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 950 | "ssubl v16.8h, v16.8b, v6.8b\n" |
| 951 | "ldr x20, [x15, #0x70]\n" |
| 952 | "smlal v20.4s, v16.4h, v18.4h\n" |
| 953 | "smlal2 v0.4s, v16.8h, v18.8h\n" |
| 954 | "add x20, x20, x17\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 955 | "tbz x7, #2, 37f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 956 | "ld1 { v16.s }[0], [x20], #0x4\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 957 | "tbz x7, #1, 36f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 958 | "ld1 { v16.h }[2], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 959 | "tbz x7, #0, 39f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 960 | "ld1 { v16.b }[6], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 961 | "b 39f\n" |
| 962 | "36:" // Oddments: Load (2, 1): Bit 2: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 963 | "tbz x7, #0, 39f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 964 | "ld1 { v16.b }[4], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 965 | "b 39f\n" |
| 966 | "37:" // Oddments: Load (2, 1): Bit 2: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 967 | "tbz x7, #1, 38f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 968 | "ld1 { v16.h }[0], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 969 | "tbz x7, #0, 39f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 970 | "ld1 { v16.b }[2], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 971 | "b 39f\n" |
| 972 | "38:" // Oddments: Load (2, 1): Bit 2: Unset: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 973 | "tbz x7, #0, 39f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 974 | "ld1 { v16.b }[0], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 975 | "39:" // Oddments: Load (2, 1): Bit 2: End |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 976 | "ssubl v16.8h, v16.8b, v6.8b\n" |
| 977 | "ldr x20, [x15, #0x78]\n" |
| 978 | "smlal v5.4s, v16.4h, v7.4h\n" |
| 979 | "smlal2 v3.4s, v16.8h, v7.8h\n" |
| 980 | "smlal v20.4s, v16.4h, v22.4h\n" |
| 981 | "smlal2 v0.4s, v16.8h, v22.8h\n" |
| 982 | "add x20, x20, x17\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 983 | "tbz x7, #2, 41f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 984 | "ld1 { v16.s }[0], [x20], #0x4\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 985 | "tbz x7, #1, 40f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 986 | "ld1 { v16.h }[2], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 987 | "tbz x7, #0, 43f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 988 | "ld1 { v16.b }[6], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 989 | "b 43f\n" |
| 990 | "40:" // Oddments: Load (3, 3): Bit 2: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 991 | "tbz x7, #0, 43f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 992 | "ld1 { v16.b }[4], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 993 | "b 43f\n" |
| 994 | "41:" // Oddments: Load (3, 3): Bit 2: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 995 | "tbz x7, #1, 42f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 996 | "ld1 { v16.h }[0], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 997 | "tbz x7, #0, 43f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 998 | "ld1 { v16.b }[2], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 999 | "b 43f\n" |
| 1000 | "42:" // Oddments: Load (3, 3): Bit 2: Unset: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1001 | "tbz x7, #0, 43f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1002 | "ld1 { v16.b }[0], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1003 | "43:" // Oddments: Load (3, 3): Bit 2: End |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1004 | "ssubl v16.8h, v16.8b, v6.8b\n" |
| 1005 | "ldr x20, [x15, #0x80]\n" |
| 1006 | "smlal v19.4s, v16.4h, v18.4h\n" |
| 1007 | "smlal2 v31.4s, v16.8h, v18.8h\n" |
| 1008 | "add x20, x20, x17\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1009 | "tbz x7, #2, 45f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1010 | "ld1 { v16.s }[0], [x20], #0x4\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1011 | "tbz x7, #1, 44f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1012 | "ld1 { v16.h }[2], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1013 | "tbz x7, #0, 47f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1014 | "ld1 { v16.b }[6], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1015 | "b 47f\n" |
| 1016 | "44:" // Oddments: Load (2, 3): Bit 2: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1017 | "tbz x7, #0, 47f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1018 | "ld1 { v16.b }[4], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1019 | "b 47f\n" |
| 1020 | "45:" // Oddments: Load (2, 3): Bit 2: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1021 | "tbz x7, #1, 46f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1022 | "ld1 { v16.h }[0], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1023 | "tbz x7, #0, 47f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1024 | "ld1 { v16.b }[2], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1025 | "b 47f\n" |
| 1026 | "46:" // Oddments: Load (2, 3): Bit 2: Unset: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1027 | "tbz x7, #0, 47f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1028 | "ld1 { v16.b }[0], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1029 | "47:" // Oddments: Load (2, 3): Bit 2: End |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1030 | "ssubl v16.8h, v16.8b, v6.8b\n" |
| 1031 | "ldr x20, [x15, #0x88]\n" |
| 1032 | "smlal v21.4s, v16.4h, v7.4h\n" |
| 1033 | "smlal2 v8.4s, v16.8h, v7.8h\n" |
| 1034 | "smlal v19.4s, v16.4h, v22.4h\n" |
| 1035 | "smlal2 v31.4s, v16.8h, v22.8h\n" |
| 1036 | "add x20, x20, x17\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1037 | "tbz x7, #2, 49f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1038 | "ld1 { v16.s }[0], [x20], #0x4\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1039 | "tbz x7, #1, 48f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1040 | "ld1 { v16.h }[2], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1041 | "tbz x7, #0, 51f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1042 | "ld1 { v16.b }[6], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1043 | "b 51f\n" |
| 1044 | "48:" // Oddments: Load (3, 4): Bit 2: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1045 | "tbz x7, #0, 51f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1046 | "ld1 { v16.b }[4], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1047 | "b 51f\n" |
| 1048 | "49:" // Oddments: Load (3, 4): Bit 2: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1049 | "tbz x7, #1, 50f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1050 | "ld1 { v16.h }[0], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1051 | "tbz x7, #0, 51f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1052 | "ld1 { v16.b }[2], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1053 | "b 51f\n" |
| 1054 | "50:" // Oddments: Load (3, 4): Bit 2: Unset: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1055 | "tbz x7, #0, 51f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1056 | "ld1 { v16.b }[0], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1057 | "51:" // Oddments: Load (3, 4): Bit 2: End |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1058 | "ssubl v16.8h, v16.8b, v6.8b\n" |
| 1059 | "ldr x20, [x15, #0x90]\n" |
| 1060 | "smlal v19.4s, v16.4h, v9.4h\n" |
| 1061 | "smlal2 v31.4s, v16.8h, v9.8h\n" |
| 1062 | "add x20, x20, x17\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1063 | "tbz x7, #2, 53f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1064 | "ld1 { v16.s }[0], [x20], #0x4\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1065 | "tbz x7, #1, 52f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1066 | "ld1 { v16.h }[2], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1067 | "tbz x7, #0, 55f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1068 | "ld1 { v16.b }[6], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1069 | "b 55f\n" |
| 1070 | "52:" // Oddments: Load (4, 0): Bit 2: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1071 | "tbz x7, #0, 55f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1072 | "ld1 { v16.b }[4], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1073 | "b 55f\n" |
| 1074 | "53:" // Oddments: Load (4, 0): Bit 2: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1075 | "tbz x7, #1, 54f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1076 | "ld1 { v16.h }[0], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1077 | "tbz x7, #0, 55f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1078 | "ld1 { v16.b }[2], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1079 | "b 55f\n" |
| 1080 | "54:" // Oddments: Load (4, 0): Bit 2: Unset: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1081 | "tbz x7, #0, 55f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1082 | "ld1 { v16.b }[0], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1083 | "55:" // Oddments: Load (4, 0): Bit 2: End |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1084 | "ssubl v16.8h, v16.8b, v6.8b\n" |
| 1085 | "ldr x20, [x15, #0x98]\n" |
| 1086 | "smlal v20.4s, v16.4h, v26.4h\n" |
| 1087 | "smlal2 v0.4s, v16.8h, v26.8h\n" |
| 1088 | "add x20, x20, x17\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1089 | "tbz x7, #2, 57f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1090 | "ld1 { v16.s }[0], [x20], #0x4\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1091 | "tbz x7, #1, 56f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1092 | "ld1 { v16.h }[2], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1093 | "tbz x7, #0, 59f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1094 | "ld1 { v16.b }[6], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1095 | "b 59f\n" |
| 1096 | "56:" // Oddments: Load (2, 4): Bit 2: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1097 | "tbz x7, #0, 59f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1098 | "ld1 { v16.b }[4], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1099 | "b 59f\n" |
| 1100 | "57:" // Oddments: Load (2, 4): Bit 2: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1101 | "tbz x7, #1, 58f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1102 | "ld1 { v16.h }[0], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1103 | "tbz x7, #0, 59f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1104 | "ld1 { v16.b }[2], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1105 | "b 59f\n" |
| 1106 | "58:" // Oddments: Load (2, 4): Bit 2: Unset: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1107 | "tbz x7, #0, 59f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1108 | "ld1 { v16.b }[0], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1109 | "59:" // Oddments: Load (2, 4): Bit 2: End |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1110 | "ssubl v16.8h, v16.8b, v6.8b\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1111 | "ldr x20, [x15, #0xa0]\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1112 | "smlal v21.4s, v16.4h, v4.4h\n" |
| 1113 | "smlal2 v8.4s, v16.8h, v4.8h\n" |
| 1114 | "smlal v19.4s, v16.4h, v14.4h\n" |
| 1115 | "smlal2 v31.4s, v16.8h, v14.8h\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1116 | "add x20, x20, x17\n" |
| 1117 | "tbz x7, #2, 61f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1118 | "ld1 { v16.s }[0], [x20], #0x4\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1119 | "tbz x7, #1, 60f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1120 | "ld1 { v16.h }[2], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1121 | "tbz x7, #0, 63f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1122 | "ld1 { v16.b }[6], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1123 | "b 63f\n" |
| 1124 | "60:" // Oddments: Load (4, 1): Bit 2: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1125 | "tbz x7, #0, 63f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1126 | "ld1 { v16.b }[4], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1127 | "b 63f\n" |
| 1128 | "61:" // Oddments: Load (4, 1): Bit 2: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1129 | "tbz x7, #1, 62f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1130 | "ld1 { v16.h }[0], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1131 | "tbz x7, #0, 63f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1132 | "ld1 { v16.b }[2], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1133 | "b 63f\n" |
| 1134 | "62:" // Oddments: Load (4, 1): Bit 2: Unset: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1135 | "tbz x7, #0, 63f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1136 | "ld1 { v16.b }[0], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1137 | "63:" // Oddments: Load (4, 1): Bit 2: End |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1138 | "ssubl v16.8h, v16.8b, v6.8b\n" |
| 1139 | "ldr x20, [x15, #0xa8]\n" |
| 1140 | "smlal v20.4s, v16.4h, v7.4h\n" |
| 1141 | "smlal2 v0.4s, v16.8h, v7.8h\n" |
| 1142 | "add x20, x20, x17\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1143 | "tbz x7, #2, 65f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1144 | "ld1 { v16.s }[0], [x20], #0x4\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1145 | "tbz x7, #1, 64f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1146 | "ld1 { v16.h }[2], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1147 | "tbz x7, #0, 67f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1148 | "ld1 { v16.b }[6], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1149 | "b 67f\n" |
| 1150 | "64:" // Oddments: Load (3, 2): Bit 2: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1151 | "tbz x7, #0, 67f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1152 | "ld1 { v16.b }[4], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1153 | "b 67f\n" |
| 1154 | "65:" // Oddments: Load (3, 2): Bit 2: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1155 | "tbz x7, #1, 66f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1156 | "ld1 { v16.h }[0], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1157 | "tbz x7, #0, 67f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1158 | "ld1 { v16.b }[2], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1159 | "b 67f\n" |
| 1160 | "66:" // Oddments: Load (3, 2): Bit 2: Unset: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1161 | "tbz x7, #0, 67f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1162 | "ld1 { v16.b }[0], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1163 | "67:" // Oddments: Load (3, 2): Bit 2: End |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1164 | "ssubl v16.8h, v16.8b, v6.8b\n" |
| 1165 | "ldr x20, [x15, #0xb0]\n" |
| 1166 | "smlal v20.4s, v16.4h, v9.4h\n" |
| 1167 | "smlal2 v0.4s, v16.8h, v9.8h\n" |
| 1168 | "smlal v19.4s, v16.4h, v28.4h\n" |
| 1169 | "smlal2 v31.4s, v16.8h, v28.8h\n" |
| 1170 | "add x20, x20, x17\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1171 | "tbz x7, #2, 69f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1172 | "ld1 { v16.s }[0], [x20], #0x4\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1173 | "tbz x7, #1, 68f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1174 | "ld1 { v16.h }[2], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1175 | "tbz x7, #0, 71f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1176 | "ld1 { v16.b }[6], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1177 | "b 71f\n" |
| 1178 | "68:" // Oddments: Load (4, 3): Bit 2: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1179 | "tbz x7, #0, 71f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1180 | "ld1 { v16.b }[4], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1181 | "b 71f\n" |
| 1182 | "69:" // Oddments: Load (4, 3): Bit 2: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1183 | "tbz x7, #1, 70f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1184 | "ld1 { v16.h }[0], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1185 | "tbz x7, #0, 71f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1186 | "ld1 { v16.b }[2], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1187 | "b 71f\n" |
| 1188 | "70:" // Oddments: Load (4, 3): Bit 2: Unset: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1189 | "tbz x7, #0, 71f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1190 | "ld1 { v16.b }[0], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1191 | "71:" // Oddments: Load (4, 3): Bit 2: End |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1192 | "ssubl v16.8h, v16.8b, v6.8b\n" |
| 1193 | "ldr x20, [x15, #0xb8]\n" |
| 1194 | "smlal v19.4s, v16.4h, v7.4h\n" |
| 1195 | "smlal2 v31.4s, v16.8h, v7.8h\n" |
| 1196 | "add x20, x20, x17\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1197 | "tbz x7, #2, 73f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1198 | "ld1 { v16.s }[0], [x20], #0x4\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1199 | "tbz x7, #1, 72f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1200 | "ld1 { v16.h }[2], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1201 | "tbz x7, #0, 75f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1202 | "ld1 { v16.b }[6], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1203 | "b 75f\n" |
| 1204 | "72:" // Oddments: Load (4, 2): Bit 2: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1205 | "tbz x7, #0, 75f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1206 | "ld1 { v16.b }[4], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1207 | "b 75f\n" |
| 1208 | "73:" // Oddments: Load (4, 2): Bit 2: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1209 | "tbz x7, #1, 74f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1210 | "ld1 { v16.h }[0], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1211 | "tbz x7, #0, 75f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1212 | "ld1 { v16.b }[2], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1213 | "b 75f\n" |
| 1214 | "74:" // Oddments: Load (4, 2): Bit 2: Unset: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1215 | "tbz x7, #0, 75f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1216 | "ld1 { v16.b }[0], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1217 | "75:" // Oddments: Load (4, 2): Bit 2: End |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1218 | "ssubl v16.8h, v16.8b, v6.8b\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1219 | "ldr x20, [x15, #0xc0]\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1220 | "smlal v20.4s, v16.4h, v4.4h\n" |
| 1221 | "smlal2 v0.4s, v16.8h, v4.8h\n" |
| 1222 | "smlal v19.4s, v16.4h, v26.4h\n" |
| 1223 | "smlal2 v31.4s, v16.8h, v26.8h\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1224 | "add x20, x20, x17\n" |
| 1225 | "tbz x7, #2, 77f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1226 | "ld1 { v16.s }[0], [x20], #0x4\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1227 | "tbz x7, #1, 76f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1228 | "ld1 { v16.h }[2], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1229 | "tbz x7, #0, 79f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1230 | "ld1 { v16.b }[6], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1231 | "b 79f\n" |
| 1232 | "76:" // Oddments: Load (4, 4): Bit 2: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1233 | "tbz x7, #0, 79f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1234 | "ld1 { v16.b }[4], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1235 | "b 79f\n" |
| 1236 | "77:" // Oddments: Load (4, 4): Bit 2: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1237 | "tbz x7, #1, 78f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1238 | "ld1 { v16.h }[0], [x20], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1239 | "tbz x7, #0, 79f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1240 | "ld1 { v16.b }[2], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1241 | "b 79f\n" |
| 1242 | "78:" // Oddments: Load (4, 4): Bit 2: Unset: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1243 | "tbz x7, #0, 79f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1244 | "ld1 { v16.b }[0], [x20]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1245 | "79:" // Oddments: Load (4, 4): Bit 2: End |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1246 | "ssubl v16.8h, v16.8b, v6.8b\n" |
| 1247 | "smlal v19.4s, v16.4h, v4.4h\n" |
| 1248 | "smlal2 v31.4s, v16.8h, v4.8h\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1249 | "tbz x7, #2, 81f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1250 | "ld1 { v14.4s }, [x13], #0x10\n" |
| 1251 | "ld1 { v25.4s }, [x12], #0x10\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1252 | "tbz x7, #1, 80f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1253 | "ld1 { v18.d }[0], [x13], #0x8\n" |
| 1254 | "ld1 { v12.d }[0], [x12], #0x8\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1255 | "tbz x7, #0, 83f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1256 | "ld1 { v18.s }[2], [x13]\n" |
| 1257 | "ld1 { v12.s }[2], [x12]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1258 | "b 83f\n" |
| 1259 | "80:" // Oddments: Load requant params: Bit 2: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1260 | "tbz x7, #0, 83f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1261 | "ld1 { v18.s }[0], [x13]\n" |
| 1262 | "ld1 { v12.s }[0], [x12]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1263 | "b 83f\n" |
| 1264 | "81:" // Oddments: Load requant params: Bit 2: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1265 | "tbz x7, #1, 82f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1266 | "ld1 { v14.d }[0], [x13], #0x8\n" |
| 1267 | "ld1 { v25.d }[0], [x12], #0x8\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1268 | "tbz x7, #0, 83f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1269 | "ld1 { v14.s }[2], [x13]\n" |
| 1270 | "ld1 { v25.s }[2], [x12]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1271 | "b 83f\n" |
| 1272 | "82:" // Oddments: Load requant params: Bit 2: Unset: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1273 | "tbz x7, #0, 83f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1274 | "ld1 { v14.s }[0], [x13]\n" |
| 1275 | "ld1 { v25.s }[0], [x12]\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1276 | "83:" // Oddments: Load requant params: Bit 2: End |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1277 | "sqrdmulh v5.4s, v5.4s, v14.4s\n" |
| 1278 | "and v28.16b, v5.16b, v25.16b\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1279 | "add x11, x11, x16\n" |
| 1280 | "add x10, x10, x16\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1281 | "sqrdmulh v3.4s, v3.4s, v18.4s\n" |
| 1282 | "sshr v28.4s, v28.4s, #0x1f\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1283 | "add x9, x9, x16\n" |
| 1284 | "add x28, x28, x16\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1285 | "and v16.16b, v3.16b, v12.16b\n" |
| 1286 | "sqrdmulh v21.4s, v21.4s, v14.4s\n" |
| 1287 | "sqrdmulh v20.4s, v20.4s, v14.4s\n" |
| 1288 | "sqrdmulh v19.4s, v19.4s, v14.4s\n" |
| 1289 | "sqadd v5.4s, v5.4s, v28.4s\n" |
| 1290 | "sshr v16.4s, v16.4s, #0x1f\n" |
| 1291 | "and v14.16b, v21.16b, v25.16b\n" |
| 1292 | "sqrdmulh v8.4s, v8.4s, v18.4s\n" |
| 1293 | "and v6.16b, v20.16b, v25.16b\n" |
| 1294 | "sqrdmulh v0.4s, v0.4s, v18.4s\n" |
| 1295 | "and v4.16b, v19.16b, v25.16b\n" |
| 1296 | "sqrdmulh v31.4s, v31.4s, v18.4s\n" |
| 1297 | "sqadd v3.4s, v3.4s, v16.4s\n" |
| 1298 | "sshr v14.4s, v14.4s, #0x1f\n" |
| 1299 | "and v18.16b, v8.16b, v12.16b\n" |
| 1300 | "sshr v6.4s, v6.4s, #0x1f\n" |
| 1301 | "and v7.16b, v0.16b, v12.16b\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1302 | "sshr v4.4s, v4.4s, #0x1f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1303 | "and v16.16b, v31.16b, v12.16b\n" |
| 1304 | "sqadd v21.4s, v21.4s, v14.4s\n" |
| 1305 | "sshr v18.4s, v18.4s, #0x1f\n" |
| 1306 | "sqadd v20.4s, v20.4s, v6.4s\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1307 | "sshr v7.4s, v7.4s, #0x1f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1308 | "sqadd v19.4s, v19.4s, v4.4s\n" |
| 1309 | "sshr v16.4s, v16.4s, #0x1f\n" |
| 1310 | "srshl v5.4s, v5.4s, v25.4s\n" |
| 1311 | "srshl v21.4s, v21.4s, v25.4s\n" |
| 1312 | "sqadd v8.4s, v8.4s, v18.4s\n" |
| 1313 | "srshl v20.4s, v20.4s, v25.4s\n" |
| 1314 | "sqadd v0.4s, v0.4s, v7.4s\n" |
| 1315 | "srshl v19.4s, v19.4s, v25.4s\n" |
| 1316 | "sqadd v31.4s, v31.4s, v16.4s\n" |
| 1317 | "srshl v3.4s, v3.4s, v12.4s\n" |
| 1318 | "sqxtn v5.4h, v5.4s\n" |
| 1319 | "srshl v8.4s, v8.4s, v12.4s\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1320 | "sqxtn v21.4h, v21.4s\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1321 | "srshl v0.4s, v0.4s, v12.4s\n" |
| 1322 | "sqxtn v20.4h, v20.4s\n" |
| 1323 | "srshl v31.4s, v31.4s, v12.4s\n" |
| 1324 | "sqxtn v19.4h, v19.4s\n" |
| 1325 | "sqxtn2 v5.8h, v3.4s\n" |
| 1326 | "sqxtn2 v21.8h, v8.4s\n" |
| 1327 | "sqxtn2 v20.8h, v0.4s\n" |
| 1328 | "sqxtn2 v19.8h, v31.4s\n" |
| 1329 | "sqadd v5.8h, v5.8h, v13.8h\n" |
| 1330 | "sqadd v21.8h, v21.8h, v13.8h\n" |
| 1331 | "sqadd v20.8h, v20.8h, v13.8h\n" |
| 1332 | "sqadd v19.8h, v19.8h, v13.8h\n" |
| 1333 | "smax v5.8h, v5.8h, v17.8h\n" |
| 1334 | "smax v21.8h, v21.8h, v17.8h\n" |
| 1335 | "smax v20.8h, v20.8h, v17.8h\n" |
| 1336 | "smax v19.8h, v19.8h, v17.8h\n" |
| 1337 | "smin v5.8h, v5.8h, v24.8h\n" |
| 1338 | "smin v21.8h, v21.8h, v24.8h\n" |
| 1339 | "smin v20.8h, v20.8h, v24.8h\n" |
| 1340 | "smin v19.8h, v19.8h, v24.8h\n" |
| 1341 | "uzp1 v5.16b, v5.16b, v5.16b\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1342 | "uzp1 v21.16b, v21.16b, v21.16b\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1343 | "uzp1 v20.16b, v20.16b, v20.16b\n" |
| 1344 | "uzp1 v19.16b, v19.16b, v19.16b\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1345 | "tbz x7, #2, 85f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1346 | "st1 { v5.s }[0], [x11], #0x4\n" |
| 1347 | "st1 { v21.s }[0], [x10], #0x4\n" |
| 1348 | "st1 { v20.s }[0], [x9], #0x4\n" |
| 1349 | "st1 { v19.s }[0], [x28], #0x4\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1350 | "tbz x7, #1, 84f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1351 | "st1 { v5.h }[2], [x11], #0x2\n" |
| 1352 | "st1 { v21.h }[2], [x10], #0x2\n" |
| 1353 | "st1 { v20.h }[2], [x9], #0x2\n" |
| 1354 | "st1 { v19.h }[2], [x28], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1355 | "tbz x7, #0, 87f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1356 | "st1 { v5.b }[6], [x11], #0x1\n" |
| 1357 | "st1 { v21.b }[6], [x10], #0x1\n" |
| 1358 | "st1 { v20.b }[6], [x9], #0x1\n" |
| 1359 | "st1 { v19.b }[6], [x28], #0x1\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1360 | "b 87f\n" |
| 1361 | "84:" // Oddments: Bit 2: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1362 | "tbz x7, #0, 87f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1363 | "st1 { v5.b }[4], [x11], #0x1\n" |
| 1364 | "st1 { v21.b }[4], [x10], #0x1\n" |
| 1365 | "st1 { v20.b }[4], [x9], #0x1\n" |
| 1366 | "st1 { v19.b }[4], [x28], #0x1\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1367 | "b 87f\n" |
| 1368 | "85:" // Oddments: Bit 2: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1369 | "tbz x7, #1, 86f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1370 | "st1 { v5.h }[0], [x11], #0x2\n" |
| 1371 | "st1 { v21.h }[0], [x10], #0x2\n" |
| 1372 | "st1 { v20.h }[0], [x9], #0x2\n" |
| 1373 | "st1 { v19.h }[0], [x28], #0x2\n" |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1374 | "tbz x7, #0, 87f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1375 | "st1 { v5.b }[2], [x11], #0x1\n" |
| 1376 | "st1 { v21.b }[2], [x10], #0x1\n" |
| 1377 | "st1 { v20.b }[2], [x9], #0x1\n" |
| 1378 | "st1 { v19.b }[2], [x28], #0x1\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1379 | "b 87f\n" |
| 1380 | "86:" // Oddments: Bit 2: Unset: Bit 1: Unset |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1381 | "tbz x7, #0, 87f\n" |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 1382 | "st1 { v5.b }[0], [x11], #0x1\n" |
| 1383 | "st1 { v21.b }[0], [x10], #0x1\n" |
| 1384 | "st1 { v20.b }[0], [x9], #0x1\n" |
| 1385 | "st1 { v19.b }[0], [x28], #0x1\n" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1386 | "87:" // Oddments: Bit 2: End |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1387 | "88:" // End |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1388 | : |
| 1389 | : [offsetof_Params_bias] "I" (offsetof(Params, bias)), [offsetof_Params_inptrs] "I" (offsetof(Params, inptrs)), [offsetof_Params_n_channels] "I" (offsetof(Params, n_channels)), [offsetof_Params_outptrs] "I" (offsetof(Params, outptrs)), [offsetof_Params_requant] "I" (offsetof(Params, requant)), [offsetof_Params_requant_muls] "I" (offsetof(Params, requant_muls)), [offsetof_Params_requant_shifts] "I" (offsetof(Params, requant_shifts)), [offsetof_Params_weights] "I" (offsetof(Params, weights)), [offsetof_Requantize32_a_offset] "I" (offsetof(arm_gemm::Requantize32, a_offset)), [offsetof_Requantize32_b_offset] "I" (offsetof(arm_gemm::Requantize32, b_offset)), [offsetof_Requantize32_c_offset] "I" (offsetof(arm_gemm::Requantize32, c_offset)), [offsetof_Requantize32_maxval] "I" (offsetof(arm_gemm::Requantize32, maxval)), [offsetof_Requantize32_minval] "I" (offsetof(arm_gemm::Requantize32, minval)), [params] "r" (¶ms) |
Michael Tyler | 7d9a626 | 2023-02-01 16:37:07 +0000 | [diff] [blame] | 1390 | : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1391 | ); |
| 1392 | } |
| 1393 | |
| 1394 | } // namespace depthwise |
| 1395 | } // namespace arm_conv |
| 1396 | |
| 1397 | #endif // defined(__aarch64__) |