Michalis Spyrou | 60c3b0e | 2021-04-08 12:02:58 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2019-2021 Arm Limited. |
| 3 | * |
| 4 | * SPDX-License-Identifier: MIT |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to |
| 8 | * deal in the Software without restriction, including without limitation the |
| 9 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or |
| 10 | * sell copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in all |
| 14 | * copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 19 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 22 | * SOFTWARE. |
| 23 | */ |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 24 | #ifndef ARM_COMPUTE_CPU_DEPTHWISECONV2DNATIVEKERNEL_H |
| 25 | #define ARM_COMPUTE_CPU_DEPTHWISECONV2DNATIVEKERNEL_H |
Michalis Spyrou | 60c3b0e | 2021-04-08 12:02:58 +0100 | [diff] [blame] | 26 | |
| 27 | #include "arm_compute/core/utils/misc/Traits.h" |
| 28 | #include "src/core/common/Macros.h" |
| 29 | #include "src/core/cpu/ICpuKernel.h" |
| 30 | #include "support/Requires.h" |
| 31 | |
| 32 | #ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC |
| 33 | #include <arm_neon.h> |
| 34 | #endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC |
| 35 | |
| 36 | namespace arm_compute |
| 37 | { |
| 38 | namespace cpu |
| 39 | { |
| 40 | namespace kernels |
| 41 | { |
| 42 | /** Interface for the kernel to run a depthwise convolution native on a tensor. */ |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 43 | class CpuDepthwiseConv2dNativeKernel : public ICpuKernel |
Michalis Spyrou | 60c3b0e | 2021-04-08 12:02:58 +0100 | [diff] [blame] | 44 | { |
| 45 | public: |
| 46 | const char *name() const override |
| 47 | { |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 48 | return "CpuDepthwiseConv2dNativeKernel"; |
Michalis Spyrou | 60c3b0e | 2021-04-08 12:02:58 +0100 | [diff] [blame] | 49 | } |
| 50 | /** Default constructor */ |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 51 | CpuDepthwiseConv2dNativeKernel(); |
| 52 | ARM_COMPUTE_DISALLOW_COPY_ALLOW_MOVE(CpuDepthwiseConv2dNativeKernel); |
Michalis Spyrou | 60c3b0e | 2021-04-08 12:02:58 +0100 | [diff] [blame] | 53 | |
| 54 | /** Initialize the function's source, destination and parameters. |
| 55 | * |
| 56 | * @note Supported data layouts: NHWC |
| 57 | * |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 58 | * @param[in] src Source tensor. DataType supported: QASYMM8/QASYMM8_SIGNED/F16/F32. |
Michalis Spyrou | 60c3b0e | 2021-04-08 12:02:58 +0100 | [diff] [blame] | 59 | * @param[in] weights Weights tensor. This is a 3D tensor with dimensions [IFM, W, H]. |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 60 | * Data type supported: Same as @p src or QASYMM8/QASYMM8_SIGNED/QSYMM8_PER_CHANNEL when @p src is QASYMM8/QASYMM8_SIGNED. |
Michalis Spyrou | 60c3b0e | 2021-04-08 12:02:58 +0100 | [diff] [blame] | 61 | * @param[in] biases Biases tensor. A 1D tensor with dimensions [IFM]. Must be nullptr if not needed. |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 62 | * Data type supported: Same as @p src, S32 when src is QASYMM8/QASYMM8_SIGNED. |
| 63 | * @param[out] dst Destination tensor. Data type supported: Same as @p src. |
Michalis Spyrou | 60c3b0e | 2021-04-08 12:02:58 +0100 | [diff] [blame] | 64 | * @param[in] info Depthwise convolution meta-data. |
| 65 | * |
| 66 | */ |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 67 | void configure(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, ITensorInfo *dst, const ConvolutionInfo &info); |
| 68 | /** Static function to check if given info will lead to a valid configuration |
Michalis Spyrou | 60c3b0e | 2021-04-08 12:02:58 +0100 | [diff] [blame] | 69 | * |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 70 | * Similar to CpuDepthwiseConv2dNativeKernel::configure() |
Michalis Spyrou | 60c3b0e | 2021-04-08 12:02:58 +0100 | [diff] [blame] | 71 | * |
| 72 | * @return a status |
| 73 | */ |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 74 | static Status validate(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *dst, const ConvolutionInfo &info); |
Michalis Spyrou | 60c3b0e | 2021-04-08 12:02:58 +0100 | [diff] [blame] | 75 | |
| 76 | // Inherited methods overridden: |
| 77 | void run_op(ITensorPack &tensors, const Window &window, const ThreadInfo &info) override; |
| 78 | |
| 79 | private: |
| 80 | template <typename T> |
| 81 | using FloatEnalber = typename std::enable_if<arm_compute::utils::traits::is_floating_point<T>::value, int>::type; |
| 82 | |
| 83 | template <typename T, typename TW, FloatEnalber<T> = 0> |
| 84 | void run_depthwise(const ITensor *src, const ITensor *weights, const ITensor *bias, ITensor *dst, const Window &window, bool has_biases); |
| 85 | |
| 86 | template <typename T> |
| 87 | using Quantized8bitEnalber = typename std::enable_if < std::is_same<T, uint8_t>::value || std::is_same<T, int8_t>::value, int >::type; |
| 88 | |
| 89 | template <typename T, typename TW, Quantized8bitEnalber<T> = 0> |
| 90 | void run_depthwise(const ITensor *src, const ITensor *weights, const ITensor *bias, ITensor *dst, const Window &window, bool has_biases); |
| 91 | |
| 92 | /** Common signature for all the specialised depthwise convolution native functions |
| 93 | * |
| 94 | * @param[in] window Region on which to execute the kernel. |
| 95 | */ |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 96 | using DepthwiseFunctionPtr = void (CpuDepthwiseConv2dNativeKernel::*)(const ITensor *src, const ITensor *weights, const ITensor *bias, ITensor *dst, const Window &window, bool has_biases); |
Michalis Spyrou | 60c3b0e | 2021-04-08 12:02:58 +0100 | [diff] [blame] | 97 | |
| 98 | DepthwiseFunctionPtr _func; |
| 99 | PadStrideInfo _conv_info; |
| 100 | unsigned int _depth_multiplier; |
| 101 | Size2D _dilation; |
| 102 | std::vector<int> _output_multiplier; |
| 103 | std::vector<int> _output_shift; |
| 104 | bool _has_biases; |
| 105 | }; |
| 106 | } // namespace kernels |
| 107 | } // namespace cpu |
| 108 | } // namespace arm_compute |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 109 | #endif /* ARM_COMPUTE_CPU_DEPTHWISECONV2DNATIVEKERNEL_H */ |