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Giorgio Arena945ae9e2021-10-13 11:13:04 +01001/*
2 * Copyright (c) 2021 Arm Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24#include "arm_compute/runtime/CL/functions/CLConv3D.h"
25
26#include "arm_compute/core/CL/ICLTensor.h"
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010027
Giorgio Arena945ae9e2021-10-13 11:13:04 +010028#include "src/gpu/cl/operators/ClDirectConv3d.h"
29
30namespace arm_compute
31{
32using namespace arm_compute::experimental;
33
34struct CLConv3D::Impl
35{
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010036 const ICLTensor *src{nullptr};
37 const ICLTensor *weights{nullptr};
38 const ICLTensor *biases{nullptr};
39 ICLTensor *dst{nullptr};
40 std::unique_ptr<opencl::ClDirectConv3d> op{nullptr};
Giorgio Arena945ae9e2021-10-13 11:13:04 +010041};
42
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010043CLConv3D::CLConv3D() : _impl(std::make_unique<Impl>())
Giorgio Arena945ae9e2021-10-13 11:13:04 +010044{
45}
46
47CLConv3D::~CLConv3D() = default;
48
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010049void CLConv3D::configure(const ICLTensor *src,
50 const ICLTensor *weights,
51 const ICLTensor *biases,
52 ICLTensor *dst,
53 const Conv3dInfo &conv3d_info)
Giorgio Arena945ae9e2021-10-13 11:13:04 +010054{
55 configure(CLKernelLibrary::get().get_compile_context(), src, weights, biases, dst, conv3d_info);
56}
57
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010058void CLConv3D::configure(const CLCompileContext &compile_context,
59 const ICLTensor *src,
60 const ICLTensor *weights,
61 const ICLTensor *biases,
62 ICLTensor *dst,
63 const Conv3dInfo &conv3d_info)
Giorgio Arena945ae9e2021-10-13 11:13:04 +010064{
65 ARM_COMPUTE_ERROR_ON_NULLPTR(src, weights, dst);
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010066 ARM_COMPUTE_ERROR_THROW_ON(CLConv3D::validate(
67 src->info(), weights->info(), ((biases != nullptr) ? biases->info() : nullptr), dst->info(), conv3d_info));
Giorgio Arena945ae9e2021-10-13 11:13:04 +010068
69 _impl->src = src;
70 _impl->weights = weights;
71 _impl->biases = biases;
72 _impl->dst = dst;
73
74 _impl->op = std::make_unique<opencl::ClDirectConv3d>();
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010075 _impl->op->configure(compile_context, _impl->src->info(), _impl->weights->info(),
76 _impl->biases ? _impl->biases->info() : nullptr, _impl->dst->info(), conv3d_info);
Giorgio Arena945ae9e2021-10-13 11:13:04 +010077}
78
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010079Status CLConv3D::validate(const ITensorInfo *src,
80 const ITensorInfo *weights,
81 const ITensorInfo *biases,
82 const ITensorInfo *dst,
83 const Conv3dInfo &conv3d_info)
Giorgio Arena945ae9e2021-10-13 11:13:04 +010084{
85 return opencl::ClDirectConv3d::validate(src, weights, biases, dst, conv3d_info);
86}
87
88void CLConv3D::run()
89{
90 ITensorPack pack;
91 pack.add_tensor(TensorType::ACL_SRC_0, _impl->src);
92 pack.add_tensor(TensorType::ACL_SRC_1, _impl->weights);
93 pack.add_tensor(TensorType::ACL_SRC_2, _impl->biases);
94 pack.add_tensor(TensorType::ACL_DST, _impl->dst);
95 _impl->op->run(pack);
96}
97} // namespace arm_compute