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Sang-Hoon Park75eea332020-11-13 13:44:13 +00001/*
Michele Di Giorgioc9c89052021-01-26 10:20:17 +00002 * Copyright (c) 2020-2021 Arm Limited.
Sang-Hoon Park75eea332020-11-13 13:44:13 +00003 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24#include "arm_compute/runtime/CL/functions/CLLogicalNot.h"
Sang-Hoon Park75eea332020-11-13 13:44:13 +000025
Michele Di Giorgioc9c89052021-01-26 10:20:17 +000026#include "arm_compute/core/CL/CLKernelLibrary.h"
27#include "arm_compute/core/CL/ICLTensor.h"
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010028
Michele Di Giorgioc9c89052021-01-26 10:20:17 +000029#include "src/core/CL/ICLKernel.h"
Georgios Pinitas7891a732021-08-20 21:39:25 +010030#include "src/gpu/cl/operators/ClLogicalNot.h"
Sang-Hoon Park75eea332020-11-13 13:44:13 +000031
32namespace arm_compute
33{
Sang-Hoon Park75eea332020-11-13 13:44:13 +000034struct CLLogicalNot::Impl
35{
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010036 const ICLTensor *src{nullptr};
37 ICLTensor *dst{nullptr};
38 std::unique_ptr<opencl::ClLogicalNot> op{nullptr};
Sang-Hoon Park75eea332020-11-13 13:44:13 +000039};
40
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010041CLLogicalNot::CLLogicalNot() : _impl(std::make_unique<Impl>())
Sang-Hoon Park75eea332020-11-13 13:44:13 +000042{
43}
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010044CLLogicalNot::CLLogicalNot(CLLogicalNot &&) = default;
Sang-Hoon Park75eea332020-11-13 13:44:13 +000045CLLogicalNot &CLLogicalNot::operator=(CLLogicalNot &&) = default;
46CLLogicalNot::~CLLogicalNot() = default;
47
48void CLLogicalNot::configure(const ICLTensor *input, ICLTensor *output)
49{
50 configure(CLKernelLibrary::get().get_compile_context(), input, output);
51}
52
53void CLLogicalNot::configure(const CLCompileContext &compile_context, const ICLTensor *input, ICLTensor *output)
54{
55 _impl->src = input;
56 _impl->dst = output;
Michele Di Giorgioc9c89052021-01-26 10:20:17 +000057 _impl->op = std::make_unique<opencl::ClLogicalNot>();
Sang-Hoon Park75eea332020-11-13 13:44:13 +000058 _impl->op->configure(compile_context, input->info(), output->info());
59}
60
61Status CLLogicalNot::validate(const ITensorInfo *input, const ITensorInfo *output)
62{
Michele Di Giorgioc9c89052021-01-26 10:20:17 +000063 return opencl::ClLogicalNot::validate(input, output);
Sang-Hoon Park75eea332020-11-13 13:44:13 +000064}
65
66void CLLogicalNot::run()
67{
68 ITensorPack pack;
69 pack.add_tensor(TensorType::ACL_SRC, _impl->src);
70 pack.add_tensor(TensorType::ACL_DST, _impl->dst);
71
72 _impl->op->run(pack);
73}
74
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010075} // namespace arm_compute