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Giorgio Arena945ae9e2021-10-13 11:13:04 +01001/*
2 * Copyright (c) 2021 Arm Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24#include "src/gpu/cl/operators/ClDirectConv3d.h"
25
26#include "arm_compute/runtime/CL/CLScheduler.h"
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010027
Giorgio Arena945ae9e2021-10-13 11:13:04 +010028#include "src/gpu/cl/kernels/ClDirectConv3dKernel.h"
29
30namespace arm_compute
31{
32namespace opencl
33{
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010034void ClDirectConv3d::configure(const CLCompileContext &compile_context,
35 const ITensorInfo *src0,
36 const ITensorInfo *src1,
37 const ITensorInfo *src2,
38 ITensorInfo *dst,
39 const Conv3dInfo &conv3d_info)
Giorgio Arena945ae9e2021-10-13 11:13:04 +010040{
Sheri Zhang5dda2172021-10-15 19:54:17 +010041 ARM_COMPUTE_ERROR_ON_NULLPTR(src0);
Giorgio Arena945ae9e2021-10-13 11:13:04 +010042
43 // Configure direct convolution 3d kernel
44 auto k = std::make_unique<kernels::ClDirectConv3dKernel>();
Sheri Zhang5dda2172021-10-15 19:54:17 +010045 k->configure(compile_context, src0, src1, src2, dst, conv3d_info);
Giorgio Arena945ae9e2021-10-13 11:13:04 +010046 _direct_conv3d_kernel = std::move(k);
47}
48
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010049Status ClDirectConv3d::validate(const ITensorInfo *src0,
50 const ITensorInfo *src1,
51 const ITensorInfo *src2,
52 const ITensorInfo *dst,
53 const Conv3dInfo &conv3d_info)
Giorgio Arena945ae9e2021-10-13 11:13:04 +010054{
Sheri Zhang5dda2172021-10-15 19:54:17 +010055 ARM_COMPUTE_RETURN_ON_ERROR(kernels::ClDirectConv3dKernel::validate(src0, src1, src2, dst, conv3d_info));
Giorgio Arena945ae9e2021-10-13 11:13:04 +010056 return Status{};
57}
58
59void ClDirectConv3d::run(ITensorPack &tensors)
60{
61 // Run direct convolution 3d
62 CLScheduler::get().enqueue_op(*_direct_conv3d_kernel.get(), tensors, true);
63}
64} // namespace opencl
65} // namespace arm_compute