Sheri Zhang | 6d9c982 | 2021-09-24 16:02:57 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2021 Arm Limited. |
| 3 | * |
| 4 | * SPDX-License-Identifier: MIT |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to |
| 8 | * deal in the Software without restriction, including without limitation the |
| 9 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or |
| 10 | * sell copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in all |
| 14 | * copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 19 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 22 | * SOFTWARE. |
| 23 | */ |
| 24 | #include "src/cpu/operators/CpuDirectConv3d.h" |
| 25 | |
| 26 | #include "arm_compute/core/PixelValue.h" |
| 27 | #include "arm_compute/core/Utils.h" |
| 28 | #include "arm_compute/core/Validate.h" |
| 29 | #include "arm_compute/runtime/NEON/NEScheduler.h" |
| 30 | #include "src/common/utils/Log.h" |
| 31 | |
| 32 | namespace arm_compute |
| 33 | { |
| 34 | namespace cpu |
| 35 | { |
| 36 | CpuDirectConv3d::~CpuDirectConv3d() = default; |
| 37 | |
| 38 | CpuDirectConv3d::CpuDirectConv3d(std::shared_ptr<IMemoryManager> memory_manager) |
| 39 | : _memory_group(std::move(memory_manager)), _conv_kernel(), _activationlayer_function(), _accumulator(), _is_activationlayer_enabled(false), _dim_split(Window::DimZ) |
| 40 | { |
| 41 | } |
| 42 | |
Sheri Zhang | 5dda217 | 2021-10-15 19:54:17 +0100 | [diff] [blame] | 43 | void CpuDirectConv3d::configure(ITensorInfo *src0, ITensorInfo *src1, const ITensorInfo *src2, ITensorInfo *dst, const Conv3dInfo conv_info) |
Sheri Zhang | 6d9c982 | 2021-09-24 16:02:57 +0100 | [diff] [blame] | 44 | { |
Sheri Zhang | 5dda217 | 2021-10-15 19:54:17 +0100 | [diff] [blame] | 45 | ARM_COMPUTE_LOG_PARAMS(src0, src1, src2, dst, conv_info); |
| 46 | ARM_COMPUTE_ERROR_ON(src0->data_layout() != DataLayout::NDHWC); |
Sheri Zhang | 6d9c982 | 2021-09-24 16:02:57 +0100 | [diff] [blame] | 47 | |
| 48 | _conv_kernel = std::make_unique<kernels::CpuDirectConv3dKernel>(); |
| 49 | |
| 50 | // Free accumulator |
| 51 | if(_accumulator.buffer() != nullptr) |
| 52 | { |
| 53 | _accumulator.allocator()->free(); |
| 54 | } |
| 55 | |
| 56 | _dim_split = Window::DimY; |
| 57 | |
Sheri Zhang | 5dda217 | 2021-10-15 19:54:17 +0100 | [diff] [blame] | 58 | _conv_kernel->configure(src0, src1, src2, dst, conv_info); |
Sheri Zhang | 6d9c982 | 2021-09-24 16:02:57 +0100 | [diff] [blame] | 59 | |
| 60 | //Configure Activation Layer |
| 61 | _is_activationlayer_enabled = conv_info.act_info.enabled(); |
| 62 | if(_is_activationlayer_enabled) |
| 63 | { |
| 64 | _activationlayer_function = std::make_unique<CpuActivation>(); |
| 65 | _activationlayer_function->configure(dst, dst, conv_info.act_info); |
| 66 | } |
| 67 | } |
| 68 | |
Sheri Zhang | 5dda217 | 2021-10-15 19:54:17 +0100 | [diff] [blame] | 69 | Status CpuDirectConv3d::validate(const ITensorInfo *src0, const ITensorInfo *src1, const ITensorInfo *src2, const ITensorInfo *dst, const Conv3dInfo conv_info) |
Sheri Zhang | 6d9c982 | 2021-09-24 16:02:57 +0100 | [diff] [blame] | 70 | { |
Sheri Zhang | 5dda217 | 2021-10-15 19:54:17 +0100 | [diff] [blame] | 71 | ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(src0, src1, dst); |
Sheri Zhang | 6d9c982 | 2021-09-24 16:02:57 +0100 | [diff] [blame] | 72 | |
| 73 | // Validate Convolution kernel |
Sheri Zhang | 5dda217 | 2021-10-15 19:54:17 +0100 | [diff] [blame] | 74 | ARM_COMPUTE_RETURN_ON_ERROR(kernels::CpuDirectConv3dKernel::validate(src0, src1, src2, dst, conv_info)); |
Sheri Zhang | 6d9c982 | 2021-09-24 16:02:57 +0100 | [diff] [blame] | 75 | |
| 76 | if(conv_info.act_info.enabled()) |
| 77 | { |
| 78 | ARM_COMPUTE_RETURN_ON_ERROR(CpuActivation::validate(dst, nullptr, conv_info.act_info)); |
| 79 | } |
| 80 | |
| 81 | return Status{}; |
| 82 | } |
| 83 | |
| 84 | void CpuDirectConv3d::run(ITensorPack &tensors) |
| 85 | { |
| 86 | MemoryGroupResourceScope scope_mg(_memory_group); |
| 87 | |
| 88 | auto dst = tensors.get_tensor(TensorType::ACL_DST); |
| 89 | |
| 90 | NEScheduler::get().schedule_op(_conv_kernel.get(), _dim_split, _conv_kernel->window(), tensors); |
| 91 | |
| 92 | if(_is_activationlayer_enabled) |
| 93 | { |
| 94 | ITensorPack pack; |
| 95 | pack.add_tensor(TensorType::ACL_SRC, dst); |
| 96 | pack.add_tensor(TensorType::ACL_DST, dst); |
| 97 | _activationlayer_function->run(pack); |
| 98 | } |
| 99 | } |
| 100 | } // namespace cpu |
| 101 | } // namespace arm_compute |