blob: 56400b67a01171f24b218fdb2e926d83ce8d384a [file] [log] [blame]
Michalis Spyrou5c8e05c2018-03-22 11:56:01 +00001/*
Sheri Zhang7e20e292021-02-02 11:49:34 +00002 * Copyright (c) 2018-2021 Arm Limited.
Michalis Spyrou5c8e05c2018-03-22 11:56:01 +00003 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24#include "arm_compute/runtime/CL/functions/CLCopy.h"
25
Sheri Zhang7e20e292021-02-02 11:49:34 +000026#include "arm_compute/core/CL/CLKernelLibrary.h"
Michalis Spyrou5c8e05c2018-03-22 11:56:01 +000027#include "arm_compute/core/CL/ICLTensor.h"
Sheri Zhang7e20e292021-02-02 11:49:34 +000028#include "arm_compute/core/Types.h"
Michalis Spyrou5c8e05c2018-03-22 11:56:01 +000029#include "arm_compute/core/Validate.h"
Sheri Zhang7e20e292021-02-02 11:49:34 +000030#include "src/core/CL/ICLKernel.h"
Georgios Pinitas7891a732021-08-20 21:39:25 +010031#include "src/gpu/cl/operators/ClCopy.h"
Michalis Spyrou5c8e05c2018-03-22 11:56:01 +000032
ramelg016d891572021-09-29 10:05:09 +010033#include "src/common/utils/Log.h"
34
Michalis Spyrou5c8e05c2018-03-22 11:56:01 +000035#include <utility>
36
Sheri Zhang7e20e292021-02-02 11:49:34 +000037namespace arm_compute
Michalis Spyrou5c8e05c2018-03-22 11:56:01 +000038{
Sheri Zhang7e20e292021-02-02 11:49:34 +000039struct CLCopy::Impl
40{
41 const ICLTensor *src{ nullptr };
42 ICLTensor *dst{ nullptr };
43 std::unique_ptr<opencl::ClCopy> op{ nullptr };
44};
45
46CLCopy::CLCopy()
47 : _impl(std::make_unique<Impl>())
48{
49}
50CLCopy::CLCopy(CLCopy &&) = default;
51CLCopy &CLCopy::operator=(CLCopy &&) = default;
52CLCopy::~CLCopy() = default;
53
54void CLCopy::configure(ICLTensor *input, ICLTensor *output, Window *dst_window)
55{
56 configure(CLKernelLibrary::get().get_compile_context(), input, output, dst_window);
Manuel Bottini2b84be52020-04-08 10:15:51 +010057}
58
Sheri Zhang7e20e292021-02-02 11:49:34 +000059void CLCopy::configure(const CLCompileContext &compile_context, ICLTensor *input, ICLTensor *output, Window *dst_window)
Manuel Bottini2b84be52020-04-08 10:15:51 +010060{
Sheri Zhang7e20e292021-02-02 11:49:34 +000061 ARM_COMPUTE_ERROR_ON_NULLPTR(input);
ramelg016d891572021-09-29 10:05:09 +010062 ARM_COMPUTE_LOG_PARAMS(input, output, dst_window);
Sheri Zhang7e20e292021-02-02 11:49:34 +000063
64 _impl->src = input;
65 _impl->dst = output;
66
67 _impl->op = std::make_unique<opencl::ClCopy>();
68 _impl->op->configure(compile_context, _impl->src->info(), _impl->dst->info(), dst_window);
Michalis Spyrou5c8e05c2018-03-22 11:56:01 +000069}
Georgios Pinitas8bc745d2018-07-18 19:51:24 +010070
Sheri Zhang7e20e292021-02-02 11:49:34 +000071Status CLCopy::validate(const ITensorInfo *input, const ITensorInfo *output, Window *dst_window)
Georgios Pinitas8bc745d2018-07-18 19:51:24 +010072{
Sheri Zhang7e20e292021-02-02 11:49:34 +000073 return opencl::ClCopy::validate(input, output, dst_window);
Georgios Pinitas8bc745d2018-07-18 19:51:24 +010074}
Sheri Zhang7e20e292021-02-02 11:49:34 +000075
76void CLCopy::run()
77{
78 ITensorPack pack;
79 pack.add_tensor(TensorType::ACL_SRC, _impl->src);
80 pack.add_tensor(TensorType::ACL_DST, _impl->dst);
81 _impl->op->run(pack);
82}
83} // namespace arm_compute