steniu01 | 27b386c | 2017-07-18 17:37:43 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2017 ARM Limited. |
| 3 | * |
| 4 | * SPDX-License-Identifier: MIT |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to |
| 8 | * deal in the Software without restriction, including without limitation the |
| 9 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or |
| 10 | * sell copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in all |
| 14 | * copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 19 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 22 | * SOFTWARE. |
| 23 | */ |
| 24 | #ifndef __ARM_COMPUTE_CLDIRECTCONVOLUTIONLAYERKERNEL_H__ |
| 25 | #define __ARM_COMPUTE_CLDIRECTCONVOLUTIONLAYERKERNEL_H__ |
| 26 | |
| 27 | #include "arm_compute/core/CL/ICLKernel.h" |
| 28 | #include "arm_compute/core/Types.h" |
| 29 | |
| 30 | namespace arm_compute |
| 31 | { |
| 32 | class ICLTensor; |
| 33 | |
| 34 | /** Interface for the direct convolution kernel. |
| 35 | */ |
steniu01 | 27b386c | 2017-07-18 17:37:43 +0100 | [diff] [blame] | 36 | class CLDirectConvolutionLayerKernel : public ICLKernel |
| 37 | { |
| 38 | public: |
| 39 | /** Default constructor */ |
| 40 | CLDirectConvolutionLayerKernel(); |
| 41 | /** Prevent instances of this class from being copied (As this class contains pointers) */ |
| 42 | CLDirectConvolutionLayerKernel(const CLDirectConvolutionLayerKernel &) = delete; |
| 43 | /** Prevent instances of this class from being copied (As this class contains pointers) */ |
| 44 | CLDirectConvolutionLayerKernel &operator=(const CLDirectConvolutionLayerKernel &) = delete; |
| 45 | /** Allow instances of this class to be moved */ |
| 46 | CLDirectConvolutionLayerKernel(CLDirectConvolutionLayerKernel &&) = default; |
| 47 | /** Allow instances of this class to be moved */ |
| 48 | CLDirectConvolutionLayerKernel &operator=(CLDirectConvolutionLayerKernel &&) = default; |
| 49 | /** Default destructor */ |
| 50 | ~CLDirectConvolutionLayerKernel() = default; |
| 51 | /** Set the input, weights, biases and output tensors. |
| 52 | * |
Gian Marco Iodice | 5cb4d6a | 2017-08-08 10:53:00 +0100 | [diff] [blame] | 53 | * @note: DirectConvolution only works in the following configurations: |
| 54 | * 1x1 convolution with stride_x = 1/2/3, stride_y = 1/2/3 |
| 55 | * 3x3 convolution with stride_x = 1/2, stride_y = 1/2 |
steniu01 | db00668 | 2017-08-09 16:26:22 +0100 | [diff] [blame] | 56 | * 5x5 convolution with stride_x = 1/2, stride_y = 1/2 |
Gian Marco Iodice | 5cb4d6a | 2017-08-08 10:53:00 +0100 | [diff] [blame] | 57 | * |
steniu01 | 27b386c | 2017-07-18 17:37:43 +0100 | [diff] [blame] | 58 | * @param[in] input The input tensor to convolve. 3 lower dimensions represent a single input [width, height, IFM], |
Chunosov | d621bca | 2017-11-03 17:33:15 +0700 | [diff] [blame] | 59 | * while every optional dimension from 4 and above represent a batch of inputs. Data types supported: QASYMM8/QS8/QS16/F16/F32. |
steniu01 | 27b386c | 2017-07-18 17:37:43 +0100 | [diff] [blame] | 60 | * @param[in] weights Weights tensor. Weights are 4D tensor with dimensions [kernel_x, kernel_y, IFM, OFM]. |
| 61 | * The 3rd dimension must be the same as the input's volume 3rd dimension. |
| 62 | * Data type supported:Same as @p input. |
| 63 | * @param[in] biases Biases tensor. Biases are 1D tensor with dimension [OFM]. Data type supported: Same as @p input. |
| 64 | * @param[out] output Output tensor. |
| 65 | * The 3rd dimensions must be equal to the 4th dimension of the @p kernels tensor. Data types supported: Same as @p input. |
| 66 | * @param[in] conv_info Contains padding and stride information described in @ref PadStrideInfo. |
| 67 | */ |
| 68 | void configure(const ICLTensor *input, const ICLTensor *weights, const ICLTensor *biases, ICLTensor *output, const PadStrideInfo &conv_info); |
| 69 | |
| 70 | // Inherited methods overridden: |
| 71 | BorderSize border_size() const override; |
| 72 | |
| 73 | // Inherited methods overridden: |
| 74 | void run(const Window &window, cl::CommandQueue &queue) override; |
| 75 | |
| 76 | private: |
| 77 | const ICLTensor *_input; |
| 78 | const ICLTensor *_biases; |
| 79 | const ICLTensor *_weights; |
| 80 | ICLTensor *_output; |
| 81 | BorderSize _border_size; |
| 82 | int _conv_pad_x; |
| 83 | int _conv_pad_y; |
| 84 | int _conv_stride_x; |
| 85 | int _conv_stride_y; |
| 86 | }; |
Gian Marco Iodice | f670a0a | 2017-09-18 12:20:45 +0100 | [diff] [blame] | 87 | } // namespace arm_compute |
steniu01 | 27b386c | 2017-07-18 17:37:43 +0100 | [diff] [blame] | 88 | #endif /*__ARM_COMPUTE_CLDIRECTCONVOLUTIONLAYERKERNEL_H__ */ |