blob: 5860720d3bbc802569061a81afbe617cfeaceb18 [file] [log] [blame]
Pablo Tello7fad9b12018-03-14 17:55:27 +00001/*
Michalis Spyroubcfd09a2019-05-01 13:03:59 +01002 * Copyright (c) 2018-2019 ARM Limited.
Pablo Tello7fad9b12018-03-14 17:55:27 +00003 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24#include "arm_compute/runtime/CPUUtils.h"
25
26#include "arm_compute/core/CPP/CPPTypes.h"
27#include "arm_compute/core/Error.h"
28#include "support/ToolchainSupport.h"
29
30#include <array>
31#include <cstdlib>
32#include <cstring>
Pablo Tello7fad9b12018-03-14 17:55:27 +000033#include <fstream>
34#include <map>
Pablo Tello7fad9b12018-03-14 17:55:27 +000035
36#ifndef BARE_METAL
Michalis Spyrou8e5174c2018-12-04 11:43:23 +000037/* C++ std::regex takes up a lot of space in the standalone builds */
38#include <regex.h>
Pablo Tello7fad9b12018-03-14 17:55:27 +000039#include <thread>
40#endif /* BARE_METAL */
41
42#if !defined(BARE_METAL) && (defined(__arm__) || defined(__aarch64__))
43#include <sys/auxv.h>
44
45/* Get HWCAP bits from asm/hwcap.h */
46#include <asm/hwcap.h>
47#endif /* !BARE_METAL */
48
49/* Make sure the bits we care about are defined, just in case asm/hwcap.h is
50 * out of date (or for bare metal mode) */
51#ifndef HWCAP_ASIMDHP
Michalis Spyroubcfd09a2019-05-01 13:03:59 +010052#define HWCAP_ASIMDHP (1 << 10) // NOLINT
53#endif /* HWCAP_ASIMDHP */
Pablo Tello7fad9b12018-03-14 17:55:27 +000054
55#ifndef HWCAP_CPUID
Michalis Spyroubcfd09a2019-05-01 13:03:59 +010056#define HWCAP_CPUID (1 << 11) // NOLINT
57#endif /* HWCAP_CPUID */
Pablo Tello7fad9b12018-03-14 17:55:27 +000058
59#ifndef HWCAP_ASIMDDP
Michalis Spyroubcfd09a2019-05-01 13:03:59 +010060#define HWCAP_ASIMDDP (1 << 20) // NOLINT
61#endif /* HWCAP_ASIMDDP */
Pablo Tello7fad9b12018-03-14 17:55:27 +000062
63namespace
64{
65using namespace arm_compute;
66
67#if !defined(BARE_METAL) && (defined(__arm__) || defined(__aarch64__))
Pablo Tello7fad9b12018-03-14 17:55:27 +000068
Anthony Barbier3efb3752018-07-20 15:30:46 +010069bool model_supports_dot(CPUModel model)
70{
71 switch(model)
72 {
Anthony Barbier5a3ee4f2018-07-24 11:24:17 +010073 case CPUModel::GENERIC_FP16_DOT:
Anthony Barbier3efb3752018-07-20 15:30:46 +010074 case CPUModel::A55r1:
Anthony Barbier3efb3752018-07-20 15:30:46 +010075 return true;
76 default:
77 return false;
78 }
79}
80
81bool model_supports_fp16(CPUModel model)
82{
83 switch(model)
84 {
Anthony Barbier5a3ee4f2018-07-24 11:24:17 +010085 case CPUModel::GENERIC_FP16:
86 case CPUModel::GENERIC_FP16_DOT:
Anthony Barbier3efb3752018-07-20 15:30:46 +010087 case CPUModel::A55r1:
Anthony Barbier3efb3752018-07-20 15:30:46 +010088 return true;
89 default:
90 return false;
91 }
92}
Georgios Pinitas18960692018-12-21 18:18:46 +000093
Pablo Tello7fad9b12018-03-14 17:55:27 +000094/* Convert an MIDR register value to a CPUModel enum value. */
95CPUModel midr_to_model(const unsigned int midr)
96{
Anthony Barbier5a3ee4f2018-07-24 11:24:17 +010097 CPUModel model = CPUModel::GENERIC;
Pablo Tello7fad9b12018-03-14 17:55:27 +000098
99 // Unpack variant and CPU ID
Anthony Barbier5a3ee4f2018-07-24 11:24:17 +0100100 const int implementer = (midr >> 24) & 0xFF;
101 const int variant = (midr >> 20) & 0xF;
102 const int cpunum = (midr >> 4) & 0xFFF;
Pablo Tello7fad9b12018-03-14 17:55:27 +0000103
Anthony Barbier5a3ee4f2018-07-24 11:24:17 +0100104 if(implementer == 0x41) // Arm CPUs
Pablo Tello7fad9b12018-03-14 17:55:27 +0000105 {
Anthony Barbier5a3ee4f2018-07-24 11:24:17 +0100106 // Only CPUs we have code paths for are detected. All other CPUs can be safely classed as "GENERIC"
107 switch(cpunum)
108 {
109 case 0xd03: // A53
110 case 0xd04: // A35
111 model = CPUModel::A53;
112 break;
113 case 0xd05: // A55
114 if(variant != 0)
115 {
116 model = CPUModel::A55r1;
117 }
118 else
119 {
120 model = CPUModel::A55r0;
121 }
122 break;
123 case 0xd0a: // A75
124 if(variant != 0)
125 {
126 model = CPUModel::GENERIC_FP16_DOT;
127 }
128 else
129 {
130 model = CPUModel::GENERIC_FP16;
131 }
132 break;
133 case 0xd0b: // A76
Isabella Gottardibe2de402018-11-21 15:23:49 +0000134 case 0xd06:
135 case 0xd0c:
136 case 0xd0d:
Anthony Barbier5a3ee4f2018-07-24 11:24:17 +0100137 model = CPUModel::GENERIC_FP16_DOT;
138 break;
139 default:
140 model = CPUModel::GENERIC;
141 break;
142 }
Pablo Tello7fad9b12018-03-14 17:55:27 +0000143 }
Michalis Spyroubcfd09a2019-05-01 13:03:59 +0100144 else if(implementer == 0x48)
Georgios Pinitas18960692018-12-21 18:18:46 +0000145 {
146 // Only CPUs we have code paths for are detected. All other CPUs can be safely classed as "GENERIC"
147 switch(cpunum)
148 {
Michalis Spyroubcfd09a2019-05-01 13:03:59 +0100149 case 0xd40: // A76
Georgios Pinitas18960692018-12-21 18:18:46 +0000150 model = CPUModel::GENERIC_FP16_DOT;
151 break;
152 default:
153 model = CPUModel::GENERIC;
154 break;
155 }
156 }
Pablo Tello7fad9b12018-03-14 17:55:27 +0000157
158 return model;
159}
160
Anthony Barbier3efb3752018-07-20 15:30:46 +0100161void populate_models_cpuid(std::vector<CPUModel> &cpusv)
Pablo Tello7fad9b12018-03-14 17:55:27 +0000162{
163 // If the CPUID capability is present, MIDR information is provided in /sys. Use that to populate the CPU model table.
164 uint32_t i = 0;
165 for(auto &c : cpusv)
166 {
167 std::stringstream str;
168 str << "/sys/devices/system/cpu/cpu" << i++ << "/regs/identification/midr_el1";
169 std::ifstream file;
170 file.open(str.str(), std::ios::in);
171 if(file.is_open())
172 {
173 std::string line;
174 if(bool(getline(file, line)))
175 {
Georgios Pinitas9c2ec7e2018-11-12 17:07:18 +0000176 const uint32_t midr = support::cpp11::stoul(line, nullptr, support::cpp11::NumericBase::BASE_16);
177 c = midr_to_model(midr & 0xffffffff);
Pablo Tello7fad9b12018-03-14 17:55:27 +0000178 }
179 }
180 }
181}
182
Anthony Barbier3efb3752018-07-20 15:30:46 +0100183void populate_models_cpuinfo(std::vector<CPUModel> &cpusv)
Pablo Tello7fad9b12018-03-14 17:55:27 +0000184{
Michalis Spyrou8e5174c2018-12-04 11:43:23 +0000185 regex_t proc_regex;
186 regex_t imp_regex;
187 regex_t var_regex;
188 regex_t part_regex;
189 regex_t rev_regex;
190
191 memset(&proc_regex, 0, sizeof(regex_t));
192 memset(&imp_regex, 0, sizeof(regex_t));
193 memset(&var_regex, 0, sizeof(regex_t));
194 memset(&part_regex, 0, sizeof(regex_t));
195 memset(&rev_regex, 0, sizeof(regex_t));
196
197 int ret_status = 0;
Pablo Tello7fad9b12018-03-14 17:55:27 +0000198 // If "long-form" cpuinfo is present, parse that to populate models.
Michalis Spyrou8e5174c2018-12-04 11:43:23 +0000199 ret_status |= regcomp(&proc_regex, R"(^processor.*([[:digit:]]+)$)", REG_EXTENDED);
200 ret_status |= regcomp(&imp_regex, R"(^CPU implementer.*0x(..)$)", REG_EXTENDED);
201 ret_status |= regcomp(&var_regex, R"(^CPU variant.*0x(.)$)", REG_EXTENDED);
202 ret_status |= regcomp(&part_regex, R"(^CPU part.*0x(...)$)", REG_EXTENDED);
203 ret_status |= regcomp(&rev_regex, R"(^CPU revision.*([[:digit:]]+)$)", REG_EXTENDED);
204 ARM_COMPUTE_UNUSED(ret_status);
205 ARM_COMPUTE_ERROR_ON_MSG(ret_status != 0, "Regex compilation failed.");
Pablo Tello7fad9b12018-03-14 17:55:27 +0000206
207 std::ifstream file;
208 file.open("/proc/cpuinfo", std::ios::in);
209
210 if(file.is_open())
211 {
212 std::string line;
213 int midr = 0;
214 int curcpu = -1;
215
216 while(bool(getline(file, line)))
217 {
Michalis Spyroubcfd09a2019-05-01 13:03:59 +0100218 std::array<regmatch_t, 2> match;
219 ret_status = regexec(&proc_regex, line.c_str(), 2, match.data(), 0);
Michalis Spyrou8e5174c2018-12-04 11:43:23 +0000220 if(ret_status == 0)
Pablo Tello7fad9b12018-03-14 17:55:27 +0000221 {
Michalis Spyrou8e5174c2018-12-04 11:43:23 +0000222 std::string id = line.substr(match[1].rm_so, (match[1].rm_eo - match[1].rm_so));
Pablo Tello65f99822018-05-24 11:40:15 +0100223 int newcpu = support::cpp11::stoi(id, nullptr);
Pablo Tello7fad9b12018-03-14 17:55:27 +0000224
225 if(curcpu >= 0 && midr == 0)
226 {
227 // Matched a new CPU ID without any description of the previous one - looks like old format.
228 return;
229 }
230
231 if(curcpu >= 0)
232 {
Anthony Barbier3efb3752018-07-20 15:30:46 +0100233 cpusv[curcpu] = midr_to_model(midr);
Pablo Tello7fad9b12018-03-14 17:55:27 +0000234 }
235
236 midr = 0;
237 curcpu = newcpu;
238
239 continue;
240 }
241
Michalis Spyroubcfd09a2019-05-01 13:03:59 +0100242 ret_status = regexec(&imp_regex, line.c_str(), 2, match.data(), 0);
Michalis Spyrou8e5174c2018-12-04 11:43:23 +0000243 if(ret_status == 0)
Pablo Tello7fad9b12018-03-14 17:55:27 +0000244 {
Michalis Spyrou8e5174c2018-12-04 11:43:23 +0000245 std::string subexp = line.substr(match[1].rm_so, (match[1].rm_eo - match[1].rm_so));
246 int impv = support::cpp11::stoi(subexp, nullptr, support::cpp11::NumericBase::BASE_16);
Pablo Tello7fad9b12018-03-14 17:55:27 +0000247 midr |= (impv << 24);
Michalis Spyrou8e5174c2018-12-04 11:43:23 +0000248
Pablo Tello7fad9b12018-03-14 17:55:27 +0000249 continue;
250 }
251
Michalis Spyroubcfd09a2019-05-01 13:03:59 +0100252 ret_status = regexec(&var_regex, line.c_str(), 2, match.data(), 0);
Michalis Spyrou8e5174c2018-12-04 11:43:23 +0000253 if(ret_status == 0)
Pablo Tello7fad9b12018-03-14 17:55:27 +0000254 {
Michalis Spyrou8e5174c2018-12-04 11:43:23 +0000255 std::string subexp = line.substr(match[1].rm_so, (match[1].rm_eo - match[1].rm_so));
256 int varv = support::cpp11::stoi(subexp, nullptr, support::cpp11::NumericBase::BASE_16);
Anthony Barbier3efb3752018-07-20 15:30:46 +0100257 midr |= (varv << 20);
Michalis Spyrou8e5174c2018-12-04 11:43:23 +0000258
Pablo Tello7fad9b12018-03-14 17:55:27 +0000259 continue;
260 }
261
Michalis Spyroubcfd09a2019-05-01 13:03:59 +0100262 ret_status = regexec(&part_regex, line.c_str(), 2, match.data(), 0);
Michalis Spyrou8e5174c2018-12-04 11:43:23 +0000263 if(ret_status == 0)
Pablo Tello7fad9b12018-03-14 17:55:27 +0000264 {
Michalis Spyrou8e5174c2018-12-04 11:43:23 +0000265 std::string subexp = line.substr(match[1].rm_so, (match[1].rm_eo - match[1].rm_so));
266 int partv = support::cpp11::stoi(subexp, nullptr, support::cpp11::NumericBase::BASE_16);
Pablo Tello7fad9b12018-03-14 17:55:27 +0000267 midr |= (partv << 4);
Michalis Spyrou8e5174c2018-12-04 11:43:23 +0000268
Pablo Tello7fad9b12018-03-14 17:55:27 +0000269 continue;
270 }
271
Michalis Spyroubcfd09a2019-05-01 13:03:59 +0100272 ret_status = regexec(&rev_regex, line.c_str(), 2, match.data(), 0);
Michalis Spyrou8e5174c2018-12-04 11:43:23 +0000273 if(ret_status == 0)
Pablo Tello7fad9b12018-03-14 17:55:27 +0000274 {
Michalis Spyrou8e5174c2018-12-04 11:43:23 +0000275 std::string subexp = line.substr(match[1].rm_so, (match[1].rm_eo - match[1].rm_so));
276 int regv = support::cpp11::stoi(subexp, nullptr);
Pablo Tello7fad9b12018-03-14 17:55:27 +0000277 midr |= (regv);
278 midr |= (0xf << 16);
Michalis Spyrou8e5174c2018-12-04 11:43:23 +0000279
Pablo Tello7fad9b12018-03-14 17:55:27 +0000280 continue;
281 }
282 }
283
284 if(curcpu >= 0)
285 {
Anthony Barbier3efb3752018-07-20 15:30:46 +0100286 cpusv[curcpu] = midr_to_model(midr);
Pablo Tello7fad9b12018-03-14 17:55:27 +0000287 }
288 }
Michalis Spyrou8e5174c2018-12-04 11:43:23 +0000289
290 // Free allocated memory
291 regfree(&proc_regex);
292 regfree(&imp_regex);
293 regfree(&var_regex);
294 regfree(&part_regex);
295 regfree(&rev_regex);
Pablo Tello7fad9b12018-03-14 17:55:27 +0000296}
297
298int get_max_cpus()
299{
Michalis Spyroubcfd09a2019-05-01 13:03:59 +0100300 int max_cpus = 1;
Pablo Tello7fad9b12018-03-14 17:55:27 +0000301 std::ifstream CPUspresent;
302 CPUspresent.open("/sys/devices/system/cpu/present", std::ios::in);
303 bool success = false;
304
305 if(CPUspresent.is_open())
306 {
307 std::string line;
308
309 if(bool(getline(CPUspresent, line)))
310 {
311 /* The content of this file is a list of ranges or single values, e.g.
312 * 0-5, or 1-3,5,7 or similar. As we are interested in the
313 * max valid ID, we just need to find the last valid
314 * delimiter ('-' or ',') and parse the integer immediately after that.
315 */
316 auto startfrom = line.begin();
317
318 for(auto i = line.begin(); i < line.end(); ++i)
319 {
320 if(*i == '-' || *i == ',')
321 {
322 startfrom = i + 1;
323 }
324 }
325
326 line.erase(line.begin(), startfrom);
327
Pablo Tello65f99822018-05-24 11:40:15 +0100328 max_cpus = support::cpp11::stoi(line, nullptr) + 1;
Pablo Tello7fad9b12018-03-14 17:55:27 +0000329 success = true;
330 }
331 }
332
333 // Return std::thread::hardware_concurrency() as a fallback.
334 if(!success)
335 {
336 max_cpus = std::thread::hardware_concurrency();
337 }
Pablo Tello7fad9b12018-03-14 17:55:27 +0000338 return max_cpus;
339}
340#endif /* !defined(BARE_METAL) && (defined(__arm__) || defined(__aarch64__)) */
341
342} // namespace
343
344namespace arm_compute
345{
346void get_cpu_configuration(CPUInfo &cpuinfo)
347{
348#if !defined(BARE_METAL) && (defined(__arm__) || defined(__aarch64__))
Anthony Barbier5a3ee4f2018-07-24 11:24:17 +0100349 bool cpuid = false;
350 bool hwcaps_fp16_support = false;
351 bool hwcaps_dot_support = false;
Pablo Tello7fad9b12018-03-14 17:55:27 +0000352
353 const uint32_t hwcaps = getauxval(AT_HWCAP);
354
355 if((hwcaps & HWCAP_CPUID) != 0)
356 {
357 cpuid = true;
358 }
359
360 if((hwcaps & HWCAP_ASIMDHP) != 0)
361 {
Anthony Barbier5a3ee4f2018-07-24 11:24:17 +0100362 hwcaps_fp16_support = true;
Pablo Tello7fad9b12018-03-14 17:55:27 +0000363 }
364
Pablo Tellodf3b5bb2018-10-09 10:51:51 +0100365#if defined(__aarch64__)
Pablo Tello7fad9b12018-03-14 17:55:27 +0000366 if((hwcaps & HWCAP_ASIMDDP) != 0)
367 {
Anthony Barbier5a3ee4f2018-07-24 11:24:17 +0100368 hwcaps_dot_support = true;
Pablo Tello7fad9b12018-03-14 17:55:27 +0000369 }
Pablo Tellodf3b5bb2018-10-09 10:51:51 +0100370#endif /* defined(__aarch64__) */
Pablo Tello7fad9b12018-03-14 17:55:27 +0000371
Pablo Tello7fad9b12018-03-14 17:55:27 +0000372 const unsigned int max_cpus = get_max_cpus();
373 cpuinfo.set_cpu_num(max_cpus);
Anthony Barbier3efb3752018-07-20 15:30:46 +0100374 std::vector<CPUModel> percpu(max_cpus, CPUModel::GENERIC);
Pablo Tello7fad9b12018-03-14 17:55:27 +0000375 if(cpuid)
376 {
377 populate_models_cpuid(percpu);
378 }
379 else
380 {
381 populate_models_cpuinfo(percpu);
382 }
383 int j(0);
Georgios Pinitasecae3a12018-10-09 15:13:12 +0100384 // Update dot product and FP16 support if one of the CPUs support these features
385 // We assume that the system does not have mixed architectures
386 bool one_supports_dot = false;
387 bool one_supports_fp16 = false;
Pablo Tello7fad9b12018-03-14 17:55:27 +0000388 for(const auto &v : percpu)
389 {
Georgios Pinitas9c2ec7e2018-11-12 17:07:18 +0000390 one_supports_dot = one_supports_dot || model_supports_dot(v);
391 one_supports_fp16 = one_supports_fp16 || model_supports_fp16(v);
Anthony Barbier3efb3752018-07-20 15:30:46 +0100392 cpuinfo.set_cpu_model(j++, v);
Pablo Tello7fad9b12018-03-14 17:55:27 +0000393 }
Georgios Pinitasecae3a12018-10-09 15:13:12 +0100394 cpuinfo.set_dotprod(one_supports_dot || hwcaps_dot_support);
395 cpuinfo.set_fp16(one_supports_fp16 || hwcaps_fp16_support);
Pablo Tello7fad9b12018-03-14 17:55:27 +0000396#else /* !defined(BARE_METAL) && (defined(__arm__) || defined(__aarch64__)) */
397 ARM_COMPUTE_UNUSED(cpuinfo);
398#endif /* !defined(BARE_METAL) && (defined(__arm__) || defined(__aarch64__)) */
399}
400
401unsigned int get_threads_hint()
402{
403 unsigned int num_threads_hint = 1;
404
405#ifndef BARE_METAL
406 std::map<std::string, unsigned int> cpu_part_occurrence_map;
407
408 // CPU part regex
Michalis Spyrou8e5174c2018-12-04 11:43:23 +0000409 regex_t cpu_part_rgx;
410 memset(&cpu_part_rgx, 0, sizeof(regex_t));
Georgios Pinitasde6dbfe2018-12-24 15:02:55 +0000411 int ret_status = regcomp(&cpu_part_rgx, R"(.*CPU part.+/?\:[[:space:]]+([[:alnum:]]+).*)", REG_EXTENDED);
Michalis Spyrou8e5174c2018-12-04 11:43:23 +0000412 ARM_COMPUTE_UNUSED(ret_status);
413 ARM_COMPUTE_ERROR_ON_MSG(ret_status != 0, "Regex compilation failed.");
Pablo Tello7fad9b12018-03-14 17:55:27 +0000414
415 // Read cpuinfo and get occurrence of each core
416 std::ifstream cpuinfo;
417 cpuinfo.open("/proc/cpuinfo", std::ios::in);
418 if(cpuinfo.is_open())
419 {
420 std::string line;
421 while(bool(getline(cpuinfo, line)))
422 {
Michalis Spyroubcfd09a2019-05-01 13:03:59 +0100423 std::array<regmatch_t, 2> match;
424 ret_status = regexec(&cpu_part_rgx, line.c_str(), 2, match.data(), 0);
Michalis Spyrou8e5174c2018-12-04 11:43:23 +0000425 if(ret_status == 0)
Pablo Tello7fad9b12018-03-14 17:55:27 +0000426 {
Michalis Spyrou8e5174c2018-12-04 11:43:23 +0000427 std::string cpu_part = line.substr(match[1].rm_so, (match[1].rm_eo - match[1].rm_so));
Pablo Tello7fad9b12018-03-14 17:55:27 +0000428 if(cpu_part_occurrence_map.find(cpu_part) != cpu_part_occurrence_map.end())
429 {
430 cpu_part_occurrence_map[cpu_part]++;
431 }
432 else
433 {
434 cpu_part_occurrence_map[cpu_part] = 1;
435 }
436 }
437 }
438 }
Michalis Spyrou8e5174c2018-12-04 11:43:23 +0000439 regfree(&cpu_part_rgx);
Pablo Tello7fad9b12018-03-14 17:55:27 +0000440
441 // Get min number of threads
442 auto min_common_cores = std::min_element(cpu_part_occurrence_map.begin(), cpu_part_occurrence_map.end(),
443 [](const std::pair<std::string, unsigned int> &p1, const std::pair<std::string, unsigned int> &p2)
444 {
445 return p1.second < p2.second;
446 });
447
448 // Set thread hint
449 num_threads_hint = cpu_part_occurrence_map.empty() ? std::thread::hardware_concurrency() : min_common_cores->second;
450#endif /* BARE_METAL */
451
452 return num_threads_hint;
453}
454
455} // namespace arm_compute