blob: 8713d5c54d4a1c0d83084a3f76f65ce20b27578c [file] [log] [blame]
Michele Di Giorgio19289042021-02-03 16:05:00 +00001/*
Giorgio Arena5ae8d802021-11-18 18:02:13 +00002 * Copyright (c) 2021-2022 Arm Limited.
Michele Di Giorgio19289042021-02-03 16:05:00 +00003 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010024#ifndef ARM_COMPUTE_CPU_POOL2D_ASSEMBLY_WRAPPER_KERNEL_H
25#define ARM_COMPUTE_CPU_POOL2D_ASSEMBLY_WRAPPER_KERNEL_H
Michele Di Giorgio19289042021-02-03 16:05:00 +000026
27#include "arm_compute/core/Types.h"
28#include "src/core/NEON/kernels/assembly/pooling.hpp"
29#include "src/core/common/Macros.h"
Georgios Pinitas7891a732021-08-20 21:39:25 +010030#include "src/cpu/ICpuKernel.h"
Giorgio Arena5ae8d802021-11-18 18:02:13 +000031#include "src/cpu/kernels/CpuKernelSelectionTypes.h"
Michele Di Giorgio19289042021-02-03 16:05:00 +000032
33#include "pool_common.hpp"
34
35namespace arm_compute
36{
37namespace cpu
38{
39namespace kernels
40{
41/** This class is a wrapper for the assembly kernels.
42 *
43 * Some kernels were written in assembly and highly optimised for specific
44 * CPUs like A53 or A55. The arm compute library creates an instance of
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010045 * CpuPool2dAssemblyWrapperKernel and other auxiliary data structures to
Michele Di Giorgio19289042021-02-03 16:05:00 +000046 * execute a single assembly kernel in the context of an NEFunction.
47 *
48 */
Yair Schwarzbaum46d44d22022-01-12 16:38:58 +020049class CpuPool2dAssemblyWrapperKernel final : public ICpuKernel<CpuPool2dAssemblyWrapperKernel>
Michele Di Giorgio19289042021-02-03 16:05:00 +000050{
51public:
52 /** Constructor
53 */
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010054 CpuPool2dAssemblyWrapperKernel() = default;
55 ARM_COMPUTE_DISALLOW_COPY_ALLOW_MOVE(CpuPool2dAssemblyWrapperKernel);
Michele Di Giorgio19289042021-02-03 16:05:00 +000056
57 const char *name() const override
58 {
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010059 return "CpuPool2dAssemblyWrapperKernel";
Michele Di Giorgio19289042021-02-03 16:05:00 +000060 }
61
62 /** Initialise the kernel's src and dst.
63 *
64 * @param[in] src Source tensor info. Data types supported: QASYMM8/QASYMM8_SIGNED/F16/F32.
65 * @param[out] dst Destination tensor info to store the result of pooling. Data types supported: same as @p src.
66 * @param[in] info Pooling meta-data.
67 * @param[in] cpu_info CPU information needed to select the most appropriate kernel.
68 */
69 void configure(const ITensorInfo *src, ITensorInfo *dst, const PoolingLayerInfo &info, const CPUInfo &cpu_info);
70
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010071 /** Static function to check if given info will lead to a valid configuration
Michele Di Giorgio19289042021-02-03 16:05:00 +000072 *
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010073 * Similar to CpuPool2dAssemblyWrapperKernel::configure()
Michele Di Giorgio19289042021-02-03 16:05:00 +000074 *
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010075 * @return a status
Michele Di Giorgio19289042021-02-03 16:05:00 +000076 */
77 static Status validate(const ITensorInfo *src, const ITensorInfo *dst, const PoolingLayerInfo &info);
78
79 // Inherited methods overridden:
80 void run_op(ITensorPack &tensors, const Window &window, const ThreadInfo &info) override;
81
82 /** Get size of the workspace needed by the assembly kernel.
83 *
84 * @param[in] num_threads Maximum number of threads that are going to be spawned.
85 *
86 * @return size of workspace
87 */
88 size_t get_working_size(unsigned int num_threads) const;
89
90 /** Was the asm kernel successfully configured?
91 *
92 * @return True if the asm kernel is configured and ready to run
93 */
94 bool is_configured() const;
95
96private:
97 /** Helper function to create the assembly kernel.
98 *
99 * @param[in] src Source tensor info.
100 * @param[in] dst Destination tensor info.
101 * @param[in] info Pooling layer meta-data.
102 */
103 template <typename Typesrc, typename Typedst>
104 void create_arm_pooling(const ITensorInfo *src, ITensorInfo *dst, const PoolingLayerInfo &info, const CPUInfo &cpu_info);
105
106 /** Helper function to create the assembly kernel with requantization support
107 *
108 * @param[in] src Source tensor info.
109 * @param[in] dst Destination tensor info.
110 * @param[in] info Pooling layer meta-data.
111 */
112 template <typename Typesrc, typename Typedst>
113 void create_arm_pooling_requant(const ITensorInfo *src, ITensorInfo *dst, const PoolingLayerInfo &info, const CPUInfo &cpu_info);
114
115 std::unique_ptr<arm_conv::pooling::IPoolingCommon> _kernel_asm{ nullptr };
Dana Zlotnik4cdd6b82021-10-07 15:31:54 +0300116
117 /** Return minimum workload size of the relevant kernel
118 *
119 * @param[in] platform The CPU platform used to create the context.
120 * @param[in] thread_count Number of threads in the execution.
121 *
122 * @return[out] small_network_mws Minimum workload size for requsted configuration.
123 */
124 size_t get_mws(const CPUInfo &platform, size_t thread_count) const override;
Michele Di Giorgio19289042021-02-03 16:05:00 +0000125};
126} // namespace kernels
127} // namespace cpu
128} // namespace arm_compute
Manuel Bottinib4bb6a02021-05-24 16:01:32 +0100129#endif /* ARM_COMPUTE_CPU_POOL2D_ASSEMBLY_WRAPPER_KERNEL_H */