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Vidhya Sudhan Loganathan5e96be72018-12-18 14:17:00 +00001/*
ramelg016d891572021-09-29 10:05:09 +01002 * Copyright (c) 2018-2021 Arm Limited.
Vidhya Sudhan Loganathan5e96be72018-12-18 14:17:00 +00003 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24#include "arm_compute/runtime/CL/functions/CLRange.h"
25
26#include "arm_compute/core/CL/ICLTensor.h"
Vidhya Sudhan Loganathan5e96be72018-12-18 14:17:00 +000027#include "arm_compute/core/Error.h"
28#include "arm_compute/core/Validate.h"
29#include "arm_compute/runtime/CL/CLScheduler.h"
Sang-Hoon Parkbef7fa22020-10-21 15:58:54 +010030#include "src/core/CL/kernels/CLRangeKernel.h"
Vidhya Sudhan Loganathan5e96be72018-12-18 14:17:00 +000031
ramelg016d891572021-09-29 10:05:09 +010032#include "src/common/utils/Log.h"
33
Vidhya Sudhan Loganathan5e96be72018-12-18 14:17:00 +000034using namespace arm_compute;
35
36void CLRange::configure(ICLTensor *output, const float start, const float end, const float step)
37{
Manuel Bottini2b84be52020-04-08 10:15:51 +010038 configure(CLKernelLibrary::get().get_compile_context(), output, start, end, step);
39}
40
41void CLRange::configure(const CLCompileContext &compile_context, ICLTensor *output, const float start, const float end, const float step)
42{
ramelg016d891572021-09-29 10:05:09 +010043 ARM_COMPUTE_LOG_PARAMS(output, start, end, step);
Georgios Pinitas40f51a62020-11-21 03:04:18 +000044 auto k = std::make_unique<CLRangeKernel>();
Vidhya Sudhan Loganathan5e96be72018-12-18 14:17:00 +000045 k->set_target(CLScheduler::get().target());
Manuel Bottini2b84be52020-04-08 10:15:51 +010046 k->configure(compile_context, output, start, end, step);
Vidhya Sudhan Loganathan5e96be72018-12-18 14:17:00 +000047 _kernel = std::move(k);
48
49 // Tune kernels
50 CLScheduler::get().tune_kernel_static(*_kernel);
51}
52
53Status CLRange::validate(const ITensorInfo *output, const float start, const float end, const float step)
54{
55 return CLRangeKernel::validate(output, start, end, step);
56}