Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 1 | /* |
Pablo Marquez Tello | 7976f08 | 2024-02-13 13:56:15 +0000 | [diff] [blame^] | 2 | * Copyright (c) 2021-2024 Arm Limited. |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: MIT |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to |
| 8 | * deal in the Software without restriction, including without limitation the |
| 9 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or |
| 10 | * sell copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in all |
| 14 | * copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 19 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 22 | * SOFTWARE. |
| 23 | */ |
| 24 | |
Michael Tyler | 74921ee | 2023-04-12 17:43:17 +0100 | [diff] [blame] | 25 | #include "utils.hpp" |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 26 | #include "src/core/NEON/kernels/arm_conv/depthwise/interleaves/list.hpp" |
| 27 | |
| 28 | #include <cstdint> |
| 29 | |
| 30 | #pragma once |
| 31 | |
| 32 | #if defined(__aarch64__) |
| 33 | |
| 34 | namespace arm_conv { |
| 35 | namespace depthwise { |
| 36 | |
Pablo Marquez Tello | 7976f08 | 2024-02-13 13:56:15 +0000 | [diff] [blame^] | 37 | void a64_s8q_nhwc_3x3_s1_output2x2_dot_depthfirst_impl(const unsigned int, const int8_t *const *const, const int8_t *, const int32_t *, const arm_gemm::Requantize32&, const int32_t *, const int32_t *, int8_t *const *const); |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 38 | |
ramelg01 | 8a16488 | 2022-04-07 02:42:52 +0100 | [diff] [blame] | 39 | class a64_s8q_nhwc_3x3_s1_output2x2_dot_depthfirst : public DepthwiseDepthfirstStrategy<int8_t, int8_t, int8_t, int32_t> |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 40 | { |
ramelg01 | 8a16488 | 2022-04-07 02:42:52 +0100 | [diff] [blame] | 41 | using Parent = DepthwiseDepthfirstStrategy<int8_t, int8_t, int8_t, int32_t>; |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 42 | |
ramelg01 | 8a16488 | 2022-04-07 02:42:52 +0100 | [diff] [blame] | 43 | public: |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 44 | constexpr static unsigned int kernel_rows = 3; |
| 45 | constexpr static unsigned int kernel_cols = 3; |
| 46 | |
| 47 | constexpr static unsigned int stride_rows = 1; |
| 48 | constexpr static unsigned int stride_cols = 1; |
| 49 | |
ramelg01 | 8a16488 | 2022-04-07 02:42:52 +0100 | [diff] [blame] | 50 | a64_s8q_nhwc_3x3_s1_output2x2_dot_depthfirst(const CPUInfo *) : Parent(2, 2, 3, 3, 1, 1) {} |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 51 | |
ramelg01 | 8a16488 | 2022-04-07 02:42:52 +0100 | [diff] [blame] | 52 | arm_gemm::VLType get_vl_type(void) const override { return arm_gemm::VLType::None; } |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 53 | |
ramelg01 | 8a16488 | 2022-04-07 02:42:52 +0100 | [diff] [blame] | 54 | Parent::KernelType kernel = a64_s8q_nhwc_3x3_s1_output2x2_dot_depthfirst_impl; |
| 55 | Parent::KernelType get_kernel(void) const override { return kernel; } |
| 56 | size_t get_storage_size(const DepthwiseArgs &args) const override |
| 57 | { |
| 58 | return interleave_a64_s8q_3x3_dot::get_packed_size(args); |
| 59 | } |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 60 | |
ramelg01 | 8a16488 | 2022-04-07 02:42:52 +0100 | [diff] [blame] | 61 | void pack_parameters( |
| 62 | const DepthwiseArgs &args, void *buffer, const void *biases, const arm_gemm::Requantize32 &qp, |
| 63 | const void *weights, size_t ld_weight_col, size_t ld_weight_row |
| 64 | ) const override |
| 65 | { |
| 66 | interleave_a64_s8q_3x3_dot::pack_parameters( |
Michael Tyler | 8deee9b | 2023-06-30 11:26:05 +0100 | [diff] [blame] | 67 | args.input_channels * args.channel_multiplier, buffer, reinterpret_cast<const int32_t *>(biases), |
ramelg01 | 8a16488 | 2022-04-07 02:42:52 +0100 | [diff] [blame] | 68 | reinterpret_cast<const int8_t *>(weights), qp, ld_weight_col, ld_weight_row |
| 69 | ); |
| 70 | } |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 71 | }; |
| 72 | |
| 73 | } // namespace depthwise |
| 74 | } // namespace arm_conv |
| 75 | |
| 76 | #endif // defined(__aarch64__) |