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Viet-Hoa Do03b29712022-06-01 11:47:14 +01001/*
2 * Copyright (c) 2022 ARM Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24#pragma once
25
26#include "interleave_indirect.hpp"
27#include "transform.hpp"
28
29namespace arm_gemm {
30
31/*
32 * Define "standard" transforms for the blocked GEMMs for SVE.
33 *
34 * This assumes that A is interleaved 'height' ways, B is interleaved
35 * 'width'xVL ways and transposed, and that the merge needs to work in
36 * 'height' x 'width'xVL blocks.
37 *
38 * The optional 'block' parameter is for kernels using dot-product type
39 * instructions like UDOT and SDOT.
40 */
41template<typename TOperand, typename TResult, unsigned int height_vectors, unsigned int width_vectors, unsigned int block=1, bool integrate_sums=false>
42class StdTransformsSME
43{
44public:
45 template<typename TIn>
46 void PrepareA(TOperand *out, const TIn *in, const int stride, const int y0,
47 const int ymax, const int k0, const int kmax, int32_t row_sum_multiplier) {
48 Interleave<height_vectors, block, VLType::SME>(out, in, stride, y0, ymax, k0, kmax, integrate_sums, row_sum_multiplier);
49 }
50
51 template<typename TIn>
52 void PrepareA_indirect(TOperand *out, const TIn * const * const *ptr, size_t stringlen, size_t rounded_stringlen, const int y0,
53 const int ymax, const int k0, const int kmax, int32_t row_sum_multiplier) {
54 IndirectInterleave<height_vectors, block, VLType::SME>(out, ptr, stringlen, rounded_stringlen, y0, ymax, k0, kmax, integrate_sums, row_sum_multiplier);
55 }
56
57 template<typename TIn>
58 void PrepareA_convolution(TOperand *out, const TIn *ptr, size_t stride, const convolver<TIn> &conv, size_t rounded_stringlen,
59 const int y0, const int ymax, const int k0, const int kmax, int32_t row_sum_multiplier) {
60 ConvolutionInterleave<height_vectors, block, VLType::SME>(out, ptr, stride, conv, rounded_stringlen, y0, ymax, k0, kmax, integrate_sums, row_sum_multiplier);
61 }
62
63 template<typename TIn>
64 void PrepareB(TOperand *out, const TIn *in, const int stride, const int x0,
65 const int xmax, const int k0, const int kmax) {
66 Transform<width_vectors, block, true, VLType::SME>(out, in, stride, x0, xmax, k0, kmax);
67 }
68
69 template<typename TOut>
70 void Merge(TOut *out, const TResult *in, int stride, int y0, int ymax, int x0, int xmax, const TOut *bias, const Activation act, bool accumulate) {
71 // Separate merge not supported for SME.
Viet-Hoa Do81f796b2022-12-23 14:42:55 +000072 ARM_COMPUTE_UNUSED(out, in, stride, y0, ymax, x0, xmax, bias, act, accumulate);
Viet-Hoa Do03b29712022-06-01 11:47:14 +010073 }
74};
75
76} // namespace arm_gemm