giuros01 | 15ecc9a | 2018-12-06 10:47:34 +0000 | [diff] [blame] | 1 | /* |
George Wort | 5a97b28 | 2018-12-21 16:21:04 +0000 | [diff] [blame] | 2 | * Copyright (c) 2018-2019 ARM Limited. |
giuros01 | 15ecc9a | 2018-12-06 10:47:34 +0000 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: MIT |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to |
| 8 | * deal in the Software without restriction, including without limitation the |
| 9 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or |
| 10 | * sell copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in all |
| 14 | * copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
George Wort | 5a97b28 | 2018-12-21 16:21:04 +0000 | [diff] [blame] | 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
giuros01 | 15ecc9a | 2018-12-06 10:47:34 +0000 | [diff] [blame] | 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
George Wort | 5a97b28 | 2018-12-21 16:21:04 +0000 | [diff] [blame] | 19 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
giuros01 | 15ecc9a | 2018-12-06 10:47:34 +0000 | [diff] [blame] | 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 22 | * SOFTWARE. |
| 23 | */ |
| 24 | |
| 25 | #include "arm_compute/runtime/NEON/functions/NEFuseBatchNormalization.h" |
| 26 | |
| 27 | #include "arm_compute/core/Error.h" |
| 28 | #include "arm_compute/core/TensorInfo.h" |
| 29 | #include "arm_compute/core/Types.h" |
| 30 | #include "arm_compute/runtime/NEON/NEScheduler.h" |
| 31 | |
| 32 | namespace arm_compute |
| 33 | { |
| 34 | NEFuseBatchNormalization::NEFuseBatchNormalization() |
| 35 | : _fuse_bn_kernel() |
| 36 | { |
| 37 | } |
| 38 | |
| 39 | void NEFuseBatchNormalization::configure(const ITensor *conv_weights, const ITensor *bn_mean, const ITensor *bn_var, |
| 40 | ITensor *fused_weights, ITensor *fused_bias, |
| 41 | const ITensor *conv_bias, const ITensor *bn_beta, const ITensor *bn_gamma, |
| 42 | float epsilon) |
| 43 | { |
| 44 | _fuse_bn_kernel.configure(conv_weights, bn_mean, bn_var, fused_weights, fused_bias, conv_bias, bn_beta, bn_gamma, epsilon); |
| 45 | } |
| 46 | |
| 47 | Status NEFuseBatchNormalization::validate(const ITensorInfo *conv_weights, const ITensorInfo *bn_mean, const ITensorInfo *bn_var, |
| 48 | const ITensorInfo *fused_weights, const ITensorInfo *fused_bias, |
| 49 | const ITensorInfo *conv_bias, const ITensorInfo *bn_beta, const ITensorInfo *bn_gamma, |
| 50 | float epsilon) |
| 51 | { |
| 52 | return NEFuseBatchNormalizationKernel::validate(conv_weights, bn_mean, bn_var, fused_weights, fused_bias, conv_bias, bn_beta, bn_gamma, epsilon); |
| 53 | } |
| 54 | |
| 55 | void NEFuseBatchNormalization::run() |
| 56 | { |
| 57 | NEScheduler::get().schedule(&_fuse_bn_kernel, Window::DimY); |
| 58 | } |
| 59 | } // namespace arm_compute |