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George Wort5a97b282018-12-21 16:21:04 +00001/*
Giorgio Arena5ae8d802021-11-18 18:02:13 +00002 * Copyright (c) 2018-2022 Arm Limited.
George Wort5a97b282018-12-21 16:21:04 +00003 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
Georgios Pinitas7891a732021-08-20 21:39:25 +010024#include "src/cpu/kernels/CpuElementwiseUnaryKernel.h"
George Wort5a97b282018-12-21 16:21:04 +000025
George Wort5a97b282018-12-21 16:21:04 +000026#include "arm_compute/core/Error.h"
27#include "arm_compute/core/Helpers.h"
George Wort5a97b282018-12-21 16:21:04 +000028#include "arm_compute/core/ITensor.h"
George Wort5a97b282018-12-21 16:21:04 +000029#include "arm_compute/core/Validate.h"
Sang-Hoon Park68dd25f2020-10-19 16:00:11 +010030#include "src/core/CPP/Validate.h"
Sang-Hoon Parkaf1870b2020-12-08 18:50:56 +000031#include "src/core/common/Registrars.h"
Sang-Hoon Park68dd25f2020-10-19 16:00:11 +010032#include "src/core/helpers/AutoConfiguration.h"
33#include "src/core/helpers/WindowHelpers.h"
Dana Zlotnikd5c496d2021-11-28 14:46:12 +020034#include "src/cpu/kernels/elementwise_unary/list.h"
Michalis Spyroue6bcb5b2019-06-07 11:47:16 +010035#include "support/ToolchainSupport.h"
George Wort5a97b282018-12-21 16:21:04 +000036
George Wort5a97b282018-12-21 16:21:04 +000037namespace arm_compute
38{
Sang-Hoon Park7249f152021-01-22 11:55:03 +000039namespace cpu
40{
41namespace kernels
42{
George Wort5a97b282018-12-21 16:21:04 +000043namespace
44{
Giorgio Arena5ae8d802021-11-18 18:02:13 +000045static const std::vector<CpuElementwiseUnaryKernel::ElementwiseUnaryKernel> available_kernels =
Sang-Hoon Parkaf1870b2020-12-08 18:50:56 +000046{
Michalis Spyrou20fca522021-06-07 14:23:57 +010047#if defined(ARM_COMPUTE_ENABLE_SVE)
George Wort5a97b282018-12-21 16:21:04 +000048 {
Georgios Pinitas5ee0d952021-07-05 07:21:28 +010049 "sve_fp32_elementwise_unary",
Giorgio Arena5ae8d802021-11-18 18:02:13 +000050 [](const DataTypeISASelectorData & data)
51 {
52 return data.dt == DataType::F32 && data.isa.sve;
53 },
Dana Zlotnikd5c496d2021-11-28 14:46:12 +020054 REGISTER_FP32_SVE(sve_fp32_elementwise_unary)
Sang-Hoon Parkaf1870b2020-12-08 18:50:56 +000055 },
56 {
Georgios Pinitas5ee0d952021-07-05 07:21:28 +010057 "sve_fp16_elementwise_unary",
Giorgio Arena5ae8d802021-11-18 18:02:13 +000058 [](const DataTypeISASelectorData & data)
59 {
60 return (data.dt == DataType::F16) && data.isa.sve;
61 },
Dana Zlotnikd5c496d2021-11-28 14:46:12 +020062 REGISTER_FP16_SVE(sve_fp16_elementwise_unary),
Sang-Hoon Parkaf1870b2020-12-08 18:50:56 +000063 },
64 {
Georgios Pinitas5ee0d952021-07-05 07:21:28 +010065 "sve_s32_elementwise_unary",
Giorgio Arena5ae8d802021-11-18 18:02:13 +000066 [](const DataTypeISASelectorData & data) { return data.dt == DataType::S32 && data.isa.sve; },
Dana Zlotnikd5c496d2021-11-28 14:46:12 +020067 REGISTER_INTEGER_SVE(sve_s32_elementwise_unary),
Sang-Hoon Parkaf1870b2020-12-08 18:50:56 +000068 },
Michalis Spyrou20fca522021-06-07 14:23:57 +010069#endif // defined(ARM_COMPUTE_ENABLE_SVE)
70#if defined(ARM_COMPUTE_ENABLE_NEON)
Sang-Hoon Parkaf1870b2020-12-08 18:50:56 +000071 {
Georgios Pinitas5ee0d952021-07-05 07:21:28 +010072 "neon_fp32_elementwise_unary",
Giorgio Arena5ae8d802021-11-18 18:02:13 +000073 [](const DataTypeISASelectorData & data) { return data.dt == DataType::F32; },
Dana Zlotnikd5c496d2021-11-28 14:46:12 +020074 REGISTER_FP32_NEON(neon_fp32_elementwise_unary),
Sang-Hoon Parkaf1870b2020-12-08 18:50:56 +000075 },
76#if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
77 {
Georgios Pinitas5ee0d952021-07-05 07:21:28 +010078 "neon_fp16_elementwise_unary",
Giorgio Arena5ae8d802021-11-18 18:02:13 +000079 [](const DataTypeISASelectorData & data) { return data.dt == DataType::F16 && data.isa.fp16; },
Dana Zlotnik8d8208c2022-01-24 09:13:55 +020080 REGISTER_FP16_NEON(neon_fp16_elementwise_unary),
Sang-Hoon Parkaf1870b2020-12-08 18:50:56 +000081 },
82#endif // defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
83 {
Georgios Pinitas5ee0d952021-07-05 07:21:28 +010084 "neon_s32_elementwise_unary",
Giorgio Arena5ae8d802021-11-18 18:02:13 +000085 [](const DataTypeISASelectorData & data) { return data.dt == DataType::S32; },
Dana Zlotnikd5c496d2021-11-28 14:46:12 +020086 REGISTER_INTEGER_NEON(neon_s32_elementwise_unary),
Sang-Hoon Parkaf1870b2020-12-08 18:50:56 +000087 },
Michalis Spyrou20fca522021-06-07 14:23:57 +010088#endif // defined(ARM_COMPUTE_ENABLE_NEON)
Sang-Hoon Parkaf1870b2020-12-08 18:50:56 +000089};
90
Michalis Spyrou18e20ff2020-05-06 17:03:59 +010091} // namespace
George Wort5a97b282018-12-21 16:21:04 +000092
Sang-Hoon Park668ccdc2021-02-03 10:32:59 +000093void CpuElementwiseUnaryKernel::configure(ElementWiseUnary op, const ITensorInfo &src, ITensorInfo &dst)
George Wort5a97b282018-12-21 16:21:04 +000094{
Sang-Hoon Park668ccdc2021-02-03 10:32:59 +000095 ARM_COMPUTE_ERROR_THROW_ON(validate(op, src, dst));
Giorgio Arena5ae8d802021-11-18 18:02:13 +000096 const auto uk = CpuElementwiseUnaryKernel::get_implementation(DataTypeISASelectorData{ src.data_type(), CPUInfo::get().get_isa() });
Georgios Pinitas5ee0d952021-07-05 07:21:28 +010097 ARM_COMPUTE_ERROR_ON(uk == nullptr || uk->ukernel == nullptr);
George Wort5a97b282018-12-21 16:21:04 +000098
Georgios Pinitas5ee0d952021-07-05 07:21:28 +010099 _op = op;
100 _run_method = uk->ukernel;
101 _name = std::string("CpuElementwiseUnaryKernel").append("/").append(uk->name);
George Wort5a97b282018-12-21 16:21:04 +0000102
Sang-Hoon Park668ccdc2021-02-03 10:32:59 +0000103 // If input shape is dynamic, expect a configured window and dst at run-time.
104 if(src.is_dynamic())
105 {
106 return;
107 }
108
Sang-Hoon Parkd0b7b4b2021-03-09 10:47:30 +0000109 auto shape_and_window = compute_output_shape_and_window(src.tensor_shape());
Sang-Hoon Park668ccdc2021-02-03 10:32:59 +0000110 auto_init_if_empty(dst, shape_and_window.first, 1, src.data_type());
Giorgio Arena5ae8d802021-11-18 18:02:13 +0000111 NewICpuKernel::configure(shape_and_window.second);
George Wort5a97b282018-12-21 16:21:04 +0000112}
113
Sang-Hoon Park668ccdc2021-02-03 10:32:59 +0000114Status CpuElementwiseUnaryKernel::validate(ElementWiseUnary op, const ITensorInfo &src, const ITensorInfo &dst)
George Wort5a97b282018-12-21 16:21:04 +0000115{
Sang-Hoon Park668ccdc2021-02-03 10:32:59 +0000116 ARM_COMPUTE_RETURN_ERROR_ON_CPU_F16_UNSUPPORTED(&src);
Sang-Hoon Parkaf1870b2020-12-08 18:50:56 +0000117
Giorgio Arena5ae8d802021-11-18 18:02:13 +0000118 const auto *uk = CpuElementwiseUnaryKernel::get_implementation(DataTypeISASelectorData{ src.data_type(), CPUInfo::get().get_isa() });
119
Sang-Hoon Parkaf1870b2020-12-08 18:50:56 +0000120 ARM_COMPUTE_RETURN_ERROR_ON(uk == nullptr || uk->ukernel == nullptr);
121
Michalis Spyrou18e20ff2020-05-06 17:03:59 +0100122 switch(op)
123 {
124 case ElementWiseUnary::EXP:
125 case ElementWiseUnary::RSQRT:
126 case ElementWiseUnary::LOG:
127 case ElementWiseUnary::ROUND:
128 case ElementWiseUnary::SIN:
Sang-Hoon Park668ccdc2021-02-03 10:32:59 +0000129 ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(&src, 1, DataType::F16, DataType::F32);
Michalis Spyrou18e20ff2020-05-06 17:03:59 +0100130 break;
131 case ElementWiseUnary::NEG:
132 case ElementWiseUnary::ABS:
Sang-Hoon Park668ccdc2021-02-03 10:32:59 +0000133 ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(&src, 1, DataType::F16, DataType::F32, DataType::S32);
Michalis Spyrou18e20ff2020-05-06 17:03:59 +0100134 break;
135 default:
136 ARM_COMPUTE_ERROR("ElementWiseUnary operation not supported");
137 }
Sang-Hoon Park668ccdc2021-02-03 10:32:59 +0000138 // Validate in case of configured dst
139 if(dst.total_size() > 0)
Michalis Spyrou18e20ff2020-05-06 17:03:59 +0100140 {
Sang-Hoon Park668ccdc2021-02-03 10:32:59 +0000141 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(&src, &dst);
Michalis Spyrou18e20ff2020-05-06 17:03:59 +0100142 }
143
George Wort5a97b282018-12-21 16:21:04 +0000144 return Status{};
145}
146
Sang-Hoon Park7249f152021-01-22 11:55:03 +0000147void CpuElementwiseUnaryKernel::run_op(ITensorPack &tensors, const Window &window, const ThreadInfo &info)
George Wort5a97b282018-12-21 16:21:04 +0000148{
149 ARM_COMPUTE_UNUSED(info);
Sang-Hoon Park7249f152021-01-22 11:55:03 +0000150
Georgios Pinitas5ee0d952021-07-05 07:21:28 +0100151 auto src = tensors.get_const_tensor(TensorType::ACL_SRC);
152 auto dst = tensors.get_tensor(TensorType::ACL_DST);
153
154 _run_method(src, dst, window, _op);
George Wort5a97b282018-12-21 16:21:04 +0000155}
Georgios Pinitas2eb5d162021-07-02 09:01:49 +0100156
157const char *CpuElementwiseUnaryKernel::name() const
158{
Georgios Pinitas5ee0d952021-07-05 07:21:28 +0100159 return _name.c_str();
Georgios Pinitas2eb5d162021-07-02 09:01:49 +0100160}
Giorgio Arena5ae8d802021-11-18 18:02:13 +0000161
162const std::vector<CpuElementwiseUnaryKernel::ElementwiseUnaryKernel> &CpuElementwiseUnaryKernel::get_available_kernels()
163{
164 return available_kernels;
165}
166
Sang-Hoon Park7249f152021-01-22 11:55:03 +0000167} // namespace kernels
168} // namespace cpu
George Wort5a97b282018-12-21 16:21:04 +0000169} // namespace arm_compute