Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2019-2021 Arm Limited. |
| 3 | * |
| 4 | * SPDX-License-Identifier: MIT |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to |
| 8 | * deal in the Software without restriction, including without limitation the |
| 9 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or |
| 10 | * sell copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in all |
| 14 | * copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 19 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 22 | * SOFTWARE. |
| 23 | */ |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 24 | #ifndef ARM_COMPUTE_CPU_DEPTHWISE_CONV2D_ASSEMBLY_DISPATCH_H |
| 25 | #define ARM_COMPUTE_CPU_DEPTHWISE_CONV2D_ASSEMBLY_DISPATCH_H |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 26 | |
| 27 | #include "src/core/common/Macros.h" |
Georgios Pinitas | 7891a73 | 2021-08-20 21:39:25 +0100 | [diff] [blame] | 28 | #include "src/cpu/ICpuOperator.h" |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 29 | |
| 30 | namespace arm_compute |
| 31 | { |
| 32 | namespace cpu |
| 33 | { |
| 34 | /** Depthwise convolution assembly kernel glue */ |
| 35 | class CpuDepthwiseConv2dAssemblyDispatch : public ICpuOperator |
| 36 | { |
| 37 | public: |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 38 | CpuDepthwiseConv2dAssemblyDispatch(); |
| 39 | ARM_COMPUTE_DISALLOW_COPY_ALLOW_MOVE(CpuDepthwiseConv2dAssemblyDispatch); |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 40 | ~CpuDepthwiseConv2dAssemblyDispatch(); |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 41 | /** Initialize the function's source, destination, kernels and border_size. |
| 42 | * |
| 43 | * @note Supports only NHWC format |
| 44 | * |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 45 | * @param[in] src Source tensor info. Data type supported: QASYMM8/QASYMM8_SIGNED/F16/F32. |
| 46 | * @param[in] weights Weights tensor info. These are 3D tensors with shape [W, H, IFM]. |
| 47 | * Data type supported: same as @p src or QASYMM8/QASYMM8_SIGNED/QSYMM8_PER_CHANNEL when @p src is QASYMM8/QASYMM8_SIGNED. |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 48 | * @param[in] bias (Optional) Biases tensor info. A 1D tensor with shape [IFM]. Must be nullptr if not needed. |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 49 | * Data type supported: same as @p src or S32 if @p src is quantized. |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 50 | * @param[out] dst Destination tensor info. Data type supported: same as @p src. |
| 51 | * @param[in] info Depthwise convolution meta-data. |
| 52 | */ |
| 53 | void configure(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *bias, ITensorInfo *dst, const ConvolutionInfo &info); |
| 54 | /** Static function to check if given info will lead to a valid configuration |
| 55 | * |
| 56 | * Similar to CpuDepthwiseConv2dAssemblyDispatch::configure() |
| 57 | * |
| 58 | * @return a status |
| 59 | */ |
| 60 | static Status validate(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *bias, const ITensorInfo *dst, const ConvolutionInfo &info); |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 61 | /** Checks if activation is supported by the assembly kernels |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 62 | * |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 63 | * @param[in] activation Activation to check |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 64 | * |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 65 | * @return True if activation is supported else false |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 66 | */ |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 67 | static bool is_activation_supported(const ActivationLayerInfo &activation); |
Georgios Pinitas | 2eb5d16 | 2021-07-02 09:01:49 +0100 | [diff] [blame] | 68 | |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 69 | // Inherited methods overridden: |
| 70 | void run(ITensorPack &tensors) override; |
| 71 | void prepare(ITensorPack &tensors) override; |
| 72 | experimental::MemoryRequirements workspace() const override; |
| 73 | |
| 74 | private: |
| 75 | struct LocalImpl; |
| 76 | std::unique_ptr<LocalImpl> _pImpl; |
| 77 | }; |
| 78 | } // namespace cpu |
| 79 | } // namespace arm_compute |
Michele Di Giorgio | d02d5ed | 2021-01-22 09:47:04 +0000 | [diff] [blame] | 80 | #endif /* ARM_COMPUTE_CPU_DEPTHWISE_CONV2D_ASSEMBLY_DISPATCH_H */ |