blob: 792c71da76eb2455bf0102f0a721221a4ca464d8 [file] [log] [blame]
Freddie Liardete572dff2022-05-16 14:09:10 +01001/*
Matthew Bentham314d3e22023-06-23 10:53:52 +00002 * Copyright (c) 2022-2023 Arm Limited.
Freddie Liardete572dff2022-05-16 14:09:10 +01003 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24#include "src/gpu/cl/kernels/ClGemmLowpMatrixMultiplyReshapedOnlyRhsMMULKernel.h"
25
Matthew Bentham314d3e22023-06-23 10:53:52 +000026#include "arm_compute/core/utils/ActivationFunctionUtils.h"
Freddie Liardete572dff2022-05-16 14:09:10 +010027#include "arm_compute/core/CL/CLHelpers.h"
28#include "arm_compute/core/CL/ICLTensor.h"
29#include "arm_compute/core/TensorInfo.h"
30#include "arm_compute/core/utils/misc/ShapeCalculator.h"
Matthew Bentham314d3e22023-06-23 10:53:52 +000031#include "arm_compute/core/utils/StringUtils.h"
Freddie Liardete572dff2022-05-16 14:09:10 +010032
33#include "src/core/helpers/AutoConfiguration.h"
34#include "src/core/helpers/WindowHelpers.h"
35
36#include "support/Cast.h"
37
38namespace arm_compute
39{
40namespace opencl
41{
42namespace kernels
43{
44using namespace misc::shape_calculator;
45
46namespace
47{
48using ElementsProcessed = Steps;
49
50Status validate_arguments(const ITensorInfo *src0, const ITensorInfo *src1, const ITensorInfo *dst, const GEMMKernelInfo &gemm_info,
51 const ITensorInfo *vector_sum_col, const ITensorInfo *vector_sum_row, const ITensorInfo *bias,
52 const ITensorInfo *output_multipliers, const ITensorInfo *output_shifts)
53{
54 ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(src0, src1, dst);
55 ARM_COMPUTE_RETURN_ERROR_ON_MSG(!arm_matrix_multiply_supported(CLKernelLibrary::get().get_device()), "The extension cl_arm_matrix_multiply is not supported on the target platform");
56 ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(src0, 1, DataType::QASYMM8, DataType::QASYMM8_SIGNED);
57 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(src0, src1);
58 ARM_COMPUTE_RETURN_ERROR_ON_MSG(src0->num_dimensions() > 4, "The number of dimensions for the LHS matrix must be <= 4");
59 ARM_COMPUTE_RETURN_ERROR_ON_MSG(src1->num_dimensions() > 3, "The number of dimensions for the RHS matrix must be <= 3");
60
61 const GEMMRHSMatrixInfo rhs_info = gemm_info.rhs_info;
62 const GEMMLHSMatrixInfo lhs_info = gemm_info.lhs_info;
63 const GEMMLowpOutputStageInfo output_stage = gemm_info.output_stage;
64
65 ARM_COMPUTE_RETURN_ERROR_ON_MSG(rhs_info.k0 != 4 || lhs_info.k0 != 4, "Only 4 is supported as value for k0");
66 ARM_COMPUTE_RETURN_ERROR_ON_MSG(!(lhs_info.m0 == 1 || lhs_info.m0 == 2 || lhs_info.m0 == 4), "Only 1,2,4 are supported for m0");
67 ARM_COMPUTE_RETURN_ERROR_ON_MSG(!(rhs_info.n0 == 1 || rhs_info.n0 == 4 || rhs_info.n0 == 8), "Only 1,4,8 are supported for n0");
68 ARM_COMPUTE_RETURN_ERROR_ON_MSG(rhs_info.export_to_cl_image, "Export to CLImage not supported for quantized GEMM");
69
70 const int m = gemm_info.m;
71 const int n = gemm_info.n;
72 const int k = gemm_info.k;
73
74 TensorShape tensor_shape1{ src1->tensor_shape() };
75 tensor_shape1.set(0, n);
76 tensor_shape1.set(1, k);
77
78 const TensorInfo tensor_info1 = src1->clone()->set_tensor_shape(tensor_shape1);
79 const TensorInfo tensor_info_reshaped1 = src1->clone()->set_tensor_shape(compute_rhs_reshaped_shape(tensor_info1, rhs_info));
80
81 ARM_COMPUTE_RETURN_ERROR_ON(src0->dimension(0) != static_cast<unsigned int>(k));
82 if(gemm_info.reinterpret_input_as_3d)
83 {
84 ARM_COMPUTE_RETURN_ERROR_ON(src0->dimension(1) * src0->dimension(2) != static_cast<unsigned int>(m));
85 }
86 else
87 {
88 ARM_COMPUTE_RETURN_ERROR_ON(src0->dimension(1) != static_cast<unsigned int>(m));
89 }
90 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_SHAPES(src1, &tensor_info_reshaped1);
91
92 const TensorShape expected_dst_shape = compute_mm_shape(*src0, *src1, gemm_info);
93 if(dst->total_size() != 0)
94 {
95 const TensorInfo tensor_info_dst = dst->clone()->set_tensor_shape(expected_dst_shape);
96 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_SHAPES(dst, &tensor_info_dst);
97 if(output_stage.type == GEMMLowpOutputStageType::NONE)
98 {
99 ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(dst, 1, DataType::S32);
100 }
101 else
102 {
103 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(src0, dst);
104 }
105 }
106
107 if(bias != nullptr)
108 {
109 ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(bias, 1, DataType::S32);
110 ARM_COMPUTE_RETURN_ERROR_ON(expected_dst_shape[0] != bias->dimension(0));
111 }
112
113 ARM_COMPUTE_RETURN_ERROR_ON_MSG((output_stage.type == GEMMLowpOutputStageType::QUANTIZE_DOWN) || (output_stage.type == GEMMLowpOutputStageType::QUANTIZE_DOWN_FLOAT),
114 "Only GEMMLowpOutputStageType::QUANTIZE_DOWN_FIXEDPOINT is supported");
115
116 // Checks performed if the dst stage needs to be fused
117 if(output_stage.type == GEMMLowpOutputStageType::QUANTIZE_DOWN_FIXEDPOINT)
118 {
119 // If a_offset == 0, vector_sum_col can be a nullptr
120 if(gemm_info.a_offset != 0)
121 {
122 ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(vector_sum_col, 1, DataType::S32);
123 ARM_COMPUTE_RETURN_ERROR_ON(vector_sum_col->dimension(0) != expected_dst_shape[0]);
124 }
125
126 // If b_offset == 0, vector_sum_row can be a nullptr
127 if(gemm_info.b_offset != 0)
128 {
129 ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(vector_sum_row, 1, DataType::S32);
130
131 // Check if mm result is a 3D reinterpretation
132 const bool reinterpret_as_3d = expected_dst_shape.num_dimensions() > 1 && expected_dst_shape.y() != vector_sum_row->tensor_shape().x();
133
134 // Validate input
135 ARM_COMPUTE_RETURN_ERROR_ON(reinterpret_as_3d && vector_sum_row->dimension(0) != (expected_dst_shape[1] * expected_dst_shape[2]));
136 ARM_COMPUTE_RETURN_ERROR_ON(!reinterpret_as_3d && vector_sum_row->dimension(0) != expected_dst_shape[1]);
137
138 if(expected_dst_shape.num_dimensions() > 1)
139 {
140 const unsigned int dst_batch_idx = reinterpret_as_3d ? 3 : 2;
141
142 TensorShape vector_sum_row_shape = vector_sum_row->tensor_shape();
143 vector_sum_row_shape.collapse_from(1);
144 TensorShape collapsed_dst_shape(expected_dst_shape);
145 collapsed_dst_shape.collapse_from(dst_batch_idx);
146
147 ARM_COMPUTE_RETURN_ERROR_ON_MSG(vector_sum_row_shape[1] != collapsed_dst_shape[dst_batch_idx],
148 "vector_sum_row must have the same number of batches of dst tensor");
149
150 if(gemm_info.a_offset != 0)
151 {
152 TensorShape vector_sum_col_shape = vector_sum_col->tensor_shape();
153 vector_sum_col_shape.collapse_from(1);
154
155 ARM_COMPUTE_RETURN_ERROR_ON_MSG(vector_sum_col_shape[1] != 1 && vector_sum_col_shape[1] != vector_sum_row_shape[1],
156 "vector_sum_col tensor must have the same number of batches of vector_sum_row_shape or the number of batches must be set to 1");
157 }
158 }
159 }
160
161 if(dst->total_size() != 0)
162 {
163 ARM_COMPUTE_RETURN_ERROR_ON(output_stage.output_data_type != dst->data_type());
164 }
165 ARM_COMPUTE_RETURN_ERROR_ON(output_stage.gemmlowp_min_bound > output_stage.gemmlowp_max_bound);
166
167 if(output_multipliers != nullptr && output_shifts != nullptr)
168 {
169 ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(output_multipliers, 1, DataType::S32);
170 ARM_COMPUTE_RETURN_ERROR_ON(output_multipliers->num_dimensions() > 1);
171 ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(output_shifts, 1, DataType::S32);
172 ARM_COMPUTE_RETURN_ERROR_ON(output_shifts->num_dimensions() > 1);
173 if(output_stage.is_quantized_per_channel)
174 {
175 ARM_COMPUTE_RETURN_ERROR_ON(expected_dst_shape[0] != output_shifts->dimension(0));
176 ARM_COMPUTE_RETURN_ERROR_ON(expected_dst_shape[0] != output_multipliers->dimension(0));
177 }
178 }
179 }
180 return Status{};
181}
182
183std::pair<Status, Window> validate_and_configure_window(const ITensorInfo *src0, const ITensorInfo *src1, ITensorInfo *dst, const GEMMKernelInfo &gemm_info,
184 ITensorInfo *vector_sum_col, const ITensorInfo *vector_sum_row, ITensorInfo *bias,
185 ITensorInfo *output_multipliers, ITensorInfo *output_shifts, ElementsProcessed &num_elements_processed)
186{
187 const GEMMLowpOutputStageInfo output_stage = gemm_info.output_stage;
188
189 unsigned int &num_elems_processed_per_iteration_x = num_elements_processed[0];
190 unsigned int &num_elems_processed_per_iteration_y = num_elements_processed[1];
191 bool reinterpret_output_as_3d = (gemm_info.depth_output_gemm3d != 0);
192
193 Window win{};
194 bool window_changed = false;
195
196 constexpr unsigned int mmul_n0 = 4;
197 constexpr unsigned int mmul_m0 = 4;
198 constexpr unsigned int mmul_k0 = 16;
199
200 reinterpret_output_as_3d = false;
201 // dst tensor auto initialization if not yet initialized
202 const TensorShape expected_dst_shape = compute_mm_shape(*src0, *src1, gemm_info);
203 if(output_stage.type != GEMMLowpOutputStageType::NONE)
204 {
205 auto_init_if_empty(*dst, src0->clone()->set_tensor_shape(expected_dst_shape).set_data_type(output_stage.output_data_type));
206 }
207 else
208 {
209 auto_init_if_empty(*dst, src0->clone()->set_tensor_shape(expected_dst_shape).set_data_type(DataType::S32));
210 }
211
212 TensorInfo tmp_info(*dst);
213
214 if(reinterpret_output_as_3d)
215 {
216 // Since the dst tensor has to be reinterpreted as 3D and the execute window is based on a 2D GEMM,
217 // the window needs to be constructed on the 2D collapsed version of the tensor
218 TensorShape tmp_shape(dst->tensor_shape());
219 tmp_shape.collapse(2U, 1U);
220 tmp_info.set_tensor_shape(tmp_shape);
221 }
222
223 // Configure kernel window
224 num_elems_processed_per_iteration_x = 1;
225 num_elems_processed_per_iteration_y = 1;
226
227 win = calculate_max_window(tmp_info, Steps(num_elems_processed_per_iteration_x, num_elems_processed_per_iteration_y));
228
229 if(output_stage.type == GEMMLowpOutputStageType::QUANTIZE_DOWN_FIXEDPOINT)
230 {
231 if(gemm_info.a_offset != 0)
232 {
233 AccessWindowHorizontal vector_sum_col_access(vector_sum_col, 0, num_elems_processed_per_iteration_x);
234 window_changed = window_changed || update_window_and_padding(win, vector_sum_col_access);
235 }
236 // No access window needed for vector_sum_row
237 ARM_COMPUTE_UNUSED(vector_sum_row);
238
239 if(bias != nullptr)
240 {
241 AccessWindowHorizontal bias_access(bias, 0, num_elems_processed_per_iteration_x);
242 window_changed = window_changed || update_window_and_padding(win, bias_access);
243 }
244
245 if(output_multipliers != nullptr && output_stage.is_quantized_per_channel)
246 {
247 AccessWindowHorizontal output_multipliers_access(output_multipliers, 0, num_elems_processed_per_iteration_x);
248 AccessWindowHorizontal output_shifts_access(output_shifts, 0, num_elems_processed_per_iteration_x);
249 window_changed = window_changed || update_window_and_padding(win, output_multipliers_access, output_shifts_access);
250 }
251 }
252
253 // Collapse along the Z direction
254 // This collapse needs to be here in order to tune the Z dimension of LWS
255 const unsigned int dimension_to_collapse = std::min(static_cast<unsigned int>(dst->num_dimensions()), 2u);
256 Window collapsed = win.collapse(win, dimension_to_collapse);
257
258 // Reconfigure window size, one arm_matrix_multiply kernel needs 16 threads to finish.
259 Window::Dimension x_dimension = collapsed.x();
260 Window::Dimension y_dimension = collapsed.y();
261
262 // Make M and N multiple of M0 and N0 respectively
263 const unsigned int ceil_to_multiple_n_n0 = ceil_to_multiple(x_dimension.end(), gemm_info.rhs_info.n0);
264 const unsigned int ceil_to_multiple_m_m0 = ceil_to_multiple(y_dimension.end(), gemm_info.lhs_info.m0);
265
266 // Divide M and N by M0 and N0 respectively
267 const unsigned int n_div_n0 = ceil_to_multiple_n_n0 / gemm_info.rhs_info.n0;
268 const unsigned int m_div_m0 = ceil_to_multiple_m_m0 / gemm_info.lhs_info.m0;
269
270 // Make n_div_n0 and m_div_m0 multiple of mmul_n0 and mmul_k0 respectively
271 const unsigned int ceil_to_multiple_n_div_n0_mmul_n0 = ceil_to_multiple(n_div_n0, mmul_n0);
272 const unsigned int ceil_to_multiple_m_div_m0_mmul_m0 = ceil_to_multiple(m_div_m0, mmul_k0);
273
274 // Ensure x_dimension is multiple of MMUL block size (mmul_n0 * mmul_m0)
275 x_dimension.set_end(ceil_to_multiple_n_div_n0_mmul_n0 * mmul_n0);
276 y_dimension.set_end(ceil_to_multiple_m_div_m0_mmul_m0 / mmul_m0);
277
278 collapsed.set(Window::DimX, x_dimension);
279 collapsed.set(Window::DimY, y_dimension);
280
281 Status err = (window_changed) ? ARM_COMPUTE_CREATE_ERROR(ErrorCode::RUNTIME_ERROR, "Insufficient Padding!") : Status{};
282 return std::make_pair(err, collapsed);
283}
284} // namespace
285
286ClGemmLowpMatrixMultiplyReshapedOnlyRhsMMULKernel::ClGemmLowpMatrixMultiplyReshapedOnlyRhsMMULKernel()
287{
288 _type = CLKernelType::GEMM;
289}
290
291void ClGemmLowpMatrixMultiplyReshapedOnlyRhsMMULKernel::configure(const CLCompileContext &compile_context, const ITensorInfo *src0, const ITensorInfo *src1, ITensorInfo *dst,
292 const GEMMKernelInfo &gemm_info,
293 ITensorInfo *vector_sum_col, const ITensorInfo *vector_sum_row, ITensorInfo *bias,
294 ITensorInfo *output_multipliers, ITensorInfo *output_shifts)
295{
296 ARM_COMPUTE_ERROR_ON_NULLPTR(src0, src1, dst);
297 ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(src0, src1, dst, gemm_info, vector_sum_col, vector_sum_row, bias, output_multipliers, output_shifts));
298
299 auto padding_info = get_padding_info({ src0, src1, dst, vector_sum_row });
300 const GEMMRHSMatrixInfo rhs_info = gemm_info.rhs_info;
301 const GEMMLHSMatrixInfo lhs_info = gemm_info.lhs_info;
302 const GEMMLowpOutputStageInfo output_stage = gemm_info.output_stage;
303 const int32_t a_offset = gemm_info.a_offset;
304 const int32_t b_offset = gemm_info.b_offset;
305 constexpr int mmul_m0 = 4;
306 constexpr int mmul_n0 = 4;
307 constexpr int mmul_k0 = 16;
308
309 _m = gemm_info.m;
310 _n = gemm_info.n;
311 _k = gemm_info.k;
312
313 ElementsProcessed num_elements_processed{};
314
315 // Configure kernel window
316 auto win_config = validate_and_configure_window(src0, src1, dst, gemm_info, vector_sum_col, vector_sum_row, bias, output_multipliers, output_shifts, num_elements_processed);
317 ARM_COMPUTE_ERROR_THROW_ON(win_config.first);
318 ICLKernel::configure_internal(win_config.second);
319
320 const unsigned int m0_leftover = _m % lhs_info.m0;
321 const unsigned int n0_leftover = _n % rhs_info.n0;
322
323 // Create build options
324 CLBuildOptions build_opts;
325 build_opts.add_option("-DDATA_TYPE=" + get_cl_type_from_data_type(src0->data_type()));
326 build_opts.add_option("-DVEC_TYPE=" + get_cl_type_from_data_type(src0->data_type()) + "4");
327 build_opts.add_option("-DACC_DATA_TYPE=int");
328 build_opts.add_option("-DOUT_DATA_TYPE=" + get_cl_type_from_data_type(dst->data_type()));
329 build_opts.add_option("-DM0=" + support::cpp11::to_string(lhs_info.m0));
330 build_opts.add_option("-DN0=" + support::cpp11::to_string(rhs_info.n0));
331 build_opts.add_option("-DK0=" + support::cpp11::to_string(rhs_info.k0));
332 build_opts.add_option("-DM0_LEFTOVER=" + support::cpp11::to_string(m0_leftover));
333 build_opts.add_option("-DN0_LEFTOVER=" + support::cpp11::to_string(n0_leftover));
334 build_opts.add_option("-DMMUL_M0=" + support::cpp11::to_string(mmul_m0));
335 build_opts.add_option("-DMMUL_N0=" + support::cpp11::to_string(mmul_n0));
336 build_opts.add_option("-DMMUL_K0=" + support::cpp11::to_string(mmul_k0));
337 build_opts.add_option("-DACTIVATION_TYPE=" + lower_string(string_from_activation_func(gemm_info.activation_info.activation())));
338 build_opts.add_option("-DA_VAL=" + float_to_string_with_full_precision(gemm_info.activation_info.a()));
339 build_opts.add_option("-DB_VAL=" + float_to_string_with_full_precision(gemm_info.activation_info.b()));
340
341 std::string kernel_name("gemmlowp_mm_reshaped_only_rhs_mmul");
342
343 if(output_stage.type == GEMMLowpOutputStageType::QUANTIZE_DOWN_FIXEDPOINT)
344 {
345 build_opts.add_option("-DFUSED_OUTPUT_STAGE_FIXED_POINT");
346 _fuse_output_stage = true;
347 // If a_offset == 0, vector_sum_col can be a nullptr
348 if(a_offset != 0 && vector_sum_col != nullptr)
349 {
350 build_opts.add_option("-DA_OFFSET=" + support::cpp11::to_string(a_offset));
351 build_opts.add_option_if(vector_sum_col->tensor_shape().num_dimensions() > 1, "-DSUM_COL_HAS_BATCHES");
352 }
353 // If b_offset == 0, vector_sum_row can be a nullptr
354 build_opts.add_option_if(b_offset != 0, "-DB_OFFSET=" + support::cpp11::to_string(b_offset));
355 build_opts.add_option("-DK_OFFSET=" + support::cpp11::to_string(a_offset * b_offset * src0->dimension(0)));
356 build_opts.add_option_if(bias != nullptr, "-DADD_BIAS");
357 build_opts.add_option_if(gemm_info.broadcast_bias == true, "-DBROADCAST_BIAS");
358 build_opts.add_option("-DRESULT_OFFSET=" + support::cpp11::to_string(output_stage.gemmlowp_offset));
359 build_opts.add_option("-DRESULT_MULTIPLIER=" + support::cpp11::to_string(output_stage.gemmlowp_multipliers[0]));
360 build_opts.add_option("-DRESULT_SHIFT=" + support::cpp11::to_string(output_stage.gemmlowp_shifts[0]));
361
362 const int min = output_stage.gemmlowp_min_bound;
363 const int max = output_stage.gemmlowp_max_bound;
364
365 PixelValue min_val{};
366 PixelValue max_val{};
367 std::tie(min_val, max_val) = get_min_max(dst->data_type());
368 build_opts.add_option_if(min != min_val.get<int32_t>(), "-DMIN_BOUND=" + support::cpp11::to_string(min));
369 build_opts.add_option_if(max != max_val.get<int32_t>(), "-DMAX_BOUND=" + support::cpp11::to_string(max));
370 }
371
372 // A macro guard to compile ONLY the kernel of interest
373 build_opts.add_option("-D" + upper_string(kernel_name));
374
375 // Create kernel
376 _kernel = create_kernel(compile_context, kernel_name, build_opts.options());
377
378 // Set config_id for enabling LWS tuning
379 _config_id = kernel_name;
380 _config_id += "_";
381 _config_id += (bias != nullptr ? "add_bias_" : "");
382 _config_id += (gemm_info.broadcast_bias ? "broadcast_bias_" : "");
383 _config_id += (gemm_info.activation_info.enabled() ? "fused_activation_" : "");
384 _config_id += lower_string(string_from_data_type(src0->data_type()));
385 _config_id += "_";
386 _config_id += support::cpp11::to_string(_m);
387 _config_id += "_";
388 _config_id += support::cpp11::to_string(_n);
389 _config_id += "_";
390 _config_id += support::cpp11::to_string(_k);
391 _config_id += "_";
392 _config_id += support::cpp11::to_string(lhs_info.m0);
393 _config_id += "_";
394 _config_id += support::cpp11::to_string(rhs_info.n0);
395
396 ARM_COMPUTE_ERROR_ON(has_padding_changed(padding_info));
397}
398
399Status ClGemmLowpMatrixMultiplyReshapedOnlyRhsMMULKernel::validate(const ITensorInfo *src0, const ITensorInfo *src1, const ITensorInfo *dst, const GEMMKernelInfo &gemm_info,
400 const ITensorInfo *vector_sum_col, const ITensorInfo *vector_sum_row, const ITensorInfo *bias,
401 const ITensorInfo *output_multipliers, const ITensorInfo *output_shifts)
402{
403 ElementsProcessed num_elements_processed{};
404 ARM_COMPUTE_RETURN_ON_ERROR(validate_arguments(src0, src1, dst, gemm_info, vector_sum_col, vector_sum_row, bias, output_multipliers, output_shifts));
405 ARM_COMPUTE_RETURN_ON_ERROR(validate_and_configure_window(src0->clone().get(),
406 src1->clone().get(),
407 dst->clone().get(),
408 gemm_info,
409 vector_sum_col != nullptr ? vector_sum_col->clone().get() : nullptr,
410 vector_sum_row != nullptr ? vector_sum_row->clone().get() : nullptr,
411 bias != nullptr ? bias->clone().get() : nullptr,
412 output_multipliers != nullptr ? output_multipliers->clone().get() : nullptr,
413 output_shifts != nullptr ? output_shifts->clone().get() : nullptr,
414 num_elements_processed)
415 .first);
416
417 return Status{};
418}
419
420void ClGemmLowpMatrixMultiplyReshapedOnlyRhsMMULKernel::run_op(ITensorPack &tensors, const Window &window, cl::CommandQueue &queue)
421{
422 ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
423 ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(ICLKernel::window(), window);
424
425 const auto src0 = utils::cast::polymorphic_downcast<const ICLTensor *>(tensors.get_const_tensor(TensorType::ACL_SRC_0));
426 const auto src1 = utils::cast::polymorphic_downcast<const ICLTensor *>(tensors.get_const_tensor(TensorType::ACL_SRC_1));
427 const auto src2 = utils::cast::polymorphic_downcast<const ICLTensor *>(tensors.get_const_tensor(TensorType::ACL_SRC_2));
428 const auto vector_sum_col = utils::cast::polymorphic_downcast<const ICLTensor *>(tensors.get_const_tensor(TensorType::ACL_VEC_COL_SUM));
429 const auto vector_sum_row = utils::cast::polymorphic_downcast<const ICLTensor *>(tensors.get_const_tensor(TensorType::ACL_VEC_ROW_SUM));
430 auto dst = utils::cast::polymorphic_downcast<ICLTensor *>(tensors.get_tensor(TensorType::ACL_DST));
431
432 ARM_COMPUTE_ERROR_ON_NULLPTR(src0, src1, dst);
433
434 if(src1->info()->num_dimensions() < 3)
435 {
436 // The stride_z for matrix B must be zero if we do not slice
437 ARM_COMPUTE_ERROR_ON(src1->info()->strides_in_bytes()[3] != 0);
438 }
439
440 cl::Image2D src1_image2d;
441
442 Window slice = window.first_slice_window_3D();
443
444 do
445 {
446 unsigned int idx = 0;
447
448 add_3d_tensor_nhw_argument(idx, src0);
449 add_3d_tensor_nhw_argument(idx, src1);
450
451 // Bias buffer (_add_bias == true)
452 if(src2 != nullptr)
453 {
454 add_3d_tensor_nhw_argument(idx, src2);
455 }
456 // dst buffer
457 add_3d_tensor_nhw_argument(idx, dst);
458
459 // Pass m, n and k at runtime as signed ints, to ensure results of any subtraction they could be operand in, would still be signed.
460 _kernel.setArg<cl_int>(idx++, _m);
461 _kernel.setArg<cl_int>(idx++, _n);
462 _kernel.setArg<cl_int>(idx++, _k);
463
464 if(_fuse_output_stage)
465 {
466 if(vector_sum_col != nullptr)
467 {
468 add_3d_tensor_nhw_argument(idx, vector_sum_col);
469 }
470 if(vector_sum_row != nullptr)
471 {
472 add_3d_tensor_nhw_argument(idx, vector_sum_row);
473 }
474 }
475
476 enqueue(queue, *this, slice, cl::NDRange(32, 2), false);
477 }
478 while(window.slide_window_slice_3D(slice));
479}
480} // namespace kernels
481} // namespace opencl
482} // namespace arm_compute