Gian Marco Iodice | 5d01681 | 2022-11-17 11:03:39 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2022 Arm Limited. |
| 3 | * |
| 4 | * SPDX-License-Identifier: MIT |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to |
| 8 | * deal in the Software without restriction, including without limitation the |
| 9 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or |
| 10 | * sell copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in all |
| 14 | * copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 19 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 22 | * SOFTWARE. |
| 23 | */ |
| 24 | #ifndef ARM_COMPUTE_CL_INDIRECT_CONV2D_ADDRESS_PRECALCULATION_KERNEL_H |
| 25 | #define ARM_COMPUTE_CL_INDIRECT_CONV2D_ADDRESS_PRECALCULATION_KERNEL_H |
| 26 | |
| 27 | #include "src/core/common/Macros.h" |
| 28 | #include "src/gpu/cl/ClCompileContext.h" |
| 29 | #include "src/gpu/cl/IClKernel.h" |
| 30 | |
| 31 | namespace arm_compute |
| 32 | { |
| 33 | // Forward declarations |
| 34 | struct DirectConvComputeKernelInfo; |
| 35 | |
| 36 | namespace opencl |
| 37 | { |
| 38 | namespace kernels |
| 39 | { |
| 40 | /** Interface for the direct convolution kernel. */ |
| 41 | class ClIndirectConv2dAddressPrecalculationKernel : public IClKernel |
| 42 | { |
| 43 | public: |
| 44 | ClIndirectConv2dAddressPrecalculationKernel(); |
| 45 | ARM_COMPUTE_DISALLOW_COPY_ALLOW_MOVE(ClIndirectConv2dAddressPrecalculationKernel); |
| 46 | /** Set the src, weights, biases and dst tensors info. |
| 47 | * |
| 48 | * @note: When M0 is 5,6,7, the kernel rounds up M0 to the nearest power of two. Therefore, eight. The reason behind |
| 49 | * this implementation detail is because we can exploit native opencl stores in the kernel. |
| 50 | * |
| 51 | * @param[in] compile_context The compile context to be used. |
| 52 | * @param[in] src The src tensor info to convolve. 3 lower dimensions represent a single src [IFM, width, height], |
| 53 | * while every optional dimension from 4 and above represent a batch of inputs. Data types supported: F16/F32. |
| 54 | * @param[in] weights Weights tensor info. Weights are 4D tensor with dimensions [IFM, kernel_x, kernel_y, OFM]. |
| 55 | * The 1st dimension must be the same as the src's volume 1st dimension. |
| 56 | * Data type supported:Same as @p src. |
| 57 | * @param[out] dst Output tensor info where to store the precalculated offsets. Data types supported: S32. |
| 58 | * The output is a 3D tensor with the following dimensions: [M0 x Kw x Kh, ceil(M/M0), batch-size], where: |
| 59 | * Kw=Kernel width, Kh=Kernel height, M0=number of rows processed by each workitem, and M=dst_width x dst_height. |
| 60 | * @param[in] conv_info Contains padding and stride information described in @ref PadStrideInfo. |
| 61 | * @param[in] desc Direct convolution descriptor used to build the NHWC direct/indirect convolution kernel. |
| 62 | */ |
| 63 | void configure(const CLCompileContext &compile_context, ITensorInfo *src, ITensorInfo *weights, ITensorInfo *dst, |
| 64 | const PadStrideInfo &conv_info, const DirectConvComputeKernelInfo &desc); |
| 65 | /** Static function to check if given info will lead to a valid configuration |
| 66 | * |
| 67 | * Similar to ClIndirectConv2dAddressPreCalculationKernel::configure() |
| 68 | * |
| 69 | * @return a status |
| 70 | */ |
| 71 | static Status validate(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *dst, |
| 72 | const PadStrideInfo &conv_info, const DirectConvComputeKernelInfo &desc); |
| 73 | |
| 74 | // Inherited methods overridden: |
| 75 | void run_op(ITensorPack &tensors, const Window &window, cl::CommandQueue &queue) override; |
| 76 | }; |
| 77 | } // namespace kernels |
| 78 | } // namespace opencl |
| 79 | } // namespace arm_compute |
| 80 | #endif /* ARM_COMPUTE_CL_INDIRECT_CONV2D_ADDRESS_PRECALCULATION_KERNEL_H */ |