Georgios Pinitas | 61ba069 | 2021-01-10 04:07:39 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2018-2021 Arm Limited. |
| 3 | * |
| 4 | * SPDX-License-Identifier: MIT |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to |
| 8 | * deal in the Software without restriction, including without limitation the |
| 9 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or |
| 10 | * sell copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in all |
| 14 | * copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 19 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 22 | * SOFTWARE. |
| 23 | */ |
| 24 | #include "src/runtime/cpu/operators/CpuConcatenate.h" |
| 25 | |
| 26 | #include "src/core/cpu/kernels/CpuConcatenateBatchKernel.h" |
| 27 | #include "src/core/cpu/kernels/CpuConcatenateDepthKernel.h" |
| 28 | #include "src/core/cpu/kernels/CpuConcatenateHeightKernel.h" |
| 29 | #include "src/core/cpu/kernels/CpuConcatenateWidthKernel.h" |
| 30 | |
| 31 | #include "arm_compute/core/utils/misc/ShapeCalculator.h" |
| 32 | #include "arm_compute/runtime/NEON/NEScheduler.h" |
| 33 | |
| 34 | #include "arm_compute/core/Error.h" |
| 35 | #include "arm_compute/core/ITensor.h" |
| 36 | #include "arm_compute/core/TensorInfo.h" |
| 37 | #include "arm_compute/core/Types.h" |
| 38 | #include "arm_compute/core/Validate.h" |
| 39 | #include "src/core/helpers/AutoConfiguration.h" |
| 40 | |
| 41 | namespace arm_compute |
| 42 | { |
| 43 | namespace cpu |
| 44 | { |
| 45 | CpuConcatenate::CpuConcatenate() |
| 46 | : _concat_kernels(), _num_srcs(0), _axis(0) |
| 47 | { |
| 48 | } |
| 49 | |
| 50 | void CpuConcatenate::configure(const std::vector<const ITensorInfo *> &srcs_vector, ITensorInfo *dst, size_t axis) |
| 51 | { |
| 52 | ARM_COMPUTE_ERROR_ON(dst == nullptr); |
| 53 | |
| 54 | _axis = axis; |
| 55 | _num_srcs = srcs_vector.size(); |
| 56 | |
| 57 | TensorShape dst_shape = arm_compute::misc::shape_calculator::calculate_concatenate_shape(srcs_vector, axis); |
| 58 | |
| 59 | // Output auto inizialitation if not yet initialized |
| 60 | auto_init_if_empty(*dst, dst_shape, 1, srcs_vector[0]->data_type()); |
| 61 | ARM_COMPUTE_ERROR_THROW_ON(CpuConcatenate::validate(srcs_vector, dst, axis)); |
| 62 | |
| 63 | unsigned int offset = 0; |
| 64 | |
| 65 | for(unsigned int i = 0; i < _num_srcs; ++i) |
| 66 | { |
| 67 | switch(axis) |
| 68 | { |
| 69 | case Window::DimX: |
| 70 | { |
| 71 | auto kernel = std::make_unique<kernels::CpuConcatenateWidthKernel>(); |
| 72 | kernel->configure(srcs_vector.at(i), offset, dst); |
| 73 | _concat_kernels.emplace_back(std::move(kernel)); |
| 74 | break; |
| 75 | } |
| 76 | case Window::DimY: |
| 77 | { |
| 78 | auto kernel = std::make_unique<kernels::CpuConcatenateHeightKernel>(); |
| 79 | kernel->configure(srcs_vector.at(i), offset, dst); |
| 80 | _concat_kernels.emplace_back(std::move(kernel)); |
| 81 | break; |
| 82 | } |
| 83 | case Window::DimZ: |
| 84 | { |
| 85 | auto kernel = std::make_unique<kernels::CpuConcatenateDepthKernel>(); |
| 86 | kernel->configure(srcs_vector.at(i), offset, dst); |
| 87 | _concat_kernels.emplace_back(std::move(kernel)); |
| 88 | break; |
| 89 | } |
| 90 | case 3: |
| 91 | { |
| 92 | auto kernel = std::make_unique<kernels::CpuConcatenateBatchKernel>(); |
| 93 | kernel->configure(srcs_vector.at(i), offset, dst); |
| 94 | _concat_kernels.emplace_back(std::move(kernel)); |
| 95 | break; |
| 96 | } |
| 97 | default: |
| 98 | ARM_COMPUTE_ERROR("Axis not supported"); |
| 99 | } |
| 100 | offset += srcs_vector.at(i)->dimension(axis); |
| 101 | } |
| 102 | } |
| 103 | |
| 104 | Status CpuConcatenate::validate(const std::vector<const ITensorInfo *> &srcs_vector, const ITensorInfo *dst, size_t axis) |
| 105 | { |
| 106 | ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(dst); |
| 107 | ARM_COMPUTE_RETURN_ERROR_ON(srcs_vector.size() < 2); |
| 108 | |
| 109 | unsigned int offset = 0; |
| 110 | for(const auto &src : srcs_vector) |
| 111 | { |
| 112 | ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(src); |
| 113 | switch(axis) |
| 114 | { |
| 115 | case Window::DimX: |
| 116 | { |
| 117 | ARM_COMPUTE_RETURN_ON_ERROR(kernels::CpuConcatenateWidthKernel::validate(src, offset, dst)); |
| 118 | break; |
| 119 | } |
| 120 | case Window::DimY: |
| 121 | { |
| 122 | ARM_COMPUTE_RETURN_ON_ERROR(kernels::CpuConcatenateHeightKernel::validate(src, offset, dst)); |
| 123 | break; |
| 124 | } |
| 125 | case Window::DimZ: |
| 126 | { |
| 127 | ARM_COMPUTE_RETURN_ON_ERROR(kernels::CpuConcatenateDepthKernel::validate(src, offset, dst)); |
| 128 | break; |
| 129 | } |
| 130 | case 3: |
| 131 | { |
| 132 | ARM_COMPUTE_RETURN_ON_ERROR(kernels::CpuConcatenateBatchKernel::validate(src, offset, dst)); |
| 133 | break; |
| 134 | } |
| 135 | default: |
| 136 | ARM_COMPUTE_ERROR("Axis not supported"); |
| 137 | } |
| 138 | offset += src->dimension(axis); |
| 139 | } |
| 140 | |
| 141 | if(dst->total_size() != 0) |
| 142 | { |
| 143 | TensorShape dst_shape = arm_compute::misc::shape_calculator::calculate_concatenate_shape(srcs_vector, axis); |
| 144 | ARM_COMPUTE_RETURN_ERROR_ON(dst_shape.total_size() != dst->tensor_shape().total_size()); |
| 145 | } |
| 146 | |
| 147 | return Status{}; |
| 148 | } |
| 149 | |
| 150 | void CpuConcatenate::run(ITensorPack &tensors) |
| 151 | { |
| 152 | if(tensors.empty()) |
| 153 | { |
| 154 | ARM_COMPUTE_ERROR("No inputs provided"); |
| 155 | } |
| 156 | |
| 157 | if(static_cast<int>(tensors.size() - 1) != static_cast<int>(_num_srcs)) |
| 158 | { |
| 159 | ARM_COMPUTE_ERROR("Configured with different number of inputs"); |
| 160 | } |
| 161 | |
| 162 | int i = 0; |
| 163 | for(auto &k : _concat_kernels) |
| 164 | { |
| 165 | ITensorPack pack; |
| 166 | pack.add_tensor(TensorType::ACL_SRC, tensors.get_const_tensor(ACL_SRC_VEC + i)); |
| 167 | pack.add_tensor(TensorType::ACL_DST, tensors.get_tensor(ACL_DST)); |
Sang-Hoon Park | 0094c02 | 2021-01-20 18:16:47 +0000 | [diff] [blame] | 168 | NEScheduler::get().schedule_op(k.get(), Window::DimY, k->window(), pack); |
Georgios Pinitas | 61ba069 | 2021-01-10 04:07:39 +0000 | [diff] [blame] | 169 | ++i; |
| 170 | } |
| 171 | } |
| 172 | } // namespace cpu |
| 173 | } // namespace arm_compute |