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Sheri Zhang1efed922021-03-10 22:43:38 +00001/*
2 * Copyright (c) 2021 Arm Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
Georgios Pinitas7891a732021-08-20 21:39:25 +010024#include "src/gpu/cl/operators/ClDirectConv2d.h"
Sheri Zhang1efed922021-03-10 22:43:38 +000025
26#include "arm_compute/runtime/CL/CLScheduler.h"
27#include "src/core/CL/kernels/CLFillBorderKernel.h"
Georgios Pinitas7891a732021-08-20 21:39:25 +010028#include "src/gpu/cl/kernels/ClActivationKernel.h"
29#include "src/gpu/cl/kernels/ClDirectConv2dKernel.h"
Sheri Zhang1efed922021-03-10 22:43:38 +000030
ramelg012e53f172021-09-22 10:48:25 +010031#include "src/common/utils/Log.h"
32
Sheri Zhang1efed922021-03-10 22:43:38 +000033namespace arm_compute
34{
35namespace opencl
36{
37namespace
38{
39ITensorPack select_activation_src_dst(ITensorPack &tensors)
40{
41 ITensorPack pack;
42 pack.add_tensor(TensorType::ACL_SRC, tensors.get_tensor(TensorType::ACL_DST));
43 pack.add_tensor(TensorType::ACL_DST, tensors.get_tensor(TensorType::ACL_DST));
44 return pack;
45}
46} // namespace
47
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010048void ClDirectConv2d::configure(const CLCompileContext &compile_context, ITensorInfo *src, ITensorInfo *weights, ITensorInfo *biases, ITensorInfo *dst,
49 const PadStrideInfo &conv_info, const ActivationLayerInfo &act_info)
Sheri Zhang1efed922021-03-10 22:43:38 +000050{
Georgios Pinitas9fc3be62021-05-29 04:01:51 +010051 ARM_COMPUTE_ERROR_ON_NULLPTR(src);
ramelg012e53f172021-09-22 10:48:25 +010052 ARM_COMPUTE_LOG_PARAMS(src, weights, biases, dst, conv_info, act_info);
Georgios Pinitas9fc3be62021-05-29 04:01:51 +010053
Sheri Zhang1efed922021-03-10 22:43:38 +000054 // Configure direct convolution kernel
Georgios Pinitas9fc3be62021-05-29 04:01:51 +010055 const ActivationLayerInfo conv2d_act_info = (src->data_layout() == DataLayout::NHWC && is_data_type_float(src->data_type())) ? act_info : ActivationLayerInfo();
56 auto k = std::make_unique<kernels::ClDirectConv2dKernel>();
Sheri Zhang1efed922021-03-10 22:43:38 +000057 k->set_target(CLScheduler::get().target());
Georgios Pinitas9fc3be62021-05-29 04:01:51 +010058 k->configure(compile_context, src, weights, biases, dst, conv_info, conv2d_act_info);
Sheri Zhang1efed922021-03-10 22:43:38 +000059 _direct_conv_kernel = std::move(k);
60
61 // Configure border handler
62 PixelValue zero_value(0.f);
63 if(is_data_type_quantized_asymmetric(src->data_type()))
64 {
65 zero_value = PixelValue(0, src->data_type(), src->quantization_info());
66 }
67 auto b = std::make_unique<CLFillBorderKernel>();
68 b->configure(compile_context, src, _direct_conv_kernel->border_size(), BorderMode::CONSTANT, zero_value);
69 _src_border_handler = std::move(b);
70
Georgios Pinitas9fc3be62021-05-29 04:01:51 +010071 // Fused activation is currently supported for NHWC and floating point types
72 if(act_info.enabled() && !conv2d_act_info.enabled())
Sheri Zhang1efed922021-03-10 22:43:38 +000073 {
74 auto a = std::make_unique<kernels::ClActivationKernel>();
75 a->configure(compile_context, dst, dst, act_info);
76 _activation_kernel = std::move(a);
77 }
78
79 // Tune kernels
80 CLScheduler::get().tune_kernel_static(*_direct_conv_kernel);
81}
82
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010083Status ClDirectConv2d::validate(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *dst,
84 const PadStrideInfo &conv_info, const ActivationLayerInfo &act_info)
Sheri Zhang1efed922021-03-10 22:43:38 +000085{
Georgios Pinitas9fc3be62021-05-29 04:01:51 +010086 ARM_COMPUTE_RETURN_ON_ERROR(kernels::ClDirectConv2dKernel::validate(src, weights, biases, dst, conv_info, ActivationLayerInfo(), CLScheduler::get().target()));
Sheri Zhang1efed922021-03-10 22:43:38 +000087 if(act_info.enabled())
88 {
89 ARM_COMPUTE_RETURN_ON_ERROR(kernels::ClActivationKernel::validate(dst, dst, act_info));
90 }
91 return Status{};
92}
93
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010094void ClDirectConv2d::run(ITensorPack &tensors)
Sheri Zhang1efed922021-03-10 22:43:38 +000095{
96 // Run border handler
97 CLScheduler::get().enqueue_op(*_src_border_handler.get(), tensors, false);
98 // Run direct convolution
99 CLScheduler::get().enqueue_op(*_direct_conv_kernel.get(), tensors, false);
100 // Run activation kernel
101 if(_activation_kernel)
102 {
103 auto act_pack = select_activation_src_dst(tensors);
104 CLScheduler::get().enqueue_op(*_activation_kernel.get(), act_pack, false);
105 }
106}
107} // namespace opencl
108} // namespace arm_compute