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Anthony Barbier6ff3b192017-09-04 18:44:23 +01001/*
Michalis Spyrou373b4072021-01-20 16:41:12 +00002 * Copyright (c) 2017-2021 Arm Limited.
Anthony Barbier6ff3b192017-09-04 18:44:23 +01003 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24#include "arm_compute/runtime/NEON/functions/NESoftmaxLayer.h"
Michalis Spyrou373b4072021-01-20 16:41:12 +000025#include "arm_compute/core/Validate.h"
26#include "arm_compute/runtime/Tensor.h"
27#include "src/core/cpu/kernels/CpuSoftmaxKernel.h"
Sang-Hoon Park68dd25f2020-10-19 16:00:11 +010028#include "src/core/helpers/SoftmaxHelpers.h"
Michalis Spyrou373b4072021-01-20 16:41:12 +000029#include "src/runtime/cpu/operators/CpuSoftmax.h"
Anthony Barbier6ff3b192017-09-04 18:44:23 +010030
Manuel Bottini678d83a2019-01-07 16:05:36 +000031namespace arm_compute
Anthony Barbier6ff3b192017-09-04 18:44:23 +010032{
Sang-Hoon Parkd24affe2019-10-08 18:07:23 +010033template <bool IS_LOG>
Michalis Spyrou373b4072021-01-20 16:41:12 +000034struct NESoftmaxLayerGeneric<IS_LOG>::Impl
35{
36 const ITensor *src{ nullptr };
37 ITensor *dst{ nullptr };
38 Tensor max{ nullptr };
39 Tensor tmp{ nullptr };
40 Tensor input_permuted{ nullptr };
41 Tensor output_permuted{ nullptr };
42 std::unique_ptr<cpu::CpuSoftmaxGeneric<IS_LOG>> op{ nullptr };
43};
Michalis Spyrouebcebf12020-10-21 00:04:14 +010044
45template <bool IS_LOG>
Sang-Hoon Parkd24affe2019-10-08 18:07:23 +010046NESoftmaxLayerGeneric<IS_LOG>::NESoftmaxLayerGeneric(std::shared_ptr<IMemoryManager> memory_manager)
Michalis Spyrou373b4072021-01-20 16:41:12 +000047 : _memory_group(std::move(memory_manager)), _impl(std::make_unique<Impl>())
Manuel Bottini678d83a2019-01-07 16:05:36 +000048{
49}
50
Sang-Hoon Parkd24affe2019-10-08 18:07:23 +010051template <bool IS_LOG>
Michalis Spyrou373b4072021-01-20 16:41:12 +000052NESoftmaxLayerGeneric<IS_LOG>::NESoftmaxLayerGeneric(NESoftmaxLayerGeneric &&) = default;
53template <bool IS_LOG>
54NESoftmaxLayerGeneric<IS_LOG> &NESoftmaxLayerGeneric<IS_LOG>::operator=(NESoftmaxLayerGeneric &&) = default;
55template <bool IS_LOG>
56NESoftmaxLayerGeneric<IS_LOG>::~NESoftmaxLayerGeneric() = default;
57
58template <bool IS_LOG>
morgolock9c7fed82020-08-05 12:30:56 +010059void NESoftmaxLayerGeneric<IS_LOG>::configure(ITensor *input, ITensor *output, float beta, int32_t axis)
Anthony Barbier6ff3b192017-09-04 18:44:23 +010060{
Michalis Spyrouafa5d812017-11-30 14:25:57 +000061 ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
Anthony Barbier6ff3b192017-09-04 18:44:23 +010062
Michalis Spyrou373b4072021-01-20 16:41:12 +000063 _impl->src = input;
64 _impl->dst = output;
65 _impl->op = std::make_unique<cpu::CpuSoftmaxGeneric<IS_LOG>>();
66 _impl->op->configure(input->info(), output->info(), beta, axis);
Sheri Zhang1f567af2020-05-05 11:47:36 +010067
Michalis Spyrou373b4072021-01-20 16:41:12 +000068 const unsigned int actual_axis = static_cast<unsigned int>(wrap_around(axis, static_cast<int32_t>(input->info()->num_dimensions())));
69 const bool needs_permute = actual_axis > 0;
70 if(needs_permute)
Manuel Bottini678d83a2019-01-07 16:05:36 +000071 {
SiCong Li96209c72020-08-21 12:28:30 +010072 // Add to the memory manager _input_permuted
Michalis Spyrou373b4072021-01-20 16:41:12 +000073 auto permute_input = std::make_unique<cpu::CpuPermute>();
74 _memory_group.manage(&_impl->input_permuted);
75 permute_input->configure(input->info(), _impl->input_permuted.info(), softmax_helpers::get_permutation_vector_from_softmax_axis(actual_axis));
Manuel Bottini678d83a2019-01-07 16:05:36 +000076 }
77
SiCong Li96209c72020-08-21 12:28:30 +010078 // We want to deal with a 2D input. Either it is the permuted version of the original input (4D case)
Manuel Bottini678d83a2019-01-07 16:05:36 +000079 // or it is the original input case (2D case)
Michalis Spyrou373b4072021-01-20 16:41:12 +000080 ITensor *tmp_input = (needs_permute ? &_impl->input_permuted : input);
Manuel Bottini678d83a2019-01-07 16:05:36 +000081
82 // Create intermediate tensors shapes
SiCong Li96209c72020-08-21 12:28:30 +010083 const TensorInfo input_info = tmp_input->info()->clone()->reset_padding().set_is_resizable(true);
84 DataType tmp_data_type = is_data_type_quantized_asymmetric(tmp_input->info()->data_type()) ? DataType::F32 : tmp_input->info()->data_type();
Manuel Bottini678d83a2019-01-07 16:05:36 +000085 TensorInfo tensor_info_tmp(input_info.clone()->set_data_type(tmp_data_type));
Diego Lopez Recas35ceeb22017-12-04 18:56:10 +000086
87 // Init intermediate tensors
SiCong Li96209c72020-08-21 12:28:30 +010088 TensorShape max_sum_shape = tmp_input->info()->tensor_shape();
Manuel Bottini678d83a2019-01-07 16:05:36 +000089 max_sum_shape.set(0, 1);
Michalis Spyrou373b4072021-01-20 16:41:12 +000090 _impl->max.allocator()->init(input_info.clone()->set_tensor_shape(max_sum_shape));
91 _impl->tmp.allocator()->init(tensor_info_tmp);
Diego Lopez Recas35ceeb22017-12-04 18:56:10 +000092
93 // Manage intermediate buffers
Michalis Spyrou373b4072021-01-20 16:41:12 +000094 _memory_group.manage(&_impl->max);
95 _memory_group.manage(&_impl->tmp);
Anthony Barbier6ff3b192017-09-04 18:44:23 +010096
Michalis Spyrouebcebf12020-10-21 00:04:14 +010097 // Configure kernels
Michalis Spyrou373b4072021-01-20 16:41:12 +000098 auto max_kernel = std::make_unique<cpu::kernels::CpuLogits1DMaxKernel>();
99 auto softmax_kernel = std::make_unique<cpu::kernels::CpuLogits1DSoftmaxKernel<IS_LOG>>();
100 max_kernel->configure(tmp_input->info(), _impl->max.info());
101
102 if(needs_permute)
Manuel Bottini678d83a2019-01-07 16:05:36 +0000103 {
Michalis Spyrou373b4072021-01-20 16:41:12 +0000104 auto permute_output = std::make_unique<cpu::CpuPermute>();
SiCong Li96209c72020-08-21 12:28:30 +0100105 // Add to the memory manager _output_permuted
Michalis Spyrou373b4072021-01-20 16:41:12 +0000106 _memory_group.manage(&_impl->output_permuted);
Manuel Bottini678d83a2019-01-07 16:05:36 +0000107
SiCong Li96209c72020-08-21 12:28:30 +0100108 // The normalization kernel stores the result in a permuted output tensor
Michalis Spyrou373b4072021-01-20 16:41:12 +0000109 softmax_kernel->configure(tmp_input->info(), _impl->max.info(), _impl->output_permuted.info(), beta, _impl->tmp.info());
110 _impl->input_permuted.allocator()->allocate();
Manuel Bottini678d83a2019-01-07 16:05:36 +0000111
SiCong Li96209c72020-08-21 12:28:30 +0100112 // Re-permute the permuted output into the requested (4D) output
Michalis Spyrou373b4072021-01-20 16:41:12 +0000113 permute_output->configure(_impl->output_permuted.info(), output->info(), softmax_helpers::get_permutation_vector_from_softmax_axis(actual_axis));
Manuel Bottini678d83a2019-01-07 16:05:36 +0000114
SiCong Li96209c72020-08-21 12:28:30 +0100115 // Allocate the intermediate permuted tensors
Michalis Spyrou373b4072021-01-20 16:41:12 +0000116 _impl->output_permuted.allocator()->allocate();
Manuel Bottini678d83a2019-01-07 16:05:36 +0000117 }
118 else
119 {
Michalis Spyrou373b4072021-01-20 16:41:12 +0000120 softmax_kernel->configure(tmp_input->info(), _impl->max.info(), output->info(), beta, _impl->tmp.info());
Manuel Bottini678d83a2019-01-07 16:05:36 +0000121 }
122
123 // Allocate intermediate buffers
Michalis Spyrou373b4072021-01-20 16:41:12 +0000124 _impl->max.allocator()->allocate();
125 _impl->tmp.allocator()->allocate();
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100126}
127
Sang-Hoon Parkd24affe2019-10-08 18:07:23 +0100128template <bool IS_LOG>
morgolock9c7fed82020-08-05 12:30:56 +0100129Status NESoftmaxLayerGeneric<IS_LOG>::validate(const ITensorInfo *input, const ITensorInfo *output, float beta, int32_t axis)
Michalis Spyrouafa5d812017-11-30 14:25:57 +0000130{
Michalis Spyrouafa5d812017-11-30 14:25:57 +0000131 ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(input, output);
Michalis Spyrou373b4072021-01-20 16:41:12 +0000132 ARM_COMPUTE_RETURN_ON_ERROR(cpu::CpuSoftmaxGeneric<IS_LOG>::validate(input, output, beta, axis));
Michalis Spyrouafa5d812017-11-30 14:25:57 +0000133 return Status{};
134}
135
Sang-Hoon Parkd24affe2019-10-08 18:07:23 +0100136template <bool IS_LOG>
137void NESoftmaxLayerGeneric<IS_LOG>::run()
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100138{
Georgios Pinitasda953f22019-04-02 17:27:03 +0100139 MemoryGroupResourceScope scope_mg(_memory_group);
Michalis Spyrou373b4072021-01-20 16:41:12 +0000140 ITensorPack pack;
141 pack.add_tensor(TensorType::ACL_SRC, _impl->src);
142 pack.add_tensor(TensorType::ACL_DST, _impl->dst);
143 pack.add_tensor(TensorType::ACL_INT_0, &_impl->tmp);
144 pack.add_tensor(TensorType::ACL_INT_1, &_impl->max);
145 pack.add_tensor(TensorType::ACL_INT_2, &_impl->input_permuted);
146 pack.add_tensor(TensorType::ACL_INT_3, &_impl->output_permuted);
147 _impl->op->run(pack);
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100148}
Sang-Hoon Parkd24affe2019-10-08 18:07:23 +0100149
150template class NESoftmaxLayerGeneric<false>;
151template class NESoftmaxLayerGeneric<true>;
152
Michalis Spyroubcd23522020-05-21 15:02:36 +0100153} // namespace arm_compute