Michele Di Giorgio | 1928904 | 2021-02-03 16:05:00 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2021 Arm Limited. |
| 3 | * |
| 4 | * SPDX-License-Identifier: MIT |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to |
| 8 | * deal in the Software without restriction, including without limitation the |
| 9 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or |
| 10 | * sell copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in all |
| 14 | * copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 19 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 22 | * SOFTWARE. |
| 23 | */ |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 24 | #ifndef ARM_COMPUTE_CPU_POOL2D_H |
| 25 | #define ARM_COMPUTE_CPU_POOL2D_H |
Michele Di Giorgio | 1928904 | 2021-02-03 16:05:00 +0000 | [diff] [blame] | 26 | |
Michele Di Giorgio | 0c19cbd | 2021-05-11 17:41:32 +0100 | [diff] [blame] | 27 | #include "arm_compute/core/experimental/Types.h" |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 28 | #include "src/core/common/Macros.h" |
| 29 | #include "src/runtime/cpu/ICpuOperator.h" |
Michele Di Giorgio | 1928904 | 2021-02-03 16:05:00 +0000 | [diff] [blame] | 30 | |
| 31 | #include <memory> |
| 32 | |
| 33 | namespace arm_compute |
| 34 | { |
| 35 | // Forward Declarations |
| 36 | struct PoolingLayerInfo; |
| 37 | |
| 38 | namespace cpu |
| 39 | { |
Michele Di Giorgio | 33f41fa | 2021-03-09 14:09:08 +0000 | [diff] [blame] | 40 | /** Basic function to simulate a pooling layer with the specified pooling operation. This function calls the following kernels: |
Michele Di Giorgio | 1928904 | 2021-02-03 16:05:00 +0000 | [diff] [blame] | 41 | * |
| 42 | * -# @ref NEFillBorderKernel (executed if padding size is different from zero) |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 43 | * -# @ref kernels::CpuPool2dKernel |
| 44 | * -# @ref kernels::CpuPool2dAssemblyWrapperKernel |
Michele Di Giorgio | 1928904 | 2021-02-03 16:05:00 +0000 | [diff] [blame] | 45 | */ |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 46 | class CpuPool2d : public ICpuOperator |
Michele Di Giorgio | 1928904 | 2021-02-03 16:05:00 +0000 | [diff] [blame] | 47 | { |
| 48 | public: |
| 49 | /** Constructor */ |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 50 | CpuPool2d(); |
| 51 | ARM_COMPUTE_DISALLOW_COPY_ALLOW_MOVE(CpuPool2d); |
Michele Di Giorgio | 1928904 | 2021-02-03 16:05:00 +0000 | [diff] [blame] | 52 | /** Default destructor */ |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 53 | ~CpuPool2d(); |
Michele Di Giorgio | 1928904 | 2021-02-03 16:05:00 +0000 | [diff] [blame] | 54 | /** Set the src and dst tensors. |
| 55 | * |
| 56 | * @note F16 is supported for pool sizes 2 and 3 only |
| 57 | * |
| 58 | * @param[in, out] src Source tensor info. (Written to only when padding != 0) Data types supported: QASYMM8/QASYMM8_SIGNED/F16/F32. |
| 59 | * @param[out] dst Destination tensor info. Data types supported: same as @p src. |
| 60 | * @param[in] pool_info Contains pooling operation information described in @ref PoolingLayerInfo. |
| 61 | * @param[out] indices (optional) The indices of the maximal values. Data type supported: U32. |
| 62 | */ |
| 63 | void configure(ITensorInfo *src, ITensorInfo *dst, const PoolingLayerInfo &pool_info, ITensorInfo *indices = nullptr); |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 64 | /** Static function to check if given info will lead to a valid configuration |
Michele Di Giorgio | 1928904 | 2021-02-03 16:05:00 +0000 | [diff] [blame] | 65 | * |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 66 | * Similar to CpuPool2d::configure() |
Michele Di Giorgio | 1928904 | 2021-02-03 16:05:00 +0000 | [diff] [blame] | 67 | * |
| 68 | * @return a status |
| 69 | */ |
| 70 | static Status validate(const ITensorInfo *src, const ITensorInfo *dst, const PoolingLayerInfo &pool_info, const ITensorInfo *indices = nullptr); |
| 71 | |
| 72 | // Inherited methods overridden: |
| 73 | void run(ITensorPack &tensors) override; |
Michele Di Giorgio | 0c19cbd | 2021-05-11 17:41:32 +0100 | [diff] [blame] | 74 | experimental::MemoryRequirements workspace() const override; |
Michele Di Giorgio | 1928904 | 2021-02-03 16:05:00 +0000 | [diff] [blame] | 75 | |
| 76 | private: |
Michele Di Giorgio | 0c19cbd | 2021-05-11 17:41:32 +0100 | [diff] [blame] | 77 | std::unique_ptr<INEKernel> _pooling_layer_kernel; |
| 78 | std::unique_ptr<INEKernel> _border_handler; |
| 79 | std::unique_ptr<INEKernel> _asm_glue; |
Michele Di Giorgio | 1928904 | 2021-02-03 16:05:00 +0000 | [diff] [blame] | 80 | |
Michele Di Giorgio | 0c19cbd | 2021-05-11 17:41:32 +0100 | [diff] [blame] | 81 | bool _is_global_pooling_layer; |
| 82 | DataLayout _data_layout; |
| 83 | experimental::MemoryRequirements _mem_req; |
Michele Di Giorgio | 1928904 | 2021-02-03 16:05:00 +0000 | [diff] [blame] | 84 | }; |
| 85 | } // namespace cpu |
| 86 | } // namespace arm_compute |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 87 | #endif /* ARM_COMPUTE_CPU_POOL2D_H */ |