Michalis Spyrou | 16934a5 | 2018-08-21 18:03:58 +0100 | [diff] [blame] | 1 | /* |
Michele Di Giorgio | 93c70b8 | 2019-08-08 11:59:14 +0100 | [diff] [blame] | 2 | * Copyright (c) 2018-2019 ARM Limited. |
Michalis Spyrou | 16934a5 | 2018-08-21 18:03:58 +0100 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: MIT |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to |
| 8 | * deal in the Software without restriction, including without limitation the |
| 9 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or |
| 10 | * sell copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in all |
| 14 | * copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 19 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 22 | * SOFTWARE. |
| 23 | */ |
| 24 | |
| 25 | #include "arm_compute/runtime/CL/functions/CLSpaceToBatchLayer.h" |
| 26 | |
| 27 | #include "arm_compute/core/Error.h" |
| 28 | #include "arm_compute/core/TensorInfo.h" |
| 29 | #include "arm_compute/core/Types.h" |
| 30 | #include "arm_compute/core/Validate.h" |
| 31 | #include "arm_compute/runtime/CL/CLScheduler.h" |
| 32 | |
| 33 | namespace arm_compute |
| 34 | { |
| 35 | CLSpaceToBatchLayer::CLSpaceToBatchLayer() |
Isabella Gottardi | cc6129c | 2018-12-14 11:40:40 +0000 | [diff] [blame] | 36 | : _space_to_batch_kernel(), _memset_kernel(), _has_padding(false) |
Michalis Spyrou | 16934a5 | 2018-08-21 18:03:58 +0100 | [diff] [blame] | 37 | { |
| 38 | } |
| 39 | |
| 40 | void CLSpaceToBatchLayer::configure(const ICLTensor *input, const ICLTensor *block_shape, const ICLTensor *paddings, ICLTensor *output) |
| 41 | { |
Isabella Gottardi | cc6129c | 2018-12-14 11:40:40 +0000 | [diff] [blame] | 42 | ARM_COMPUTE_ERROR_ON_NULLPTR(input, block_shape, paddings, output); |
Michalis Spyrou | 16934a5 | 2018-08-21 18:03:58 +0100 | [diff] [blame] | 43 | |
| 44 | if(input->info()->tensor_shape().total_size() != output->info()->tensor_shape().total_size()) |
| 45 | { |
| 46 | _has_padding = true; |
Michele Di Giorgio | 93c70b8 | 2019-08-08 11:59:14 +0100 | [diff] [blame] | 47 | _memset_kernel.configure(output, PixelValue(0, input->info()->data_type(), input->info()->quantization_info())); |
Michalis Spyrou | 16934a5 | 2018-08-21 18:03:58 +0100 | [diff] [blame] | 48 | } |
Michalis Spyrou | 16934a5 | 2018-08-21 18:03:58 +0100 | [diff] [blame] | 49 | _space_to_batch_kernel.configure(input, block_shape, paddings, output); |
| 50 | } |
| 51 | |
| 52 | void CLSpaceToBatchLayer::configure(const ICLTensor *input, const int block_shape_x, const int block_shape_y, const Size2D &padding_left, const Size2D &padding_right, ICLTensor *output) |
| 53 | { |
| 54 | ARM_COMPUTE_ERROR_ON_NULLPTR(input, output); |
| 55 | |
| 56 | if(input->info()->tensor_shape().total_size() != output->info()->tensor_shape().total_size()) |
| 57 | { |
| 58 | _has_padding = true; |
Michele Di Giorgio | 93c70b8 | 2019-08-08 11:59:14 +0100 | [diff] [blame] | 59 | _memset_kernel.configure(output, PixelValue(0, input->info()->data_type(), input->info()->quantization_info())); |
Michalis Spyrou | 16934a5 | 2018-08-21 18:03:58 +0100 | [diff] [blame] | 60 | } |
Michalis Spyrou | 16934a5 | 2018-08-21 18:03:58 +0100 | [diff] [blame] | 61 | _space_to_batch_kernel.configure(input, block_shape_x, block_shape_y, padding_left, padding_right, output); |
| 62 | } |
| 63 | |
| 64 | Status CLSpaceToBatchLayer::validate(const ITensorInfo *input, const ITensorInfo *block_shape, const ITensorInfo *paddings, const ITensorInfo *output) |
| 65 | { |
Michele Di Giorgio | 93c70b8 | 2019-08-08 11:59:14 +0100 | [diff] [blame] | 66 | ARM_COMPUTE_RETURN_ON_ERROR(CLMemsetKernel::validate(output, PixelValue(0, input->data_type(), input->quantization_info()))); |
Isabella Gottardi | cc6129c | 2018-12-14 11:40:40 +0000 | [diff] [blame] | 67 | ARM_COMPUTE_RETURN_ON_ERROR(CLSpaceToBatchLayerKernel::validate(input, block_shape, paddings, output)); |
| 68 | |
| 69 | return Status{}; |
Michalis Spyrou | 16934a5 | 2018-08-21 18:03:58 +0100 | [diff] [blame] | 70 | } |
| 71 | |
| 72 | Status CLSpaceToBatchLayer::validate(const ITensorInfo *input, const int block_shape_x, const int block_shape_y, const Size2D &padding_left, const Size2D &padding_right, |
| 73 | const ITensorInfo *output) |
| 74 | { |
Michele Di Giorgio | 93c70b8 | 2019-08-08 11:59:14 +0100 | [diff] [blame] | 75 | ARM_COMPUTE_RETURN_ON_ERROR(CLMemsetKernel::validate(output, PixelValue(0, input->data_type(), input->quantization_info()))); |
Isabella Gottardi | cc6129c | 2018-12-14 11:40:40 +0000 | [diff] [blame] | 76 | ARM_COMPUTE_RETURN_ON_ERROR(CLSpaceToBatchLayerKernel::validate(input, block_shape_x, block_shape_y, padding_left, padding_right, output)); |
| 77 | |
| 78 | return Status{}; |
Michalis Spyrou | 16934a5 | 2018-08-21 18:03:58 +0100 | [diff] [blame] | 79 | } |
| 80 | |
| 81 | void CLSpaceToBatchLayer::run() |
| 82 | { |
| 83 | // Zero out output only if we have paddings |
Michalis Spyrou | 16934a5 | 2018-08-21 18:03:58 +0100 | [diff] [blame] | 84 | if(_has_padding) |
| 85 | { |
Isabella Gottardi | cc6129c | 2018-12-14 11:40:40 +0000 | [diff] [blame] | 86 | CLScheduler::get().enqueue(_memset_kernel, true); |
Michalis Spyrou | 16934a5 | 2018-08-21 18:03:58 +0100 | [diff] [blame] | 87 | } |
Michalis Spyrou | 16934a5 | 2018-08-21 18:03:58 +0100 | [diff] [blame] | 88 | CLScheduler::get().enqueue(_space_to_batch_kernel, true); |
| 89 | } |
| 90 | } // namespace arm_compute |