Chunosov | d621bca | 2017-11-03 17:33:15 +0700 | [diff] [blame] | 1 | /* |
Michele Di Giorgio | 4aff98f | 2019-08-28 16:27:26 +0100 | [diff] [blame] | 2 | * Copyright (c) 2017-2019 ARM Limited. |
Chunosov | d621bca | 2017-11-03 17:33:15 +0700 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: MIT |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to |
| 8 | * deal in the Software without restriction, including without limitation the |
| 9 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or |
| 10 | * sell copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in all |
| 14 | * copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 19 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 22 | * SOFTWARE. |
| 23 | */ |
| 24 | #ifndef ARM_COMPUTE_HELPERS_ASYMM_H |
| 25 | #define ARM_COMPUTE_HELPERS_ASYMM_H |
| 26 | |
| 27 | #include "helpers.h" |
| 28 | |
Sang-Hoon Park | bfd75d6 | 2019-10-30 14:56:17 +0000 | [diff] [blame^] | 29 | /** Convert the given vector with round to nearest even rounding mode |
| 30 | * |
| 31 | * @param[in] x The target to be converted |
| 32 | * @param[in] type The target type |
| 33 | * |
| 34 | * @return The converted vector |
| 35 | */ |
Michele Di Giorgio | 4aff98f | 2019-08-28 16:27:26 +0100 | [diff] [blame] | 36 | #define CONVERT_DOWN_RTE_STR(x, type) (convert_##type##_rte((x))) |
| 37 | #define CONVERT_DOWN_RTE(x, type) CONVERT_DOWN_RTE_STR(x, type) |
| 38 | |
| 39 | /** Quantize a floating-point scalar value to 8-bit asymmetric |
| 40 | * |
| 41 | * @param[in] input Input value to quantize |
| 42 | * @param[in] offset Quantization offset |
| 43 | * @param[in] scale Quantization scale |
| 44 | * |
| 45 | * @return quantized value |
| 46 | */ |
| 47 | inline uchar quantize_qasymm8(float input, float offset, float scale) |
| 48 | { |
| 49 | float out_f32 = input / scale + offset; |
| 50 | uchar res_u8 = CONVERT_SAT(CONVERT_DOWN_RTE(out_f32, int), uchar); |
| 51 | return res_u8; |
| 52 | } |
| 53 | |
| 54 | /** Dequantize a scalar value from 8-bit asymmetric to floating-point |
| 55 | * |
| 56 | * @param[in] input Input value to quantize |
| 57 | * @param[in] offset Quantization offset |
| 58 | * @param[in] scale Quantization scale |
| 59 | * |
| 60 | * @return quantized value |
| 61 | */ |
| 62 | inline float dequantize_qasymm8(uchar input, float offset, float scale) |
| 63 | { |
| 64 | return ((float)input - offset) * scale; |
| 65 | } |
| 66 | |
| 67 | /** Quantize a vector of values from floating-point |
| 68 | * |
| 69 | * @param[in] type Output data type. |
| 70 | * @param[in] size Size of vector. |
| 71 | * |
| 72 | * @return quantized values |
| 73 | */ |
| 74 | #define QUANTIZE_IMPL(type, size) \ |
| 75 | inline VEC_DATA_TYPE(type, size) quantize_##type##size(VEC_DATA_TYPE(float, size) input, float offset, float scale) \ |
| 76 | { \ |
| 77 | VEC_DATA_TYPE(float, size) \ |
| 78 | out_f32 = input / (VEC_DATA_TYPE(float, size))(scale) + (VEC_DATA_TYPE(float, size))(offset); \ |
| 79 | VEC_DATA_TYPE(type, size) \ |
| 80 | res = CONVERT_SAT(CONVERT_DOWN_RTE(out_f32, VEC_DATA_TYPE(int, size)), VEC_DATA_TYPE(type, size)); \ |
| 81 | return res; \ |
| 82 | } |
| 83 | |
| 84 | /** Dequantize a vector of values to floating-point |
| 85 | * |
| 86 | * @param[in] type Input data type. |
| 87 | * @param[in] size Size of vector. |
| 88 | * |
| 89 | * @return dequantized values in floating point |
| 90 | */ |
| 91 | #define DEQUANTIZE_IMPL(type, size) \ |
| 92 | inline VEC_DATA_TYPE(float, size) dequantize_##type##size(VEC_DATA_TYPE(type, size) input, float offset, float scale) \ |
| 93 | { \ |
| 94 | return (CONVERT(input, VEC_DATA_TYPE(float, 4)) - offset) * scale; \ |
| 95 | } |
| 96 | |
Chunosov | d621bca | 2017-11-03 17:33:15 +0700 | [diff] [blame] | 97 | /** Correctly-rounded-to-nearest division by a power-of-two. |
| 98 | * |
| 99 | * @param[in] size Size of vector. |
| 100 | * |
| 101 | * @return Correctly-rounded-to-nearest division by a power-of-two. |
| 102 | */ |
Michele Di Giorgio | df4cf57 | 2019-10-09 15:32:39 +0100 | [diff] [blame] | 103 | #define ASYMM_ROUNDING_DIVIDE_BY_POW2_IMPL(size) \ |
| 104 | inline VEC_DATA_TYPE(int, size) asymm_rounding_divide_by_POW2_##size(VEC_DATA_TYPE(int, size) x, VEC_DATA_TYPE(int, size) exponent) \ |
| 105 | { \ |
| 106 | const VEC_DATA_TYPE(int, size) \ |
| 107 | zero = (VEC_DATA_TYPE(int, size))0; \ |
| 108 | const VEC_DATA_TYPE(int, size) \ |
| 109 | one = (VEC_DATA_TYPE(int, size))1; \ |
| 110 | VEC_DATA_TYPE(int, size) \ |
| 111 | mask = (one << exponent) - one; \ |
| 112 | VEC_DATA_TYPE(int, size) \ |
| 113 | threshold = (mask >> 1) + select(zero, one, x < 0); \ |
| 114 | return (x >> exponent) + select(zero, one, (x & mask) > threshold); \ |
Chunosov | d621bca | 2017-11-03 17:33:15 +0700 | [diff] [blame] | 115 | } |
| 116 | |
Chunosov | d621bca | 2017-11-03 17:33:15 +0700 | [diff] [blame] | 117 | /** Product of two numbers, interpreting them as fixed-point values in the interval [-1, 1), |
| 118 | * rounding to the nearest value, and saturating -1 * -1 to the maximum value. |
| 119 | * |
| 120 | * @param[in] size Size of vector. |
| 121 | * |
| 122 | * @return Product of two fixed-point numbers. |
| 123 | */ |
Giorgio Arena | b99f00d | 2018-02-14 10:40:16 +0000 | [diff] [blame] | 124 | #define ASYMM_MULT_IMPL(size) \ |
Chunosov | d621bca | 2017-11-03 17:33:15 +0700 | [diff] [blame] | 125 | inline VEC_DATA_TYPE(int, size) asymm_mult##size(VEC_DATA_TYPE(int, size) a, VEC_DATA_TYPE(int, size) b) \ |
| 126 | { \ |
| 127 | VEC_DATA_TYPE(int, size) \ |
| 128 | overflow = a == b && a == INT_MIN; \ |
| 129 | VEC_DATA_TYPE(long, size) \ |
| 130 | a_64 = convert_long##size(a); \ |
| 131 | VEC_DATA_TYPE(long, size) \ |
| 132 | b_64 = convert_long##size(b); \ |
| 133 | VEC_DATA_TYPE(long, size) \ |
| 134 | ab_64 = a_64 * b_64; \ |
Giorgio Arena | 6232d04 | 2018-02-12 14:46:00 +0000 | [diff] [blame] | 135 | /* COMPMID-907 */ \ |
Giorgio Arena | b99f00d | 2018-02-14 10:40:16 +0000 | [diff] [blame] | 136 | VEC_DATA_TYPE(int, size) \ |
Giorgio Arena | 6232d04 | 2018-02-12 14:46:00 +0000 | [diff] [blame] | 137 | ab_x2_high32 = convert_int##size(((ab_64 + (1 << 30)) >> 31)); \ |
Chunosov | d621bca | 2017-11-03 17:33:15 +0700 | [diff] [blame] | 138 | return select(ab_x2_high32, INT_MAX, overflow); \ |
| 139 | } |
| 140 | |
Giorgio Arena | b99f00d | 2018-02-14 10:40:16 +0000 | [diff] [blame] | 141 | /** Calculates \f$ exp(x) \f$ for x in [-1/4, 0). |
| 142 | * |
| 143 | * @param[in] size Size of vector. |
| 144 | * |
| 145 | * @return Result in fixed-point format Q0. |
| 146 | */ |
| 147 | #define ASYMM_EXP_ON_INTERVAL_BETWEEN_NEGATIVE_ONE_QUARTER_AND_0_EXCL_IMPL(size) \ |
| 148 | inline VEC_DATA_TYPE(int, size) asymm_exp_on_interval_between_negative_one_quarter_and_0_excl##size(VEC_DATA_TYPE(int, size) a) \ |
| 149 | { \ |
| 150 | const VEC_DATA_TYPE(int, size) constant_term = 1895147668; \ |
| 151 | const VEC_DATA_TYPE(int, size) constant_1_over_3 = 715827883; \ |
| 152 | const int k_fractional_bits = 31; \ |
| 153 | VEC_DATA_TYPE(int, size) \ |
| 154 | x = a + (1 << (k_fractional_bits - 3)); \ |
| 155 | VEC_DATA_TYPE(int, size) \ |
| 156 | x2 = ASYMM_MULT(x, x, size); \ |
| 157 | VEC_DATA_TYPE(int, size) \ |
| 158 | x3 = ASYMM_MULT(x2, x, size); \ |
| 159 | VEC_DATA_TYPE(int, size) \ |
| 160 | x4 = ASYMM_MULT(x2, x2, size); \ |
| 161 | VEC_DATA_TYPE(int, size) \ |
| 162 | x4_over_4 = ASYMM_ROUNDING_DIVIDE_BY_POW2(x4, 2, size); \ |
| 163 | VEC_DATA_TYPE(int, size) \ |
| 164 | x4_over_24_plus_x3_over_6_plus_x2 = ASYMM_MULT((x4_over_4 + x3), constant_1_over_3, size) + x2; \ |
| 165 | VEC_DATA_TYPE(int, size) \ |
| 166 | x4_over_24_plus_x3_over_6_plus_x2_over_2 = ASYMM_ROUNDING_DIVIDE_BY_POW2(x4_over_24_plus_x3_over_6_plus_x2, 1, size); \ |
| 167 | return constant_term + ASYMM_MULT(constant_term, x + x4_over_24_plus_x3_over_6_plus_x2_over_2, size); \ |
| 168 | } |
Chunosov | d621bca | 2017-11-03 17:33:15 +0700 | [diff] [blame] | 169 | |
Giorgio Arena | b99f00d | 2018-02-14 10:40:16 +0000 | [diff] [blame] | 170 | /** Each bit of the result is set to the corresponding bit of either then_val or |
| 171 | * else_val depending on whether the corresponding bit of if_mask is set. |
| 172 | * Equivalent to the VBSL instruction in ARM NEON. |
| 173 | * |
| 174 | * @param[in] size Size of vector. |
| 175 | * |
| 176 | * @returns Result contaning bits from @p then_val or from @p else_val depending on corresponding bit in @p if_mask is set or not. |
| 177 | */ |
| 178 | #define ASYMM_SELECT_USING_MASK_IMPL(size) \ |
| 179 | inline VEC_DATA_TYPE(int, size) asymm_select_using_mask##size(VEC_DATA_TYPE(int, size) if_mask, VEC_DATA_TYPE(int, size) then_val, VEC_DATA_TYPE(int, size) else_val) \ |
| 180 | { \ |
| 181 | return (if_mask & then_val) ^ (~if_mask & else_val); \ |
| 182 | } |
| 183 | |
| 184 | /** For each element of input vector, the corresponding bits of the result item are set |
| 185 | * if the input item is zero. |
| 186 | * |
| 187 | * @param[in] size Size of vector. |
| 188 | * |
| 189 | * @returns Output vector with bits set when corresponding bit in @p a is zero. |
| 190 | */ |
| 191 | #define ASYMM_MASK_IF_ZERO_IMPL(size) \ |
| 192 | inline VEC_DATA_TYPE(int, size) asymm_mask_if_zero##size(VEC_DATA_TYPE(int, size) a) \ |
| 193 | { \ |
| 194 | const VEC_DATA_TYPE(int, size) all_zeros = 0; \ |
| 195 | const VEC_DATA_TYPE(int, size) all_ones = ~0; \ |
| 196 | return select(all_zeros, all_ones, a == 0); \ |
| 197 | } |
| 198 | |
| 199 | /** For each element of input vector, the corresponding bits of the result item are set |
| 200 | * if the input item is non-zero. |
| 201 | * |
| 202 | * @param[in] size Size of vector. |
| 203 | * |
| 204 | * @returns Output vector with bits set when corresponding bit in @p a is non zero. |
| 205 | */ |
| 206 | #define ASYMM_MASK_IF_NON_ZERO_IMPL(size) \ |
| 207 | inline VEC_DATA_TYPE(int, size) asymm_mask_if_non_zero##size(VEC_DATA_TYPE(int, size) a) \ |
| 208 | { \ |
| 209 | const VEC_DATA_TYPE(int, size) all_zeros = 0; \ |
| 210 | const VEC_DATA_TYPE(int, size) all_ones = ~0; \ |
| 211 | return select(all_zeros, all_ones, a != 0); \ |
| 212 | } |
| 213 | |
| 214 | #define EXP_BARREL_SHIFTER_IMPL(size) \ |
| 215 | inline VEC_DATA_TYPE(int, size) exp_barrel_shifter##size(VEC_DATA_TYPE(int, size) result, int exponent, int fp_multiplier, int k_integer_bits, int k_fractional_bits, VEC_DATA_TYPE(int, size) remainder) \ |
| 216 | { \ |
| 217 | if(k_integer_bits > exponent) \ |
| 218 | { \ |
| 219 | const int k_shift_amount = k_integer_bits > exponent ? k_fractional_bits + exponent : 0; \ |
| 220 | return ASYMM_SELECT_USING_MASK( \ |
| 221 | ASYMM_MASK_IF_NON_ZERO(remainder & (1 << k_shift_amount), size), \ |
| 222 | ASYMM_MULT(result, fp_multiplier, size), result, size); \ |
| 223 | } \ |
| 224 | \ |
| 225 | return result; \ |
| 226 | } |
| 227 | |
| 228 | /** Calculates \f$ exp(x) \f$ for x < 0. |
| 229 | * |
| 230 | * @param[in] size Size of vector. |
| 231 | * |
| 232 | * @return Result in fixed-point format Q0. |
| 233 | */ |
| 234 | #define ASYMM_EXP_ON_NEGATIVE_VALUES_IMPL(size) \ |
| 235 | inline VEC_DATA_TYPE(int, size) asymm_exp_on_negative_values##size(VEC_DATA_TYPE(int, size) a, int k_integer_bits) \ |
| 236 | { \ |
| 237 | const int k_fractional_bits = 31 - k_integer_bits; \ |
| 238 | VEC_DATA_TYPE(int, size) \ |
| 239 | k_one_quarter = 1 << (k_fractional_bits - 2); \ |
| 240 | VEC_DATA_TYPE(int, size) \ |
| 241 | mask = k_one_quarter - 1; \ |
| 242 | VEC_DATA_TYPE(int, size) \ |
| 243 | a_mod_quarter_minus_one_quarter = (a & mask) - k_one_quarter; \ |
| 244 | VEC_DATA_TYPE(int, size) \ |
| 245 | a_mod_quarter_minus_one_quarter_scaled = a_mod_quarter_minus_one_quarter << k_integer_bits; \ |
| 246 | VEC_DATA_TYPE(int, size) \ |
| 247 | result = ASYMM_EXP_ON_INTERVAL_BETWEEN_NEGATIVE_ONE_QUARTER_AND_0_EXCL(a_mod_quarter_minus_one_quarter_scaled, size); \ |
| 248 | VEC_DATA_TYPE(int, size) \ |
| 249 | remainder = a_mod_quarter_minus_one_quarter - a; \ |
| 250 | \ |
| 251 | result = EXP_BARREL_SHIFTER(result, -2, 1672461947, k_integer_bits, k_fractional_bits, remainder, size); \ |
| 252 | result = EXP_BARREL_SHIFTER(result, -1, 1302514674, k_integer_bits, k_fractional_bits, remainder, size); \ |
| 253 | result = EXP_BARREL_SHIFTER(result, +0, 790015084, k_integer_bits, k_fractional_bits, remainder, size); \ |
| 254 | result = EXP_BARREL_SHIFTER(result, +1, 290630308, k_integer_bits, k_fractional_bits, remainder, size); \ |
| 255 | result = EXP_BARREL_SHIFTER(result, +2, 39332535, k_integer_bits, k_fractional_bits, remainder, size); \ |
| 256 | result = EXP_BARREL_SHIFTER(result, +3, 720401, k_integer_bits, k_fractional_bits, remainder, size); \ |
| 257 | result = EXP_BARREL_SHIFTER(result, +4, 242, k_integer_bits, k_fractional_bits, remainder, size); \ |
| 258 | \ |
| 259 | if(k_integer_bits > 5) \ |
| 260 | { \ |
| 261 | const VEC_DATA_TYPE(int, size) clamp = -(1 << (k_fractional_bits + 5)); \ |
| 262 | result = ASYMM_SELECT_USING_MASK(ASYMM_MASK_IF_NON_ZERO(a < clamp, size), 0, result, size); \ |
| 263 | } \ |
| 264 | \ |
| 265 | const VEC_DATA_TYPE(int, size) Q0_one = INT_MAX; \ |
| 266 | return ASYMM_SELECT_USING_MASK(ASYMM_MASK_IF_ZERO(a, size), Q0_one, result, size); \ |
| 267 | } |
| 268 | |
| 269 | /** Calculates the product of a integer value by a power of two, with either a positive exponent |
| 270 | * (equivalent to an arithmetic left shift, saturating) or a negative exponent |
| 271 | * (equivalent to an arithmetic right shift, rounding to nearest). |
| 272 | * |
| 273 | * @param[in] size Size of vector. |
| 274 | * |
| 275 | * @return Arithmetic left or right shift. |
| 276 | */ |
| 277 | #define ASYMM_SATURATING_ROUNDING_MULT_BY_POW2_IMPL(size) \ |
| 278 | inline VEC_DATA_TYPE(int, size) asymm_saturating_rounding_mult_by_pow2##size(VEC_DATA_TYPE(int, size) x, int exponent) \ |
| 279 | { \ |
| 280 | if(exponent < 0) \ |
| 281 | { \ |
| 282 | return ASYMM_ROUNDING_DIVIDE_BY_POW2(x, -exponent, size); \ |
| 283 | } \ |
| 284 | \ |
| 285 | const VEC_DATA_TYPE(int, size) min = INT_MIN; \ |
| 286 | const VEC_DATA_TYPE(int, size) max = INT_MAX; \ |
| 287 | int threshold = ((1 << (31 - exponent)) - 1); \ |
| 288 | VEC_DATA_TYPE(int, size) \ |
| 289 | positive_mask = ASYMM_MASK_IF_NON_ZERO(x > threshold, size); \ |
| 290 | VEC_DATA_TYPE(int, size) \ |
| 291 | negative_mask = ASYMM_MASK_IF_NON_ZERO(x < -threshold, size); \ |
| 292 | VEC_DATA_TYPE(int, size) \ |
| 293 | result = x << exponent; \ |
| 294 | result = ASYMM_SELECT_USING_MASK(positive_mask, max, result, size); \ |
| 295 | result = ASYMM_SELECT_USING_MASK(negative_mask, min, result, size); \ |
| 296 | return result; \ |
| 297 | } |
| 298 | |
| 299 | /** Calculates (a+b)/2, rounded to the nearest integer. |
| 300 | * Equivalent to VRHADD in the ARM NEON instruction set. |
| 301 | * |
| 302 | * @param[in] size Size of vector. |
| 303 | * |
| 304 | * @return (a+b)/2, rounded to the nearest integer. |
| 305 | */ |
| 306 | #define ASYMM_ROUNDING_HALF_SUM_IMPL(size) \ |
| 307 | inline VEC_DATA_TYPE(int, size) asymm_rounding_half_sum##size(VEC_DATA_TYPE(int, size) a, VEC_DATA_TYPE(int, size) b) \ |
| 308 | { \ |
| 309 | VEC_DATA_TYPE(long, size) \ |
| 310 | a64 = convert_long##size(a); \ |
| 311 | VEC_DATA_TYPE(long, size) \ |
| 312 | b64 = convert_long##size(b); \ |
| 313 | VEC_DATA_TYPE(long, size) \ |
| 314 | sum = a64 + b64; \ |
| 315 | const VEC_DATA_TYPE(long, size) one = 1; \ |
| 316 | const VEC_DATA_TYPE(long, size) minus_one = -1; \ |
| 317 | VEC_DATA_TYPE(long, size) \ |
| 318 | sign = select(minus_one, one, sum >= 0); \ |
| 319 | return convert_int##size((sum + sign) / 2); \ |
| 320 | } |
| 321 | |
| 322 | /** Calculates \f$ 1 / (1 + x) \f$ for x in (0, 1). |
| 323 | * |
| 324 | * @param[in] size Size of vector. |
| 325 | * |
| 326 | * @return Result in fixed-point format Q0. |
| 327 | */ |
| 328 | #define ASYMM_ONE_OVER_ONE_PLUS_X_FOR_X_IN_0_1_IMPL(size) \ |
| 329 | inline VEC_DATA_TYPE(int, size) asymm_one_over_one_plus_x_for_x_in_0_1##size(VEC_DATA_TYPE(int, size) a) \ |
| 330 | { \ |
| 331 | const VEC_DATA_TYPE(int, size) Q0_one = INT_MAX; \ |
| 332 | const VEC_DATA_TYPE(int, size) Q2_one = 1 << (31 - 2); \ |
| 333 | VEC_DATA_TYPE(int, size) \ |
| 334 | half_denominator = ASYMM_ROUNDING_HALF_SUM(a, Q0_one, size); \ |
| 335 | const VEC_DATA_TYPE(int, size) Q2_48_over_17 = 1515870810; \ |
| 336 | const VEC_DATA_TYPE(int, size) Q2_neg_32_over_17 = -1010580540; \ |
| 337 | VEC_DATA_TYPE(int, size) \ |
| 338 | x = Q2_48_over_17 + ASYMM_MULT(half_denominator, Q2_neg_32_over_17, size); \ |
| 339 | for(int i = 0; i < 3; i++) \ |
| 340 | { \ |
| 341 | VEC_DATA_TYPE(int, size) \ |
| 342 | half_denominator_times_x = ASYMM_MULT(half_denominator, x, size); \ |
| 343 | VEC_DATA_TYPE(int, size) \ |
| 344 | one_minus_half_denominator_times_x = Q2_one - half_denominator_times_x; \ |
| 345 | VEC_DATA_TYPE(int, size) \ |
| 346 | tmp = ASYMM_MULT(x, one_minus_half_denominator_times_x, size); \ |
| 347 | x = x + ASYMM_SATURATING_ROUNDING_MULT_BY_POW2(tmp, 2, size); \ |
| 348 | } \ |
| 349 | return ASYMM_SATURATING_ROUNDING_MULT_BY_POW2(x, 1, size); \ |
| 350 | } |
| 351 | |
| 352 | /** Considering the integer value as fixed-point, change the number of integer bits and update value accordingly. |
| 353 | * |
| 354 | * @param[in] size Size of vector. |
| 355 | * |
| 356 | * @return Rescaled value. |
| 357 | */ |
| 358 | #define ASYMM_RESCALE_IMPL(size) \ |
| 359 | inline VEC_DATA_TYPE(int, size) asymm_rescale##size(VEC_DATA_TYPE(int, size) value, int src_integer_bits, int dst_integer_bits) \ |
| 360 | { \ |
| 361 | int exponent = src_integer_bits - dst_integer_bits; \ |
| 362 | return ASYMM_SATURATING_ROUNDING_MULT_BY_POW2(value, exponent, size); \ |
| 363 | } |
| 364 | |
Michele Di Giorgio | 4aff98f | 2019-08-28 16:27:26 +0100 | [diff] [blame] | 365 | #define QUANTIZE_STR(input, offset, scale, type, size) quantize_##type##size(input, offset, scale) |
| 366 | #define QUANTIZE(input, offset, scale, type, size) QUANTIZE_STR(input, offset, scale, type, size) |
| 367 | #define DEQUANTIZE_STR(input, offset, scale, type, size) dequantize_##type##size(input, offset, scale) |
| 368 | #define DEQUANTIZE(input, offset, scale, type, size) DEQUANTIZE_STR(input, offset, scale, type, size) |
| 369 | |
Giorgio Arena | b99f00d | 2018-02-14 10:40:16 +0000 | [diff] [blame] | 370 | #define ASYMM_ROUNDING_DIVIDE_BY_POW2(x, exponent, size) asymm_rounding_divide_by_POW2_##size(x, exponent) |
Chunosov | d621bca | 2017-11-03 17:33:15 +0700 | [diff] [blame] | 371 | #define ASYMM_MULT(a, b, size) asymm_mult##size(a, b) |
Chunosov | d621bca | 2017-11-03 17:33:15 +0700 | [diff] [blame] | 372 | #define ASYMM_MULT_BY_QUANT_MULTIPLIER_LESS_THAN_ONE(x, quantized_multiplier, right_shift, size) \ |
| 373 | ASYMM_ROUNDING_DIVIDE_BY_POW2(ASYMM_MULT(x, quantized_multiplier, size), right_shift, size) |
Giorgio Arena | b99f00d | 2018-02-14 10:40:16 +0000 | [diff] [blame] | 374 | #define ASYMM_EXP_ON_INTERVAL_BETWEEN_NEGATIVE_ONE_QUARTER_AND_0_EXCL(a, size) asymm_exp_on_interval_between_negative_one_quarter_and_0_excl##size(a) |
| 375 | #define ASYMM_SELECT_USING_MASK(if_mask, then_val, else_val, size) asymm_select_using_mask##size(if_mask, then_val, else_val) |
| 376 | #define ASYMM_MASK_IF_ZERO(a, size) asymm_mask_if_zero##size(a) |
| 377 | #define ASYMM_MASK_IF_NON_ZERO(a, size) asymm_mask_if_non_zero##size(a) |
| 378 | #define EXP_BARREL_SHIFTER(result, exponent, fp_multiplier, k_integer_bits, k_fractional_bits, remainder, size) exp_barrel_shifter##size(result, exponent, fp_multiplier, k_integer_bits, k_fractional_bits, remainder) |
| 379 | #define ASYMM_EXP_ON_NEGATIVE_VALUES(a, k_integer_bits, size) asymm_exp_on_negative_values##size(a, k_integer_bits) |
| 380 | #define ASYMM_ONE_OVER_ONE_PLUS_X_FOR_X_IN_0_1(a, size) asymm_one_over_one_plus_x_for_x_in_0_1##size(a) |
| 381 | #define ASYMM_SATURATING_ROUNDING_MULT_BY_POW2(x, exponent, size) asymm_saturating_rounding_mult_by_pow2##size(x, exponent) |
| 382 | #define ASYMM_ROUNDING_HALF_SUM(a, b, size) asymm_rounding_half_sum##size(a, b) |
| 383 | #define ASYMM_RESCALE(value, src_integer_bits, dst_integer_bits, size) asymm_rescale##size(value, src_integer_bits, dst_integer_bits) |
Chunosov | d621bca | 2017-11-03 17:33:15 +0700 | [diff] [blame] | 384 | |
Michele Di Giorgio | 4aff98f | 2019-08-28 16:27:26 +0100 | [diff] [blame] | 385 | QUANTIZE_IMPL(uchar, 4) |
| 386 | QUANTIZE_IMPL(ushort, 4) |
Michele Di Giorgio | 6b612f5 | 2019-09-05 12:30:22 +0100 | [diff] [blame] | 387 | QUANTIZE_IMPL(short, 4) |
Michele Di Giorgio | 4aff98f | 2019-08-28 16:27:26 +0100 | [diff] [blame] | 388 | |
| 389 | DEQUANTIZE_IMPL(uchar, 4) |
| 390 | DEQUANTIZE_IMPL(ushort, 4) |
Michele Di Giorgio | 6b612f5 | 2019-09-05 12:30:22 +0100 | [diff] [blame] | 391 | DEQUANTIZE_IMPL(short, 4) |
Michele Di Giorgio | 4aff98f | 2019-08-28 16:27:26 +0100 | [diff] [blame] | 392 | |
Michele Di Giorgio | a046e16 | 2019-10-08 09:36:26 +0100 | [diff] [blame] | 393 | ASYMM_ROUNDING_DIVIDE_BY_POW2_IMPL(1) |
Giorgio Arena | b99f00d | 2018-02-14 10:40:16 +0000 | [diff] [blame] | 394 | ASYMM_ROUNDING_DIVIDE_BY_POW2_IMPL(2) |
| 395 | ASYMM_ROUNDING_DIVIDE_BY_POW2_IMPL(4) |
| 396 | ASYMM_ROUNDING_DIVIDE_BY_POW2_IMPL(8) |
| 397 | ASYMM_ROUNDING_DIVIDE_BY_POW2_IMPL(16) |
| 398 | |
Michele Di Giorgio | a046e16 | 2019-10-08 09:36:26 +0100 | [diff] [blame] | 399 | ASYMM_MULT_IMPL(1) |
Giorgio Arena | b99f00d | 2018-02-14 10:40:16 +0000 | [diff] [blame] | 400 | ASYMM_MULT_IMPL(2) |
| 401 | ASYMM_MULT_IMPL(4) |
| 402 | ASYMM_MULT_IMPL(8) |
| 403 | ASYMM_MULT_IMPL(16) |
| 404 | |
| 405 | ASYMM_EXP_ON_INTERVAL_BETWEEN_NEGATIVE_ONE_QUARTER_AND_0_EXCL_IMPL(2) |
| 406 | ASYMM_EXP_ON_INTERVAL_BETWEEN_NEGATIVE_ONE_QUARTER_AND_0_EXCL_IMPL(4) |
| 407 | ASYMM_EXP_ON_INTERVAL_BETWEEN_NEGATIVE_ONE_QUARTER_AND_0_EXCL_IMPL(8) |
| 408 | ASYMM_EXP_ON_INTERVAL_BETWEEN_NEGATIVE_ONE_QUARTER_AND_0_EXCL_IMPL(16) |
| 409 | |
| 410 | ASYMM_SELECT_USING_MASK_IMPL(2) |
| 411 | ASYMM_SELECT_USING_MASK_IMPL(4) |
| 412 | ASYMM_SELECT_USING_MASK_IMPL(8) |
| 413 | ASYMM_SELECT_USING_MASK_IMPL(16) |
| 414 | |
| 415 | ASYMM_MASK_IF_ZERO_IMPL(2) |
| 416 | ASYMM_MASK_IF_ZERO_IMPL(4) |
| 417 | ASYMM_MASK_IF_ZERO_IMPL(8) |
| 418 | ASYMM_MASK_IF_ZERO_IMPL(16) |
| 419 | |
| 420 | ASYMM_MASK_IF_NON_ZERO_IMPL(2) |
| 421 | ASYMM_MASK_IF_NON_ZERO_IMPL(4) |
| 422 | ASYMM_MASK_IF_NON_ZERO_IMPL(8) |
| 423 | ASYMM_MASK_IF_NON_ZERO_IMPL(16) |
| 424 | |
| 425 | EXP_BARREL_SHIFTER_IMPL(2) |
| 426 | EXP_BARREL_SHIFTER_IMPL(4) |
| 427 | EXP_BARREL_SHIFTER_IMPL(8) |
| 428 | EXP_BARREL_SHIFTER_IMPL(16) |
| 429 | |
| 430 | ASYMM_EXP_ON_NEGATIVE_VALUES_IMPL(2) |
| 431 | ASYMM_EXP_ON_NEGATIVE_VALUES_IMPL(4) |
| 432 | ASYMM_EXP_ON_NEGATIVE_VALUES_IMPL(8) |
| 433 | ASYMM_EXP_ON_NEGATIVE_VALUES_IMPL(16) |
| 434 | |
| 435 | ASYMM_SATURATING_ROUNDING_MULT_BY_POW2_IMPL(2) |
| 436 | ASYMM_SATURATING_ROUNDING_MULT_BY_POW2_IMPL(4) |
| 437 | ASYMM_SATURATING_ROUNDING_MULT_BY_POW2_IMPL(8) |
| 438 | ASYMM_SATURATING_ROUNDING_MULT_BY_POW2_IMPL(16) |
| 439 | |
| 440 | ASYMM_ROUNDING_HALF_SUM_IMPL(2) |
| 441 | ASYMM_ROUNDING_HALF_SUM_IMPL(4) |
| 442 | ASYMM_ROUNDING_HALF_SUM_IMPL(8) |
| 443 | ASYMM_ROUNDING_HALF_SUM_IMPL(16) |
| 444 | |
| 445 | ASYMM_ONE_OVER_ONE_PLUS_X_FOR_X_IN_0_1_IMPL(2) |
| 446 | ASYMM_ONE_OVER_ONE_PLUS_X_FOR_X_IN_0_1_IMPL(4) |
| 447 | ASYMM_ONE_OVER_ONE_PLUS_X_FOR_X_IN_0_1_IMPL(8) |
| 448 | ASYMM_ONE_OVER_ONE_PLUS_X_FOR_X_IN_0_1_IMPL(16) |
| 449 | |
| 450 | ASYMM_RESCALE_IMPL(2) |
| 451 | ASYMM_RESCALE_IMPL(4) |
| 452 | ASYMM_RESCALE_IMPL(8) |
| 453 | ASYMM_RESCALE_IMPL(16) |
| 454 | |
Michele Di Giorgio | 4aff98f | 2019-08-28 16:27:26 +0100 | [diff] [blame] | 455 | #endif // ARM_COMPUTE_HELPERS_ASYMM_H |