blob: 36d0256843f44e2e21cff90a186bc01d17698473 [file] [log] [blame]
Anthony Barbier6ff3b192017-09-04 18:44:23 +01001/*******************************************************************************
Sheri Zhang79cb9452021-09-07 14:51:49 +01002 * Copyright (c) 2008-2020 The Khronos Group Inc.
Anthony Barbier6ff3b192017-09-04 18:44:23 +01003 *
Sheri Zhang79cb9452021-09-07 14:51:49 +01004 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
Anthony Barbier6ff3b192017-09-04 18:44:23 +01007 *
Sheri Zhang79cb9452021-09-07 14:51:49 +01008 * http://www.apache.org/licenses/LICENSE-2.0
Anthony Barbier6ff3b192017-09-04 18:44:23 +01009 *
Sheri Zhang79cb9452021-09-07 14:51:49 +010010 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
Anthony Barbier6ff3b192017-09-04 18:44:23 +010015 ******************************************************************************/
16
Anthony Barbier6ff3b192017-09-04 18:44:23 +010017/* cl_ext.h contains OpenCL extensions which don't have external */
18/* (OpenGL, D3D) dependencies. */
19
20#ifndef __CL_EXT_H
21#define __CL_EXT_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
Sheri Zhang67354e02021-06-30 16:08:29 +010027#include <CL/cl.h>
Anthony Barbier8b2fdc92018-08-09 11:42:38 +010028
29/* cl_khr_fp64 extension - no extension #define since it has no functions */
30/* CL_DEVICE_DOUBLE_FP_CONFIG is defined in CL.h for OpenCL >= 120 */
31
32#if CL_TARGET_OPENCL_VERSION <= 110
33#define CL_DEVICE_DOUBLE_FP_CONFIG 0x1032
Anthony Barbier6ff3b192017-09-04 18:44:23 +010034#endif
35
36/* cl_khr_fp16 extension - no extension #define since it has no functions */
37#define CL_DEVICE_HALF_FP_CONFIG 0x1033
38
39/* Memory object destruction
40 *
41 * Apple extension for use to manage externally allocated buffers used with cl_mem objects with CL_MEM_USE_HOST_PTR
42 *
Anthony Barbier8b2fdc92018-08-09 11:42:38 +010043 * Registers a user callback function that will be called when the memory object is deleted and its resources
44 * freed. Each call to clSetMemObjectCallbackFn registers the specified user callback function on a callback
45 * stack associated with memobj. The registered user callback functions are called in the reverse order in
46 * which they were registered. The user callback functions are called and then the memory object is deleted
47 * and its resources freed. This provides a mechanism for the application (and libraries) using memobj to be
48 * notified when the memory referenced by host_ptr, specified when the memory object is created and used as
Anthony Barbier6ff3b192017-09-04 18:44:23 +010049 * the storage bits for the memory object, can be reused or freed.
50 *
51 * The application may not call CL api's with the cl_mem object passed to the pfn_notify.
52 *
53 * Please check for the "cl_APPLE_SetMemObjectDestructor" extension using clGetDeviceInfo(CL_DEVICE_EXTENSIONS)
54 * before using.
55 */
56#define cl_APPLE_SetMemObjectDestructor 1
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +000057extern CL_API_ENTRY cl_int CL_API_CALL clSetMemObjectDestructorAPPLE( cl_mem memobj,
Sheri Zhang67354e02021-06-30 16:08:29 +010058 void (* pfn_notify)(cl_mem memobj, void * user_data),
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +000059 void * user_data) CL_API_SUFFIX__VERSION_1_0;
Anthony Barbier6ff3b192017-09-04 18:44:23 +010060
61
62/* Context Logging Functions
63 *
64 * The next three convenience functions are intended to be used as the pfn_notify parameter to clCreateContext().
65 * Please check for the "cl_APPLE_ContextLoggingFunctions" extension using clGetDeviceInfo(CL_DEVICE_EXTENSIONS)
66 * before using.
67 *
Sheri Zhang67354e02021-06-30 16:08:29 +010068 * clLogMessagesToSystemLog forwards on all log messages to the Apple System Logger
Anthony Barbier6ff3b192017-09-04 18:44:23 +010069 */
70#define cl_APPLE_ContextLoggingFunctions 1
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +000071extern CL_API_ENTRY void CL_API_CALL clLogMessagesToSystemLogAPPLE( const char * errstr,
Sheri Zhang67354e02021-06-30 16:08:29 +010072 const void * private_info,
73 size_t cb,
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +000074 void * user_data) CL_API_SUFFIX__VERSION_1_0;
Anthony Barbier6ff3b192017-09-04 18:44:23 +010075
76/* clLogMessagesToStdout sends all log messages to the file descriptor stdout */
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +000077extern CL_API_ENTRY void CL_API_CALL clLogMessagesToStdoutAPPLE( const char * errstr,
Sheri Zhang67354e02021-06-30 16:08:29 +010078 const void * private_info,
79 size_t cb,
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +000080 void * user_data) CL_API_SUFFIX__VERSION_1_0;
Anthony Barbier6ff3b192017-09-04 18:44:23 +010081
82/* clLogMessagesToStderr sends all log messages to the file descriptor stderr */
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +000083extern CL_API_ENTRY void CL_API_CALL clLogMessagesToStderrAPPLE( const char * errstr,
Sheri Zhang67354e02021-06-30 16:08:29 +010084 const void * private_info,
85 size_t cb,
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +000086 void * user_data) CL_API_SUFFIX__VERSION_1_0;
Anthony Barbier6ff3b192017-09-04 18:44:23 +010087
88
Anthony Barbier8b2fdc92018-08-09 11:42:38 +010089/************************
90* cl_khr_icd extension *
Anthony Barbier6ff3b192017-09-04 18:44:23 +010091************************/
92#define cl_khr_icd 1
93
94/* cl_platform_info */
95#define CL_PLATFORM_ICD_SUFFIX_KHR 0x0920
96
97/* Additional Error Codes */
98#define CL_PLATFORM_NOT_FOUND_KHR -1001
99
100extern CL_API_ENTRY cl_int CL_API_CALL
Sheri Zhang67354e02021-06-30 16:08:29 +0100101clIcdGetPlatformIDsKHR(cl_uint num_entries,
102 cl_platform_id * platforms,
103 cl_uint * num_platforms);
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100104
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000105typedef cl_int
Sheri Zhang67354e02021-06-30 16:08:29 +0100106(CL_API_CALL *clIcdGetPlatformIDsKHR_fn)(cl_uint num_entries,
107 cl_platform_id * platforms,
108 cl_uint * num_platforms);
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100109
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100110
111/*******************************
112 * cl_khr_il_program extension *
113 *******************************/
114#define cl_khr_il_program 1
115
116/* New property to clGetDeviceInfo for retrieving supported intermediate
117 * languages
118 */
119#define CL_DEVICE_IL_VERSION_KHR 0x105B
120
121/* New property to clGetProgramInfo for retrieving for retrieving the IL of a
122 * program
123 */
124#define CL_PROGRAM_IL_KHR 0x1169
125
Sheri Zhang67354e02021-06-30 16:08:29 +0100126extern CL_API_ENTRY cl_program CL_API_CALL
127clCreateProgramWithILKHR(cl_context context,
128 const void * il,
129 size_t length,
130 cl_int * errcode_ret);
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100131
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000132typedef cl_program
Sheri Zhang67354e02021-06-30 16:08:29 +0100133(CL_API_CALL *clCreateProgramWithILKHR_fn)(cl_context context,
134 const void * il,
135 size_t length,
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000136 cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_2;
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100137
Sheri Zhang67354e02021-06-30 16:08:29 +0100138/* Extension: cl_khr_image2d_from_buffer
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100139 *
Sheri Zhang67354e02021-06-30 16:08:29 +0100140 * This extension allows a 2D image to be created from a cl_mem buffer without
141 * a copy. The type associated with a 2D image created from a buffer in an
142 * OpenCL program is image2d_t. Both the sampler and sampler-less read_image
143 * built-in functions are supported for 2D images and 2D images created from
144 * a buffer. Similarly, the write_image built-ins are also supported for 2D
145 * images created from a buffer.
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100146 *
Sheri Zhang67354e02021-06-30 16:08:29 +0100147 * When the 2D image from buffer is created, the client must specify the
148 * width, height, image format (i.e. channel order and channel data type)
149 * and optionally the row pitch.
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100150 *
Sheri Zhang67354e02021-06-30 16:08:29 +0100151 * The pitch specified must be a multiple of
152 * CL_DEVICE_IMAGE_PITCH_ALIGNMENT_KHR pixels.
153 * The base address of the buffer must be aligned to
154 * CL_DEVICE_IMAGE_BASE_ADDRESS_ALIGNMENT_KHR pixels.
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100155 */
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100156
Sheri Zhang67354e02021-06-30 16:08:29 +0100157#define CL_DEVICE_IMAGE_PITCH_ALIGNMENT_KHR 0x104A
158#define CL_DEVICE_IMAGE_BASE_ADDRESS_ALIGNMENT_KHR 0x104B
159
160
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100161/**************************************
162 * cl_khr_initialize_memory extension *
163 **************************************/
164
Pablo Telloe86a09f2018-01-11 15:44:48 +0000165#define CL_CONTEXT_MEMORY_INITIALIZE_KHR 0x2030
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100166
167
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100168/**************************************
169 * cl_khr_terminate_context extension *
170 **************************************/
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100171
Sheri Zhang79cb9452021-09-07 14:51:49 +0100172#define CL_CONTEXT_TERMINATED_KHR -1121
173
Pablo Telloe86a09f2018-01-11 15:44:48 +0000174#define CL_DEVICE_TERMINATE_CAPABILITY_KHR 0x2031
175#define CL_CONTEXT_TERMINATE_KHR 0x2032
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100176
177#define cl_khr_terminate_context 1
Sheri Zhang67354e02021-06-30 16:08:29 +0100178extern CL_API_ENTRY cl_int CL_API_CALL
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000179clTerminateContextKHR(cl_context context) CL_API_SUFFIX__VERSION_1_2;
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100180
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000181typedef cl_int
182(CL_API_CALL *clTerminateContextKHR_fn)(cl_context context) CL_API_SUFFIX__VERSION_1_2;
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100183
184
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100185/*
186 * Extension: cl_khr_spir
187 *
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100188 * This extension adds support to create an OpenCL program object from a
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100189 * Standard Portable Intermediate Representation (SPIR) instance
190 */
191
192#define CL_DEVICE_SPIR_VERSIONS 0x40E0
193#define CL_PROGRAM_BINARY_TYPE_INTERMEDIATE 0x40E1
194
195
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100196/*****************************************
197 * cl_khr_create_command_queue extension *
198 *****************************************/
199#define cl_khr_create_command_queue 1
200
Sheri Zhang79cb9452021-09-07 14:51:49 +0100201typedef cl_properties cl_queue_properties_khr;
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100202
203extern CL_API_ENTRY cl_command_queue CL_API_CALL
Sheri Zhang67354e02021-06-30 16:08:29 +0100204clCreateCommandQueueWithPropertiesKHR(cl_context context,
205 cl_device_id device,
206 const cl_queue_properties_khr* properties,
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000207 cl_int* errcode_ret) CL_API_SUFFIX__VERSION_1_2;
Sheri Zhang67354e02021-06-30 16:08:29 +0100208
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000209typedef cl_command_queue
Sheri Zhang67354e02021-06-30 16:08:29 +0100210(CL_API_CALL *clCreateCommandQueueWithPropertiesKHR_fn)(cl_context context,
211 cl_device_id device,
212 const cl_queue_properties_khr* properties,
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000213 cl_int* errcode_ret) CL_API_SUFFIX__VERSION_1_2;
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100214
215
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100216/******************************************
217* cl_nv_device_attribute_query extension *
218******************************************/
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100219
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100220/* cl_nv_device_attribute_query extension - no extension #define since it has no functions */
221#define CL_DEVICE_COMPUTE_CAPABILITY_MAJOR_NV 0x4000
222#define CL_DEVICE_COMPUTE_CAPABILITY_MINOR_NV 0x4001
223#define CL_DEVICE_REGISTERS_PER_BLOCK_NV 0x4002
224#define CL_DEVICE_WARP_SIZE_NV 0x4003
225#define CL_DEVICE_GPU_OVERLAP_NV 0x4004
226#define CL_DEVICE_KERNEL_EXEC_TIMEOUT_NV 0x4005
227#define CL_DEVICE_INTEGRATED_MEMORY_NV 0x4006
228
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100229
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100230/*********************************
231* cl_amd_device_attribute_query *
232*********************************/
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100233
Sheri Zhang79cb9452021-09-07 14:51:49 +0100234#define CL_DEVICE_PROFILING_TIMER_OFFSET_AMD 0x4036
235#define CL_DEVICE_TOPOLOGY_AMD 0x4037
236#define CL_DEVICE_BOARD_NAME_AMD 0x4038
237#define CL_DEVICE_GLOBAL_FREE_MEMORY_AMD 0x4039
238#define CL_DEVICE_SIMD_PER_COMPUTE_UNIT_AMD 0x4040
239#define CL_DEVICE_SIMD_WIDTH_AMD 0x4041
240#define CL_DEVICE_SIMD_INSTRUCTION_WIDTH_AMD 0x4042
241#define CL_DEVICE_WAVEFRONT_WIDTH_AMD 0x4043
242#define CL_DEVICE_GLOBAL_MEM_CHANNELS_AMD 0x4044
243#define CL_DEVICE_GLOBAL_MEM_CHANNEL_BANKS_AMD 0x4045
244#define CL_DEVICE_GLOBAL_MEM_CHANNEL_BANK_WIDTH_AMD 0x4046
245#define CL_DEVICE_LOCAL_MEM_SIZE_PER_COMPUTE_UNIT_AMD 0x4047
246#define CL_DEVICE_LOCAL_MEM_BANKS_AMD 0x4048
247#define CL_DEVICE_THREAD_TRACE_SUPPORTED_AMD 0x4049
248#define CL_DEVICE_GFXIP_MAJOR_AMD 0x404A
249#define CL_DEVICE_GFXIP_MINOR_AMD 0x404B
250#define CL_DEVICE_AVAILABLE_ASYNC_QUEUES_AMD 0x404C
251#define CL_DEVICE_PREFERRED_WORK_GROUP_SIZE_AMD 0x4030
252#define CL_DEVICE_MAX_WORK_GROUP_SIZE_AMD 0x4031
253#define CL_DEVICE_PREFERRED_CONSTANT_BUFFER_SIZE_AMD 0x4033
254#define CL_DEVICE_PCIE_ID_AMD 0x4034
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100255
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100256
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100257/*********************************
258* cl_arm_printf extension
259*********************************/
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100260
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100261#define CL_PRINTF_CALLBACK_ARM 0x40B0
262#define CL_PRINTF_BUFFERSIZE_ARM 0x40B1
263
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100264
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100265/***********************************
266* cl_ext_device_fission extension
267***********************************/
268#define cl_ext_device_fission 1
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100269
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100270extern CL_API_ENTRY cl_int CL_API_CALL
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000271clReleaseDeviceEXT(cl_device_id device) CL_API_SUFFIX__VERSION_1_1;
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100272
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000273typedef cl_int
274(CL_API_CALL *clReleaseDeviceEXT_fn)(cl_device_id device) CL_API_SUFFIX__VERSION_1_1;
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100275
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100276extern CL_API_ENTRY cl_int CL_API_CALL
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000277clRetainDeviceEXT(cl_device_id device) CL_API_SUFFIX__VERSION_1_1;
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100278
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000279typedef cl_int
280(CL_API_CALL *clRetainDeviceEXT_fn)(cl_device_id device) CL_API_SUFFIX__VERSION_1_1;
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100281
282typedef cl_ulong cl_device_partition_property_ext;
283extern CL_API_ENTRY cl_int CL_API_CALL
Sheri Zhang67354e02021-06-30 16:08:29 +0100284clCreateSubDevicesEXT(cl_device_id in_device,
285 const cl_device_partition_property_ext * properties,
286 cl_uint num_entries,
287 cl_device_id * out_devices,
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000288 cl_uint * num_devices) CL_API_SUFFIX__VERSION_1_1;
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100289
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000290typedef cl_int
Sheri Zhang67354e02021-06-30 16:08:29 +0100291(CL_API_CALL * clCreateSubDevicesEXT_fn)(cl_device_id in_device,
292 const cl_device_partition_property_ext * properties,
293 cl_uint num_entries,
294 cl_device_id * out_devices,
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000295 cl_uint * num_devices) CL_API_SUFFIX__VERSION_1_1;
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100296
297/* cl_device_partition_property_ext */
298#define CL_DEVICE_PARTITION_EQUALLY_EXT 0x4050
299#define CL_DEVICE_PARTITION_BY_COUNTS_EXT 0x4051
300#define CL_DEVICE_PARTITION_BY_NAMES_EXT 0x4052
301#define CL_DEVICE_PARTITION_BY_AFFINITY_DOMAIN_EXT 0x4053
302
303/* clDeviceGetInfo selectors */
304#define CL_DEVICE_PARENT_DEVICE_EXT 0x4054
305#define CL_DEVICE_PARTITION_TYPES_EXT 0x4055
306#define CL_DEVICE_AFFINITY_DOMAINS_EXT 0x4056
307#define CL_DEVICE_REFERENCE_COUNT_EXT 0x4057
308#define CL_DEVICE_PARTITION_STYLE_EXT 0x4058
309
310/* error codes */
311#define CL_DEVICE_PARTITION_FAILED_EXT -1057
312#define CL_INVALID_PARTITION_COUNT_EXT -1058
313#define CL_INVALID_PARTITION_NAME_EXT -1059
314
315/* CL_AFFINITY_DOMAINs */
316#define CL_AFFINITY_DOMAIN_L1_CACHE_EXT 0x1
317#define CL_AFFINITY_DOMAIN_L2_CACHE_EXT 0x2
318#define CL_AFFINITY_DOMAIN_L3_CACHE_EXT 0x3
319#define CL_AFFINITY_DOMAIN_L4_CACHE_EXT 0x4
320#define CL_AFFINITY_DOMAIN_NUMA_EXT 0x10
321#define CL_AFFINITY_DOMAIN_NEXT_FISSIONABLE_EXT 0x100
322
323/* cl_device_partition_property_ext list terminators */
324#define CL_PROPERTIES_LIST_END_EXT ((cl_device_partition_property_ext) 0)
325#define CL_PARTITION_BY_COUNTS_LIST_END_EXT ((cl_device_partition_property_ext) 0)
326#define CL_PARTITION_BY_NAMES_LIST_END_EXT ((cl_device_partition_property_ext) 0 - 1)
327
328
329/***********************************
330 * cl_ext_migrate_memobject extension definitions
331 ***********************************/
332#define cl_ext_migrate_memobject 1
333
334typedef cl_bitfield cl_mem_migration_flags_ext;
335
336#define CL_MIGRATE_MEM_OBJECT_HOST_EXT 0x1
337
338#define CL_COMMAND_MIGRATE_MEM_OBJECT_EXT 0x4040
339
340extern CL_API_ENTRY cl_int CL_API_CALL
Sheri Zhang67354e02021-06-30 16:08:29 +0100341clEnqueueMigrateMemObjectEXT(cl_command_queue command_queue,
342 cl_uint num_mem_objects,
343 const cl_mem * mem_objects,
344 cl_mem_migration_flags_ext flags,
345 cl_uint num_events_in_wait_list,
346 const cl_event * event_wait_list,
347 cl_event * event);
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100348
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000349typedef cl_int
Sheri Zhang67354e02021-06-30 16:08:29 +0100350(CL_API_CALL *clEnqueueMigrateMemObjectEXT_fn)(cl_command_queue command_queue,
351 cl_uint num_mem_objects,
352 const cl_mem * mem_objects,
353 cl_mem_migration_flags_ext flags,
354 cl_uint num_events_in_wait_list,
355 const cl_event * event_wait_list,
356 cl_event * event);
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100357
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100358
359/*********************************
Sheri Zhang79cb9452021-09-07 14:51:49 +0100360* cl_ext_cxx_for_opencl extension
361*********************************/
362#define cl_ext_cxx_for_opencl 1
363
364#define CL_DEVICE_CXX_FOR_OPENCL_NUMERIC_VERSION_EXT 0x4230
365
366/*********************************
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100367* cl_qcom_ext_host_ptr extension
368*********************************/
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100369#define cl_qcom_ext_host_ptr 1
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100370
371#define CL_MEM_EXT_HOST_PTR_QCOM (1 << 29)
372
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100373#define CL_DEVICE_EXT_MEM_PADDING_IN_BYTES_QCOM 0x40A0
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100374#define CL_DEVICE_PAGE_SIZE_QCOM 0x40A1
375#define CL_IMAGE_ROW_ALIGNMENT_QCOM 0x40A2
376#define CL_IMAGE_SLICE_ALIGNMENT_QCOM 0x40A3
377#define CL_MEM_HOST_UNCACHED_QCOM 0x40A4
378#define CL_MEM_HOST_WRITEBACK_QCOM 0x40A5
379#define CL_MEM_HOST_WRITETHROUGH_QCOM 0x40A6
380#define CL_MEM_HOST_WRITE_COMBINING_QCOM 0x40A7
381
382typedef cl_uint cl_image_pitch_info_qcom;
383
384extern CL_API_ENTRY cl_int CL_API_CALL
385clGetDeviceImageInfoQCOM(cl_device_id device,
386 size_t image_width,
387 size_t image_height,
388 const cl_image_format *image_format,
389 cl_image_pitch_info_qcom param_name,
390 size_t param_value_size,
391 void *param_value,
392 size_t *param_value_size_ret);
393
394typedef struct _cl_mem_ext_host_ptr
395{
396 /* Type of external memory allocation. */
397 /* Legal values will be defined in layered extensions. */
398 cl_uint allocation_type;
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100399
Pablo Telloe86a09f2018-01-11 15:44:48 +0000400 /* Host cache policy for this external memory allocation. */
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100401 cl_uint host_cache_policy;
402
403} cl_mem_ext_host_ptr;
404
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100405
406/*******************************************
407* cl_qcom_ext_host_ptr_iocoherent extension
408********************************************/
409
410/* Cache policy specifying io-coherence */
411#define CL_MEM_HOST_IOCOHERENT_QCOM 0x40A9
412
413
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100414/*********************************
415* cl_qcom_ion_host_ptr extension
416*********************************/
417
418#define CL_MEM_ION_HOST_PTR_QCOM 0x40A8
419
420typedef struct _cl_mem_ion_host_ptr
421{
422 /* Type of external memory allocation. */
423 /* Must be CL_MEM_ION_HOST_PTR_QCOM for ION allocations. */
424 cl_mem_ext_host_ptr ext_host_ptr;
425
426 /* ION file descriptor */
427 int ion_filedesc;
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100428
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100429 /* Host pointer to the ION allocated memory */
430 void* ion_hostptr;
431
432} cl_mem_ion_host_ptr;
433
Anthony Barbier6ff3b192017-09-04 18:44:23 +0100434
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100435/*********************************
436* cl_qcom_android_native_buffer_host_ptr extension
437*********************************/
438
439#define CL_MEM_ANDROID_NATIVE_BUFFER_HOST_PTR_QCOM 0x40C6
440
441typedef struct _cl_mem_android_native_buffer_host_ptr
442{
443 /* Type of external memory allocation. */
444 /* Must be CL_MEM_ANDROID_NATIVE_BUFFER_HOST_PTR_QCOM for Android native buffers. */
445 cl_mem_ext_host_ptr ext_host_ptr;
446
447 /* Virtual pointer to the android native buffer */
448 void* anb_ptr;
449
450} cl_mem_android_native_buffer_host_ptr;
451
Pablo Telloe86a09f2018-01-11 15:44:48 +0000452
453/******************************************
454 * cl_img_yuv_image extension *
455 ******************************************/
456
457/* Image formats used in clCreateImage */
458#define CL_NV21_IMG 0x40D0
459#define CL_YV12_IMG 0x40D1
460
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100461
Pablo Telloe86a09f2018-01-11 15:44:48 +0000462/******************************************
463 * cl_img_cached_allocations extension *
464 ******************************************/
465
Sheri Zhang67354e02021-06-30 16:08:29 +0100466/* Flag values used by clCreateBuffer */
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100467#define CL_MEM_USE_UNCACHED_CPU_MEMORY_IMG (1 << 26)
468#define CL_MEM_USE_CACHED_CPU_MEMORY_IMG (1 << 27)
469
Pablo Telloe86a09f2018-01-11 15:44:48 +0000470
471/******************************************
472 * cl_img_use_gralloc_ptr extension *
473 ******************************************/
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100474#define cl_img_use_gralloc_ptr 1
Pablo Telloe86a09f2018-01-11 15:44:48 +0000475
Sheri Zhang67354e02021-06-30 16:08:29 +0100476/* Flag values used by clCreateBuffer */
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100477#define CL_MEM_USE_GRALLOC_PTR_IMG (1 << 28)
Pablo Telloe86a09f2018-01-11 15:44:48 +0000478
479/* To be used by clGetEventInfo: */
480#define CL_COMMAND_ACQUIRE_GRALLOC_OBJECTS_IMG 0x40D2
481#define CL_COMMAND_RELEASE_GRALLOC_OBJECTS_IMG 0x40D3
482
Sheri Zhang79cb9452021-09-07 14:51:49 +0100483/* Error codes from clEnqueueAcquireGrallocObjectsIMG and clEnqueueReleaseGrallocObjectsIMG */
Pablo Telloe86a09f2018-01-11 15:44:48 +0000484#define CL_GRALLOC_RESOURCE_NOT_ACQUIRED_IMG 0x40D4
Sheri Zhang79cb9452021-09-07 14:51:49 +0100485#define CL_INVALID_GRALLOC_OBJECT_IMG 0x40D5
Pablo Telloe86a09f2018-01-11 15:44:48 +0000486
487extern CL_API_ENTRY cl_int CL_API_CALL
Sheri Zhang67354e02021-06-30 16:08:29 +0100488clEnqueueAcquireGrallocObjectsIMG(cl_command_queue command_queue,
489 cl_uint num_objects,
490 const cl_mem * mem_objects,
491 cl_uint num_events_in_wait_list,
492 const cl_event * event_wait_list,
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000493 cl_event * event) CL_API_SUFFIX__VERSION_1_2;
Pablo Telloe86a09f2018-01-11 15:44:48 +0000494
495extern CL_API_ENTRY cl_int CL_API_CALL
Sheri Zhang67354e02021-06-30 16:08:29 +0100496clEnqueueReleaseGrallocObjectsIMG(cl_command_queue command_queue,
497 cl_uint num_objects,
498 const cl_mem * mem_objects,
499 cl_uint num_events_in_wait_list,
500 const cl_event * event_wait_list,
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000501 cl_event * event) CL_API_SUFFIX__VERSION_1_2;
Pablo Telloe86a09f2018-01-11 15:44:48 +0000502
Sheri Zhang79cb9452021-09-07 14:51:49 +0100503/******************************************
504 * cl_img_generate_mipmap extension *
505 ******************************************/
506#define cl_img_generate_mipmap 1
507
508typedef cl_uint cl_mipmap_filter_mode_img;
509
510/* To be used by clEnqueueGenerateMipmapIMG */
511#define CL_MIPMAP_FILTER_ANY_IMG 0x0
512#define CL_MIPMAP_FILTER_BOX_IMG 0x1
513
514/* To be used by clGetEventInfo */
515#define CL_COMMAND_GENERATE_MIPMAP_IMG 0x40D6
516
517extern CL_API_ENTRY cl_int CL_API_CALL
518clEnqueueGenerateMipmapIMG(cl_command_queue command_queue,
519 cl_mem src_image,
520 cl_mem dst_image,
521 cl_mipmap_filter_mode_img mipmap_filter_mode,
522 const size_t *array_region,
523 const size_t *mip_region,
524 cl_uint num_events_in_wait_list,
525 const cl_event *event_wait_list,
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000526 cl_event *event) CL_API_SUFFIX__VERSION_1_2;
Sheri Zhang79cb9452021-09-07 14:51:49 +0100527
528/******************************************
529 * cl_img_mem_properties extension *
530 ******************************************/
531#define cl_img_mem_properties 1
532
533/* To be used by clCreateBufferWithProperties */
534#define CL_MEM_ALLOC_FLAGS_IMG 0x40D7
535
536/* To be used wiith the CL_MEM_ALLOC_FLAGS_IMG property */
537typedef cl_bitfield cl_mem_alloc_flags_img;
538
539/* To be used with cl_mem_alloc_flags_img */
540#define CL_MEM_ALLOC_RELAX_REQUIREMENTS_IMG (1 << 0)
Pablo Telloe86a09f2018-01-11 15:44:48 +0000541
Pablo Telloe86a09f2018-01-11 15:44:48 +0000542/*********************************
543* cl_khr_subgroups extension
544*********************************/
545#define cl_khr_subgroups 1
546
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100547#if !defined(CL_VERSION_2_1)
548/* For OpenCL 2.1 and newer, cl_kernel_sub_group_info is declared in CL.h.
549 In hindsight, there should have been a khr suffix on this type for
550 the extension, but keeping it un-suffixed to maintain backwards
551 compatibility. */
552typedef cl_uint cl_kernel_sub_group_info;
553#endif
Pablo Telloe86a09f2018-01-11 15:44:48 +0000554
555/* cl_kernel_sub_group_info */
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100556#define CL_KERNEL_MAX_SUB_GROUP_SIZE_FOR_NDRANGE_KHR 0x2033
557#define CL_KERNEL_SUB_GROUP_COUNT_FOR_NDRANGE_KHR 0x2034
Pablo Telloe86a09f2018-01-11 15:44:48 +0000558
559extern CL_API_ENTRY cl_int CL_API_CALL
Sheri Zhang67354e02021-06-30 16:08:29 +0100560clGetKernelSubGroupInfoKHR(cl_kernel in_kernel,
561 cl_device_id in_device,
562 cl_kernel_sub_group_info param_name,
563 size_t input_value_size,
564 const void * input_value,
565 size_t param_value_size,
566 void * param_value,
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000567 size_t * param_value_size_ret) CL_API_SUFFIX__VERSION_2_0_DEPRECATED;
Pablo Telloe86a09f2018-01-11 15:44:48 +0000568
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000569typedef cl_int
Sheri Zhang67354e02021-06-30 16:08:29 +0100570(CL_API_CALL * clGetKernelSubGroupInfoKHR_fn)(cl_kernel in_kernel,
571 cl_device_id in_device,
572 cl_kernel_sub_group_info param_name,
573 size_t input_value_size,
574 const void * input_value,
575 size_t param_value_size,
576 void * param_value,
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000577 size_t * param_value_size_ret) CL_API_SUFFIX__VERSION_2_0_DEPRECATED;
Sheri Zhang67354e02021-06-30 16:08:29 +0100578
579
580/*********************************
581* cl_khr_mipmap_image extension
582*********************************/
583
584/* cl_sampler_properties */
585#define CL_SAMPLER_MIP_FILTER_MODE_KHR 0x1155
586#define CL_SAMPLER_LOD_MIN_KHR 0x1156
587#define CL_SAMPLER_LOD_MAX_KHR 0x1157
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100588
589
Pablo Telloe86a09f2018-01-11 15:44:48 +0000590/*********************************
591* cl_khr_priority_hints extension
592*********************************/
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100593/* This extension define is for backwards compatibility.
594 It shouldn't be required since this extension has no new functions. */
Pablo Telloe86a09f2018-01-11 15:44:48 +0000595#define cl_khr_priority_hints 1
596
597typedef cl_uint cl_queue_priority_khr;
598
599/* cl_command_queue_properties */
600#define CL_QUEUE_PRIORITY_KHR 0x1096
601
602/* cl_queue_priority_khr */
603#define CL_QUEUE_PRIORITY_HIGH_KHR (1<<0)
604#define CL_QUEUE_PRIORITY_MED_KHR (1<<1)
605#define CL_QUEUE_PRIORITY_LOW_KHR (1<<2)
606
Pablo Telloe86a09f2018-01-11 15:44:48 +0000607
Pablo Telloe86a09f2018-01-11 15:44:48 +0000608/*********************************
609* cl_khr_throttle_hints extension
610*********************************/
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100611/* This extension define is for backwards compatibility.
612 It shouldn't be required since this extension has no new functions. */
Pablo Telloe86a09f2018-01-11 15:44:48 +0000613#define cl_khr_throttle_hints 1
614
615typedef cl_uint cl_queue_throttle_khr;
616
617/* cl_command_queue_properties */
618#define CL_QUEUE_THROTTLE_KHR 0x1097
619
620/* cl_queue_throttle_khr */
621#define CL_QUEUE_THROTTLE_HIGH_KHR (1<<0)
622#define CL_QUEUE_THROTTLE_MED_KHR (1<<1)
623#define CL_QUEUE_THROTTLE_LOW_KHR (1<<2)
624
Pablo Telloe86a09f2018-01-11 15:44:48 +0000625
Pablo Telloe86a09f2018-01-11 15:44:48 +0000626/*********************************
627* cl_khr_subgroup_named_barrier
628*********************************/
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100629/* This extension define is for backwards compatibility.
630 It shouldn't be required since this extension has no new functions. */
Pablo Telloe86a09f2018-01-11 15:44:48 +0000631#define cl_khr_subgroup_named_barrier 1
632
633/* cl_device_info */
634#define CL_DEVICE_MAX_NAMED_BARRIER_COUNT_KHR 0x2035
635
Pablo Telloe86a09f2018-01-11 15:44:48 +0000636
Sheri Zhang67354e02021-06-30 16:08:29 +0100637/*********************************
638* cl_khr_extended_versioning
639*********************************/
640
Sheri Zhang79cb9452021-09-07 14:51:49 +0100641#define cl_khr_extended_versioning 1
642
Sheri Zhang67354e02021-06-30 16:08:29 +0100643#define CL_VERSION_MAJOR_BITS_KHR (10)
644#define CL_VERSION_MINOR_BITS_KHR (10)
645#define CL_VERSION_PATCH_BITS_KHR (12)
646
647#define CL_VERSION_MAJOR_MASK_KHR ((1 << CL_VERSION_MAJOR_BITS_KHR) - 1)
648#define CL_VERSION_MINOR_MASK_KHR ((1 << CL_VERSION_MINOR_BITS_KHR) - 1)
649#define CL_VERSION_PATCH_MASK_KHR ((1 << CL_VERSION_PATCH_BITS_KHR) - 1)
650
651#define CL_VERSION_MAJOR_KHR(version) ((version) >> (CL_VERSION_MINOR_BITS_KHR + CL_VERSION_PATCH_BITS_KHR))
652#define CL_VERSION_MINOR_KHR(version) (((version) >> CL_VERSION_PATCH_BITS_KHR) & CL_VERSION_MINOR_MASK_KHR)
653#define CL_VERSION_PATCH_KHR(version) ((version) & CL_VERSION_PATCH_MASK_KHR)
654
655#define CL_MAKE_VERSION_KHR(major, minor, patch) \
656 ((((major) & CL_VERSION_MAJOR_MASK_KHR) << (CL_VERSION_MINOR_BITS_KHR + CL_VERSION_PATCH_BITS_KHR)) | \
657 (((minor) & CL_VERSION_MINOR_MASK_KHR) << CL_VERSION_PATCH_BITS_KHR) | \
658 ((patch) & CL_VERSION_PATCH_MASK_KHR))
659
660typedef cl_uint cl_version_khr;
661
662#define CL_NAME_VERSION_MAX_NAME_SIZE_KHR 64
663
664typedef struct _cl_name_version_khr
665{
666 cl_version_khr version;
667 char name[CL_NAME_VERSION_MAX_NAME_SIZE_KHR];
668} cl_name_version_khr;
669
670/* cl_platform_info */
671#define CL_PLATFORM_NUMERIC_VERSION_KHR 0x0906
672#define CL_PLATFORM_EXTENSIONS_WITH_VERSION_KHR 0x0907
673
674/* cl_device_info */
675#define CL_DEVICE_NUMERIC_VERSION_KHR 0x105E
676#define CL_DEVICE_OPENCL_C_NUMERIC_VERSION_KHR 0x105F
677#define CL_DEVICE_EXTENSIONS_WITH_VERSION_KHR 0x1060
678#define CL_DEVICE_ILS_WITH_VERSION_KHR 0x1061
679#define CL_DEVICE_BUILT_IN_KERNELS_WITH_VERSION_KHR 0x1062
680
681
Sheri Zhang79cb9452021-09-07 14:51:49 +0100682/*********************************
683* cl_khr_device_uuid extension
684*********************************/
685#define cl_khr_device_uuid 1
686
687#define CL_UUID_SIZE_KHR 16
688#define CL_LUID_SIZE_KHR 8
689
690#define CL_DEVICE_UUID_KHR 0x106A
691#define CL_DRIVER_UUID_KHR 0x106B
692#define CL_DEVICE_LUID_VALID_KHR 0x106C
693#define CL_DEVICE_LUID_KHR 0x106D
694#define CL_DEVICE_NODE_MASK_KHR 0x106E
695
696
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000697/***************************************************************
698* cl_khr_pci_bus_info
699***************************************************************/
700#define cl_khr_pci_bus_info 1
701
702typedef struct _cl_device_pci_bus_info_khr {
703 cl_uint pci_domain;
704 cl_uint pci_bus;
705 cl_uint pci_device;
706 cl_uint pci_function;
707} cl_device_pci_bus_info_khr;
708
709/* cl_device_info */
710#define CL_DEVICE_PCI_BUS_INFO_KHR 0x410F
711
712
713/***************************************************************
714* cl_khr_suggested_local_work_size
715***************************************************************/
716#define cl_khr_suggested_local_work_size 1
717
718extern CL_API_ENTRY cl_int CL_API_CALL
719clGetKernelSuggestedLocalWorkSizeKHR(
720 cl_command_queue command_queue,
721 cl_kernel kernel,
722 cl_uint work_dim,
723 const size_t* global_work_offset,
724 const size_t* global_work_size,
725 size_t* suggested_local_work_size) CL_API_SUFFIX__VERSION_3_0;
726
727typedef cl_int (CL_API_CALL *
728clGetKernelSuggestedLocalWorkSizeKHR_fn)(
729 cl_command_queue command_queue,
730 cl_kernel kernel,
731 cl_uint work_dim,
732 const size_t* global_work_offset,
733 const size_t* global_work_size,
734 size_t* suggested_local_work_size) CL_API_SUFFIX__VERSION_3_0;
735
736
737/***************************************************************
738* cl_khr_integer_dot_product
739***************************************************************/
740#define cl_khr_integer_dot_product 1
741
742typedef cl_bitfield cl_device_integer_dot_product_capabilities_khr;
743
744/* cl_device_integer_dot_product_capabilities_khr */
745#define CL_DEVICE_INTEGER_DOT_PRODUCT_INPUT_4x8BIT_PACKED_KHR (1 << 0)
746#define CL_DEVICE_INTEGER_DOT_PRODUCT_INPUT_4x8BIT_KHR (1 << 1)
747
748/* cl_device_info */
749#define CL_DEVICE_INTEGER_DOT_PRODUCT_CAPABILITIES_KHR 0x1073
750
751
Pablo Telloe86a09f2018-01-11 15:44:48 +0000752/**********************************
753 * cl_arm_import_memory extension *
754 **********************************/
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100755#define cl_arm_import_memory 1
Pablo Telloe86a09f2018-01-11 15:44:48 +0000756
757typedef intptr_t cl_import_properties_arm;
758
759/* Default and valid proporties name for cl_arm_import_memory */
760#define CL_IMPORT_TYPE_ARM 0x40B2
761
762/* Host process memory type default value for CL_IMPORT_TYPE_ARM property */
763#define CL_IMPORT_TYPE_HOST_ARM 0x40B3
764
765/* DMA BUF memory type value for CL_IMPORT_TYPE_ARM property */
766#define CL_IMPORT_TYPE_DMA_BUF_ARM 0x40B4
767
Sheri Zhang67354e02021-06-30 16:08:29 +0100768/* Protected memory property */
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100769#define CL_IMPORT_TYPE_PROTECTED_ARM 0x40B5
Pablo Telloe86a09f2018-01-11 15:44:48 +0000770
Sheri Zhang67354e02021-06-30 16:08:29 +0100771/* Android hardware buffer type value for CL_IMPORT_TYPE_ARM property */
772#define CL_IMPORT_TYPE_ANDROID_HARDWARE_BUFFER_ARM 0x41E2
773
774/* Data consistency with host property */
775#define CL_IMPORT_DMA_BUF_DATA_CONSISTENCY_WITH_HOST_ARM 0x41E3
776
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000777/* Index of plane in a multiplanar hardware buffer */
778#define CL_IMPORT_ANDROID_HARDWARE_BUFFER_PLANE_INDEX_ARM 0x41EF
779
780/* Index of layer in a multilayer hardware buffer */
781#define CL_IMPORT_ANDROID_HARDWARE_BUFFER_LAYER_INDEX_ARM 0x41F0
782
Sheri Zhang67354e02021-06-30 16:08:29 +0100783/* Import memory size value to indicate a size for the whole buffer */
784#define CL_IMPORT_MEMORY_WHOLE_ALLOCATION_ARM SIZE_MAX
785
Pablo Telloe86a09f2018-01-11 15:44:48 +0000786/* This extension adds a new function that allows for direct memory import into
787 * OpenCL via the clImportMemoryARM function.
788 *
789 * Memory imported through this interface will be mapped into the device's page
790 * tables directly, providing zero copy access. It will never fall back to copy
791 * operations and aliased buffers.
792 *
793 * Types of memory supported for import are specified as additional extension
794 * strings.
795 *
796 * This extension produces cl_mem allocations which are compatible with all other
797 * users of cl_mem in the standard API.
798 *
799 * This extension maps pages with the same properties as the normal buffer creation
800 * function clCreateBuffer.
801 */
802extern CL_API_ENTRY cl_mem CL_API_CALL
803clImportMemoryARM( cl_context context,
804 cl_mem_flags flags,
805 const cl_import_properties_arm *properties,
806 void *memory,
807 size_t size,
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000808 cl_int *errcode_ret) CL_API_SUFFIX__VERSION_1_0;
Pablo Telloe86a09f2018-01-11 15:44:48 +0000809
810
Pablo Telloe86a09f2018-01-11 15:44:48 +0000811/******************************************
812 * cl_arm_shared_virtual_memory extension *
813 ******************************************/
Anthony Barbier8b2fdc92018-08-09 11:42:38 +0100814#define cl_arm_shared_virtual_memory 1
Pablo Telloe86a09f2018-01-11 15:44:48 +0000815
816/* Used by clGetDeviceInfo */
817#define CL_DEVICE_SVM_CAPABILITIES_ARM 0x40B6
818
819/* Used by clGetMemObjectInfo */
820#define CL_MEM_USES_SVM_POINTER_ARM 0x40B7
821
822/* Used by clSetKernelExecInfoARM: */
823#define CL_KERNEL_EXEC_INFO_SVM_PTRS_ARM 0x40B8
824#define CL_KERNEL_EXEC_INFO_SVM_FINE_GRAIN_SYSTEM_ARM 0x40B9
825
826/* To be used by clGetEventInfo: */
827#define CL_COMMAND_SVM_FREE_ARM 0x40BA
828#define CL_COMMAND_SVM_MEMCPY_ARM 0x40BB
829#define CL_COMMAND_SVM_MEMFILL_ARM 0x40BC
830#define CL_COMMAND_SVM_MAP_ARM 0x40BD
831#define CL_COMMAND_SVM_UNMAP_ARM 0x40BE
832
833/* Flag values returned by clGetDeviceInfo with CL_DEVICE_SVM_CAPABILITIES_ARM as the param_name. */
834#define CL_DEVICE_SVM_COARSE_GRAIN_BUFFER_ARM (1 << 0)
835#define CL_DEVICE_SVM_FINE_GRAIN_BUFFER_ARM (1 << 1)
836#define CL_DEVICE_SVM_FINE_GRAIN_SYSTEM_ARM (1 << 2)
837#define CL_DEVICE_SVM_ATOMICS_ARM (1 << 3)
838
839/* Flag values used by clSVMAllocARM: */
840#define CL_MEM_SVM_FINE_GRAIN_BUFFER_ARM (1 << 10)
841#define CL_MEM_SVM_ATOMICS_ARM (1 << 11)
842
843typedef cl_bitfield cl_svm_mem_flags_arm;
844typedef cl_uint cl_kernel_exec_info_arm;
845typedef cl_bitfield cl_device_svm_capabilities_arm;
846
847extern CL_API_ENTRY void * CL_API_CALL
Sheri Zhang67354e02021-06-30 16:08:29 +0100848clSVMAllocARM(cl_context context,
849 cl_svm_mem_flags_arm flags,
850 size_t size,
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000851 cl_uint alignment) CL_API_SUFFIX__VERSION_1_2;
Pablo Telloe86a09f2018-01-11 15:44:48 +0000852
853extern CL_API_ENTRY void CL_API_CALL
Sheri Zhang67354e02021-06-30 16:08:29 +0100854clSVMFreeARM(cl_context context,
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000855 void * svm_pointer) CL_API_SUFFIX__VERSION_1_2;
Pablo Telloe86a09f2018-01-11 15:44:48 +0000856
857extern CL_API_ENTRY cl_int CL_API_CALL
Sheri Zhang67354e02021-06-30 16:08:29 +0100858clEnqueueSVMFreeARM(cl_command_queue command_queue,
859 cl_uint num_svm_pointers,
860 void * svm_pointers[],
861 void (CL_CALLBACK * pfn_free_func)(cl_command_queue queue,
862 cl_uint num_svm_pointers,
863 void * svm_pointers[],
864 void * user_data),
865 void * user_data,
866 cl_uint num_events_in_wait_list,
867 const cl_event * event_wait_list,
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000868 cl_event * event) CL_API_SUFFIX__VERSION_1_2;
Pablo Telloe86a09f2018-01-11 15:44:48 +0000869
870extern CL_API_ENTRY cl_int CL_API_CALL
Sheri Zhang67354e02021-06-30 16:08:29 +0100871clEnqueueSVMMemcpyARM(cl_command_queue command_queue,
872 cl_bool blocking_copy,
873 void * dst_ptr,
874 const void * src_ptr,
875 size_t size,
876 cl_uint num_events_in_wait_list,
877 const cl_event * event_wait_list,
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000878 cl_event * event) CL_API_SUFFIX__VERSION_1_2;
Pablo Telloe86a09f2018-01-11 15:44:48 +0000879
880extern CL_API_ENTRY cl_int CL_API_CALL
Sheri Zhang67354e02021-06-30 16:08:29 +0100881clEnqueueSVMMemFillARM(cl_command_queue command_queue,
882 void * svm_ptr,
883 const void * pattern,
884 size_t pattern_size,
885 size_t size,
886 cl_uint num_events_in_wait_list,
887 const cl_event * event_wait_list,
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000888 cl_event * event) CL_API_SUFFIX__VERSION_1_2;
Pablo Telloe86a09f2018-01-11 15:44:48 +0000889
890extern CL_API_ENTRY cl_int CL_API_CALL
Sheri Zhang67354e02021-06-30 16:08:29 +0100891clEnqueueSVMMapARM(cl_command_queue command_queue,
892 cl_bool blocking_map,
893 cl_map_flags flags,
894 void * svm_ptr,
895 size_t size,
896 cl_uint num_events_in_wait_list,
897 const cl_event * event_wait_list,
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000898 cl_event * event) CL_API_SUFFIX__VERSION_1_2;
Pablo Telloe86a09f2018-01-11 15:44:48 +0000899
900extern CL_API_ENTRY cl_int CL_API_CALL
Sheri Zhang67354e02021-06-30 16:08:29 +0100901clEnqueueSVMUnmapARM(cl_command_queue command_queue,
902 void * svm_ptr,
903 cl_uint num_events_in_wait_list,
904 const cl_event * event_wait_list,
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000905 cl_event * event) CL_API_SUFFIX__VERSION_1_2;
Pablo Telloe86a09f2018-01-11 15:44:48 +0000906
907extern CL_API_ENTRY cl_int CL_API_CALL
Sheri Zhang67354e02021-06-30 16:08:29 +0100908clSetKernelArgSVMPointerARM(cl_kernel kernel,
909 cl_uint arg_index,
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000910 const void * arg_value) CL_API_SUFFIX__VERSION_1_2;
Sheri Zhang67354e02021-06-30 16:08:29 +0100911
Pablo Telloe86a09f2018-01-11 15:44:48 +0000912extern CL_API_ENTRY cl_int CL_API_CALL
Sheri Zhang67354e02021-06-30 16:08:29 +0100913clSetKernelExecInfoARM(cl_kernel kernel,
914 cl_kernel_exec_info_arm param_name,
915 size_t param_value_size,
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000916 const void * param_value) CL_API_SUFFIX__VERSION_1_2;
Sheri Zhang67354e02021-06-30 16:08:29 +0100917
918/********************************
919 * cl_arm_get_core_id extension *
920 ********************************/
921
922#ifdef CL_VERSION_1_2
923
924#define cl_arm_get_core_id 1
925
926/* Device info property for bitfield of cores present */
927#define CL_DEVICE_COMPUTE_UNITS_BITFIELD_ARM 0x40BF
928
929#endif /* CL_VERSION_1_2 */
930
931/*********************************
932* cl_arm_job_slot_selection
933*********************************/
934
935#define cl_arm_job_slot_selection 1
936
937/* cl_device_info */
938#define CL_DEVICE_JOB_SLOTS_ARM 0x41E0
939
940/* cl_command_queue_properties */
941#define CL_QUEUE_JOB_SLOT_ARM 0x41E1
Pablo Telloe86a09f2018-01-11 15:44:48 +0000942
Sheri Zhang79cb9452021-09-07 14:51:49 +0100943/*********************************
944* cl_arm_scheduling_controls
945*********************************/
946
947#define cl_arm_scheduling_controls 1
948
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000949typedef cl_bitfield cl_device_scheduling_controls_capabilities_arm;
950
Sheri Zhang79cb9452021-09-07 14:51:49 +0100951/* cl_device_info */
952#define CL_DEVICE_SCHEDULING_CONTROLS_CAPABILITIES_ARM 0x41E4
953
954#define CL_DEVICE_SCHEDULING_KERNEL_BATCHING_ARM (1 << 0)
955#define CL_DEVICE_SCHEDULING_WORKGROUP_BATCH_SIZE_ARM (1 << 1)
956#define CL_DEVICE_SCHEDULING_WORKGROUP_BATCH_SIZE_MODIFIER_ARM (1 << 2)
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000957#define CL_DEVICE_SCHEDULING_DEFERRED_FLUSH_ARM (1 << 3)
958#define CL_DEVICE_SCHEDULING_REGISTER_ALLOCATION_ARM (1 << 4)
959
960#define CL_DEVICE_SUPPORTED_REGISTER_ALLOCATIONS_ARM 0x41EB
Sheri Zhang79cb9452021-09-07 14:51:49 +0100961
962/* cl_kernel_info */
963#define CL_KERNEL_EXEC_INFO_WORKGROUP_BATCH_SIZE_ARM 0x41E5
964#define CL_KERNEL_EXEC_INFO_WORKGROUP_BATCH_SIZE_MODIFIER_ARM 0x41E6
965
966/* cl_queue_properties */
967#define CL_QUEUE_KERNEL_BATCHING_ARM 0x41E7
Pablo Marquez Tellodc2282f2021-11-23 15:16:00 +0000968#define CL_QUEUE_DEFERRED_FLUSH_ARM 0x41EC
969
970/**************************************
971* cl_arm_controlled_kernel_termination
972***************************************/
973
974#define cl_arm_controlled_kernel_termination 1
975
976/* Error code to indicate kernel terminated with failure */
977#define CL_COMMAND_TERMINATED_ITSELF_WITH_FAILURE_ARM -1108
978
979/* cl_device_info */
980#define CL_DEVICE_CONTROLLED_TERMINATION_CAPABILITIES_ARM 0x41EE
981
982/* Bit fields for controlled termination feature query */
983typedef cl_bitfield cl_device_controlled_termination_capabilities_arm;
984
985#define CL_DEVICE_CONTROLLED_TERMINATION_SUCCESS_ARM (1 << 0)
986#define CL_DEVICE_CONTROLLED_TERMINATION_FAILURE_ARM (1 << 1)
987#define CL_DEVICE_CONTROLLED_TERMINATION_QUERY_ARM (1 << 2)
988
989/* cl_event_info */
990#define CL_EVENT_COMMAND_TERMINATION_REASON_ARM 0x41ED
991
992/* Values returned for event termination reason query */
993typedef cl_uint cl_command_termination_reason_arm;
994
995#define CL_COMMAND_TERMINATION_COMPLETION_ARM 0
996#define CL_COMMAND_TERMINATION_CONTROLLED_SUCCESS_ARM 1
997#define CL_COMMAND_TERMINATION_CONTROLLED_FAILURE_ARM 2
998#define CL_COMMAND_TERMINATION_ERROR_ARM 3
999
1000/***************************************
1001* cl_intel_thread_local_exec extension *
1002****************************************/
1003
1004#define cl_intel_thread_local_exec 1
1005
1006#define CL_QUEUE_THREAD_LOCAL_EXEC_ENABLE_INTEL (((cl_bitfield)1) << 31)
1007
1008/***********************************************
1009* cl_intel_device_partition_by_names extension *
1010************************************************/
1011
1012#define cl_intel_device_partition_by_names 1
1013
1014#define CL_DEVICE_PARTITION_BY_NAMES_INTEL 0x4052
1015#define CL_PARTITION_BY_NAMES_LIST_END_INTEL -1
1016
1017/************************************************
1018* cl_intel_accelerator extension *
1019* cl_intel_motion_estimation extension *
1020* cl_intel_advanced_motion_estimation extension *
1021*************************************************/
1022
1023#define cl_intel_accelerator 1
1024#define cl_intel_motion_estimation 1
1025#define cl_intel_advanced_motion_estimation 1
1026
1027typedef struct _cl_accelerator_intel* cl_accelerator_intel;
1028typedef cl_uint cl_accelerator_type_intel;
1029typedef cl_uint cl_accelerator_info_intel;
1030
1031typedef struct _cl_motion_estimation_desc_intel {
1032 cl_uint mb_block_type;
1033 cl_uint subpixel_mode;
1034 cl_uint sad_adjust_mode;
1035 cl_uint search_path_type;
1036} cl_motion_estimation_desc_intel;
1037
1038/* error codes */
1039#define CL_INVALID_ACCELERATOR_INTEL -1094
1040#define CL_INVALID_ACCELERATOR_TYPE_INTEL -1095
1041#define CL_INVALID_ACCELERATOR_DESCRIPTOR_INTEL -1096
1042#define CL_ACCELERATOR_TYPE_NOT_SUPPORTED_INTEL -1097
1043
1044/* cl_accelerator_type_intel */
1045#define CL_ACCELERATOR_TYPE_MOTION_ESTIMATION_INTEL 0x0
1046
1047/* cl_accelerator_info_intel */
1048#define CL_ACCELERATOR_DESCRIPTOR_INTEL 0x4090
1049#define CL_ACCELERATOR_REFERENCE_COUNT_INTEL 0x4091
1050#define CL_ACCELERATOR_CONTEXT_INTEL 0x4092
1051#define CL_ACCELERATOR_TYPE_INTEL 0x4093
1052
1053/* cl_motion_detect_desc_intel flags */
1054#define CL_ME_MB_TYPE_16x16_INTEL 0x0
1055#define CL_ME_MB_TYPE_8x8_INTEL 0x1
1056#define CL_ME_MB_TYPE_4x4_INTEL 0x2
1057
1058#define CL_ME_SUBPIXEL_MODE_INTEGER_INTEL 0x0
1059#define CL_ME_SUBPIXEL_MODE_HPEL_INTEL 0x1
1060#define CL_ME_SUBPIXEL_MODE_QPEL_INTEL 0x2
1061
1062#define CL_ME_SAD_ADJUST_MODE_NONE_INTEL 0x0
1063#define CL_ME_SAD_ADJUST_MODE_HAAR_INTEL 0x1
1064
1065#define CL_ME_SEARCH_PATH_RADIUS_2_2_INTEL 0x0
1066#define CL_ME_SEARCH_PATH_RADIUS_4_4_INTEL 0x1
1067#define CL_ME_SEARCH_PATH_RADIUS_16_12_INTEL 0x5
1068
1069#define CL_ME_SKIP_BLOCK_TYPE_16x16_INTEL 0x0
1070#define CL_ME_CHROMA_INTRA_PREDICT_ENABLED_INTEL 0x1
1071#define CL_ME_LUMA_INTRA_PREDICT_ENABLED_INTEL 0x2
1072#define CL_ME_SKIP_BLOCK_TYPE_8x8_INTEL 0x4
1073
1074#define CL_ME_FORWARD_INPUT_MODE_INTEL 0x1
1075#define CL_ME_BACKWARD_INPUT_MODE_INTEL 0x2
1076#define CL_ME_BIDIRECTION_INPUT_MODE_INTEL 0x3
1077
1078#define CL_ME_BIDIR_WEIGHT_QUARTER_INTEL 16
1079#define CL_ME_BIDIR_WEIGHT_THIRD_INTEL 21
1080#define CL_ME_BIDIR_WEIGHT_HALF_INTEL 32
1081#define CL_ME_BIDIR_WEIGHT_TWO_THIRD_INTEL 43
1082#define CL_ME_BIDIR_WEIGHT_THREE_QUARTER_INTEL 48
1083
1084#define CL_ME_COST_PENALTY_NONE_INTEL 0x0
1085#define CL_ME_COST_PENALTY_LOW_INTEL 0x1
1086#define CL_ME_COST_PENALTY_NORMAL_INTEL 0x2
1087#define CL_ME_COST_PENALTY_HIGH_INTEL 0x3
1088
1089#define CL_ME_COST_PRECISION_QPEL_INTEL 0x0
1090#define CL_ME_COST_PRECISION_HPEL_INTEL 0x1
1091#define CL_ME_COST_PRECISION_PEL_INTEL 0x2
1092#define CL_ME_COST_PRECISION_DPEL_INTEL 0x3
1093
1094#define CL_ME_LUMA_PREDICTOR_MODE_VERTICAL_INTEL 0x0
1095#define CL_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1
1096#define CL_ME_LUMA_PREDICTOR_MODE_DC_INTEL 0x2
1097#define CL_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_LEFT_INTEL 0x3
1098
1099#define CL_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_RIGHT_INTEL 0x4
1100#define CL_ME_LUMA_PREDICTOR_MODE_PLANE_INTEL 0x4
1101#define CL_ME_LUMA_PREDICTOR_MODE_VERTICAL_RIGHT_INTEL 0x5
1102#define CL_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_DOWN_INTEL 0x6
1103#define CL_ME_LUMA_PREDICTOR_MODE_VERTICAL_LEFT_INTEL 0x7
1104#define CL_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_UP_INTEL 0x8
1105
1106#define CL_ME_CHROMA_PREDICTOR_MODE_DC_INTEL 0x0
1107#define CL_ME_CHROMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1
1108#define CL_ME_CHROMA_PREDICTOR_MODE_VERTICAL_INTEL 0x2
1109#define CL_ME_CHROMA_PREDICTOR_MODE_PLANE_INTEL 0x3
1110
1111/* cl_device_info */
1112#define CL_DEVICE_ME_VERSION_INTEL 0x407E
1113
1114#define CL_ME_VERSION_LEGACY_INTEL 0x0
1115#define CL_ME_VERSION_ADVANCED_VER_1_INTEL 0x1
1116#define CL_ME_VERSION_ADVANCED_VER_2_INTEL 0x2
1117
1118extern CL_API_ENTRY cl_accelerator_intel CL_API_CALL
1119clCreateAcceleratorINTEL(
1120 cl_context context,
1121 cl_accelerator_type_intel accelerator_type,
1122 size_t descriptor_size,
1123 const void* descriptor,
1124 cl_int* errcode_ret) CL_API_SUFFIX__VERSION_1_2;
1125
1126typedef cl_accelerator_intel (CL_API_CALL *clCreateAcceleratorINTEL_fn)(
1127 cl_context context,
1128 cl_accelerator_type_intel accelerator_type,
1129 size_t descriptor_size,
1130 const void* descriptor,
1131 cl_int* errcode_ret) CL_API_SUFFIX__VERSION_1_2;
1132
1133extern CL_API_ENTRY cl_int CL_API_CALL
1134clGetAcceleratorInfoINTEL(
1135 cl_accelerator_intel accelerator,
1136 cl_accelerator_info_intel param_name,
1137 size_t param_value_size,
1138 void* param_value,
1139 size_t* param_value_size_ret) CL_API_SUFFIX__VERSION_1_2;
1140
1141typedef cl_int (CL_API_CALL *clGetAcceleratorInfoINTEL_fn)(
1142 cl_accelerator_intel accelerator,
1143 cl_accelerator_info_intel param_name,
1144 size_t param_value_size,
1145 void* param_value,
1146 size_t* param_value_size_ret) CL_API_SUFFIX__VERSION_1_2;
1147
1148extern CL_API_ENTRY cl_int CL_API_CALL
1149clRetainAcceleratorINTEL(
1150 cl_accelerator_intel accelerator) CL_API_SUFFIX__VERSION_1_2;
1151
1152typedef cl_int (CL_API_CALL *clRetainAcceleratorINTEL_fn)(
1153 cl_accelerator_intel accelerator) CL_API_SUFFIX__VERSION_1_2;
1154
1155extern CL_API_ENTRY cl_int CL_API_CALL
1156clReleaseAcceleratorINTEL(
1157 cl_accelerator_intel accelerator) CL_API_SUFFIX__VERSION_1_2;
1158
1159typedef cl_int (CL_API_CALL *clReleaseAcceleratorINTEL_fn)(
1160 cl_accelerator_intel accelerator) CL_API_SUFFIX__VERSION_1_2;
1161
1162/******************************************
1163* cl_intel_simultaneous_sharing extension *
1164*******************************************/
1165
1166#define cl_intel_simultaneous_sharing 1
1167
1168#define CL_DEVICE_SIMULTANEOUS_INTEROPS_INTEL 0x4104
1169#define CL_DEVICE_NUM_SIMULTANEOUS_INTEROPS_INTEL 0x4105
1170
1171/***********************************
1172* cl_intel_egl_image_yuv extension *
1173************************************/
1174
1175#define cl_intel_egl_image_yuv 1
1176
1177#define CL_EGL_YUV_PLANE_INTEL 0x4107
1178
1179/********************************
1180* cl_intel_packed_yuv extension *
1181*********************************/
1182
1183#define cl_intel_packed_yuv 1
1184
1185#define CL_YUYV_INTEL 0x4076
1186#define CL_UYVY_INTEL 0x4077
1187#define CL_YVYU_INTEL 0x4078
1188#define CL_VYUY_INTEL 0x4079
1189
1190/********************************************
1191* cl_intel_required_subgroup_size extension *
1192*********************************************/
1193
1194#define cl_intel_required_subgroup_size 1
1195
1196#define CL_DEVICE_SUB_GROUP_SIZES_INTEL 0x4108
1197#define CL_KERNEL_SPILL_MEM_SIZE_INTEL 0x4109
1198#define CL_KERNEL_COMPILE_SUB_GROUP_SIZE_INTEL 0x410A
1199
1200/****************************************
1201* cl_intel_driver_diagnostics extension *
1202*****************************************/
1203
1204#define cl_intel_driver_diagnostics 1
1205
1206typedef cl_uint cl_diagnostics_verbose_level;
1207
1208#define CL_CONTEXT_SHOW_DIAGNOSTICS_INTEL 0x4106
1209
1210#define CL_CONTEXT_DIAGNOSTICS_LEVEL_ALL_INTEL ( 0xff )
1211#define CL_CONTEXT_DIAGNOSTICS_LEVEL_GOOD_INTEL ( 1 )
1212#define CL_CONTEXT_DIAGNOSTICS_LEVEL_BAD_INTEL ( 1 << 1 )
1213#define CL_CONTEXT_DIAGNOSTICS_LEVEL_NEUTRAL_INTEL ( 1 << 2 )
1214
1215/********************************
1216* cl_intel_planar_yuv extension *
1217*********************************/
1218
1219#define CL_NV12_INTEL 0x410E
1220
1221#define CL_MEM_NO_ACCESS_INTEL ( 1 << 24 )
1222#define CL_MEM_ACCESS_FLAGS_UNRESTRICTED_INTEL ( 1 << 25 )
1223
1224#define CL_DEVICE_PLANAR_YUV_MAX_WIDTH_INTEL 0x417E
1225#define CL_DEVICE_PLANAR_YUV_MAX_HEIGHT_INTEL 0x417F
1226
1227/*******************************************************
1228* cl_intel_device_side_avc_motion_estimation extension *
1229********************************************************/
1230
1231#define CL_DEVICE_AVC_ME_VERSION_INTEL 0x410B
1232#define CL_DEVICE_AVC_ME_SUPPORTS_TEXTURE_SAMPLER_USE_INTEL 0x410C
1233#define CL_DEVICE_AVC_ME_SUPPORTS_PREEMPTION_INTEL 0x410D
1234
1235#define CL_AVC_ME_VERSION_0_INTEL 0x0 /* No support. */
1236#define CL_AVC_ME_VERSION_1_INTEL 0x1 /* First supported version. */
1237
1238#define CL_AVC_ME_MAJOR_16x16_INTEL 0x0
1239#define CL_AVC_ME_MAJOR_16x8_INTEL 0x1
1240#define CL_AVC_ME_MAJOR_8x16_INTEL 0x2
1241#define CL_AVC_ME_MAJOR_8x8_INTEL 0x3
1242
1243#define CL_AVC_ME_MINOR_8x8_INTEL 0x0
1244#define CL_AVC_ME_MINOR_8x4_INTEL 0x1
1245#define CL_AVC_ME_MINOR_4x8_INTEL 0x2
1246#define CL_AVC_ME_MINOR_4x4_INTEL 0x3
1247
1248#define CL_AVC_ME_MAJOR_FORWARD_INTEL 0x0
1249#define CL_AVC_ME_MAJOR_BACKWARD_INTEL 0x1
1250#define CL_AVC_ME_MAJOR_BIDIRECTIONAL_INTEL 0x2
1251
1252#define CL_AVC_ME_PARTITION_MASK_ALL_INTEL 0x0
1253#define CL_AVC_ME_PARTITION_MASK_16x16_INTEL 0x7E
1254#define CL_AVC_ME_PARTITION_MASK_16x8_INTEL 0x7D
1255#define CL_AVC_ME_PARTITION_MASK_8x16_INTEL 0x7B
1256#define CL_AVC_ME_PARTITION_MASK_8x8_INTEL 0x77
1257#define CL_AVC_ME_PARTITION_MASK_8x4_INTEL 0x6F
1258#define CL_AVC_ME_PARTITION_MASK_4x8_INTEL 0x5F
1259#define CL_AVC_ME_PARTITION_MASK_4x4_INTEL 0x3F
1260
1261#define CL_AVC_ME_SEARCH_WINDOW_EXHAUSTIVE_INTEL 0x0
1262#define CL_AVC_ME_SEARCH_WINDOW_SMALL_INTEL 0x1
1263#define CL_AVC_ME_SEARCH_WINDOW_TINY_INTEL 0x2
1264#define CL_AVC_ME_SEARCH_WINDOW_EXTRA_TINY_INTEL 0x3
1265#define CL_AVC_ME_SEARCH_WINDOW_DIAMOND_INTEL 0x4
1266#define CL_AVC_ME_SEARCH_WINDOW_LARGE_DIAMOND_INTEL 0x5
1267#define CL_AVC_ME_SEARCH_WINDOW_RESERVED0_INTEL 0x6
1268#define CL_AVC_ME_SEARCH_WINDOW_RESERVED1_INTEL 0x7
1269#define CL_AVC_ME_SEARCH_WINDOW_CUSTOM_INTEL 0x8
1270#define CL_AVC_ME_SEARCH_WINDOW_16x12_RADIUS_INTEL 0x9
1271#define CL_AVC_ME_SEARCH_WINDOW_4x4_RADIUS_INTEL 0x2
1272#define CL_AVC_ME_SEARCH_WINDOW_2x2_RADIUS_INTEL 0xa
1273
1274#define CL_AVC_ME_SAD_ADJUST_MODE_NONE_INTEL 0x0
1275#define CL_AVC_ME_SAD_ADJUST_MODE_HAAR_INTEL 0x2
1276
1277#define CL_AVC_ME_SUBPIXEL_MODE_INTEGER_INTEL 0x0
1278#define CL_AVC_ME_SUBPIXEL_MODE_HPEL_INTEL 0x1
1279#define CL_AVC_ME_SUBPIXEL_MODE_QPEL_INTEL 0x3
1280
1281#define CL_AVC_ME_COST_PRECISION_QPEL_INTEL 0x0
1282#define CL_AVC_ME_COST_PRECISION_HPEL_INTEL 0x1
1283#define CL_AVC_ME_COST_PRECISION_PEL_INTEL 0x2
1284#define CL_AVC_ME_COST_PRECISION_DPEL_INTEL 0x3
1285
1286#define CL_AVC_ME_BIDIR_WEIGHT_QUARTER_INTEL 0x10
1287#define CL_AVC_ME_BIDIR_WEIGHT_THIRD_INTEL 0x15
1288#define CL_AVC_ME_BIDIR_WEIGHT_HALF_INTEL 0x20
1289#define CL_AVC_ME_BIDIR_WEIGHT_TWO_THIRD_INTEL 0x2B
1290#define CL_AVC_ME_BIDIR_WEIGHT_THREE_QUARTER_INTEL 0x30
1291
1292#define CL_AVC_ME_BORDER_REACHED_LEFT_INTEL 0x0
1293#define CL_AVC_ME_BORDER_REACHED_RIGHT_INTEL 0x2
1294#define CL_AVC_ME_BORDER_REACHED_TOP_INTEL 0x4
1295#define CL_AVC_ME_BORDER_REACHED_BOTTOM_INTEL 0x8
1296
1297#define CL_AVC_ME_SKIP_BLOCK_PARTITION_16x16_INTEL 0x0
1298#define CL_AVC_ME_SKIP_BLOCK_PARTITION_8x8_INTEL 0x4000
1299
1300#define CL_AVC_ME_SKIP_BLOCK_16x16_FORWARD_ENABLE_INTEL ( 0x1 << 24 )
1301#define CL_AVC_ME_SKIP_BLOCK_16x16_BACKWARD_ENABLE_INTEL ( 0x2 << 24 )
1302#define CL_AVC_ME_SKIP_BLOCK_16x16_DUAL_ENABLE_INTEL ( 0x3 << 24 )
1303#define CL_AVC_ME_SKIP_BLOCK_8x8_FORWARD_ENABLE_INTEL ( 0x55 << 24 )
1304#define CL_AVC_ME_SKIP_BLOCK_8x8_BACKWARD_ENABLE_INTEL ( 0xAA << 24 )
1305#define CL_AVC_ME_SKIP_BLOCK_8x8_DUAL_ENABLE_INTEL ( 0xFF << 24 )
1306#define CL_AVC_ME_SKIP_BLOCK_8x8_0_FORWARD_ENABLE_INTEL ( 0x1 << 24 )
1307#define CL_AVC_ME_SKIP_BLOCK_8x8_0_BACKWARD_ENABLE_INTEL ( 0x2 << 24 )
1308#define CL_AVC_ME_SKIP_BLOCK_8x8_1_FORWARD_ENABLE_INTEL ( 0x1 << 26 )
1309#define CL_AVC_ME_SKIP_BLOCK_8x8_1_BACKWARD_ENABLE_INTEL ( 0x2 << 26 )
1310#define CL_AVC_ME_SKIP_BLOCK_8x8_2_FORWARD_ENABLE_INTEL ( 0x1 << 28 )
1311#define CL_AVC_ME_SKIP_BLOCK_8x8_2_BACKWARD_ENABLE_INTEL ( 0x2 << 28 )
1312#define CL_AVC_ME_SKIP_BLOCK_8x8_3_FORWARD_ENABLE_INTEL ( 0x1 << 30 )
1313#define CL_AVC_ME_SKIP_BLOCK_8x8_3_BACKWARD_ENABLE_INTEL ( 0x2 << 30 )
1314
1315#define CL_AVC_ME_BLOCK_BASED_SKIP_4x4_INTEL 0x00
1316#define CL_AVC_ME_BLOCK_BASED_SKIP_8x8_INTEL 0x80
1317
1318#define CL_AVC_ME_INTRA_16x16_INTEL 0x0
1319#define CL_AVC_ME_INTRA_8x8_INTEL 0x1
1320#define CL_AVC_ME_INTRA_4x4_INTEL 0x2
1321
1322#define CL_AVC_ME_INTRA_LUMA_PARTITION_MASK_16x16_INTEL 0x6
1323#define CL_AVC_ME_INTRA_LUMA_PARTITION_MASK_8x8_INTEL 0x5
1324#define CL_AVC_ME_INTRA_LUMA_PARTITION_MASK_4x4_INTEL 0x3
1325
1326#define CL_AVC_ME_INTRA_NEIGHBOR_LEFT_MASK_ENABLE_INTEL 0x60
1327#define CL_AVC_ME_INTRA_NEIGHBOR_UPPER_MASK_ENABLE_INTEL 0x10
1328#define CL_AVC_ME_INTRA_NEIGHBOR_UPPER_RIGHT_MASK_ENABLE_INTEL 0x8
1329#define CL_AVC_ME_INTRA_NEIGHBOR_UPPER_LEFT_MASK_ENABLE_INTEL 0x4
1330
1331#define CL_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_INTEL 0x0
1332#define CL_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1
1333#define CL_AVC_ME_LUMA_PREDICTOR_MODE_DC_INTEL 0x2
1334#define CL_AVC_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_LEFT_INTEL 0x3
1335#define CL_AVC_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_RIGHT_INTEL 0x4
1336#define CL_AVC_ME_LUMA_PREDICTOR_MODE_PLANE_INTEL 0x4
1337#define CL_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_RIGHT_INTEL 0x5
1338#define CL_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_DOWN_INTEL 0x6
1339#define CL_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_LEFT_INTEL 0x7
1340#define CL_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_UP_INTEL 0x8
1341#define CL_AVC_ME_CHROMA_PREDICTOR_MODE_DC_INTEL 0x0
1342#define CL_AVC_ME_CHROMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1
1343#define CL_AVC_ME_CHROMA_PREDICTOR_MODE_VERTICAL_INTEL 0x2
1344#define CL_AVC_ME_CHROMA_PREDICTOR_MODE_PLANE_INTEL 0x3
1345
1346#define CL_AVC_ME_FRAME_FORWARD_INTEL 0x1
1347#define CL_AVC_ME_FRAME_BACKWARD_INTEL 0x2
1348#define CL_AVC_ME_FRAME_DUAL_INTEL 0x3
1349
1350#define CL_AVC_ME_SLICE_TYPE_PRED_INTEL 0x0
1351#define CL_AVC_ME_SLICE_TYPE_BPRED_INTEL 0x1
1352#define CL_AVC_ME_SLICE_TYPE_INTRA_INTEL 0x2
1353
1354#define CL_AVC_ME_INTERLACED_SCAN_TOP_FIELD_INTEL 0x0
1355#define CL_AVC_ME_INTERLACED_SCAN_BOTTOM_FIELD_INTEL 0x1
1356
1357/*******************************************
1358* cl_intel_unified_shared_memory extension *
1359********************************************/
1360
1361/* These APIs are in sync with Revision Q of the cl_intel_unified_shared_memory spec! */
1362
1363#define cl_intel_unified_shared_memory 1
1364
1365/* cl_device_info */
1366#define CL_DEVICE_HOST_MEM_CAPABILITIES_INTEL 0x4190
1367#define CL_DEVICE_DEVICE_MEM_CAPABILITIES_INTEL 0x4191
1368#define CL_DEVICE_SINGLE_DEVICE_SHARED_MEM_CAPABILITIES_INTEL 0x4192
1369#define CL_DEVICE_CROSS_DEVICE_SHARED_MEM_CAPABILITIES_INTEL 0x4193
1370#define CL_DEVICE_SHARED_SYSTEM_MEM_CAPABILITIES_INTEL 0x4194
1371
1372typedef cl_bitfield cl_device_unified_shared_memory_capabilities_intel;
1373
1374/* cl_device_unified_shared_memory_capabilities_intel - bitfield */
1375#define CL_UNIFIED_SHARED_MEMORY_ACCESS_INTEL (1 << 0)
1376#define CL_UNIFIED_SHARED_MEMORY_ATOMIC_ACCESS_INTEL (1 << 1)
1377#define CL_UNIFIED_SHARED_MEMORY_CONCURRENT_ACCESS_INTEL (1 << 2)
1378#define CL_UNIFIED_SHARED_MEMORY_CONCURRENT_ATOMIC_ACCESS_INTEL (1 << 3)
1379
1380typedef cl_properties cl_mem_properties_intel;
1381
1382/* cl_mem_properties_intel */
1383#define CL_MEM_ALLOC_FLAGS_INTEL 0x4195
1384
1385typedef cl_bitfield cl_mem_alloc_flags_intel;
1386
1387/* cl_mem_alloc_flags_intel - bitfield */
1388#define CL_MEM_ALLOC_WRITE_COMBINED_INTEL (1 << 0)
1389
1390typedef cl_uint cl_mem_info_intel;
1391
1392/* cl_mem_alloc_info_intel */
1393#define CL_MEM_ALLOC_TYPE_INTEL 0x419A
1394#define CL_MEM_ALLOC_BASE_PTR_INTEL 0x419B
1395#define CL_MEM_ALLOC_SIZE_INTEL 0x419C
1396#define CL_MEM_ALLOC_DEVICE_INTEL 0x419D
1397/* Enum values 0x419E-0x419F are reserved for future queries. */
1398
1399typedef cl_uint cl_unified_shared_memory_type_intel;
1400
1401/* cl_unified_shared_memory_type_intel */
1402#define CL_MEM_TYPE_UNKNOWN_INTEL 0x4196
1403#define CL_MEM_TYPE_HOST_INTEL 0x4197
1404#define CL_MEM_TYPE_DEVICE_INTEL 0x4198
1405#define CL_MEM_TYPE_SHARED_INTEL 0x4199
1406
1407typedef cl_uint cl_mem_advice_intel;
1408
1409/* cl_mem_advice_intel */
1410/* Enum values 0x4208-0x420F are reserved for future memory advices. */
1411
1412/* cl_kernel_exec_info */
1413#define CL_KERNEL_EXEC_INFO_INDIRECT_HOST_ACCESS_INTEL 0x4200
1414#define CL_KERNEL_EXEC_INFO_INDIRECT_DEVICE_ACCESS_INTEL 0x4201
1415#define CL_KERNEL_EXEC_INFO_INDIRECT_SHARED_ACCESS_INTEL 0x4202
1416#define CL_KERNEL_EXEC_INFO_USM_PTRS_INTEL 0x4203
1417
1418/* cl_command_type */
1419#define CL_COMMAND_MEMFILL_INTEL 0x4204
1420#define CL_COMMAND_MEMCPY_INTEL 0x4205
1421#define CL_COMMAND_MIGRATEMEM_INTEL 0x4206
1422#define CL_COMMAND_MEMADVISE_INTEL 0x4207
1423
1424extern CL_API_ENTRY void* CL_API_CALL
1425clHostMemAllocINTEL(
1426 cl_context context,
1427 const cl_mem_properties_intel* properties,
1428 size_t size,
1429 cl_uint alignment,
1430 cl_int* errcode_ret);
1431
1432typedef void* (CL_API_CALL *
1433clHostMemAllocINTEL_fn)(
1434 cl_context context,
1435 const cl_mem_properties_intel* properties,
1436 size_t size,
1437 cl_uint alignment,
1438 cl_int* errcode_ret);
1439
1440extern CL_API_ENTRY void* CL_API_CALL
1441clDeviceMemAllocINTEL(
1442 cl_context context,
1443 cl_device_id device,
1444 const cl_mem_properties_intel* properties,
1445 size_t size,
1446 cl_uint alignment,
1447 cl_int* errcode_ret);
1448
1449typedef void* (CL_API_CALL *
1450clDeviceMemAllocINTEL_fn)(
1451 cl_context context,
1452 cl_device_id device,
1453 const cl_mem_properties_intel* properties,
1454 size_t size,
1455 cl_uint alignment,
1456 cl_int* errcode_ret);
1457
1458extern CL_API_ENTRY void* CL_API_CALL
1459clSharedMemAllocINTEL(
1460 cl_context context,
1461 cl_device_id device,
1462 const cl_mem_properties_intel* properties,
1463 size_t size,
1464 cl_uint alignment,
1465 cl_int* errcode_ret);
1466
1467typedef void* (CL_API_CALL *
1468clSharedMemAllocINTEL_fn)(
1469 cl_context context,
1470 cl_device_id device,
1471 const cl_mem_properties_intel* properties,
1472 size_t size,
1473 cl_uint alignment,
1474 cl_int* errcode_ret);
1475
1476extern CL_API_ENTRY cl_int CL_API_CALL
1477clMemFreeINTEL(
1478 cl_context context,
1479 void* ptr);
1480
1481typedef cl_int (CL_API_CALL *
1482clMemFreeINTEL_fn)(
1483 cl_context context,
1484 void* ptr);
1485
1486extern CL_API_ENTRY cl_int CL_API_CALL
1487clMemBlockingFreeINTEL(
1488 cl_context context,
1489 void* ptr);
1490
1491typedef cl_int (CL_API_CALL *
1492clMemBlockingFreeINTEL_fn)(
1493 cl_context context,
1494 void* ptr);
1495
1496extern CL_API_ENTRY cl_int CL_API_CALL
1497clGetMemAllocInfoINTEL(
1498 cl_context context,
1499 const void* ptr,
1500 cl_mem_info_intel param_name,
1501 size_t param_value_size,
1502 void* param_value,
1503 size_t* param_value_size_ret);
1504
1505typedef cl_int (CL_API_CALL *
1506clGetMemAllocInfoINTEL_fn)(
1507 cl_context context,
1508 const void* ptr,
1509 cl_mem_info_intel param_name,
1510 size_t param_value_size,
1511 void* param_value,
1512 size_t* param_value_size_ret);
1513
1514extern CL_API_ENTRY cl_int CL_API_CALL
1515clSetKernelArgMemPointerINTEL(
1516 cl_kernel kernel,
1517 cl_uint arg_index,
1518 const void* arg_value);
1519
1520typedef cl_int (CL_API_CALL *
1521clSetKernelArgMemPointerINTEL_fn)(
1522 cl_kernel kernel,
1523 cl_uint arg_index,
1524 const void* arg_value);
1525
1526extern CL_API_ENTRY cl_int CL_API_CALL
1527clEnqueueMemsetINTEL( /* Deprecated */
1528 cl_command_queue command_queue,
1529 void* dst_ptr,
1530 cl_int value,
1531 size_t size,
1532 cl_uint num_events_in_wait_list,
1533 const cl_event* event_wait_list,
1534 cl_event* event);
1535
1536typedef cl_int (CL_API_CALL *
1537clEnqueueMemsetINTEL_fn)( /* Deprecated */
1538 cl_command_queue command_queue,
1539 void* dst_ptr,
1540 cl_int value,
1541 size_t size,
1542 cl_uint num_events_in_wait_list,
1543 const cl_event* event_wait_list,
1544 cl_event* event);
1545
1546extern CL_API_ENTRY cl_int CL_API_CALL
1547clEnqueueMemFillINTEL(
1548 cl_command_queue command_queue,
1549 void* dst_ptr,
1550 const void* pattern,
1551 size_t pattern_size,
1552 size_t size,
1553 cl_uint num_events_in_wait_list,
1554 const cl_event* event_wait_list,
1555 cl_event* event);
1556
1557typedef cl_int (CL_API_CALL *
1558clEnqueueMemFillINTEL_fn)(
1559 cl_command_queue command_queue,
1560 void* dst_ptr,
1561 const void* pattern,
1562 size_t pattern_size,
1563 size_t size,
1564 cl_uint num_events_in_wait_list,
1565 const cl_event* event_wait_list,
1566 cl_event* event);
1567
1568extern CL_API_ENTRY cl_int CL_API_CALL
1569clEnqueueMemcpyINTEL(
1570 cl_command_queue command_queue,
1571 cl_bool blocking,
1572 void* dst_ptr,
1573 const void* src_ptr,
1574 size_t size,
1575 cl_uint num_events_in_wait_list,
1576 const cl_event* event_wait_list,
1577 cl_event* event);
1578
1579typedef cl_int (CL_API_CALL *
1580clEnqueueMemcpyINTEL_fn)(
1581 cl_command_queue command_queue,
1582 cl_bool blocking,
1583 void* dst_ptr,
1584 const void* src_ptr,
1585 size_t size,
1586 cl_uint num_events_in_wait_list,
1587 const cl_event* event_wait_list,
1588 cl_event* event);
1589
1590#ifdef CL_VERSION_1_2
1591
1592/* Because these APIs use cl_mem_migration_flags, they require
1593 OpenCL 1.2: */
1594
1595extern CL_API_ENTRY cl_int CL_API_CALL
1596clEnqueueMigrateMemINTEL(
1597 cl_command_queue command_queue,
1598 const void* ptr,
1599 size_t size,
1600 cl_mem_migration_flags flags,
1601 cl_uint num_events_in_wait_list,
1602 const cl_event* event_wait_list,
1603 cl_event* event);
1604
1605typedef cl_int (CL_API_CALL *
1606clEnqueueMigrateMemINTEL_fn)(
1607 cl_command_queue command_queue,
1608 const void* ptr,
1609 size_t size,
1610 cl_mem_migration_flags flags,
1611 cl_uint num_events_in_wait_list,
1612 const cl_event* event_wait_list,
1613 cl_event* event);
1614
1615#endif
1616
1617extern CL_API_ENTRY cl_int CL_API_CALL
1618clEnqueueMemAdviseINTEL(
1619 cl_command_queue command_queue,
1620 const void* ptr,
1621 size_t size,
1622 cl_mem_advice_intel advice,
1623 cl_uint num_events_in_wait_list,
1624 const cl_event* event_wait_list,
1625 cl_event* event);
1626
1627typedef cl_int (CL_API_CALL *
1628clEnqueueMemAdviseINTEL_fn)(
1629 cl_command_queue command_queue,
1630 const void* ptr,
1631 size_t size,
1632 cl_mem_advice_intel advice,
1633 cl_uint num_events_in_wait_list,
1634 const cl_event* event_wait_list,
1635 cl_event* event);
1636
1637/***************************************************
1638* cl_intel_create_buffer_with_properties extension *
1639****************************************************/
1640
1641#define cl_intel_create_buffer_with_properties 1
1642
1643extern CL_API_ENTRY cl_mem CL_API_CALL
1644clCreateBufferWithPropertiesINTEL(
1645 cl_context context,
1646 const cl_mem_properties_intel* properties,
1647 cl_mem_flags flags,
1648 size_t size,
1649 void * host_ptr,
1650 cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0;
1651
1652typedef cl_mem (CL_API_CALL *
1653clCreateBufferWithPropertiesINTEL_fn)(
1654 cl_context context,
1655 const cl_mem_properties_intel* properties,
1656 cl_mem_flags flags,
1657 size_t size,
1658 void * host_ptr,
1659 cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0;
1660
1661/******************************************
1662* cl_intel_mem_channel_property extension *
1663*******************************************/
1664
1665#define CL_MEM_CHANNEL_INTEL 0x4213
1666
1667/*********************************
1668* cl_intel_mem_force_host_memory *
1669**********************************/
1670
1671#define cl_intel_mem_force_host_memory 1
1672
1673/* cl_mem_flags */
1674#define CL_MEM_FORCE_HOST_MEMORY_INTEL (1 << 20)
1675
1676/***************************************************************
1677* cl_intel_command_queue_families
1678***************************************************************/
1679#define cl_intel_command_queue_families 1
1680
1681typedef cl_bitfield cl_command_queue_capabilities_intel;
1682
1683#define CL_QUEUE_FAMILY_MAX_NAME_SIZE_INTEL 64
1684
1685typedef struct _cl_queue_family_properties_intel {
1686 cl_command_queue_properties properties;
1687 cl_command_queue_capabilities_intel capabilities;
1688 cl_uint count;
1689 char name[CL_QUEUE_FAMILY_MAX_NAME_SIZE_INTEL];
1690} cl_queue_family_properties_intel;
1691
1692/* cl_device_info */
1693#define CL_DEVICE_QUEUE_FAMILY_PROPERTIES_INTEL 0x418B
1694
1695/* cl_queue_properties */
1696#define CL_QUEUE_FAMILY_INTEL 0x418C
1697#define CL_QUEUE_INDEX_INTEL 0x418D
1698
1699/* cl_command_queue_capabilities_intel */
1700#define CL_QUEUE_DEFAULT_CAPABILITIES_INTEL 0
1701#define CL_QUEUE_CAPABILITY_CREATE_SINGLE_QUEUE_EVENTS_INTEL (1 << 0)
1702#define CL_QUEUE_CAPABILITY_CREATE_CROSS_QUEUE_EVENTS_INTEL (1 << 1)
1703#define CL_QUEUE_CAPABILITY_SINGLE_QUEUE_EVENT_WAIT_LIST_INTEL (1 << 2)
1704#define CL_QUEUE_CAPABILITY_CROSS_QUEUE_EVENT_WAIT_LIST_INTEL (1 << 3)
1705#define CL_QUEUE_CAPABILITY_TRANSFER_BUFFER_INTEL (1 << 8)
1706#define CL_QUEUE_CAPABILITY_TRANSFER_BUFFER_RECT_INTEL (1 << 9)
1707#define CL_QUEUE_CAPABILITY_MAP_BUFFER_INTEL (1 << 10)
1708#define CL_QUEUE_CAPABILITY_FILL_BUFFER_INTEL (1 << 11)
1709#define CL_QUEUE_CAPABILITY_TRANSFER_IMAGE_INTEL (1 << 12)
1710#define CL_QUEUE_CAPABILITY_MAP_IMAGE_INTEL (1 << 13)
1711#define CL_QUEUE_CAPABILITY_FILL_IMAGE_INTEL (1 << 14)
1712#define CL_QUEUE_CAPABILITY_TRANSFER_BUFFER_IMAGE_INTEL (1 << 15)
1713#define CL_QUEUE_CAPABILITY_TRANSFER_IMAGE_BUFFER_INTEL (1 << 16)
1714#define CL_QUEUE_CAPABILITY_MARKER_INTEL (1 << 24)
1715#define CL_QUEUE_CAPABILITY_BARRIER_INTEL (1 << 25)
1716#define CL_QUEUE_CAPABILITY_KERNEL_INTEL (1 << 26)
Sheri Zhang79cb9452021-09-07 14:51:49 +01001717
Anthony Barbier6ff3b192017-09-04 18:44:23 +01001718#ifdef __cplusplus
1719}
1720#endif
1721
1722
1723#endif /* __CL_EXT_H */