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Pablo Tellod75f9e92019-08-23 16:26:26 +01001/*
2 * Copyright (c) 2019 ARM Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24#ifndef __ARM_COMPUTE_NEROIALIGNLAYER_H__
25#define __ARM_COMPUTE_NEROIALIGNLAYER_H__
26
27#include "arm_compute/core/NEON/kernels/NEROIPoolingLayerKernel.h"
28#include "arm_compute/runtime/NEON/INESimpleFunction.h"
29
30namespace arm_compute
31{
32class ITensor;
33
34/** Basic function to run @ref NEROIAlignLayerKernel.
35 *
36 * This function calls the following NEON kernels:
37 * -# @ref NEROIAlignLayerKernel
38 *
39 */
40class NEROIAlignLayer : public INESimpleFunction
41{
42public:
43 /** Set the input and output tensors.
44 *
Pablo Telloebe2e8c2019-08-23 16:26:26 +010045 * @param[in] input Source tensor. Data types supported: QASYMM8/F16/F32.
Pablo Tellod75f9e92019-08-23 16:26:26 +010046 * @param[in] rois ROIs tensor, it is a 2D tensor of size [5, N] (where N is the number of ROIs) containing top left and bottom right corner
Pablo Telloebe2e8c2019-08-23 16:26:26 +010047 * as coordinate of an image and batch_id of ROI [ batch_id, x1, y1, x2, y2 ].
48 * Data types supported: QASYMM16 with scale of 0.125 and 0 offset if @p input is QASYMM8, otherwise same as @p input
Pablo Tellod75f9e92019-08-23 16:26:26 +010049 * @param[out] output Destination tensor. Data types supported: Same as @p input.
50 * @param[in] pool_info Contains pooling operation information described in @ref ROIPoolingLayerInfo.
51 *
52 * @note The x and y dimensions of @p output tensor must be the same as @p pool_info 's pooled
53 * width and pooled height.
54 * @note The z dimensions of @p output tensor and @p input tensor must be the same.
55 * @note The fourth dimension of @p output tensor must be the same as the number of elements in @p rois array.
56 */
57 void configure(const ITensor *input, const ITensor *rois, ITensor *output, const ROIPoolingLayerInfo &pool_info);
Pablo Telloebe2e8c2019-08-23 16:26:26 +010058 /** Static function to check if given info will lead to a valid configuration of @ref NEROIAlignLayerKernel
Pablo Tellod75f9e92019-08-23 16:26:26 +010059 *
Pablo Telloebe2e8c2019-08-23 16:26:26 +010060 * @param[in] input Source tensor info. Data types supported: QASYMM8/F16/F32.
61 * @param[in] rois ROIs tensor info. Data types supported: QASYMM16 with scale of 0.125 and 0 offset if @p input is QASYMM8,
62 * otherwise same as @p input
Pablo Tellod75f9e92019-08-23 16:26:26 +010063 * @param[in] output Destination tensor info. Data types supported: Same as @p input.
64 * @param[in] pool_info Contains pooling operation information described in @ref ROIPoolingLayerInfo.
65 *
66 * @note The x and y dimensions of @p output tensor must be the same as @p pool_info 's pooled
67 * width and pooled height.
68 * @note The z dimensions of @p output tensor and @p input tensor must be the same.
69 * @note The fourth dimension of @p output tensor must be the same as the number of elements in @p rois array.
70 *
71 * @return a Status
72 */
73 static Status validate(const ITensorInfo *input, const ITensorInfo *rois, ITensorInfo *output, const ROIPoolingLayerInfo &pool_info);
74};
75} // namespace arm_compute
76#endif /* __ARM_COMPUTE_NEROIALIGNLAYER_H__ */